Tenca et al., 2003 - Google Patents
An efficient and scalable radix-4 modular multiplier design using recoding techniquesTenca et al., 2003
View PDF- Document ID
- 14217779212937657081
- Author
- Tenca A
- Tawalbeh L
- Publication year
- Publication venue
- The Thrity-Seventh Asilomar Conference on Signals, Systems & Computers, 2003
External Links
Snippet
This paper presents the algorithm and architecture of a scalable radix-4 Montgomery multiplier. The straightforward implementation of a radix-4 design based on the techniques already published results in a poor solution. In this paper we present an algorithm and …
- 238000000034 method 0 title abstract description 8
Classifications
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- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
- G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
- G06F7/5336—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm
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