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Kaushik et al., 2020 - Google Patents

Designing predictable cache coherence protocols for multi-core real-time systems

Kaushik et al., 2020

Document ID
10611934573619305809
Author
Kaushik A
Hassan M
Patel H
Publication year
Publication venue
IEEE Transactions on Computers

External Links

Snippet

This article addresses the challenge of allowing simultaneous and predictable accesses to shared data on multi-core systems. We propose a collection of predictable cache coherence protocols, which mandate the use of certain design invariants to ensure predictability. In …
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Classifications

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    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
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    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G06F12/0826—Limited pointers directories; State-only directories without pointers
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