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Heimerdinger et al., 1974 - Google Patents

Architectural considerations in interfacing a parallel processor to the air traffic control system

Heimerdinger et al., 1974

Document ID
663350431924156355
Author
Heimerdinger W
Muething G
Nuspl S
Wing L
Publication year
Publication venue
Sagamore Computer Conference

External Links

Snippet

Interfacing of parallel processors and other special purpose computers to a general purpose host is a very important consideration in effectively using these processors. This paper describes how a parallel processor configuration is connected to a host machine, in this …
Continue reading at link.springer.com (other versions)

Classifications

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    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant details of failing over
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