RISC-V XV6/Linux SoC, marchID: 0x2b

Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.

Tiny ASIC implementation for "The Era of 1-bit LLMs All Large Language Models are in 1.58 Bits" matrix multiplication unit

JSilicon: A dual-mode 8-bit CPU core designed entirely from scratch by an AI major during mandatory military service in South Korea. This open-source Verilog project proves that real silicon design — from ALU to CPU architecture — is possible even under the most extreme constraints.

Playground for VGA projects on Tiny Tapeout

Submission template for Tiny Tapeout IHP shuttles - Verilog HDL Projects

Tiny Tapeout 8

"The Drop" ASIC 640x480 60Hz audio visual demo

Neuromorphic ASIC with 96 neurons on Tiny Tapeout 7

Tiny Tapeout Demo board for TT01, 02 & 03

Generator for wokwi schematics that implement lookup tables in conjunctive normal form (CNF), i.e. with AND and OR gates

Plays a tune over a piezo speaker connected to GPIO pins

Plays a tune over a piezo speaker connected to GPIO pins

Custom ASIC design which decodes a PS/2 keyboard, furthermore it encodes and outputs the data as morse code

ASIC version of Project Euler problem 1

Attempt at 24-bit (RGB888) VGA DAC

Example Neural Network Accelerator Chip Design

Implementation of a Ring Oscillator-based Physically Unclonable Function (PUF) in Sky130, with 8 bits of Challenge-Response Pairs (CRP)

TT07 resub of tt04-raybox-zero "3D" VGA ray caster demo (like Wolf3D)

Based on: https://github.com/TinyTapeout/tt04-verilog-demo