Stars
An operating system developed at University of Wrocław tergeting the RISC-V architecture
A minimal GPU design in Verilog to learn how GPUs work from the ground up
Hardware transactions library for Amaranth
Synthesizer plug-in (previously released as Vember Audio Surge)
An improved and personalized version of TJAPlayer3-Develop-Rewrite, .tja chart player axed on entertainment and creativity.
RISC-V out-of-order core for education and research purposes
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
A modern hardware definition language and toolchain based on Python
A Python library for IEC62056-21, Local Data Readout of Energy Meters. Former IEC1107
Tutorial on hardware design using Bluespec BH (Bluespec Classic) for Haskell programmers at ACM ICFP 2020 conference
Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.
How to use the Intel JTAG primitive without using virtual JTAG
GitHub Action for continuous benchmarking to keep performance
An environmental monitoring and regulation system
Design document for RiscyOO processor
RSD: RISC-V Out-of-Order Superscalar Processor
A collection of reusable Clash designs/examples
Tomu FPGA (Fomu for short), a FPGA which fits inside your USB port!