Small footprint and configurable DRAM core

The Ultra-Low Power RISC-V Core

3-stage RV32IMACZb* processor with debug

Optimized C library for EC operations on curve secp256k1

This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also discusses the steps to modify the current IP layouts inorder to …

Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130

Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns

Linux Capable 32-bit RISC-V based SoC in System Verilog

synthesiseable ieee 754 floating point library in verilog

Single-file public domain libraries for C/C++

📚 single header utf8 string functions for C and C++

List of single-file C/C++ libraries, with emphasis on clause-less licenses.

stb single-file public domain libraries for C/C++

An arrogant, slowly-progressing personal manifesto on the optimal future for the design, construction, and practice of operating systems.