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1. e16-4yp-neuromorphic-architecture e16-4yp-neuromorphic-architecture Public

   Forked from cepdnaclk/e16-4yp-neuromorphic-architecture

   VHDL

2. e18-4yp-Neuromorphic-NoC-Architecture-for-SNNs e18-4yp-Neuromorphic-NoC-Architecture-for-SNNs Public

   Forked from cepdnaclk/e18-4yp-Neuromorphic-NoC-Architecture-for-SNNs

   Verilog

3. e17-4yp-Neuromorphic-NoC-Architecture-for-SNNs e17-4yp-Neuromorphic-NoC-Architecture-for-SNNs Public

   Forked from cepdnaclk/e17-4yp-Neuromorphic-NoC-Architecture-for-SNNs

   This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, and test it on FPGA.

   Verilog