Merge pull request VHDL#19 from PLC2/PLC2/release

Fix: Use EndOfTestReport to close simulation

Preparation towards v1.4.0

Ported changes from 'Vivado' branch to 'master' branch for v1.3.0.

Integration of pending enhancement from branch 'release'. Split of Po…

…C and Python Infrastructure (pyIPCMI) into 2 repositories.

PoC v1.2.0 with Vivado-specific fixes

Added constraint files for Xilinx AC701 board.

PoC v1.1.2 with Vivado-specific fixes.

PoC v1.1.1 with Vivado-specific fixes.