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Muhammad M. Khellah
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Publications
- 2009
- [j13]Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah
, Vivek De:
SSMCB: Low-Power Variation-Tolerant Source-Synchronous Multicycle Bus. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(2): 384-394 (2009) - [j12]Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah
Serial-Link Bus: A Low-Power On-Chip Bus Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(9): 2020-2032 (2009) - 2008
- [j11]Maged Ghoneima, Muhammad M. Khellah
Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(7): 1904-1910 (2008) - 2007
- [j7]Maged Ghoneima
Variation-Tolerant and Low-Power Source-Synchronous Multicycle On-Chip Interconnect Scheme. VLSI Design 2007: 95402:1-95402:12 (2007) - 2006
- [j6]Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah
Formal derivation of optimal active shielding for low-power on-chip buses. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5): 821-836 (2006) - [j5]Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah
Reducing the Effective Coupling Capacitance in Buses Using Threshold Voltage Adjustment Techniques. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(9): 1928-1933 (2006) - [c11]Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De:
Reducing the data switching activity of serialized datastreams. ISCAS 2006 - [c9]Keith A. Bowman
Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance. ISLPED 2006: 79-84 - [c8]Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah
Reducing the Data Switching Activity on Serial Link Buses. ISQED 2006: 425-432 - 2005
- [c5]Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah
Serial-link bus: a low-power on-chip bus architecture. ICCAD 2005: 541-546 - [c4]Muhammad M. Khellah
A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors. ICCD 2005: 253-257 - [c3]Yehea I. Ismail, Muhammad M. Khellah
Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses. ISCAS (1) 2005: 592-595
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