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"SHMT: An SRAM and HBM Hybrid Computing-in-Memory Architecture With ..."

Xiangqu Fu et al. (2025)

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DOI: 10.1109/TCSI.2025.3561245

access: closed

type: Journal Article

metadata version: 2025-08-24

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Xiangqu Fu, Jinshan Yue, Muhammad Faizan, Zhi Li, Qiang Huo, Feng Zhang:
SHMT: An SRAM and HBM Hybrid Computing-in-Memory Architecture With Optimized KV Cache for Multimodal Transformer. IEEE Trans. Circuits Syst. I Regul. Pap. 72(6): 2712-2725 (2025)

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