From a6ca0372accf55e71168c32dc90d99b79a452d2c Mon Sep 17 00:00:00 2001 From: rokath Date: Fri, 31 Jan 2025 15:06:19 +0000 Subject: [PATCH 001/187] Upper-Lower case adaptions in some comments. --- src/triceDefaultConfig.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/triceDefaultConfig.h b/src/triceDefaultConfig.h index cb6b80ce8..2f0f0ed38 100644 --- a/src/triceDefaultConfig.h +++ b/src/triceDefaultConfig.h @@ -90,8 +90,8 @@ extern "C" { #endif #ifndef TRICE_DEFAULT_PARAMETER_BIT_WIDTH -//! TRICE_DEFAULT_PARAMETER_BIT_WIDTH is the default parameter bit width for TRICE macros not specifying the parameter bit width: 8, 16, 32 or 64. -//! If for example the majority of your values is 16 bit, it makes sense to set this value to 16 to use TRICE for them and to use TRICE32 explicitely for 32-bit values. +//! TRICE_DEFAULT_PARAMETER_BIT_WIDTH is the default parameter bit width for Trice macros not specifying the parameter bit width: 8, 16, 32 or 64. +//! If for example the majority of your values is 16 bit, it makes sense to set this value to 16 to use Trice for them and to use Trice32 explicitely for 32-bit values. //! The trice tool CLI switch "-defaultTRICEBitwidth" needs to be set to the same bit width, default is 32. #define TRICE_DEFAULT_PARAMETER_BIT_WIDTH 32 #endif @@ -116,7 +116,7 @@ extern "C" { //! The TRICE_PROTECT switch is only relevant for the deferred trice modes TRICE_DOUBLE_BUFFER and TRICE_RING_BUFFER. //! The trice library works well, when less data are produced in the average than transmittable and when in the double buffer case the TriceTransfer //! function is called, before too much data in a half buffer according to a good configuration. If that is guarantied you do not need to enable TRICE_PROTECT. -//! If because of an potential error this is not guarantied, you should enable TRICE_PROTECT. This slows down the TRICE macros a bit, but makes buffer overflows impossible. +//! If because of an potential error this is not guarantied, you should enable TRICE_PROTECT. This slows down the Trice macros a bit, but makes buffer overflows impossible. //! A ring buffer cannot overflow in a first assumption, because old, not yet transmitted, trices are overwritten by newer ones. //! But that can happen only to parts of trices. The ring buffer read out function relies on consistent data. If it gets data garbage, wrong values //! for the trice lengths are possible and buffer overruns not avoidable. When enabling TRICE_PROTECT, new trices are only written into the deferred buffer, @@ -126,13 +126,13 @@ extern "C" { #endif #if !defined(TRICE_BUFFER) && !TRICE_OFF -//! TRICE_BUFFER selects, where the TRICE macros accumulate the trice data during a single TRICE execution. Selectable options: +//! TRICE_BUFFER selects, where the Trice macros accumulate the trice data during a single Trice execution. Selectable options: //! - TRICE_STACK_BUFFER: No additional buffer is needed, what makes sense for single task systems with direct output only. //! - TRICE_STATIC_BUFFER: A single trice is stored in a separate static buffer, what makes sense for multi-tasking systems with direct output only. -//! - TRICE_DOUBLE_BUFFER: TRICE macros write direct into a double buffer without any additional management action. -//! This is the fastest execution option for TRICE macros but needs more RAM. Used for deferred output and optional additional direct output. -//! - TRICE_RING_BUFFER: TRICE macros write direct into a ring buffer without any additional management action. -//! This is a fast but not the fastest execution option for TRICE macros and needs less RAM. Used for deferred output and optional additional direct output. +//! - TRICE_DOUBLE_BUFFER: Trice macros write direct into a double buffer without any additional management action. +//! This is the fastest execution option for Trice macros but needs more RAM. Used for deferred output and optional additional direct output. +//! - TRICE_RING_BUFFER: Trice macros write direct into a ring buffer without any additional management action. +//! This is a fast but not the fastest execution option for Trice macros and needs less RAM. Used for deferred output and optional additional direct output. #error TRICE_BUFFER type not specified in triceConfig.h, please add "#define TRICE_BUFFER TRICE_RING_BUFFER" for example. #endif @@ -304,7 +304,7 @@ extern "C" { #ifndef TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE //! TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE == 1 speeds up RTT transfer by using function SEGGER_Write_RTT0_NoCheck32. //! - This setting results in unframed RTT trice packages and requires the `-packageFraming none` switch for the appropriate trice tool instance. -//! This squeezes the whole TRICE macro into about 100 processor clocks leaving the data already inside the SEGGER _acUpBuffer. +//! This squeezes the whole Trice macro into about 100 processor clocks leaving the data already inside the SEGGER _acUpBuffer. //! - If you do not wish RTT, or wish RTT with framing, simply set this value to 0. //! - The trice tool CLI switch -d16 is needed too, because for alignment reasons the 16bit ID field is doubled for 16bit timestamp trice messages. #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 0 @@ -345,8 +345,8 @@ extern "C" { #ifndef TRICE_CYCLE_COUNTER //! TRICE_CYCLE_COUNTER adds a cycle counter to each trice message. -//! If 0, do not add cycle counter. The TRICE macros are a bit faster. Lost TRICEs are not detectable by the trice tool. The cycle counter byte ist statically 0xC0. -//! If 1, add an 8-bit cycle counter. The TRICE macros are a bit slower. Lost TRICEs are detectable by the trice tool. The cycle counter byte changes (recommended). +//! If 0, do not add cycle counter. The Trice macros are a bit faster. Lost TRICEs are not detectable by the trice tool. The cycle counter byte ist statically 0xC0. +//! If 1, add an 8-bit cycle counter. The Trice macros are a bit slower. Lost TRICEs are detectable by the trice tool. The cycle counter byte changes (recommended). #define TRICE_CYCLE_COUNTER 1 #endif From 4e156fae52938c6d471082e1145c2d8dff6b6138 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Mon, 10 Feb 2025 22:28:47 +0100 Subject: [PATCH 002/187] Update README.md --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 65d523a10..74669975a 100644 --- a/README.md +++ b/README.md @@ -160,6 +160,7 @@ git clone https://github.com/rokath/trice.git - [qpspy](https://www.state-machine.com/qtools/qpspy.html) (C/C++) - [Real-time binary data logging/tracing toolkit](https://github.com/RTEdbg/RTEdbg) - [Serial-Studio](https://github.com/Serial-Studio/Serial-Studio) (Data visualisation) +- [Tonbandgerät](https://github.com/schilkp/Tonbandgeraet) (A small embedded systems tracer with support for bare-metal and FreeRTOS-based targets) - [Traces](https://github.com/yotamr/traces) (API tracing framework for Linux C/C++ applications - [Zepyr Dictionary Based Logging](https://docs.zephyrproject.org/3.1.0/services/logging/index.html#dictionary-based-logging) From cb48e858138715bbf7781a549b9d3dc337dc3b50 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Thu, 13 Feb 2025 17:13:16 +0100 Subject: [PATCH 003/187] Issue #519 fix --- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- _test/_ringB_de_multi_cobs_ua/triceConfig.h | 2 +- .../TargetActivity.c | 8 +- .../_ringB_protect_de_tcobs_ua/triceConfig.h | 2 +- .../TargetActivity.c | 34 +- _test/_special_dblB_de_tcobs_ua/triceConfig.h | 2 +- _test/be_dblB_de_tcobs_ua/triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 0 .../triceConfig.h | 2 +- _test/dblB_de_cobs_ua/triceConfig.h | 2 +- _test/dblB_de_multi_cobs_ua/triceConfig.h | 2 +- _test/dblB_de_multi_nopf_ua/triceConfig.h | 2 +- _test/dblB_de_multi_tcobs_ua/triceConfig.h | 2 +- .../dblB_de_multi_xtea_cobs_ua/triceConfig.h | 2 +- .../dblB_de_multi_xtea_tcobs_ua/triceConfig.h | 2 +- _test/dblB_de_nopf_ua/triceConfig.h | 2 +- _test/dblB_de_tcobs_ua/triceConfig.h | 2 +- _test/dblB_de_xtea_cobs_ua/triceConfig.h | 2 +- _test/dblB_de_xtea_tcobs_ua/triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- _test/ringB_de_cobs_ua/triceConfig.h | 2 +- _test/ringB_de_multi_tcobs_ua/triceConfig.h | 2 +- .../ringB_de_multi_xtea_cobs_ua/triceConfig.h | 2 +- .../triceConfig.h | 2 +- _test/ringB_de_nopf_ua/triceConfig.h | 2 +- _test/ringB_de_tcobs_ua/triceConfig.h | 2 +- _test/ringB_de_xtea_cobs_ua/triceConfig.h | 2 +- _test/ringB_de_xtea_tcobs_ua/triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../triceConfig.h | 2 +- _test/special_for_debug/TargetActivity.c | 4 +- _test/special_for_debug/triceConfig.h | 2 +- .../TargetActivity.c | 8 +- .../triceConfig.h | 2 +- _test/stackB_di_nopf_aux32/SEGGER_RTT_Conf.h | 429 ++ _test/stackB_di_nopf_aux32/triceConfig.h | 2 +- _test/stackB_di_nopf_aux8/SEGGER_RTT_Conf.h | 429 ++ _test/stackB_di_nopf_aux8/triceConfig.h | 2 +- _test/stackB_di_nopf_rtt32/SEGGER_RTT_Conf.h | 429 ++ _test/stackB_di_nopf_rtt32/triceConfig.h | 2 +- _test/stackB_di_nopf_rtt8/SEGGER_RTT_Conf.h | 429 ++ _test/stackB_di_nopf_rtt8/triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ _test/stackB_di_xtea_cobs_rtt8/triceConfig.h | 2 +- _test/staticB_di_nopf_aux32/SEGGER_RTT_Conf.h | 429 ++ _test/staticB_di_nopf_aux32/triceConfig.h | 2 +- _test/staticB_di_nopf_aux8/SEGGER_RTT_Conf.h | 429 ++ _test/staticB_di_nopf_aux8/triceConfig.h | 2 +- _test/staticB_di_nopf_rtt32/SEGGER_RTT_Conf.h | 429 ++ _test/staticB_di_nopf_rtt32/triceConfig.h | 2 +- _test/staticB_di_nopf_rtt8/SEGGER_RTT_Conf.h | 429 ++ _test/staticB_di_nopf_rtt8/triceConfig.h | 2 +- .../staticB_di_tcobs_rtt32/SEGGER_RTT_Conf.h | 429 ++ _test/staticB_di_tcobs_rtt32/triceConfig.h | 2 +- _test/staticB_di_tcobs_rtt8/SEGGER_RTT_Conf.h | 429 ++ _test/staticB_di_tcobs_rtt8/triceConfig.h | 2 +- .../SEGGER_RTT_Conf.h | 429 ++ .../staticB_di_xtea_cobs_rtt32/triceConfig.h | 2 +- _test/testdata/triceCheck.c | 4502 ++++++++--------- examples/F030_inst/Core/Inc/SEGGER_RTT_Conf.h | 429 ++ examples/F030_inst/Core/Inc/triceConfig.h | 2 +- examples/F030_inst/Core/Src/stm32f0xx_it.c | 4 +- examples/G0B1_inst/Core/Inc/SEGGER_RTT_Conf.h | 429 ++ examples/G0B1_inst/Core/Inc/triceConfig.h | 2 +- examples/G0B1_inst/Core/Src/main.c | 4 +- examples/G0B1_inst/Core/Src/stm32g0xx_it.c | 2 +- examples/L432_inst/Core/Inc/SEGGER_RTT_Conf.h | 429 ++ examples/L432_inst/Core/Inc/triceConfig.h | 12 +- examples/L432_inst/Core/Src/main.c | 4 +- examples/L432_inst/Core/Src/stm32l4xx_it.c | 4 +- examples/exampleData/triceExamples.c | 88 +- examples/exampleData/triceLogDiagData.c | 28 +- 104 files changed, 15709 insertions(+), 2410 deletions(-) rename {src => _test/be_staticB_di_xtea_cobs_rtt32}/SEGGER_RTT_Conf.h (100%) create mode 100644 _test/dblB_di_nopf_rtt32__de_cobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/dblB_di_nopf_rtt32__de_multi_cobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/dblB_di_nopf_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/dblB_di_nopf_rtt8__de_cobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/dblB_di_nopf_rtt8__de_multi_cobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/dblB_di_nopf_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/ringB_di_cobs_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/ringB_di_cobs_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/ringB_di_nopf_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/ringB_di_nopf_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/ringB_di_tcobs_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h create mode 100644 _test/stackB_di_nopf_aux32/SEGGER_RTT_Conf.h create mode 100644 _test/stackB_di_nopf_aux8/SEGGER_RTT_Conf.h create mode 100644 _test/stackB_di_nopf_rtt32/SEGGER_RTT_Conf.h create mode 100644 _test/stackB_di_nopf_rtt8/SEGGER_RTT_Conf.h create mode 100644 _test/stackB_di_xtea_cobs_rtt8/SEGGER_RTT_Conf.h create mode 100644 _test/staticB_di_nopf_aux32/SEGGER_RTT_Conf.h create mode 100644 _test/staticB_di_nopf_aux8/SEGGER_RTT_Conf.h create mode 100644 _test/staticB_di_nopf_rtt32/SEGGER_RTT_Conf.h create mode 100644 _test/staticB_di_nopf_rtt8/SEGGER_RTT_Conf.h create mode 100644 _test/staticB_di_tcobs_rtt32/SEGGER_RTT_Conf.h create mode 100644 _test/staticB_di_tcobs_rtt8/SEGGER_RTT_Conf.h create mode 100644 _test/staticB_di_xtea_cobs_rtt32/SEGGER_RTT_Conf.h create mode 100644 examples/F030_inst/Core/Inc/SEGGER_RTT_Conf.h create mode 100644 examples/G0B1_inst/Core/Inc/SEGGER_RTT_Conf.h create mode 100644 examples/L432_inst/Core/Inc/SEGGER_RTT_Conf.h diff --git a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h index 114525dd1..7d1dbc3fd 100644 --- a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 // trice l -p jlink -args "-Device STM32F030R8 -if SWD -Speed 4000 -RTTChannel 0" -showID "deb:%04x" -hs off -pf cobs -d16=true #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h index 24ff57164..8f8e62c1f 100644 --- a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceConfig.h b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceConfig.h index efd75d273..3f02573ca 100644 --- a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceConfig.h +++ b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/triceConfig.h b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/triceConfig.h index 0d19549bf..dee30b55f 100644 --- a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/_ringB_de_multi_cobs_ua/triceConfig.h b/_test/_ringB_de_multi_cobs_ua/triceConfig.h index 2635b8f55..5eb799871 100644 --- a/_test/_ringB_de_multi_cobs_ua/triceConfig.h +++ b/_test/_ringB_de_multi_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE diff --git a/_test/_ringB_protect_de_tcobs_ua/TargetActivity.c b/_test/_ringB_protect_de_tcobs_ua/TargetActivity.c index 8b994e243..7413bad95 100644 --- a/_test/_ringB_protect_de_tcobs_ua/TargetActivity.c +++ b/_test/_ringB_protect_de_tcobs_ua/TargetActivity.c @@ -4,10 +4,10 @@ // Needed safety space is TRICE_DATA_OFFSET + (2*TRICE_SINGLE_MAX_SIZE)-4) = 208 // TRICE_DEFERRED_BUFFER_SIZE == 324 char* TargetActivity(void) { // -4 bytes TRICE_DATA_OFFSET = 320 bytes space - TRice("Hello "); // -8 bytes = 312 bytes space - TRice("World!\n"); // -8 bytes = 304 bytes space - TRice64("msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12); // -104 bytes = 200 bytes space + TRice(iD(15214), "Hello "); // -8 bytes = 312 bytes space + TRice(iD(15215), "World!\n"); // -8 bytes = 304 bytes space + TRice64(iD(15216), "msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12); // -104 bytes = 200 bytes space // so the next Trice does not fit - trice("Hello again\n"); // -4 bytes -> no fit! + trice(iD(15217), "Hello again\n"); // -4 bytes -> no fit! return "feed3322 Hello World!\nfeed3322 Twelve 64-bit values: -1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12"; } diff --git a/_test/_ringB_protect_de_tcobs_ua/triceConfig.h b/_test/_ringB_protect_de_tcobs_ua/triceConfig.h index a21dc829c..3120cb233 100644 --- a/_test/_ringB_protect_de_tcobs_ua/triceConfig.h +++ b/_test/_ringB_protect_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/_special_dblB_de_tcobs_ua/TargetActivity.c b/_test/_special_dblB_de_tcobs_ua/TargetActivity.c index 9ee6e42d4..454bda033 100644 --- a/_test/_special_dblB_de_tcobs_ua/TargetActivity.c +++ b/_test/_special_dblB_de_tcobs_ua/TargetActivity.c @@ -8,22 +8,22 @@ void TriceCheckSpecial( int n ) { static int64_t b64[4] = { 0, -1, -2, 0x3344555566666666 }; switch(n){ - case __LINE__: TRice("Hello World!\n"); //exp: feed3322 Hello World! - break; case __LINE__: TRICE8_F(ID(0), "info:FunctionNameWa", b8, sizeof(b8) /sizeof(int8_t) ); //exp: feed3322 FunctionNameWa(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: TRice8F("info:FunctionNameWb", b8, sizeof(b8) /sizeof(int8_t) ); //exp: feed3322 FunctionNameWb(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: Trice8F("info:FunctionNameWc", b8, sizeof(b8) /sizeof(int8_t) ); //exp: be16 FunctionNameWc(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: trice8F("info:FunctionNameWd", b8, sizeof(b8) /sizeof(int8_t) ); //exp: FunctionNameWd(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: TRICE16_F(ID(0), "info:FunctionNameXa", b16, sizeof(b16)/sizeof(int16_t) ); //exp: feed3322 FunctionNameXa(0000)(ffff)(fffe)(3344) - break; case __LINE__: TRice16F("info:FunctionNameXb", b16, sizeof(b16)/sizeof(int16_t) ); //exp: feed3322 FunctionNameXb(0000)(ffff)(fffe)(3344) - break; case __LINE__: Trice16F("info:FunctionNameXc", b16, sizeof(b16)/sizeof(int16_t) ); //exp: be16 FunctionNameXc(0000)(ffff)(fffe)(3344) - break; case __LINE__: trice16F("info:FunctionNameXd", b16, sizeof(b16)/sizeof(int16_t) ); //exp: FunctionNameXd(0000)(ffff)(fffe)(3344) - break; case __LINE__: TRICE32_F(ID(0), "info:FunctionNameYa", b32, sizeof(b32)/sizeof(int32_t) ); //exp: feed3322 FunctionNameYa(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: TRice32F("rpc:FunctionNameYb", b32, sizeof(b32)/sizeof(int32_t) ); //exp: feed3322 FunctionNameYb(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: Trice32F("rpc:FunctionNameYc", b32, sizeof(b32)/sizeof(int32_t) ); //exp: be16 FunctionNameYc(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: trice32F("call:FunctionNameYd", b32, sizeof(b32)/sizeof(int32_t) ); //exp: call:FunctionNameYd(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: TRICE64_F(ID(0), "info:FunctionNameZa", b64, sizeof(b64)/sizeof(int64_t) ); //exp: feed3322 FunctionNameZa(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: TRice64F("call:FunctionNameZb", b64, sizeof(b64)/sizeof(int64_t) ); //exp: feed3322 call FunctionNameZb(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: Trice64F("RPC:FunctionNameZc", b64, sizeof(b64)/sizeof(int64_t) ); //exp: be16 RPC:FunctionNameZc(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: trice64F("Rpc:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: Rpc:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + case __LINE__: TRice(iD(15197), "Hello World!\n"); //exp: feed3322 Hello World! + break; case __LINE__: TRICE8_F(ID(15198), "info:FunctionNameWa", b8, sizeof(b8) /sizeof(int8_t) ); //exp: feed3322 FunctionNameWa(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: TRice8F(iD(15199), "info:FunctionNameWb", b8, sizeof(b8) /sizeof(int8_t) ); //exp: feed3322 FunctionNameWb(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: Trice8F(iD(15200), "info:FunctionNameWc", b8, sizeof(b8) /sizeof(int8_t) ); //exp: be16 FunctionNameWc(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: trice8F(iD(15201), "info:FunctionNameWd", b8, sizeof(b8) /sizeof(int8_t) ); //exp: FunctionNameWd(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: TRICE16_F(ID(15202), "info:FunctionNameXa", b16, sizeof(b16)/sizeof(int16_t) ); //exp: feed3322 FunctionNameXa(0000)(ffff)(fffe)(3344) + break; case __LINE__: TRice16F(iD(15203), "info:FunctionNameXb", b16, sizeof(b16)/sizeof(int16_t) ); //exp: feed3322 FunctionNameXb(0000)(ffff)(fffe)(3344) + break; case __LINE__: Trice16F(iD(15204), "info:FunctionNameXc", b16, sizeof(b16)/sizeof(int16_t) ); //exp: be16 FunctionNameXc(0000)(ffff)(fffe)(3344) + break; case __LINE__: trice16F(iD(15205), "info:FunctionNameXd", b16, sizeof(b16)/sizeof(int16_t) ); //exp: FunctionNameXd(0000)(ffff)(fffe)(3344) + break; case __LINE__: TRICE32_F(ID(15206), "info:FunctionNameYa", b32, sizeof(b32)/sizeof(int32_t) ); //exp: feed3322 FunctionNameYa(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: TRice32F(iD(15207), "rpc:FunctionNameYb", b32, sizeof(b32)/sizeof(int32_t) ); //exp: feed3322 FunctionNameYb(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: Trice32F(iD(15208), "rpc:FunctionNameYc", b32, sizeof(b32)/sizeof(int32_t) ); //exp: be16 FunctionNameYc(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: trice32F(iD(15209), "call:FunctionNameYd", b32, sizeof(b32)/sizeof(int32_t) ); //exp: call:FunctionNameYd(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: TRICE64_F(ID(15210), "info:FunctionNameZa", b64, sizeof(b64)/sizeof(int64_t) ); //exp: feed3322 FunctionNameZa(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: TRice64F(iD(15211), "call:FunctionNameZb", b64, sizeof(b64)/sizeof(int64_t) ); //exp: feed3322 call FunctionNameZb(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: Trice64F(iD(15212), "RPC:FunctionNameZc", b64, sizeof(b64)/sizeof(int64_t) ); //exp: be16 RPC:FunctionNameZc(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: trice64F(iD(15213), "Rpc:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: Rpc:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) } } diff --git a/_test/_special_dblB_de_tcobs_ua/triceConfig.h b/_test/_special_dblB_de_tcobs_ua/triceConfig.h index 06088a428..367991d66 100644 --- a/_test/_special_dblB_de_tcobs_ua/triceConfig.h +++ b/_test/_special_dblB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/be_dblB_de_tcobs_ua/triceConfig.h b/_test/be_dblB_de_tcobs_ua/triceConfig.h index 8e7ba93c6..c9bc8b1b6 100644 --- a/_test/be_dblB_de_tcobs_ua/triceConfig.h +++ b/_test/be_dblB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/src/SEGGER_RTT_Conf.h b/_test/be_staticB_di_xtea_cobs_rtt32/SEGGER_RTT_Conf.h similarity index 100% rename from src/SEGGER_RTT_Conf.h rename to _test/be_staticB_di_xtea_cobs_rtt32/SEGGER_RTT_Conf.h diff --git a/_test/be_staticB_di_xtea_cobs_rtt32/triceConfig.h b/_test/be_staticB_di_xtea_cobs_rtt32/triceConfig.h index 91a0d9ccc..d79087eda 100644 --- a/_test/be_staticB_di_xtea_cobs_rtt32/triceConfig.h +++ b/_test/be_staticB_di_xtea_cobs_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_TRANSFER_ORDER_IS_BIG_ENDIAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER diff --git a/_test/dblB_de_cobs_ua/triceConfig.h b/_test/dblB_de_cobs_ua/triceConfig.h index f392b7ff9..98970268b 100644 --- a/_test/dblB_de_cobs_ua/triceConfig.h +++ b/_test/dblB_de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_cobs_ua/triceConfig.h b/_test/dblB_de_multi_cobs_ua/triceConfig.h index bc859e718..29b411a2c 100644 --- a/_test/dblB_de_multi_cobs_ua/triceConfig.h +++ b/_test/dblB_de_multi_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_nopf_ua/triceConfig.h b/_test/dblB_de_multi_nopf_ua/triceConfig.h index 0e4314a14..de08c58db 100644 --- a/_test/dblB_de_multi_nopf_ua/triceConfig.h +++ b/_test/dblB_de_multi_nopf_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_tcobs_ua/triceConfig.h b/_test/dblB_de_multi_tcobs_ua/triceConfig.h index 9e06d481e..108930ef3 100644 --- a/_test/dblB_de_multi_tcobs_ua/triceConfig.h +++ b/_test/dblB_de_multi_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_xtea_cobs_ua/triceConfig.h b/_test/dblB_de_multi_xtea_cobs_ua/triceConfig.h index 2db48582e..8616e3788 100644 --- a/_test/dblB_de_multi_xtea_cobs_ua/triceConfig.h +++ b/_test/dblB_de_multi_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_xtea_tcobs_ua/triceConfig.h b/_test/dblB_de_multi_xtea_tcobs_ua/triceConfig.h index 7a6a58ed5..23c25479d 100644 --- a/_test/dblB_de_multi_xtea_tcobs_ua/triceConfig.h +++ b/_test/dblB_de_multi_xtea_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_nopf_ua/triceConfig.h b/_test/dblB_de_nopf_ua/triceConfig.h index b04e91296..a90aba280 100644 --- a/_test/dblB_de_nopf_ua/triceConfig.h +++ b/_test/dblB_de_nopf_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_tcobs_ua/triceConfig.h b/_test/dblB_de_tcobs_ua/triceConfig.h index 04c771950..8973561fd 100644 --- a/_test/dblB_de_tcobs_ua/triceConfig.h +++ b/_test/dblB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_xtea_cobs_ua/triceConfig.h b/_test/dblB_de_xtea_cobs_ua/triceConfig.h index cf09fc362..a753cc313 100644 --- a/_test/dblB_de_xtea_cobs_ua/triceConfig.h +++ b/_test/dblB_de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_xtea_tcobs_ua/triceConfig.h b/_test/dblB_de_xtea_tcobs_ua/triceConfig.h index 3e1a0fac2..91ff29ffb 100644 --- a/_test/dblB_de_xtea_tcobs_ua/triceConfig.h +++ b/_test/dblB_de_xtea_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_cobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt32__de_cobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt32__de_cobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceConfig.h index a6681eaf7..7d3b383c5 100644 --- a/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceConfig.h index 77d589afb..886f1bac5 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceConfig.h index 5984e9fa9..8b4839594 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h index 603345a88..6ba8f55ba 100644 --- a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h index 80c1554ef..023fc1c97 100644 --- a/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt8__de_cobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt8__de_cobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt8__de_cobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceConfig.h index 44bedd991..8d23b6b4b 100644 --- a/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceConfig.h index c58c25bd2..0d3335e37 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceConfig.h index a3a499258..3d50cb160 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h index f09a1cdba..da74d1662 100644 --- a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/ringB_de_cobs_ua/triceConfig.h b/_test/ringB_de_cobs_ua/triceConfig.h index 931e53e78..4b5e1b349 100644 --- a/_test/ringB_de_cobs_ua/triceConfig.h +++ b/_test/ringB_de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_OUTPUT 1 diff --git a/_test/ringB_de_multi_tcobs_ua/triceConfig.h b/_test/ringB_de_multi_tcobs_ua/triceConfig.h index 2635b8f55..5eb799871 100644 --- a/_test/ringB_de_multi_tcobs_ua/triceConfig.h +++ b/_test/ringB_de_multi_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE diff --git a/_test/ringB_de_multi_xtea_cobs_ua/triceConfig.h b/_test/ringB_de_multi_xtea_cobs_ua/triceConfig.h index 12cae32be..5e79ed555 100644 --- a/_test/ringB_de_multi_xtea_cobs_ua/triceConfig.h +++ b/_test/ringB_de_multi_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_OUTPUT 1 diff --git a/_test/ringB_de_multi_xtea_tcobs_ua/triceConfig.h b/_test/ringB_de_multi_xtea_tcobs_ua/triceConfig.h index 0bc64b3e3..2c82ea710 100644 --- a/_test/ringB_de_multi_xtea_tcobs_ua/triceConfig.h +++ b/_test/ringB_de_multi_xtea_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_CONFIG_WARNINGS 0 diff --git a/_test/ringB_de_nopf_ua/triceConfig.h b/_test/ringB_de_nopf_ua/triceConfig.h index 2c913f87f..da99363e9 100644 --- a/_test/ringB_de_nopf_ua/triceConfig.h +++ b/_test/ringB_de_nopf_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/ringB_de_tcobs_ua/triceConfig.h b/_test/ringB_de_tcobs_ua/triceConfig.h index 716ac1fc5..9d139a976 100644 --- a/_test/ringB_de_tcobs_ua/triceConfig.h +++ b/_test/ringB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_OUTPUT 1 diff --git a/_test/ringB_de_xtea_cobs_ua/triceConfig.h b/_test/ringB_de_xtea_cobs_ua/triceConfig.h index 0d501d135..ee8a6db57 100644 --- a/_test/ringB_de_xtea_cobs_ua/triceConfig.h +++ b/_test/ringB_de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_OUTPUT 1 diff --git a/_test/ringB_de_xtea_tcobs_ua/triceConfig.h b/_test/ringB_de_xtea_tcobs_ua/triceConfig.h index 9e4943d4c..d4ac33ad7 100644 --- a/_test/ringB_de_xtea_tcobs_ua/triceConfig.h +++ b/_test/ringB_de_xtea_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_CONFIG_WARNINGS 0 diff --git a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceConfig.h b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceConfig.h index c84fd5f4e..78ba3d7aa 100644 --- a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceConfig.h b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceConfig.h index 3f0178615..8b6b5aa33 100644 --- a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h index 9b3e26450..05a099fe4 100644 --- a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h index ca0a8e840..1f1a92202 100644 --- a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/ringB_di_nopf_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h b/_test/ringB_di_nopf_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/ringB_di_nopf_rtt8__de_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/ringB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h b/_test/ringB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h index 40064c1cc..82f064dbe 100644 --- a/_test/ringB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceConfig.h b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceConfig.h index afcf43d1e..3c3d07b4d 100644 --- a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h index 0db366401..d7e2d0f84 100644 --- a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/special_for_debug/TargetActivity.c b/_test/special_for_debug/TargetActivity.c index 9d7adbc58..278c207f8 100644 --- a/_test/special_for_debug/TargetActivity.c +++ b/_test/special_for_debug/TargetActivity.c @@ -2,7 +2,7 @@ char* TargetActivity(void) { uint8_t buf[3] = {0xaa,0xbb,0xcc}; - TRice8B("%3x\n", buf, 3); - TRice8B("%3x\n", buf, 3); + TRice8B(iD(15218), "%3x\n", buf, 3); + TRice8B(iD(15219), "%3x\n", buf, 3); return "feed3322 aa bb cc\nfeed3322 aa bb cc"; } diff --git a/_test/special_for_debug/triceConfig.h b/_test/special_for_debug/triceConfig.h index 7ba6d5329..74d954d09 100644 --- a/_test/special_for_debug/triceConfig.h +++ b/_test/special_for_debug/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c b/_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c index 73a3d4d42..371fa44bc 100644 --- a/_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c +++ b/_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c @@ -3,10 +3,10 @@ // Needed safety space is TRICE_SINGLE_MAX_SIZE = 104 // TRICE_HALF_BUFFER_SIZE == 256 - TRICE_DATA_OFFSET == 64 = 192 bytes char* TargetActivity(void) { // -4 bytes TRICE_DATA_OFFSET = 188 bytes space - TRice("Hello "); // -8 bytes = 180 bytes space - TRice("World!\n"); // -8 bytes = 172 bytes space - TRice64("msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12); // -104 bytes = 68 bytes space + TRice(iD(15220), "Hello "); // -8 bytes = 180 bytes space + TRice(iD(15221), "World!\n"); // -8 bytes = 172 bytes space + TRice64(iD(15222), "msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12); // -104 bytes = 68 bytes space // so the next Trice does not fit - trice("Hello again\n"); // -4 bytes -> no fit! + trice(iD(15223), "Hello again\n"); // -4 bytes -> no fit! return "feed3322 Hello World!\nfeed3322 Twelve 64-bit values: -1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12"; } diff --git a/_test/special_protect_dblB_de_tcobs_ua/triceConfig.h b/_test/special_protect_dblB_de_tcobs_ua/triceConfig.h index 7ba6d5329..74d954d09 100644 --- a/_test/special_protect_dblB_de_tcobs_ua/triceConfig.h +++ b/_test/special_protect_dblB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/stackB_di_nopf_aux32/SEGGER_RTT_Conf.h b/_test/stackB_di_nopf_aux32/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/stackB_di_nopf_aux32/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/stackB_di_nopf_aux32/triceConfig.h b/_test/stackB_di_nopf_aux32/triceConfig.h index 06088a428..367991d66 100644 --- a/_test/stackB_di_nopf_aux32/triceConfig.h +++ b/_test/stackB_di_nopf_aux32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/stackB_di_nopf_aux8/SEGGER_RTT_Conf.h b/_test/stackB_di_nopf_aux8/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/stackB_di_nopf_aux8/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/stackB_di_nopf_aux8/triceConfig.h b/_test/stackB_di_nopf_aux8/triceConfig.h index 67fa0a334..4308b9b04 100644 --- a/_test/stackB_di_nopf_aux8/triceConfig.h +++ b/_test/stackB_di_nopf_aux8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/stackB_di_nopf_rtt32/SEGGER_RTT_Conf.h b/_test/stackB_di_nopf_rtt32/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/stackB_di_nopf_rtt32/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/stackB_di_nopf_rtt32/triceConfig.h b/_test/stackB_di_nopf_rtt32/triceConfig.h index 4ce8ce964..47a329709 100644 --- a/_test/stackB_di_nopf_rtt32/triceConfig.h +++ b/_test/stackB_di_nopf_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/stackB_di_nopf_rtt8/SEGGER_RTT_Conf.h b/_test/stackB_di_nopf_rtt8/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/stackB_di_nopf_rtt8/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/stackB_di_nopf_rtt8/triceConfig.h b/_test/stackB_di_nopf_rtt8/triceConfig.h index ffeb0986f..370c347a5 100644 --- a/_test/stackB_di_nopf_rtt8/triceConfig.h +++ b/_test/stackB_di_nopf_rtt8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/stackB_di_xtea_cobs_rtt8/SEGGER_RTT_Conf.h b/_test/stackB_di_xtea_cobs_rtt8/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/stackB_di_xtea_cobs_rtt8/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/stackB_di_xtea_cobs_rtt8/triceConfig.h b/_test/stackB_di_xtea_cobs_rtt8/triceConfig.h index fd5ee4563..dc5aa376c 100644 --- a/_test/stackB_di_xtea_cobs_rtt8/triceConfig.h +++ b/_test/stackB_di_xtea_cobs_rtt8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STACK_BUFFER diff --git a/_test/staticB_di_nopf_aux32/SEGGER_RTT_Conf.h b/_test/staticB_di_nopf_aux32/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/staticB_di_nopf_aux32/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/staticB_di_nopf_aux32/triceConfig.h b/_test/staticB_di_nopf_aux32/triceConfig.h index 2b190af44..699775a4f 100644 --- a/_test/staticB_di_nopf_aux32/triceConfig.h +++ b/_test/staticB_di_nopf_aux32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_nopf_aux8/SEGGER_RTT_Conf.h b/_test/staticB_di_nopf_aux8/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/staticB_di_nopf_aux8/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/staticB_di_nopf_aux8/triceConfig.h b/_test/staticB_di_nopf_aux8/triceConfig.h index 1052390db..76b5ab9a0 100644 --- a/_test/staticB_di_nopf_aux8/triceConfig.h +++ b/_test/staticB_di_nopf_aux8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_nopf_rtt32/SEGGER_RTT_Conf.h b/_test/staticB_di_nopf_rtt32/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/staticB_di_nopf_rtt32/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/staticB_di_nopf_rtt32/triceConfig.h b/_test/staticB_di_nopf_rtt32/triceConfig.h index 2030896de..7e8fbe634 100644 --- a/_test/staticB_di_nopf_rtt32/triceConfig.h +++ b/_test/staticB_di_nopf_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_nopf_rtt8/SEGGER_RTT_Conf.h b/_test/staticB_di_nopf_rtt8/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/staticB_di_nopf_rtt8/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/staticB_di_nopf_rtt8/triceConfig.h b/_test/staticB_di_nopf_rtt8/triceConfig.h index 021d379ea..7539a0e08 100644 --- a/_test/staticB_di_nopf_rtt8/triceConfig.h +++ b/_test/staticB_di_nopf_rtt8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_tcobs_rtt32/SEGGER_RTT_Conf.h b/_test/staticB_di_tcobs_rtt32/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/staticB_di_tcobs_rtt32/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/staticB_di_tcobs_rtt32/triceConfig.h b/_test/staticB_di_tcobs_rtt32/triceConfig.h index 55f2a6930..279507fd7 100644 --- a/_test/staticB_di_tcobs_rtt32/triceConfig.h +++ b/_test/staticB_di_tcobs_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_tcobs_rtt8/SEGGER_RTT_Conf.h b/_test/staticB_di_tcobs_rtt8/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/staticB_di_tcobs_rtt8/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/staticB_di_tcobs_rtt8/triceConfig.h b/_test/staticB_di_tcobs_rtt8/triceConfig.h index 852cf2ded..001eb8b7e 100644 --- a/_test/staticB_di_tcobs_rtt8/triceConfig.h +++ b/_test/staticB_di_tcobs_rtt8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_xtea_cobs_rtt32/SEGGER_RTT_Conf.h b/_test/staticB_di_xtea_cobs_rtt32/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/_test/staticB_di_xtea_cobs_rtt32/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/_test/staticB_di_xtea_cobs_rtt32/triceConfig.h b/_test/staticB_di_xtea_cobs_rtt32/triceConfig.h index d724801a3..ace7e8f2b 100644 --- a/_test/staticB_di_xtea_cobs_rtt32/triceConfig.h +++ b/_test/staticB_di_xtea_cobs_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 1 +#define TRICE_CLEAN 0 #define TRICE_BUFFER TRICE_STATIC_BUFFER diff --git a/_test/testdata/triceCheck.c b/_test/testdata/triceCheck.c index 04ce60105..247b5bdd3 100644 --- a/_test/testdata/triceCheck.c +++ b/_test/testdata/triceCheck.c @@ -31,7 +31,7 @@ static void dynString(int n); // This function is also called from Go for tests. void TriceCheck(int n) { #ifdef TRICE_CHECK_MIN - TRice("\rTriceCheck %4d", n); + TRice(iD(13014), "\rTriceCheck %4d", n); #else // #ifdef TRICE_CHECK_MIN char* sABCDE = "abcde 12345"; uint32_t lenABCDE = strlen(sABCDE); @@ -54,13 +54,13 @@ void TriceCheck(int n) { switch( n ){ default: - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: trice16(iD(13015), "att: line %u\n", __LINE__ ); // Lines ending with a comment starting with `//exp:` are executed during trhe automatic Go tests. - break; case __LINE__: TRice("Hello World!\n" ); //exp: time:feed3322default: Hello World! + break; case __LINE__: TRice(iD(13016), "Hello World!\n" ); //exp: time:feed3322default: Hello World! // normal use cases - break; case __LINE__: TRice("info:This is a message without values and a 32-bit stamp.\n" ); //exp: time:feed3322default: info:This is a message without values and a 32-bit stamp. - break; case __LINE__: Trice("info:This is a message without values and a 16-bit stamp.\n" ); //exp: time: be16default: info:This is a message without values and a 16-bit stamp. - break; case __LINE__: trice("info:This is a message without values and without stamp.\n" ); //exp: time: default: info:This is a message without values and without stamp. + break; case __LINE__: TRice(iD(13017), "info:This is a message without values and a 32-bit stamp.\n" ); //exp: time:feed3322default: info:This is a message without values and a 32-bit stamp. + break; case __LINE__: Trice(iD(13018), "info:This is a message without values and a 16-bit stamp.\n" ); //exp: time: be16default: info:This is a message without values and a 16-bit stamp. + break; case __LINE__: trice(iD(13019), "info:This is a message without values and without stamp.\n" ); //exp: time: default: info:This is a message without values and without stamp. break; case __LINE__: for( int i = 126; i < 130; i++ ){ dynString(i); } @@ -136,301 +136,301 @@ void TriceCheck(int n) { break; case __LINE__: dynString(__LINE__ - anchorLine); //exp: time: default: wr:0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ. break; case __LINE__: dynString(__LINE__ - anchorLine); //exp: time: default: wr:0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ., - break; case __LINE__: trice("sig:trice without stamp and with 0 to 12 values (most common use cases)\n" ); - break; case __LINE__: trice("rd:trice\n" ); //exp: time: default: rd:trice - break; case __LINE__: trice("rd:trice %d\n", -1 ); //exp: time: default: rd:trice -1 - break; case __LINE__: trice("rd:trice %d, %d\n", -1, -2 ); //exp: time: default: rd:trice -1, -2 - break; case __LINE__: trice("rd:trice %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice -1, -2, -3 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice -1, -2, -3, -4 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: Trice("sig:Trice with 16-bit stamp and with 0 to 12 values (common use cases)\n" ); - break; case __LINE__: Trice("rd:Trice\n" ); //exp: time: be16default: rd:Trice - break; case __LINE__: Trice("rd:Trice %d\n", -1 ); //exp: time: be16default: rd:Trice -1 - break; case __LINE__: Trice("rd:Trice %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice -1, -2 - break; case __LINE__: Trice("rd:Trice %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice -1, -2, -3 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice("sig:TRice with 32-bit stamp and with 0 to 12 values (common use cases)\n" ); - break; case __LINE__: TRice("rd:TRice\n" ); //exp: time:feed3322default: rd:TRice - break; case __LINE__: TRice("rd:TRice %d\n", -1 ); //exp: time:feed3322default: rd:TRice -1 - break; case __LINE__: TRice("rd:TRice %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice -1, -2 - break; case __LINE__: TRice("rd:TRice %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice -1, -2, -3 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice ("sig:trice16 with 1 to 12 pointer\n" ); - break; case __LINE__: trice16("rd:trice16 %p\n", -1 ); //exp: time: default: rd:trice16 ffff - break; case __LINE__: trice16("rd:trice16 %p, %p\n", -1, -2 ); //exp: time: default: rd:trice16 ffff, fffe - break; case __LINE__: trice16("rd:trice16 %p, %p, %p\n", -1, -2, -3 ); //exp: time: default: rd:trice16 ffff, fffe, fffd - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9 - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8 - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7 - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6 - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6, fff5 - break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6, fff5, fff4 - break; case __LINE__: trice8 ("rd:trice8 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 ff, fe, fd, fc, fb, fa, f9, f8, f7, f6, f5, f4 - break; case __LINE__: trice32("rd:trice32 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 ffffffff, fffffffe, fffffffd, fffffffc, fffffffb, fffffffa, fffffff9, fffffff8, fffffff7, fffffff6, fffffff5, fffffff4 - - break; case __LINE__: trice ("sig:trice16 with 1 to 12 hex\n" ); - break; case __LINE__: trice16("rd:trice16 %X\n", -1 ); //exp: time: default: rd:trice16 FFFF - break; case __LINE__: trice16("rd:trice16 %X, %X\n", -1, -2 ); //exp: time: default: rd:trice16 FFFF, FFFE - break; case __LINE__: trice16("rd:trice16 %X, %X, %X\n", -1, -2, -3 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9 - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8 - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7 - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6 - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6, FFF5 - break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6, FFF5, FFF4 - break; case __LINE__: trice8 ("rd:trice8 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 FF, FE, FD, FC, FB, FA, F9, F8, F7, F6, F5, F4 - break; case __LINE__: trice32("rd:trice32 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 FFFFFFFF, FFFFFFFE, FFFFFFFD, FFFFFFFC, FFFFFFFB, FFFFFFFA, FFFFFFF9, FFFFFFF8, FFFFFFF7, FFFFFFF6, FFFFFFF5, FFFFFFF4 - - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: trice(iD(13020), "sig:trice without stamp and with 0 to 12 values (most common use cases)\n" ); + break; case __LINE__: trice(iD(13021), "rd:trice\n" ); //exp: time: default: rd:trice + break; case __LINE__: trice(iD(13022), "rd:trice %d\n", -1 ); //exp: time: default: rd:trice -1 + break; case __LINE__: trice(iD(13023), "rd:trice %d, %d\n", -1, -2 ); //exp: time: default: rd:trice -1, -2 + break; case __LINE__: trice(iD(13024), "rd:trice %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice -1, -2, -3 + break; case __LINE__: trice(iD(13025), "rd:trice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice -1, -2, -3, -4 + break; case __LINE__: trice(iD(13026), "rd:trice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5 + break; case __LINE__: trice(iD(13027), "rd:trice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice(iD(13028), "rd:trice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice(iD(13029), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice(iD(13030), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice(iD(13031), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice(iD(13032), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice(iD(13033), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: Trice(iD(13034), "sig:Trice with 16-bit stamp and with 0 to 12 values (common use cases)\n" ); + break; case __LINE__: Trice(iD(13035), "rd:Trice\n" ); //exp: time: be16default: rd:Trice + break; case __LINE__: Trice(iD(13036), "rd:Trice %d\n", -1 ); //exp: time: be16default: rd:Trice -1 + break; case __LINE__: Trice(iD(13037), "rd:Trice %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice -1, -2 + break; case __LINE__: Trice(iD(13038), "rd:Trice %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice -1, -2, -3 + break; case __LINE__: Trice(iD(13039), "rd:Trice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4 + break; case __LINE__: Trice(iD(13040), "rd:Trice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5 + break; case __LINE__: Trice(iD(13041), "rd:Trice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice(iD(13042), "rd:Trice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice(iD(13043), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice(iD(13044), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice(iD(13045), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice(iD(13046), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice(iD(13047), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice(iD(13048), "sig:TRice with 32-bit stamp and with 0 to 12 values (common use cases)\n" ); + break; case __LINE__: TRice(iD(13049), "rd:TRice\n" ); //exp: time:feed3322default: rd:TRice + break; case __LINE__: TRice(iD(13050), "rd:TRice %d\n", -1 ); //exp: time:feed3322default: rd:TRice -1 + break; case __LINE__: TRice(iD(13051), "rd:TRice %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice -1, -2 + break; case __LINE__: TRice(iD(13052), "rd:TRice %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice -1, -2, -3 + break; case __LINE__: TRice(iD(13053), "rd:TRice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4 + break; case __LINE__: TRice(iD(13054), "rd:TRice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5 + break; case __LINE__: TRice(iD(13055), "rd:TRice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice(iD(13056), "rd:TRice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice(iD(13057), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice(iD(13058), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice(iD(13059), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice(iD(13060), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice(iD(13061), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice (iD(13062), "sig:trice16 with 1 to 12 pointer\n" ); + break; case __LINE__: trice16(iD(13063), "rd:trice16 %p\n", -1 ); //exp: time: default: rd:trice16 ffff + break; case __LINE__: trice16(iD(13064), "rd:trice16 %p, %p\n", -1, -2 ); //exp: time: default: rd:trice16 ffff, fffe + break; case __LINE__: trice16(iD(13065), "rd:trice16 %p, %p, %p\n", -1, -2, -3 ); //exp: time: default: rd:trice16 ffff, fffe, fffd + break; case __LINE__: trice16(iD(13066), "rd:trice16 %p, %p, %p, %p\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc + break; case __LINE__: trice16(iD(13067), "rd:trice16 %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb + break; case __LINE__: trice16(iD(13068), "rd:trice16 %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa + break; case __LINE__: trice16(iD(13069), "rd:trice16 %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9 + break; case __LINE__: trice16(iD(13070), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8 + break; case __LINE__: trice16(iD(13071), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7 + break; case __LINE__: trice16(iD(13072), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6 + break; case __LINE__: trice16(iD(13073), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6, fff5 + break; case __LINE__: trice16(iD(13074), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6, fff5, fff4 + break; case __LINE__: trice8 (iD(13075), "rd:trice8 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 ff, fe, fd, fc, fb, fa, f9, f8, f7, f6, f5, f4 + break; case __LINE__: trice32(iD(13076), "rd:trice32 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 ffffffff, fffffffe, fffffffd, fffffffc, fffffffb, fffffffa, fffffff9, fffffff8, fffffff7, fffffff6, fffffff5, fffffff4 + + break; case __LINE__: trice (iD(13077), "sig:trice16 with 1 to 12 hex\n" ); + break; case __LINE__: trice16(iD(13078), "rd:trice16 %X\n", -1 ); //exp: time: default: rd:trice16 FFFF + break; case __LINE__: trice16(iD(13079), "rd:trice16 %X, %X\n", -1, -2 ); //exp: time: default: rd:trice16 FFFF, FFFE + break; case __LINE__: trice16(iD(13080), "rd:trice16 %X, %X, %X\n", -1, -2, -3 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD + break; case __LINE__: trice16(iD(13081), "rd:trice16 %X, %X, %X, %X\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC + break; case __LINE__: trice16(iD(13082), "rd:trice16 %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB + break; case __LINE__: trice16(iD(13083), "rd:trice16 %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA + break; case __LINE__: trice16(iD(13084), "rd:trice16 %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9 + break; case __LINE__: trice16(iD(13085), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8 + break; case __LINE__: trice16(iD(13086), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7 + break; case __LINE__: trice16(iD(13087), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6 + break; case __LINE__: trice16(iD(13088), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6, FFF5 + break; case __LINE__: trice16(iD(13089), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6, FFF5, FFF4 + break; case __LINE__: trice8 (iD(13090), "rd:trice8 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 FF, FE, FD, FC, FB, FA, F9, F8, F7, F6, F5, F4 + break; case __LINE__: trice32(iD(13091), "rd:trice32 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 FFFFFFFF, FFFFFFFE, FFFFFFFD, FFFFFFFC, FFFFFFFB, FFFFFFFA, FFFFFFF9, FFFFFFF8, FFFFFFF7, FFFFFFF6, FFFFFFF5, FFFFFFF4 + + break; case __LINE__: trice16(iD(13092), "att: line %u\n", __LINE__ ); break; case __LINE__: #if TRICE_DEFERRED_XTEA_ENCRYPT == 1 || TRICE_DIRECT_XTEA_ENCRYPT == 1 - trice("--------------------------------------------------\n" ); + trice(iD(13093), "--------------------------------------------------\n" ); { uint32_t by[8] = {1,2,3,4,5,6}; int count = (sizeof(by) + 7) & ~7; // only multiple of 8 encryptable - trice32("msg: message = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); - trice32("tim: pre TriceEncryption SysTick=%d\n", SYSTICKVAL ); + trice32(iD(13094), "msg: message = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); + trice32(iD(13095), "tim: pre TriceEncryption SysTick=%d\n", SYSTICKVAL ); XTEAEncrypt(by, count>>2); - trice32("tim: post TriceEncryption SysTick=%d\n", SYSTICKVAL ); - trice32("att: TriceEncrypted = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); + trice32(iD(13096), "tim: post TriceEncryption SysTick=%d\n", SYSTICKVAL ); + trice32(iD(13097), "att: TriceEncrypted = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); #if XTEA_DECRYPT == 1 - trice16_1("tim: pre TriceDecryption SysTick=%d\n", SYSTICKVAL ); + trice16_1(iD(13098), "tim: pre TriceDecryption SysTick=%d\n", SYSTICKVAL ); XTEADecrypt(by, count>>2); - trice16_1("tim: post TriceDecryption SysTick=%d\n", SYSTICKVAL ); + trice16_1(iD(13099), "tim: post TriceDecryption SysTick=%d\n", SYSTICKVAL ); #endif - trice32("msg: messge = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); + trice32(iD(13100), "msg: messge = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); } - trice("--------------------------------------------------\n" ); + trice(iD(13101), "--------------------------------------------------\n" ); #endif - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); - break; case __LINE__: trice("dbg:Hi!\n" ); //exp: time: default: dbg:Hi! - break; case __LINE__: trice("dbg: Hi!\n" ); //exp: time: default: dbg: Hi! - break; case __LINE__: trice("sig:Some time measurements\n" ); - break; case __LINE__: trice("isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 - break; case __LINE__: trice("isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 - break; case __LINE__: trice("isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 - break; case __LINE__: trice("isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 - break; case __LINE__: trice_1("isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 - break; case __LINE__: trice_1("isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 - break; case __LINE__: trice_1("isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 - break; case __LINE__: trice_1("isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 - break; case __LINE__: TRICE16_1(id(0), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 - break; case __LINE__: TRICE16_1(id(0), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 - break; case __LINE__: TRICE16_1(id(0), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 - break; case __LINE__: TRICE16_1(id(0), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 - break; case __LINE__: TRICE_1(id(0), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 - break; case __LINE__: TRICE_1(id(0), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 - break; case __LINE__: TRICE_1(id(0), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 - break; case __LINE__: TRICE_1(id(0), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 - break; case __LINE__: TRICE(id(0), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 - break; case __LINE__: TRICE(id(0), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 - break; case __LINE__: TRICE(id(0), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 - break; case __LINE__: TRICE(id(0), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 - - break; case __LINE__: trice("tim:trice START time message\n"); //exp: time: default: tim:trice START time message - break; case __LINE__: trice("tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message - break; case __LINE__: trice("tim:trice START time message\n"); //exp: time: default: tim:trice START time message - break; case __LINE__: trice("tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message - break; case __LINE__: trice("tim:trice START time message\n"); //exp: time: default: tim:trice START time message - break; case __LINE__: trice64("rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 - break; case __LINE__: trice("tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message - break; case __LINE__: TRICE(id(0), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message - break; case __LINE__: TRICE(id(0), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message - break; case __LINE__: TRICE(id(0), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message - break; case __LINE__: TRICE(id(0), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message - break; case __LINE__: TRICE(id(0), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d\n", 1, 2 ); //exp: time: default: rd:TRICE64 1, 2 - break; case __LINE__: TRICE(id(0), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message - break; case __LINE__: trice ("tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- - break; case __LINE__: trice ("tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- - break; case __LINE__: trice64("rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 - break; case __LINE__: trice ("tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- - break; case __LINE__: trice ("tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- - break; case __LINE__: trice64("rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 - break; case __LINE__: trice32_1("rd:trice32_1 %d\n", -1 ); //exp: time: default: rd:trice32_1 -1 - break; case __LINE__: trice64_1("rd:trice64_1 %d\n", -2 ); //exp: time: default: rd:trice64_1 -2 - break; case __LINE__: trice32_2("rd:trice32_2 %d,%d\n", -1, 2 ); //exp: time: default: rd:trice32_2 -1,2 - break; case __LINE__: trice64_2("rd:trice64_2 %d,%d\n", -1, 2 ); //exp: time: default: rd:trice64_2 -1,2 + break; case __LINE__: trice16(iD(13102), "att: line %u\n", __LINE__ ); + break; case __LINE__: trice(iD(13103), "dbg:Hi!\n" ); //exp: time: default: dbg:Hi! + break; case __LINE__: trice(iD(13104), "dbg: Hi!\n" ); //exp: time: default: dbg: Hi! + break; case __LINE__: trice(iD(13105), "sig:Some time measurements\n" ); + break; case __LINE__: trice(iD(13106), "isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 + break; case __LINE__: trice(iD(13107), "isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 + break; case __LINE__: trice(iD(13108), "isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 + break; case __LINE__: trice(iD(13109), "isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 + break; case __LINE__: trice_1(iD(13110), "isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 + break; case __LINE__: trice_1(iD(13111), "isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 + break; case __LINE__: trice_1(iD(13112), "isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 + break; case __LINE__: trice_1(iD(13113), "isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 + break; case __LINE__: TRICE16_1(id(13114), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 + break; case __LINE__: TRICE16_1(id(13115), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 + break; case __LINE__: TRICE16_1(id(13116), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 + break; case __LINE__: TRICE16_1(id(13117), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 + break; case __LINE__: TRICE_1(id(13118), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 + break; case __LINE__: TRICE_1(id(13119), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 + break; case __LINE__: TRICE_1(id(13120), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 + break; case __LINE__: TRICE_1(id(13121), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 + break; case __LINE__: TRICE(id(13122), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 + break; case __LINE__: TRICE(id(13123), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 + break; case __LINE__: TRICE(id(13124), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 + break; case __LINE__: TRICE(id(13125), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 + + break; case __LINE__: trice(iD(13126), "tim:trice START time message\n"); //exp: time: default: tim:trice START time message + break; case __LINE__: trice(iD(13127), "tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message + break; case __LINE__: trice(iD(13128), "tim:trice START time message\n"); //exp: time: default: tim:trice START time message + break; case __LINE__: trice(iD(13129), "tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message + break; case __LINE__: trice(iD(13130), "tim:trice START time message\n"); //exp: time: default: tim:trice START time message + break; case __LINE__: trice64(iD(13131), "rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 + break; case __LINE__: trice(iD(13132), "tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message + break; case __LINE__: TRICE(id(13133), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message + break; case __LINE__: TRICE(id(13134), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message + break; case __LINE__: TRICE(id(13135), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message + break; case __LINE__: TRICE(id(13136), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message + break; case __LINE__: TRICE(id(13137), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message + break; case __LINE__: TRICE64(id(13138), "rd:TRICE64 %d, %d\n", 1, 2 ); //exp: time: default: rd:TRICE64 1, 2 + break; case __LINE__: TRICE(id(13139), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message + break; case __LINE__: trice (iD(13140), "tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- + break; case __LINE__: trice (iD(13141), "tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- + break; case __LINE__: trice64(iD(13142), "rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 + break; case __LINE__: trice (iD(13143), "tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- + break; case __LINE__: trice (iD(13144), "tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- + break; case __LINE__: trice64(iD(13145), "rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 + break; case __LINE__: trice32_1(iD(13146), "rd:trice32_1 %d\n", -1 ); //exp: time: default: rd:trice32_1 -1 + break; case __LINE__: trice64_1(iD(13147), "rd:trice64_1 %d\n", -2 ); //exp: time: default: rd:trice64_1 -2 + break; case __LINE__: trice32_2(iD(13148), "rd:trice32_2 %d,%d\n", -1, 2 ); //exp: time: default: rd:trice32_2 -1,2 + break; case __LINE__: trice64_2(iD(13149), "rd:trice64_2 %d,%d\n", -1, 2 ); //exp: time: default: rd:trice64_2 -1,2 // special use cases - break; case __LINE__: TRice64("info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time:feed3322default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: Trice64("info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time: be16default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: trice64("info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time: default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and without stamp. - - break; case __LINE__: TRice32("info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. - break; case __LINE__: Trice32("info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. - break; case __LINE__: trice32("info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. - break; case __LINE__: TRice16("info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. - break; case __LINE__: Trice16("info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. - break; case __LINE__: trice16("info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. - break; case __LINE__: TRice8 ("info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. - break; case __LINE__: Trice8 ("info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. - break; case __LINE__: trice8 ("info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. - - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); - - break; case __LINE__: TRice16("att: 0x8888 == %04xh\n", 0x8888 ); //exp: time:feed3322default: att: 0x8888 == 8888h - break; case __LINE__: Trice16("att: 0x8888 == %04xh\n", 0x8888 ); //exp: time: be16default: att: 0x8888 == 8888h - break; case __LINE__: trice16("att: 0x8888 == %04xh\n", 0x8888 ); //exp: time: default: att: 0x8888 == 8888h - - - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); - break; case __LINE__: trice8 ("value=%x\n", 0x55 ); //exp: time: default: value=55 - break; case __LINE__: trice8 ("value=%x\n", 0x88 ); //exp: time: default: value=88 - - break; case __LINE__: trice("att:mixed int & float & double & bits\n" ); - break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", FloatToInt32(x), aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 - break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", (int32_t)(x), aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 - break; case __LINE__: TRice32("rd:TRice32 int %x, float %f (%%f), %08x, %032b\n", 0x44883377, aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 44883377, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 - break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", x, aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 - break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", FloatToInt32(-x), aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int -1089, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 - break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", (int32_t)(-x), aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int -1089, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 - break; case __LINE__: TRice32("rd:TRice32 int %X, float %f (%%f), %08x, %032b\n", -0x44883377, aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int BB77CC89, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 - break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", DoubleToInt64(y), aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", (int64_t)(y), aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", y, aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", DoubleToInt64(-y), aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int -518, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", (int64_t)(-y), aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int -518, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64("rd:TRice64 int %X, double %f (%%f), %016x, %064b\n", -0x4080307020601050, aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int BF7FCF8FDF9FEFB0, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 - - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); - break; case __LINE__: triceS("msg:With triceS:%s\n", sABCDE ); //exp: time: default: msg:With triceS:abcde 12345 - break; case __LINE__: triceN("sig:With triceN:%s\n", sABCDE, lenABCDE ); //exp: time: default: sig:With triceN:abcde 12345 - break; case __LINE__: TriceS("msg:With TriceS:%s\n", sABCDE ); //exp: time: be16default: msg:With TriceS:abcde 12345 - break; case __LINE__: TriceN("sig:With TriceN:%s\n", sABCDE, lenABCDE ); //exp: time: be16default: sig:With TriceN:abcde 12345 - break; case __LINE__: TRiceS("msg:With TRiceS:%s\n", sABCDE ); //exp: time:feed3322default: msg:With TRiceS:abcde 12345 - break; case __LINE__: TRiceN("sig:With TRiceN:%s\n", sABCDE, lenABCDE ); //exp: time:feed3322default: sig:With TRiceN:abcde 12345 - break; case __LINE__: TRICE_S(id(0), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time: default: msg:With TRICE_S:abcde 12345 - break; case __LINE__: TRICE_N(id(0), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time: default: sig:With TRICE_N:abcde 12345 - break; case __LINE__: TRICE_S(Id(0), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time: be16default: msg:With TRICE_S:abcde 12345 - break; case __LINE__: TRICE_N(Id(0), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time: be16default: sig:With TRICE_N:abcde 12345 - break; case __LINE__: TRICE_S(ID(0), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time:feed3322default: msg:With TRICE_S:abcde 12345 - break; case __LINE__: TRICE_N(ID(0), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time:feed3322default: sig:With TRICE_N:abcde 12345 - - break; case __LINE__: TRICE8_B(ID(0), " %02x", sABCDE, lenABCDE ); //exp: time:feed3322default: 61 62 63 64 65 20 31 32 33 34 35 - break; case __LINE__: trice("\n" ); - break; case __LINE__: TRICE8_B(ID(0), "BUF: %02x\n", sABCDE, lenABCDE ); //exp: time:feed3322default: BUF: 61 62 63 64 65 20 31 32 33 34 35 - break; case __LINE__: TRICE8_B(ID(0), "%4d", sABCDE, lenABCDE ); //exp: time:feed3322default: 97 98 99 100 101 32 49 50 51 52 53 - break; case __LINE__: trice("\n" ); - break; case __LINE__: TRICE8_B(ID(0), " %02x", b8, sizeof(b8)/sizeof(int8_t) ); //exp: time:feed3322default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice("\n" ); - - break; case __LINE__: TRice8B(" %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice("\n" ); - break; case __LINE__: Trice8B(" %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: be16default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice("\n" ); - break; case __LINE__: trice8B(" %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice("\n" ); - - break; case __LINE__: trice8B("att: %02x\n", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: att: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice8B("rd: %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: rd: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice("\n" ); - break; case __LINE__: trice8B(" %02x\n", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - - break; case __LINE__: TRICE16_B(ID(0), " %04x", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: 0000 ffff fffe 3344 - break; case __LINE__: trice("\n" ); - break; case __LINE__: TRice16B(" %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time:feed3322default: 0000 ffff fffe 3344 - break; case __LINE__: trice("\n" ); - break; case __LINE__: Trice16B(" %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: be16default: 0000 ffff fffe 3344 - break; case __LINE__: trice("\n" ); - break; case __LINE__: trice16B(" %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: default: 0000 ffff fffe 3344 - break; case __LINE__: trice("\n" ); - break; case __LINE__: trice16B("msg: %04x\n", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: default: msg: 0000 ffff fffe 3344 - - break; case __LINE__: TRICE32_B(ID(0), " %08x", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: 00000000 ffffffff fffffffe 33445555 - break; case __LINE__: trice("\n" ); - break; case __LINE__: TRice32B(" %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time:feed3322default: 00000000 ffffffff fffffffe 33445555 - break; case __LINE__: trice("\n" ); - break; case __LINE__: Trice32B(" %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: be16default: 00000000 ffffffff fffffffe 33445555 - break; case __LINE__: trice("\n" ); - break; case __LINE__: trice32B(" %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: default: 00000000 ffffffff fffffffe 33445555 - break; case __LINE__: trice("\n" ); - break; case __LINE__: trice32B("att: %08x\n", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: default: att: 00000000 ffffffff fffffffe 33445555 - - break; case __LINE__: TRICE64_B(ID(0), " %016x", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - break; case __LINE__: trice("\n" ); - break; case __LINE__: TRice64B(" %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time:feed3322default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - break; case __LINE__: trice("\n" ); - break; case __LINE__: Trice64B(" %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: be16default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - break; case __LINE__: trice("\n" ); - break; case __LINE__: trice64B(" %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - break; case __LINE__: trice("\n" ); - break; case __LINE__: trice64B("SIG: %016x\n", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: default: SIG: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - - break; case __LINE__: TRICE8_F(ID(0), "info:FunctionNameWa", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: info:FunctionNameWa(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: TRice8F("call:FunctionNameWb", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: call:FunctionNameWb(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: Trice8F("call:FunctionNameWc", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: be16default: call:FunctionNameWc(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: trice8F("call:FunctionNameWd", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: call:FunctionNameWd(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: TRICE16_F(ID(0), "info:FunctionNameXa", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: info:FunctionNameXa(0000)(ffff)(fffe)(3344) - break; case __LINE__: TRice16F("call:FunctionNameXb", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: call:FunctionNameXb(0000)(ffff)(fffe)(3344) - break; case __LINE__: Trice16F("call:FunctionNameXc", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time: be16default: call:FunctionNameXc(0000)(ffff)(fffe)(3344) - break; case __LINE__: trice16F("call:FunctionNameXd", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time: default: call:FunctionNameXd(0000)(ffff)(fffe)(3344) - break; case __LINE__: TRICE32_F(ID(0), "info:FunctionNameYa", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: info:FunctionNameYa(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: TRice32F("rpc:FunctionNameYb", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: rpc:FunctionNameYb(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: Trice32F("rpc:FunctionNameYc", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time: be16default: rpc:FunctionNameYc(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: trice32F("call:FunctionNameYd", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time: default: call:FunctionNameYd(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: TRICE64_F(ID(0), "info:FunctionNameZa", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: info:FunctionNameZa(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: TRice64F("call:FunctionNameZb", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: call:FunctionNameZb(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: Trice64F("RPC:FunctionNameZc", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time: be16default: RPC:FunctionNameZc(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: trice64F("RPC:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time: default: RPC:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: TRice64(iD(13150), "info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time:feed3322default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: Trice64(iD(13151), "info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time: be16default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: trice64(iD(13152), "info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time: default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and without stamp. + + break; case __LINE__: TRice32(iD(13153), "info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. + break; case __LINE__: Trice32(iD(13154), "info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. + break; case __LINE__: trice32(iD(13155), "info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. + break; case __LINE__: TRice16(iD(13156), "info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. + break; case __LINE__: Trice16(iD(13157), "info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. + break; case __LINE__: trice16(iD(13158), "info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. + break; case __LINE__: TRice8 (iD(13159), "info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. + break; case __LINE__: Trice8 (iD(13160), "info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. + break; case __LINE__: trice8 (iD(13161), "info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. + + break; case __LINE__: trice16(iD(13162), "att: line %u\n", __LINE__ ); + + break; case __LINE__: TRice16(iD(13163), "att: 0x8888 == %04xh\n", 0x8888 ); //exp: time:feed3322default: att: 0x8888 == 8888h + break; case __LINE__: Trice16(iD(13164), "att: 0x8888 == %04xh\n", 0x8888 ); //exp: time: be16default: att: 0x8888 == 8888h + break; case __LINE__: trice16(iD(13165), "att: 0x8888 == %04xh\n", 0x8888 ); //exp: time: default: att: 0x8888 == 8888h + + + break; case __LINE__: trice16(iD(13166), "att: line %u\n", __LINE__ ); + break; case __LINE__: trice8 (iD(13167), "value=%x\n", 0x55 ); //exp: time: default: value=55 + break; case __LINE__: trice8 (iD(13168), "value=%x\n", 0x88 ); //exp: time: default: value=88 + + break; case __LINE__: trice(iD(13169), "att:mixed int & float & double & bits\n" ); + break; case __LINE__: TRice32(iD(13170), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", FloatToInt32(x), aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 + break; case __LINE__: TRice32(iD(13171), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", (int32_t)(x), aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 + break; case __LINE__: TRice32(iD(13172), "rd:TRice32 int %x, float %f (%%f), %08x, %032b\n", 0x44883377, aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 44883377, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 + break; case __LINE__: TRice32(iD(13173), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", x, aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 + break; case __LINE__: TRice32(iD(13174), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", FloatToInt32(-x), aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int -1089, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 + break; case __LINE__: TRice32(iD(13175), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", (int32_t)(-x), aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int -1089, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 + break; case __LINE__: TRice32(iD(13176), "rd:TRice32 int %X, float %f (%%f), %08x, %032b\n", -0x44883377, aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int BB77CC89, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 + break; case __LINE__: TRice64(iD(13177), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", DoubleToInt64(y), aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64(iD(13178), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", (int64_t)(y), aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64(iD(13179), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", y, aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64(iD(13180), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", DoubleToInt64(-y), aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int -518, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64(iD(13181), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", (int64_t)(-y), aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int -518, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64(iD(13182), "rd:TRice64 int %X, double %f (%%f), %016x, %064b\n", -0x4080307020601050, aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int BF7FCF8FDF9FEFB0, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 + + break; case __LINE__: trice16(iD(13183), "att: line %u\n", __LINE__ ); + break; case __LINE__: triceS(iD(13184), "msg:With triceS:%s\n", sABCDE ); //exp: time: default: msg:With triceS:abcde 12345 + break; case __LINE__: triceN(iD(13185), "sig:With triceN:%s\n", sABCDE, lenABCDE ); //exp: time: default: sig:With triceN:abcde 12345 + break; case __LINE__: TriceS(iD(13186), "msg:With TriceS:%s\n", sABCDE ); //exp: time: be16default: msg:With TriceS:abcde 12345 + break; case __LINE__: TriceN(iD(13187), "sig:With TriceN:%s\n", sABCDE, lenABCDE ); //exp: time: be16default: sig:With TriceN:abcde 12345 + break; case __LINE__: TRiceS(iD(13188), "msg:With TRiceS:%s\n", sABCDE ); //exp: time:feed3322default: msg:With TRiceS:abcde 12345 + break; case __LINE__: TRiceN(iD(13189), "sig:With TRiceN:%s\n", sABCDE, lenABCDE ); //exp: time:feed3322default: sig:With TRiceN:abcde 12345 + break; case __LINE__: TRICE_S(id(13190), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time: default: msg:With TRICE_S:abcde 12345 + break; case __LINE__: TRICE_N(id(13191), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time: default: sig:With TRICE_N:abcde 12345 + break; case __LINE__: TRICE_S(Id(13192), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time: be16default: msg:With TRICE_S:abcde 12345 + break; case __LINE__: TRICE_N(Id(13193), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time: be16default: sig:With TRICE_N:abcde 12345 + break; case __LINE__: TRICE_S(ID(13194), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time:feed3322default: msg:With TRICE_S:abcde 12345 + break; case __LINE__: TRICE_N(ID(13195), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time:feed3322default: sig:With TRICE_N:abcde 12345 + + break; case __LINE__: TRICE8_B(ID(13196), " %02x", sABCDE, lenABCDE ); //exp: time:feed3322default: 61 62 63 64 65 20 31 32 33 34 35 + break; case __LINE__: trice(iD(13197), "\n" ); + break; case __LINE__: TRICE8_B(ID(13198), "BUF: %02x\n", sABCDE, lenABCDE ); //exp: time:feed3322default: BUF: 61 62 63 64 65 20 31 32 33 34 35 + break; case __LINE__: TRICE8_B(ID(13199), "%4d", sABCDE, lenABCDE ); //exp: time:feed3322default: 97 98 99 100 101 32 49 50 51 52 53 + break; case __LINE__: trice(iD(13200), "\n" ); + break; case __LINE__: TRICE8_B(ID(13201), " %02x", b8, sizeof(b8)/sizeof(int8_t) ); //exp: time:feed3322default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice(iD(13202), "\n" ); + + break; case __LINE__: TRice8B(iD(13203), " %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice(iD(13204), "\n" ); + break; case __LINE__: Trice8B(iD(13205), " %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: be16default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice(iD(13206), "\n" ); + break; case __LINE__: trice8B(iD(13207), " %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice(iD(13208), "\n" ); + + break; case __LINE__: trice8B(iD(13209), "att: %02x\n", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: att: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice8B(iD(13210), "rd: %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: rd: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice(iD(13211), "\n" ); + break; case __LINE__: trice8B(iD(13212), " %02x\n", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + + break; case __LINE__: TRICE16_B(ID(13213), " %04x", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: 0000 ffff fffe 3344 + break; case __LINE__: trice(iD(13214), "\n" ); + break; case __LINE__: TRice16B(iD(13215), " %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time:feed3322default: 0000 ffff fffe 3344 + break; case __LINE__: trice(iD(13216), "\n" ); + break; case __LINE__: Trice16B(iD(13217), " %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: be16default: 0000 ffff fffe 3344 + break; case __LINE__: trice(iD(13218), "\n" ); + break; case __LINE__: trice16B(iD(13219), " %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: default: 0000 ffff fffe 3344 + break; case __LINE__: trice(iD(13220), "\n" ); + break; case __LINE__: trice16B(iD(13221), "msg: %04x\n", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: default: msg: 0000 ffff fffe 3344 + + break; case __LINE__: TRICE32_B(ID(13222), " %08x", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: 00000000 ffffffff fffffffe 33445555 + break; case __LINE__: trice(iD(13223), "\n" ); + break; case __LINE__: TRice32B(iD(13224), " %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time:feed3322default: 00000000 ffffffff fffffffe 33445555 + break; case __LINE__: trice(iD(13225), "\n" ); + break; case __LINE__: Trice32B(iD(13226), " %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: be16default: 00000000 ffffffff fffffffe 33445555 + break; case __LINE__: trice(iD(13227), "\n" ); + break; case __LINE__: trice32B(iD(13228), " %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: default: 00000000 ffffffff fffffffe 33445555 + break; case __LINE__: trice(iD(13229), "\n" ); + break; case __LINE__: trice32B(iD(13230), "att: %08x\n", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: default: att: 00000000 ffffffff fffffffe 33445555 + + break; case __LINE__: TRICE64_B(ID(13231), " %016x", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + break; case __LINE__: trice(iD(13232), "\n" ); + break; case __LINE__: TRice64B(iD(13233), " %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time:feed3322default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + break; case __LINE__: trice(iD(13234), "\n" ); + break; case __LINE__: Trice64B(iD(13235), " %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: be16default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + break; case __LINE__: trice(iD(13236), "\n" ); + break; case __LINE__: trice64B(iD(13237), " %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + break; case __LINE__: trice(iD(13238), "\n" ); + break; case __LINE__: trice64B(iD(13239), "SIG: %016x\n", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: default: SIG: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + + break; case __LINE__: TRICE8_F(ID(13240), "info:FunctionNameWa", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: info:FunctionNameWa(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: TRice8F(iD(13241), "call:FunctionNameWb", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: call:FunctionNameWb(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: Trice8F(iD(13242), "call:FunctionNameWc", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: be16default: call:FunctionNameWc(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: trice8F(iD(13243), "call:FunctionNameWd", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: call:FunctionNameWd(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: TRICE16_F(ID(13244), "info:FunctionNameXa", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: info:FunctionNameXa(0000)(ffff)(fffe)(3344) + break; case __LINE__: TRice16F(iD(13245), "call:FunctionNameXb", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: call:FunctionNameXb(0000)(ffff)(fffe)(3344) + break; case __LINE__: Trice16F(iD(13246), "call:FunctionNameXc", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time: be16default: call:FunctionNameXc(0000)(ffff)(fffe)(3344) + break; case __LINE__: trice16F(iD(13247), "call:FunctionNameXd", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time: default: call:FunctionNameXd(0000)(ffff)(fffe)(3344) + break; case __LINE__: TRICE32_F(ID(13248), "info:FunctionNameYa", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: info:FunctionNameYa(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: TRice32F(iD(13249), "rpc:FunctionNameYb", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: rpc:FunctionNameYb(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: Trice32F(iD(13250), "rpc:FunctionNameYc", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time: be16default: rpc:FunctionNameYc(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: trice32F(iD(13251), "call:FunctionNameYd", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time: default: call:FunctionNameYd(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: TRICE64_F(ID(13252), "info:FunctionNameZa", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: info:FunctionNameZa(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: TRice64F(iD(13253), "call:FunctionNameZb", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: call:FunctionNameZb(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: Trice64F(iD(13254), "RPC:FunctionNameZc", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time: be16default: RPC:FunctionNameZc(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: trice64F(iD(13255), "RPC:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time: default: RPC:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: TRiceS("msg:Hi %s!\n", five ); //exp: time:feed3322default: msg:Hi five! - break; case __LINE__: TriceS("msg:Hi %s!\n", five ); //exp: time: be16default: msg:Hi five! - break; case __LINE__: triceS("msg:Hi %s!\n", five ); //exp: time: default: msg:Hi five! - break; case __LINE__: TRiceN("msg:Hi %s!\n", five, strlen(five) ); //exp: time:feed3322default: msg:Hi five! - break; case __LINE__: TriceN("msg:Hi %s!\n", five, strlen(five) ); //exp: time: be16default: msg:Hi five! - break; case __LINE__: triceN("msg:Hi %s!\n", five, strlen(five) ); //exp: time: default: msg:Hi five! - break; case __LINE__: TRICE_S(id(0), "sig:TRICE_S=%s\n", s ); //exp: time: default: sig:TRICE_S=AAAAAAAAAAAA - break; case __LINE__: TRICE_N(id(0), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time: default: sig:TRICE_N=AAAAAAAAAAAA - break; case __LINE__: TRICE_S(Id(0), "sig:TRICE_S=%s\n", s ); //exp: time: be16default: sig:TRICE_S=AAAAAAAAAAAA - break; case __LINE__: TRICE_N(Id(0), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time: be16default: sig:TRICE_N=AAAAAAAAAAAA - break; case __LINE__: TRICE_S(ID(0), "sig:TRICE_S=%s\n", s ); //exp: time:feed3322default: sig:TRICE_S=AAAAAAAAAAAA - break; case __LINE__: TRICE_N(ID(0), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time:feed3322default: sig:TRICE_N=AAAAAAAAAAAA - break; case __LINE__: triceS("sig:triceS=%s\n", s ); //exp: time: default: sig:triceS=AAAAAAAAAAAA - break; case __LINE__: triceN("sig:triceN=%s\n", s, strlen(s) ); //exp: time: default: sig:triceN=AAAAAAAAAAAA - break; case __LINE__: TriceS("sig:TriceS=%s\n", s ); //exp: time: be16default: sig:TriceS=AAAAAAAAAAAA - break; case __LINE__: TriceN("sig:TriceN=%s\n", s, strlen(s) ); //exp: time: be16default: sig:TriceN=AAAAAAAAAAAA - break; case __LINE__: TRiceS("sig:TRiceS=%s\n", s ); //exp: time:feed3322default: sig:TRiceS=AAAAAAAAAAAA - break; case __LINE__: TRiceN("sig:TRiceN=%s\n", s, strlen(s) ); //exp: time:feed3322default: sig:TRiceN=AAAAAAAAAAAA - - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: TRiceS(iD(13256), "msg:Hi %s!\n", five ); //exp: time:feed3322default: msg:Hi five! + break; case __LINE__: TriceS(iD(13257), "msg:Hi %s!\n", five ); //exp: time: be16default: msg:Hi five! + break; case __LINE__: triceS(iD(13258), "msg:Hi %s!\n", five ); //exp: time: default: msg:Hi five! + break; case __LINE__: TRiceN(iD(13259), "msg:Hi %s!\n", five, strlen(five) ); //exp: time:feed3322default: msg:Hi five! + break; case __LINE__: TriceN(iD(13260), "msg:Hi %s!\n", five, strlen(five) ); //exp: time: be16default: msg:Hi five! + break; case __LINE__: triceN(iD(13261), "msg:Hi %s!\n", five, strlen(five) ); //exp: time: default: msg:Hi five! + break; case __LINE__: TRICE_S(id(13262), "sig:TRICE_S=%s\n", s ); //exp: time: default: sig:TRICE_S=AAAAAAAAAAAA + break; case __LINE__: TRICE_N(id(13263), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time: default: sig:TRICE_N=AAAAAAAAAAAA + break; case __LINE__: TRICE_S(Id(13264), "sig:TRICE_S=%s\n", s ); //exp: time: be16default: sig:TRICE_S=AAAAAAAAAAAA + break; case __LINE__: TRICE_N(Id(13265), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time: be16default: sig:TRICE_N=AAAAAAAAAAAA + break; case __LINE__: TRICE_S(ID(13266), "sig:TRICE_S=%s\n", s ); //exp: time:feed3322default: sig:TRICE_S=AAAAAAAAAAAA + break; case __LINE__: TRICE_N(ID(13267), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time:feed3322default: sig:TRICE_N=AAAAAAAAAAAA + break; case __LINE__: triceS(iD(13268), "sig:triceS=%s\n", s ); //exp: time: default: sig:triceS=AAAAAAAAAAAA + break; case __LINE__: triceN(iD(13269), "sig:triceN=%s\n", s, strlen(s) ); //exp: time: default: sig:triceN=AAAAAAAAAAAA + break; case __LINE__: TriceS(iD(13270), "sig:TriceS=%s\n", s ); //exp: time: be16default: sig:TriceS=AAAAAAAAAAAA + break; case __LINE__: TriceN(iD(13271), "sig:TriceN=%s\n", s, strlen(s) ); //exp: time: be16default: sig:TriceN=AAAAAAAAAAAA + break; case __LINE__: TRiceS(iD(13272), "sig:TRiceS=%s\n", s ); //exp: time:feed3322default: sig:TRiceS=AAAAAAAAAAAA + break; case __LINE__: TRiceN(iD(13273), "sig:TRiceN=%s\n", s, strlen(s) ); //exp: time:feed3322default: sig:TRiceN=AAAAAAAAAAAA + + break; case __LINE__: trice16(iD(13274), "att: line %u\n", __LINE__ ); break; case __LINE__: exampleOfManualJSONencoding(); //exp: time: be16default: att:MyStructEvaluationFunction(json:ExA{Apple:-1, Birn:2, Fisch:2.781000} - break; case __LINE__: TRICE(Id(0), "MSG:1/11 = %g\n", aFloat( 1.0/11 ) ); //exp: time: be16default: MSG:1/11 = 0.09090909 + break; case __LINE__: TRICE(Id(13275), "MSG:1/11 = %g\n", aFloat( 1.0/11 ) ); //exp: time: be16default: MSG:1/11 = 0.09090909 break; case __LINE__: { //exp: time:feed3322default: msg:x = 5.934 = 5.934, 5.934 #if !TRICE_OFF float a = (float)5.934; @@ -438,82 +438,82 @@ void TriceCheck(int n) { int c = (int)b; int d = (int)(b * 1000) % 1000; int e = (int)(1000 * (float)(a - c)); - TRice("msg:x = %g = %d.%03d, %d.%03d\n", aFloat(a), c, d, c, e ); + TRice(iD(13276), "msg:x = %g = %d.%03d, %d.%03d\n", aFloat(a), c, d, c, e ); #endif } - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); - - break; case __LINE__: TRice("sig:Integer (indent, base, sign) - see https://yourbasic.org/golang/fmt-printf-reference-cheat-sheet/\n" ); - break; case __LINE__: TRice("rd: 15 %d Base 10\n", 15 ); //exp: time:feed3322default: rd: 15 15 Base 10 - break; case __LINE__: TRice("rd: +15 %+d Always show sign\n", 15 ); //exp: time:feed3322default: rd: +15 +15 Always show sign - break; case __LINE__: TRice("rd: 15 %4d Pad with spaces (width 4, right justified)\n", 15 ); //exp: time:feed3322default: rd: 15 15 Pad with spaces (width 4, right justified) - break; case __LINE__: TRice("rd: 15 %-4d Pad with spaces (width 4, left justified)\n", 15 ); //exp: time:feed3322default: rd: 15 15 Pad with spaces (width 4, left justified) - break; case __LINE__: TRice("rd: 0015 %04d Pad with zeroes (width 4)\n", 15 ); //exp: time:feed3322default: rd: 0015 0015 Pad with zeroes (width 4) - break; case __LINE__: TRice("rd: 1111 %b Base 2\n", 15 ); //exp: time:feed3322default: rd: 1111 1111 Base 2 - break; case __LINE__: TRice("rd: 17 %o Base 8\n", 15 ); //exp: time:feed3322default: rd: 17 17 Base 8 - break; case __LINE__: TRice("rd: f %x Base 16, lowercase\n", 15 ); //exp: time:feed3322default: rd: f f Base 16, lowercase - break; case __LINE__: TRice("rd: F %X Base 16, uppercase\n", 15 ); //exp: time:feed3322default: rd: F F Base 16, uppercase - break; case __LINE__: TRice("rd: 0xf %#x Base 16, with leading 0x\n", 15 ); //exp: time:feed3322default: rd: 0xf 0xf Base 16, with leading 0x - - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); - - break; case __LINE__: trice("sig:Character (quoted, Unicode)\n" ); - break; case __LINE__: trice("rd: A %c Character\n", 'A' ); //exp: time: default: rd: A A Character - break; case __LINE__: trice("rd: 'A' %q Quoted character\n", 'A' ); //exp: time: default: rd: 'A' 'A' Quoted character - // break; case __LINE__: trice("rd: U+0041 %U Unicode\n", 'A' ); // todo: detect %U to avoid message triceType = TRICE0 ParamSpace = 4 not matching with bitWidth 0 and paramCount 0 - ignoring package - // break; case __LINE__: trice("rd: U+0041 'A' %#U Unicode with character\n", 'A' ); // todo: detect %#U to avoid message triceType = TRICE0 ParamSpace = 4 not matching with bitWidth 0 and paramCount 0 - ignoring package - - break; case __LINE__: trice("sig:Boolean (true/false)\n" ); - break; case __LINE__: trice("rd:Use %%t to format a boolean as true (%t) or false (%t).\n", 1, 0 ); //exp: time: default: rd:Use %t to format a boolean as true (true) or false (false). - - break; case __LINE__: trice("sig:Pointer (hex)\n" ); - break; case __LINE__: trice8 ("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x84 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (84) - break; case __LINE__: trice16("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x1234 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (1234) - break; case __LINE__: trice32("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0xaabbccdd ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (aabbccdd) - break; case __LINE__: trice64("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x1122334455667788 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (1122334455667788) - break; case __LINE__: trice ("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0xaabbccdd); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (aabbccdd) - - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); - break; case __LINE__: trice("sig:Float (indent, precision, scientific notation)\n" ); - break; case __LINE__: trice("rd: 1.234560e+02 %e %%e Scientific notation\n", aFloat(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation - break; case __LINE__: trice("rd: 123.456000 %f %%f Decimal point, no exponent\n", aFloat(123.456) ); //exp: time: default: rd: 123.456000 123.456001 %f Decimal point, no exponent - break; case __LINE__: trice("rd: 123.46 %.2f %%.2f Default width, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 - break; case __LINE__: trice("rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 - break; case __LINE__: trice("rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aFloat(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only - break; case __LINE__: trice("sig:Double (indent, precision, scientific notation)\n" ); - break; case __LINE__: trice64("rd: 1.234560e+02 %e %%e Scientific notation\n", aDouble(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation - break; case __LINE__: trice64("rd: 123.456000 %f %%f Decimal point, no exponent\n", aDouble(123.456) ); //exp: time: default: rd: 123.456000 123.456000 %f Decimal point, no exponent - break; case __LINE__: trice64("rd: 123.46 %.2f %%.2f Default width, precision 2\n", aDouble(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 - break; case __LINE__: trice64("rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aDouble(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 - break; case __LINE__: trice64("rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aDouble(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only - - break; case __LINE__: trice("sig:String or byte slice (quote, indent, hex)\n" ); - break; case __LINE__: s = "café"; triceS("rd: café %s Plain string\n", s ); //exp: time: default: rd: café café Plain string - break; case __LINE__: s = "café"; triceS("rd: ␣␣café %6s Width 6, right justify\n", s ); //exp: time: default: rd: ␣␣café café Width 6, right justify - break; case __LINE__: s = "café"; triceS("rd: café␣␣ %-6s Width 6, left justify\n", s ); //exp: time: default: rd: café␣␣ café Width 6, left justify - break; case __LINE__: s = "café"; triceS("rd: \"café\" %q Quoted string\n", s ); //exp: time: default: rd: \"café\" "café" Quoted string - break; case __LINE__: s = "café"; triceS("rd: 636166c3a9 %x Hex dump of byte values\n", s ); //exp: time: default: rd: 636166c3a9 636166c3a9 Hex dump of byte values - break; case __LINE__: s = "café"; triceS("rd: 63 61 66 c3 a9 % x Hex dump with spaces\n", s ); //exp: time: default: rd: 63 61 66 c3 a9 63 61 66 c3 a9 Hex dump with spaces - - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: trice16(iD(13277), "att: line %u\n", __LINE__ ); + + break; case __LINE__: TRice(iD(13278), "sig:Integer (indent, base, sign) - see https://yourbasic.org/golang/fmt-printf-reference-cheat-sheet/\n" ); + break; case __LINE__: TRice(iD(13279), "rd: 15 %d Base 10\n", 15 ); //exp: time:feed3322default: rd: 15 15 Base 10 + break; case __LINE__: TRice(iD(13280), "rd: +15 %+d Always show sign\n", 15 ); //exp: time:feed3322default: rd: +15 +15 Always show sign + break; case __LINE__: TRice(iD(13281), "rd: 15 %4d Pad with spaces (width 4, right justified)\n", 15 ); //exp: time:feed3322default: rd: 15 15 Pad with spaces (width 4, right justified) + break; case __LINE__: TRice(iD(13282), "rd: 15 %-4d Pad with spaces (width 4, left justified)\n", 15 ); //exp: time:feed3322default: rd: 15 15 Pad with spaces (width 4, left justified) + break; case __LINE__: TRice(iD(13283), "rd: 0015 %04d Pad with zeroes (width 4)\n", 15 ); //exp: time:feed3322default: rd: 0015 0015 Pad with zeroes (width 4) + break; case __LINE__: TRice(iD(13284), "rd: 1111 %b Base 2\n", 15 ); //exp: time:feed3322default: rd: 1111 1111 Base 2 + break; case __LINE__: TRice(iD(13285), "rd: 17 %o Base 8\n", 15 ); //exp: time:feed3322default: rd: 17 17 Base 8 + break; case __LINE__: TRice(iD(13286), "rd: f %x Base 16, lowercase\n", 15 ); //exp: time:feed3322default: rd: f f Base 16, lowercase + break; case __LINE__: TRice(iD(13287), "rd: F %X Base 16, uppercase\n", 15 ); //exp: time:feed3322default: rd: F F Base 16, uppercase + break; case __LINE__: TRice(iD(13288), "rd: 0xf %#x Base 16, with leading 0x\n", 15 ); //exp: time:feed3322default: rd: 0xf 0xf Base 16, with leading 0x + + break; case __LINE__: trice16(iD(13289), "att: line %u\n", __LINE__ ); + + break; case __LINE__: trice(iD(13290), "sig:Character (quoted, Unicode)\n" ); + break; case __LINE__: trice(iD(13291), "rd: A %c Character\n", 'A' ); //exp: time: default: rd: A A Character + break; case __LINE__: trice(iD(13292), "rd: 'A' %q Quoted character\n", 'A' ); //exp: time: default: rd: 'A' 'A' Quoted character + // break; case __LINE__: trice(iD(13293), "rd: U+0041 %U Unicode\n", 'A' ); // todo: detect %U to avoid message triceType = TRICE0 ParamSpace = 4 not matching with bitWidth 0 and paramCount 0 - ignoring package + // break; case __LINE__: trice(iD(13294), "rd: U+0041 'A' %#U Unicode with character\n", 'A' ); // todo: detect %#U to avoid message triceType = TRICE0 ParamSpace = 4 not matching with bitWidth 0 and paramCount 0 - ignoring package + + break; case __LINE__: trice(iD(13295), "sig:Boolean (true/false)\n" ); + break; case __LINE__: trice(iD(13296), "rd:Use %%t to format a boolean as true (%t) or false (%t).\n", 1, 0 ); //exp: time: default: rd:Use %t to format a boolean as true (true) or false (false). + + break; case __LINE__: trice(iD(13297), "sig:Pointer (hex)\n" ); + break; case __LINE__: trice8 (iD(13298), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x84 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (84) + break; case __LINE__: trice16(iD(13299), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x1234 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (1234) + break; case __LINE__: trice32(iD(13300), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0xaabbccdd ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (aabbccdd) + break; case __LINE__: trice64(iD(13301), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x1122334455667788 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (1122334455667788) + break; case __LINE__: trice (iD(13302), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0xaabbccdd); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (aabbccdd) + + break; case __LINE__: trice16(iD(13303), "att: line %u\n", __LINE__ ); + break; case __LINE__: trice(iD(13304), "sig:Float (indent, precision, scientific notation)\n" ); + break; case __LINE__: trice(iD(13305), "rd: 1.234560e+02 %e %%e Scientific notation\n", aFloat(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation + break; case __LINE__: trice(iD(13306), "rd: 123.456000 %f %%f Decimal point, no exponent\n", aFloat(123.456) ); //exp: time: default: rd: 123.456000 123.456001 %f Decimal point, no exponent + break; case __LINE__: trice(iD(13307), "rd: 123.46 %.2f %%.2f Default width, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 + break; case __LINE__: trice(iD(13308), "rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 + break; case __LINE__: trice(iD(13309), "rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aFloat(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only + break; case __LINE__: trice(iD(13310), "sig:Double (indent, precision, scientific notation)\n" ); + break; case __LINE__: trice64(iD(13311), "rd: 1.234560e+02 %e %%e Scientific notation\n", aDouble(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation + break; case __LINE__: trice64(iD(13312), "rd: 123.456000 %f %%f Decimal point, no exponent\n", aDouble(123.456) ); //exp: time: default: rd: 123.456000 123.456000 %f Decimal point, no exponent + break; case __LINE__: trice64(iD(13313), "rd: 123.46 %.2f %%.2f Default width, precision 2\n", aDouble(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 + break; case __LINE__: trice64(iD(13314), "rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aDouble(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 + break; case __LINE__: trice64(iD(13315), "rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aDouble(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only + + break; case __LINE__: trice(iD(13316), "sig:String or byte slice (quote, indent, hex)\n" ); + break; case __LINE__: s = "café"; triceS(iD(13317), "rd: café %s Plain string\n", s ); //exp: time: default: rd: café café Plain string + break; case __LINE__: s = "café"; triceS(iD(13318), "rd: ␣␣café %6s Width 6, right justify\n", s ); //exp: time: default: rd: ␣␣café café Width 6, right justify + break; case __LINE__: s = "café"; triceS(iD(13319), "rd: café␣␣ %-6s Width 6, left justify\n", s ); //exp: time: default: rd: café␣␣ café Width 6, left justify + break; case __LINE__: s = "café"; triceS(iD(13320), "rd: \"café\" %q Quoted string\n", s ); //exp: time: default: rd: \"café\" "café" Quoted string + break; case __LINE__: s = "café"; triceS(iD(13321), "rd: 636166c3a9 %x Hex dump of byte values\n", s ); //exp: time: default: rd: 636166c3a9 636166c3a9 Hex dump of byte values + break; case __LINE__: s = "café"; triceS(iD(13322), "rd: 63 61 66 c3 a9 % x Hex dump with spaces\n", s ); //exp: time: default: rd: 63 61 66 c3 a9 63 61 66 c3 a9 Hex dump with spaces + + break; case __LINE__: trice16(iD(13323), "att: line %u\n", __LINE__ ); break; case __LINE__: exampleOfManualSerialization(); // ATTENTION: This occupies ~1024 bytes in one half buffer when double buffer ist used! // This was a CGO compiler issue: - break; case __LINE__: TRice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: Trice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: trice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + break; case __LINE__: TRice(iD(13324), "info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: Trice(iD(13325), "info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: trice(iD(13326), "info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. - break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: trice16(iD(13327), "att: line %u\n", __LINE__ ); - break; case __LINE__: trice("sig:Runtime generated strings\n" ); + break; case __LINE__: trice(iD(13328), "sig:Runtime generated strings\n" ); break; case __LINE__: { #if !TRICE_OFF char* s0 = "AAAAAAAAAAAA"; #endif - TRICE32(ID(0), "dbg:len=%u:", strlen(s0) ); - TRICE_S(ID(0), "sig:%s\n", s0 ); + TRICE32(ID(13329), "dbg:len=%u:", strlen(s0) ); + TRICE_S(ID(13330), "sig:%s\n", s0 ); } break; case __LINE__: { @@ -522,8 +522,8 @@ void TriceCheck(int n) { AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAABBBBBBBBCCCCCCCC\ "; #endif - TRICE32(ID(0), "dbg:len=%u:", strlen(s1) ); - TRICE_S(ID(0), "sig:%s\n", s1 ); + TRICE32(ID(13331), "dbg:len=%u:", strlen(s1) ); + TRICE_S(ID(13332), "sig:%s\n", s1 ); } break; case __LINE__: { @@ -536,8 +536,8 @@ DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE\ "; #endif - TRICE32(ID(0), "dbg:len=%u: ", strlen(s2) ); - TRICE_S(ID(0), "sig:%s\n", s2 ); + TRICE32(ID(13333), "dbg:len=%u: ", strlen(s2) ); + TRICE_S(ID(13334), "sig:%s\n", s2 ); } break; case __LINE__: { @@ -553,8 +553,8 @@ BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC\ "; #endif - TRICE32(ID(0), "dbg:len=%u: ", strlen(s3) ); - TRICE_S(ID(0), "sig:%s\n", s3 ); + TRICE32(ID(13335), "dbg:len=%u: ", strlen(s3) ); + TRICE_S(ID(13336), "sig:%s\n", s3 ); } break; case __LINE__: { @@ -578,1988 +578,1988 @@ DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE\ "; #endif - TRICE32(ID(0), "dbg:len=%u: ", strlen(s4) ); - TRICE_S(ID(0), "sig:%s\n", s4 ); + TRICE32(ID(13337), "dbg:len=%u: ", strlen(s4) ); + TRICE_S(ID(13338), "sig:%s\n", s4 ); } #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice ("rd:%E (%%E)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) - break; case __LINE__: trice ("rd:%F (%%F)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%F) - break; case __LINE__: trice ("rd:%G (%%G)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%G) - break; case __LINE__: trice64("rd:%E (%%E)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) - break; case __LINE__: trice64("rd:%F (%%F)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%F) - break; case __LINE__: trice64("rd:%G (%%G)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556E+08 (%G) + break; case __LINE__: trice (iD(13339), "rd:%E (%%E)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) + break; case __LINE__: trice (iD(13340), "rd:%F (%%F)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%F) + break; case __LINE__: trice (iD(13341), "rd:%G (%%G)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%G) + break; case __LINE__: trice64(iD(13342), "rd:%E (%%E)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) + break; case __LINE__: trice64(iD(13343), "rd:%F (%%F)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%F) + break; case __LINE__: trice64(iD(13344), "rd:%G (%%G)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556E+08 (%G) - break; case __LINE__: trice ("rd:%e (%%e)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) - break; case __LINE__: trice ("rd:%f (%%f)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%f) - break; case __LINE__: trice ("rd:%g (%%g)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%g) - break; case __LINE__: trice64("rd:%e (%%e)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) - break; case __LINE__: trice64("rd:%f (%%f)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%f) - break; case __LINE__: trice64("rd:%g (%%g)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556e+08 (%g) - - break; case __LINE__: trice32("msg:%u (%%u)\n", -1 ); //exp: time: default: msg:4294967295 (%u) - break; case __LINE__: trice32("msg:%b (%%b)\n", -1 ); //exp: time: default: msg:11111111111111111111111111111111 (%b) - break; case __LINE__: trice32("msg:%o (%%o)\n", -1 ); //exp: time: default: msg:37777777777 (%o) - break; case __LINE__: trice32("msg:%O (%%O)\n", -1 ); //exp: time: default: msg:0o37777777777 (%O) - break; case __LINE__: trice32("msg:%X (%%X)\n", -1 ); //exp: time: default: msg:FFFFFFFF (%X) - break; case __LINE__: trice32("msg:%x (%%x)\n", -1 ); //exp: time: default: msg:ffffffff (%x) - break; case __LINE__: trice32("msg:%d (%%d)\n", -1 ); //exp: time: default: msg:-1 (%d) - break; case __LINE__: trice64("msg:%u (%%u)\n", -1 ); //exp: time: default: msg:18446744073709551615 (%u) - break; case __LINE__: trice64("msg:%b (%%b)\n", -1 ); //exp: time: default: msg:1111111111111111111111111111111111111111111111111111111111111111 (%b) - break; case __LINE__: trice64("msg:%o (%%o)\n", -1 ); //exp: time: default: msg:1777777777777777777777 (%o) - break; case __LINE__: trice64("msg:%O (%%O)\n", -1 ); //exp: time: default: msg:0o1777777777777777777777 (%O) - break; case __LINE__: trice64("msg:%X (%%X)\n", -1 ); //exp: time: default: msg:FFFFFFFFFFFFFFFF (%X) - break; case __LINE__: trice64("msg:%x (%%x)\n", -1 ); //exp: time: default: msg:ffffffffffffffff (%x) - - /**/break; case __LINE__: TRice ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - /**/break; case __LINE__: Trice ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - /**/break; case __LINE__: trice ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice8 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice8 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice8 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice16 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice16 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice16 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice32 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice32 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice32 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice64 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice64 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice64 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: trice (iD(13345), "rd:%e (%%e)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) + break; case __LINE__: trice (iD(13346), "rd:%f (%%f)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%f) + break; case __LINE__: trice (iD(13347), "rd:%g (%%g)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%g) + break; case __LINE__: trice64(iD(13348), "rd:%e (%%e)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) + break; case __LINE__: trice64(iD(13349), "rd:%f (%%f)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%f) + break; case __LINE__: trice64(iD(13350), "rd:%g (%%g)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556e+08 (%g) + + break; case __LINE__: trice32(iD(13351), "msg:%u (%%u)\n", -1 ); //exp: time: default: msg:4294967295 (%u) + break; case __LINE__: trice32(iD(13352), "msg:%b (%%b)\n", -1 ); //exp: time: default: msg:11111111111111111111111111111111 (%b) + break; case __LINE__: trice32(iD(13353), "msg:%o (%%o)\n", -1 ); //exp: time: default: msg:37777777777 (%o) + break; case __LINE__: trice32(iD(13354), "msg:%O (%%O)\n", -1 ); //exp: time: default: msg:0o37777777777 (%O) + break; case __LINE__: trice32(iD(13355), "msg:%X (%%X)\n", -1 ); //exp: time: default: msg:FFFFFFFF (%X) + break; case __LINE__: trice32(iD(13356), "msg:%x (%%x)\n", -1 ); //exp: time: default: msg:ffffffff (%x) + break; case __LINE__: trice32(iD(13357), "msg:%d (%%d)\n", -1 ); //exp: time: default: msg:-1 (%d) + break; case __LINE__: trice64(iD(13358), "msg:%u (%%u)\n", -1 ); //exp: time: default: msg:18446744073709551615 (%u) + break; case __LINE__: trice64(iD(13359), "msg:%b (%%b)\n", -1 ); //exp: time: default: msg:1111111111111111111111111111111111111111111111111111111111111111 (%b) + break; case __LINE__: trice64(iD(13360), "msg:%o (%%o)\n", -1 ); //exp: time: default: msg:1777777777777777777777 (%o) + break; case __LINE__: trice64(iD(13361), "msg:%O (%%O)\n", -1 ); //exp: time: default: msg:0o1777777777777777777777 (%O) + break; case __LINE__: trice64(iD(13362), "msg:%X (%%X)\n", -1 ); //exp: time: default: msg:FFFFFFFFFFFFFFFF (%X) + break; case __LINE__: trice64(iD(13363), "msg:%x (%%x)\n", -1 ); //exp: time: default: msg:ffffffffffffffff (%x) + + /**/break; case __LINE__: TRice (iD(13364), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + /**/break; case __LINE__: Trice (iD(13365), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + /**/break; case __LINE__: trice (iD(13366), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice8 (iD(13367), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice8 (iD(13368), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice8 (iD(13369), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice16 (iD(13370), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice16 (iD(13371), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice16 (iD(13372), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice32 (iD(13373), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice32 (iD(13374), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice32 (iD(13375), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice64 (iD(13376), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice64 (iD(13377), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice64 (iD(13378), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice8_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice8_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice8_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice16_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice16_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice16_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice32_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice32_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice32_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice64_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice64_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice64_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice_1 (iD(13379), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice_1 (iD(13380), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice_1 (iD(13381), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice8_1 (iD(13382), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice8_1 (iD(13383), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice8_1 (iD(13384), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice16_1 (iD(13385), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice16_1 (iD(13386), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice16_1 (iD(13387), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice32_1 (iD(13388), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice32_1 (iD(13389), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice32_1 (iD(13390), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice64_1 (iD(13391), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice64_1 (iD(13392), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice64_1 (iD(13393), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice8 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice8 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice8 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice16 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice16 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice16 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice32 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice32 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice32 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice64 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice64 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice64 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice (iD(13394), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice (iD(13395), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice (iD(13396), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice8 (iD(13397), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice8 (iD(13398), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice8 (iD(13399), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice16 (iD(13400), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice16 (iD(13401), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice16 (iD(13402), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice32 (iD(13403), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice32 (iD(13404), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice32 (iD(13405), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice64 (iD(13406), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice64 (iD(13407), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice64 (iD(13408), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice_0 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice_0 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice_0 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice8_0 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice8_0 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice8_0 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice16_0 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice16_0 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice16_0 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice32_0 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice32_0 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice32_0 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice64_0 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice64_0 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice64_0 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice0 ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice0 ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice0 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice ("no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice ("no value" ); //exp: time: be16default: no value - break; case __LINE__: trice ("no value" ); //exp: time: default: no value - - break; case __LINE__: TRice("info:This is a message with one value %d and a 32-bit stamp.\n", -2 ); //exp: time:feed3322default: info:This is a message with one value -2 and a 32-bit stamp. - break; case __LINE__: Trice("info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. - break; case __LINE__: trice("info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. - break; case __LINE__: TRICE(ID(0), "info:This is a message without values and a 32-bit stamp.\n" ); //exp: time:feed3322default: info:This is a message without values and a 32-bit stamp. - break; case __LINE__: TRICE(Id(0), "info:This is a message without values and a 16-bit stamp.\n" ); //exp: time: be16default: info:This is a message without values and a 16-bit stamp. - break; case __LINE__: TRICE(id(0), "info:This is a message without values and without stamp.\n" ); //exp: time: default: info:This is a message without values and without stamp. - break; case __LINE__: TRICE(ID(0), "info:This is a message with one value %d and a 32-bit stamp.\n", -2 ); //exp: time:feed3322default: info:This is a message with one value -2 and a 32-bit stamp. - break; case __LINE__: TRICE(Id(0), "info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. - break; case __LINE__: TRICE(id(0), "info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. - - break; case __LINE__: TRICE(ID(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: TRICE(Id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: TRICE(id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. - break; case __LINE__: TRICE32(ID(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: TRICE32(Id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: TRICE32(id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. - - break; case __LINE__: TRICE8 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE8_1 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE8 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE8_1 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE8 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRICE8_1 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: trice8 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: trice8_1 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: Trice8 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: Trice8_1 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRice8 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRice8_1 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - - break; case __LINE__: TRICE16 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE16_1(id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE16 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE16_1(Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE16 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRICE16_1(ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: trice16 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: trice16_1("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: Trice16 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: Trice16_1("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRice16 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRice16_1("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - - break; case __LINE__: TRICE32 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE32_1(id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE32 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE32_1(Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE32 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRICE32_1(ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: trice32 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: trice32_1("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: Trice32 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: Trice32_1("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRice32 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRice32_1("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - - break; case __LINE__: TRICE64 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE64_1(id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE64 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE64_1(Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE64 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRICE64_1(ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: trice64 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: trice64_1("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: Trice64 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: Trice64_1("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRice64 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRice64_1("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice_0 (iD(13409), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice_0 (iD(13410), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice_0 (iD(13411), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice8_0 (iD(13412), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice8_0 (iD(13413), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice8_0 (iD(13414), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice16_0 (iD(13415), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice16_0 (iD(13416), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice16_0 (iD(13417), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice32_0 (iD(13418), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice32_0 (iD(13419), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice32_0 (iD(13420), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice64_0 (iD(13421), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice64_0 (iD(13422), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice64_0 (iD(13423), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice0 (iD(13424), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice0 (iD(13425), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice0 (iD(13426), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice (iD(13427), "no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice (iD(13428), "no value" ); //exp: time: be16default: no value + break; case __LINE__: trice (iD(13429), "no value" ); //exp: time: default: no value + + break; case __LINE__: TRice(iD(13430), "info:This is a message with one value %d and a 32-bit stamp.\n", -2 ); //exp: time:feed3322default: info:This is a message with one value -2 and a 32-bit stamp. + break; case __LINE__: Trice(iD(13431), "info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. + break; case __LINE__: trice(iD(13432), "info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. + break; case __LINE__: TRICE(ID(13433), "info:This is a message without values and a 32-bit stamp.\n" ); //exp: time:feed3322default: info:This is a message without values and a 32-bit stamp. + break; case __LINE__: TRICE(Id(13434), "info:This is a message without values and a 16-bit stamp.\n" ); //exp: time: be16default: info:This is a message without values and a 16-bit stamp. + break; case __LINE__: TRICE(id(13435), "info:This is a message without values and without stamp.\n" ); //exp: time: default: info:This is a message without values and without stamp. + break; case __LINE__: TRICE(ID(13436), "info:This is a message with one value %d and a 32-bit stamp.\n", -2 ); //exp: time:feed3322default: info:This is a message with one value -2 and a 32-bit stamp. + break; case __LINE__: TRICE(Id(13437), "info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. + break; case __LINE__: TRICE(id(13438), "info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. + + break; case __LINE__: TRICE(ID(13439), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: TRICE(Id(13440), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: TRICE(id(13441), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + break; case __LINE__: TRICE32(ID(13442), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: TRICE32(Id(13443), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: TRICE32(id(13444), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + + break; case __LINE__: TRICE8 (id(13445), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE8_1 (id(13446), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE8 (Id(13447), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE8_1 (Id(13448), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE8 (ID(13449), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRICE8_1 (ID(13450), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: trice8 (iD(13451), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: trice8_1 (iD(13452), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: Trice8 (iD(13453), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: Trice8_1 (iD(13454), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRice8 (iD(13455), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice8_1 (iD(13456), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + + break; case __LINE__: TRICE16 (id(13457), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE16_1(id(13458), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE16 (Id(13459), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE16_1(Id(13460), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE16 (ID(13461), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRICE16_1(ID(13462), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: trice16 (iD(13463), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: trice16_1(iD(13464), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: Trice16 (iD(13465), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: Trice16_1(iD(13466), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRice16 (iD(13467), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice16_1(iD(13468), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + + break; case __LINE__: TRICE32 (id(13469), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE32_1(id(13470), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE32 (Id(13471), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE32_1(Id(13472), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE32 (ID(13473), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRICE32_1(ID(13474), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: trice32 (iD(13475), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: trice32_1(iD(13476), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: Trice32 (iD(13477), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: Trice32_1(iD(13478), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRice32 (iD(13479), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice32_1(iD(13480), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + + break; case __LINE__: TRICE64 (id(13481), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE64_1(id(13482), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE64 (Id(13483), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE64_1(Id(13484), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE64 (ID(13485), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRICE64_1(ID(13486), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: trice64 (iD(13487), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: trice64_1(iD(13488), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: Trice64 (iD(13489), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: Trice64_1(iD(13490), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRice64 (iD(13491), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice64_1(iD(13492), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 // mixed 16-bit and 32-bit timestamp - break; case __LINE__: TRice8("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice8("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice8("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice8("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice8("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice8("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice8("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice16("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice16("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice16("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice16("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice16("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice16("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice16("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice32("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice32("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice32("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice32("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice32("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice32("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice32("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice64("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice64("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice64("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice64("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice64("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice64("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice64("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice8_1 ("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice8_2 ("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice8_3 ("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice8_4 ("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice8_5 ("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice8_6 ("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice8_7 ("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice8_8 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice8_9 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice8_10("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice8_11("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice8_12("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice16_1 ("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice16_2 ("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice16_3 ("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice16_4 ("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice16_5 ("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice16_6 ("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice16_7 ("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice16_8 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16_9 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice16_10("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice16_11("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16_12("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice32_1 ("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice32_2 ("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice32_3 ("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice32_4 ("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice32_5 ("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice32_6 ("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice32_7 ("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice32_8 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice32_9 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice32_10("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice32_11("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice32_12("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice64_1 ("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice64_2 ("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice64_3 ("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice64_4 ("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice64_5 ("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice64_6 ("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice64_7 ("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice64_8 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice64_9 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice64_10("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice64_11("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice64_12("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice8(iD(13493), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice8(iD(13494), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice8(iD(13495), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice8(iD(13496), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice8(iD(13497), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice8(iD(13498), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice8(iD(13499), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice8(iD(13500), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice8(iD(13501), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice8(iD(13502), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice8(iD(13503), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice8(iD(13504), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice16(iD(13505), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice16(iD(13506), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice16(iD(13507), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice16(iD(13508), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice16(iD(13509), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice16(iD(13510), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice16(iD(13511), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice16(iD(13512), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16(iD(13513), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice16(iD(13514), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice16(iD(13515), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16(iD(13516), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice32(iD(13517), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice32(iD(13518), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice32(iD(13519), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice32(iD(13520), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice32(iD(13521), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice32(iD(13522), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice32(iD(13523), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice32(iD(13524), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice32(iD(13525), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice32(iD(13526), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice32(iD(13527), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice32(iD(13528), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice64(iD(13529), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice64(iD(13530), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice64(iD(13531), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice64(iD(13532), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice64(iD(13533), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice64(iD(13534), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice64(iD(13535), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice64(iD(13536), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice64(iD(13537), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice64(iD(13538), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice64(iD(13539), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice64(iD(13540), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice8_1 (iD(13541), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice8_2 (iD(13542), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice8_3 (iD(13543), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice8_4 (iD(13544), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice8_5 (iD(13545), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice8_6 (iD(13546), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice8_7 (iD(13547), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice8_8 (iD(13548), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice8_9 (iD(13549), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice8_10(iD(13550), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice8_11(iD(13551), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice8_12(iD(13552), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice16_1 (iD(13553), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice16_2 (iD(13554), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice16_3 (iD(13555), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice16_4 (iD(13556), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice16_5 (iD(13557), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice16_6 (iD(13558), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice16_7 (iD(13559), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice16_8 (iD(13560), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16_9 (iD(13561), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice16_10(iD(13562), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice16_11(iD(13563), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16_12(iD(13564), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice32_1 (iD(13565), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice32_2 (iD(13566), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice32_3 (iD(13567), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice32_4 (iD(13568), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice32_5 (iD(13569), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice32_6 (iD(13570), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice32_7 (iD(13571), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice32_8 (iD(13572), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice32_9 (iD(13573), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice32_10(iD(13574), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice32_11(iD(13575), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice32_12(iD(13576), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice64_1 (iD(13577), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice64_2 (iD(13578), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice64_3 (iD(13579), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice64_4 (iD(13580), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice64_5 (iD(13581), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice64_6 (iD(13582), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice64_7 (iD(13583), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice64_8 (iD(13584), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice64_9 (iD(13585), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice64_10(iD(13586), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice64_11(iD(13587), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice64_12(iD(13588), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 // use cases for 8-bit data - break; case __LINE__: trice8 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice8 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice8 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: trice8_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice8_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice8_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice8 (iD(13589), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice8 (iD(13590), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice8 (iD(13591), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice8_1 (iD(13592), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice8_1 (iD(13593), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice8_1 (iD(13594), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // use cases for 16-bit data - break; case __LINE__: trice16 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice16 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice16 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: trice16_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice16_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice16_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice16 (iD(13595), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice16 (iD(13596), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice16 (iD(13597), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice16_1 (iD(13598), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice16_1 (iD(13599), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice16_1 (iD(13600), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // use cases for 32-bit data - break; case __LINE__: trice32 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice32 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice32 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: trice32_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice32_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice32_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice32 (iD(13601), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice32 (iD(13602), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice32 (iD(13603), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice32_1 (iD(13604), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice32_1 (iD(13605), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice32_1 (iD(13606), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // use cases for 64-bit data - break; case __LINE__: trice64 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice64 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice64 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: trice64_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice64_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice64_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice64 (iD(13607), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice64 (iD(13608), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice64 (iD(13609), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice64_1 (iD(13610), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice64_1 (iD(13611), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice64_1 (iD(13612), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // legacy use cases - break; case __LINE__: TRICE (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRICE (id(0), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRICE (Id(0), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRICE (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE (ID(13613), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE (id(13614), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRICE (Id(13615), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRICE (ID(13616), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // default stamp - break; case __LINE__: TRICE8 (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRICE8_1 (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE8 (ID(13617), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE8_1 (ID(13618), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // no stamp - break; case __LINE__: trice8 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: trice8_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRICE8 (id(0), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRICE8_1 (id(0), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: trice8 (iD(13619), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: trice8_1 (iD(13620), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRICE8 (id(13621), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRICE8_1 (id(13622), "value=%d\n", -2 ); //exp: time: default: value=-2 // 16-bit stamp: - break; case __LINE__: Trice8 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: Trice8_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRICE8 (Id(0), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRICE8_1 (Id(0), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: Trice8 (iD(13623), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: Trice8_1 (iD(13624), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRICE8 (Id(13625), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRICE8_1 (Id(13626), "value=%d\n", -2 ); //exp: time: be16default: value=-2 // 32-bit stamp: - break; case __LINE__: TRice8 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRice8_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRICE8 (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRICE8_1 (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRice8 (iD(13627), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRice8_1 (iD(13628), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE8 (ID(13629), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE8_1 (ID(13630), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) // tags - break; case __LINE__: TRICE(id(0), "FATAL:magenta+b:red\n" ); //exp: time: default: FATAL:magenta+b:red - break; case __LINE__: TRICE(id(0), "CRITICAL:red+i:default+h\n" ); //exp: time: default: CRITICAL:red+i:default+h - break; case __LINE__: TRICE(id(0), "EMERGENCY:red+i:blue\n" ); //exp: time: default: EMERGENCY:red+i:blue - break; case __LINE__: TRICE(id(0), "ERROR:11:red\n" ); //exp: time: default: ERROR:11:red - break; case __LINE__: TRICE(id(0), "WARNING:11+i:red\n" ); //exp: time: default: WARNING:11+i:red - break; case __LINE__: TRICE(id(0), "ATTENTION:11:green\n" ); //exp: time: default: ATTENTION:11:green - break; case __LINE__: TRICE(id(0), "INFO:cyan+b:default+h\n" ); //exp: time: default: INFO:cyan+b:default+h - break; case __LINE__: TRICE(id(0), "DEBUG:130+i\n" ); //exp: time: default: DEBUG:130+i - break; case __LINE__: TRICE(id(0), "TRACE:default+i:default+h\n" ); //exp: time: default: TRACE:default+i:default+h - break; case __LINE__: TRICE(id(0), "TIME:blue+i:blue+h\n" ); //exp: time: default: TIME:blue+i:blue+h - break; case __LINE__: TRICE(id(0), "MESSAGE:green+h:black\n" ); //exp: time: default: MESSAGE:green+h:black - break; case __LINE__: TRICE(id(0), "READ:black+i:yellow+h\n" ); //exp: time: default: READ:black+i:yellow+h - break; case __LINE__: TRICE(id(0), "WRITE:black+u:yellow+h\n" ); //exp: time: default: WRITE:black+u:yellow+h - break; case __LINE__: TRICE(id(0), "RECEIVE:black+h:black\n" ); //exp: time: default: RECEIVE:black+h:black - break; case __LINE__: TRICE(id(0), "TRANSMIT:black:black+h\n" ); //exp: time: default: TRANSMIT:black:black+h - break; case __LINE__: TRICE(id(0), "DIAG:yellow+i:default+h\n" ); //exp: time: default: DIAG:yellow+i:default+h - break; case __LINE__: TRICE(id(0), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: default: INTERRUPT:magenta+i:default+h - break; case __LINE__: TRICE(id(0), "SIGNAL:118+i\n" ); //exp: time: default: SIGNAL:118+i - break; case __LINE__: TRICE(id(0), "TEST:yellow+h:black\n" ); //exp: time: default: TEST:yellow+h:black - break; case __LINE__: TRICE(id(0), "DEFAULT:off\n" ); //exp: time: default: DEFAULT:off - break; case __LINE__: TRICE(id(0), "NOTICE:blue:white+h\n" ); //exp: time: default: NOTICE:blue:white+h - break; case __LINE__: TRICE(id(0), "ALERT:magenta:magenta+h\n" ); //exp: time: default: ALERT:magenta:magenta+h - break; case __LINE__: TRICE(id(0), "ASSERT:yellow+i:blue\n" ); //exp: time: default: ASSERT:yellow+i:blue - break; case __LINE__: TRICE(id(0), "ALARM:red+i:white+h\n" ); //exp: time: default: ALARM:red+i:white+h - break; case __LINE__: TRICE(id(0), "VERBOSE:blue:default\n" ); //exp: time: default: VERBOSE:blue:default - break; case __LINE__: TRICE(id(0), "fatal:magenta+b:red\n" ); //exp: time: default: fatal:magenta+b:red - break; case __LINE__: TRICE(id(0), "critical:red+i:default+h\n" ); //exp: time: default: critical:red+i:default+h - break; case __LINE__: TRICE(id(0), "emergency:red+i:blue\n" ); //exp: time: default: emergency:red+i:blue - break; case __LINE__: TRICE(id(0), "error:11:red\n" ); //exp: time: default: error:11:red - break; case __LINE__: TRICE(id(0), "warning:11+i:red\n" ); //exp: time: default: warning:11+i:red - break; case __LINE__: TRICE(id(0), "attention:11:green\n" ); //exp: time: default: attention:11:green - break; case __LINE__: TRICE(id(0), "info:cyan+b:default+h\n" ); //exp: time: default: info:cyan+b:default+h - break; case __LINE__: TRICE(id(0), "debug:130+i\n" ); //exp: time: default: debug:130+i - break; case __LINE__: TRICE(id(0), "trace:default+i:default+h\n" ); //exp: time: default: trace:default+i:default+h - break; case __LINE__: TRICE(id(0), "time:blue+i:blue+h\n" ); //exp: time: default: time:blue+i:blue+h - break; case __LINE__: TRICE(id(0), "message:green+h:black\n" ); //exp: time: default: message:green+h:black - break; case __LINE__: TRICE(id(0), "read:black+i:yellow+h\n" ); //exp: time: default: read:black+i:yellow+h - break; case __LINE__: TRICE(id(0), "write:black+u:yellow+h\n" ); //exp: time: default: write:black+u:yellow+h - break; case __LINE__: TRICE(id(0), "receive:black+h:black\n" ); //exp: time: default: receive:black+h:black - break; case __LINE__: TRICE(id(0), "transmit:black:black+h\n" ); //exp: time: default: transmit:black:black+h - break; case __LINE__: TRICE(id(0), "diag:yellow+i:default+h\n" ); //exp: time: default: diag:yellow+i:default+h - break; case __LINE__: TRICE(id(0), "interrupt:magenta+i:default+h\n" ); //exp: time: default: interrupt:magenta+i:default+h - break; case __LINE__: TRICE(id(0), "signal:118+i\n" ); //exp: time: default: signal:118+i - break; case __LINE__: TRICE(id(0), "test:yellow+h:black\n" ); //exp: time: default: test:yellow+h:black - break; case __LINE__: TRICE(id(0), "default:off\n" ); //exp: time: default: default:off - break; case __LINE__: TRICE(id(0), "notice:blue:white+h\n" ); //exp: time: default: notice:blue:white+h - break; case __LINE__: TRICE(id(0), "alert:magenta:magenta+h\n" ); //exp: time: default: alert:magenta:magenta+h - break; case __LINE__: TRICE(id(0), "assert:yellow+i:blue\n" ); //exp: time: default: assert:yellow+i:blue - break; case __LINE__: TRICE(id(0), "alarm:red+i:white+h\n" ); //exp: time: default: alarm:red+i:white+h - break; case __LINE__: TRICE(id(0), "verbose:blue:default\n" ); //exp: time: default: verbose:blue:default + break; case __LINE__: TRICE(id(13631), "FATAL:magenta+b:red\n" ); //exp: time: default: FATAL:magenta+b:red + break; case __LINE__: TRICE(id(13632), "CRITICAL:red+i:default+h\n" ); //exp: time: default: CRITICAL:red+i:default+h + break; case __LINE__: TRICE(id(13633), "EMERGENCY:red+i:blue\n" ); //exp: time: default: EMERGENCY:red+i:blue + break; case __LINE__: TRICE(id(13634), "ERROR:11:red\n" ); //exp: time: default: ERROR:11:red + break; case __LINE__: TRICE(id(13635), "WARNING:11+i:red\n" ); //exp: time: default: WARNING:11+i:red + break; case __LINE__: TRICE(id(13636), "ATTENTION:11:green\n" ); //exp: time: default: ATTENTION:11:green + break; case __LINE__: TRICE(id(13637), "INFO:cyan+b:default+h\n" ); //exp: time: default: INFO:cyan+b:default+h + break; case __LINE__: TRICE(id(13638), "DEBUG:130+i\n" ); //exp: time: default: DEBUG:130+i + break; case __LINE__: TRICE(id(13639), "TRACE:default+i:default+h\n" ); //exp: time: default: TRACE:default+i:default+h + break; case __LINE__: TRICE(id(13640), "TIME:blue+i:blue+h\n" ); //exp: time: default: TIME:blue+i:blue+h + break; case __LINE__: TRICE(id(13641), "MESSAGE:green+h:black\n" ); //exp: time: default: MESSAGE:green+h:black + break; case __LINE__: TRICE(id(13642), "READ:black+i:yellow+h\n" ); //exp: time: default: READ:black+i:yellow+h + break; case __LINE__: TRICE(id(13643), "WRITE:black+u:yellow+h\n" ); //exp: time: default: WRITE:black+u:yellow+h + break; case __LINE__: TRICE(id(13644), "RECEIVE:black+h:black\n" ); //exp: time: default: RECEIVE:black+h:black + break; case __LINE__: TRICE(id(13645), "TRANSMIT:black:black+h\n" ); //exp: time: default: TRANSMIT:black:black+h + break; case __LINE__: TRICE(id(13646), "DIAG:yellow+i:default+h\n" ); //exp: time: default: DIAG:yellow+i:default+h + break; case __LINE__: TRICE(id(13647), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: default: INTERRUPT:magenta+i:default+h + break; case __LINE__: TRICE(id(13648), "SIGNAL:118+i\n" ); //exp: time: default: SIGNAL:118+i + break; case __LINE__: TRICE(id(13649), "TEST:yellow+h:black\n" ); //exp: time: default: TEST:yellow+h:black + break; case __LINE__: TRICE(id(13650), "DEFAULT:off\n" ); //exp: time: default: DEFAULT:off + break; case __LINE__: TRICE(id(13651), "NOTICE:blue:white+h\n" ); //exp: time: default: NOTICE:blue:white+h + break; case __LINE__: TRICE(id(13652), "ALERT:magenta:magenta+h\n" ); //exp: time: default: ALERT:magenta:magenta+h + break; case __LINE__: TRICE(id(13653), "ASSERT:yellow+i:blue\n" ); //exp: time: default: ASSERT:yellow+i:blue + break; case __LINE__: TRICE(id(13654), "ALARM:red+i:white+h\n" ); //exp: time: default: ALARM:red+i:white+h + break; case __LINE__: TRICE(id(13655), "VERBOSE:blue:default\n" ); //exp: time: default: VERBOSE:blue:default + break; case __LINE__: TRICE(id(13656), "fatal:magenta+b:red\n" ); //exp: time: default: fatal:magenta+b:red + break; case __LINE__: TRICE(id(13657), "critical:red+i:default+h\n" ); //exp: time: default: critical:red+i:default+h + break; case __LINE__: TRICE(id(13658), "emergency:red+i:blue\n" ); //exp: time: default: emergency:red+i:blue + break; case __LINE__: TRICE(id(13659), "error:11:red\n" ); //exp: time: default: error:11:red + break; case __LINE__: TRICE(id(13660), "warning:11+i:red\n" ); //exp: time: default: warning:11+i:red + break; case __LINE__: TRICE(id(13661), "attention:11:green\n" ); //exp: time: default: attention:11:green + break; case __LINE__: TRICE(id(13662), "info:cyan+b:default+h\n" ); //exp: time: default: info:cyan+b:default+h + break; case __LINE__: TRICE(id(13663), "debug:130+i\n" ); //exp: time: default: debug:130+i + break; case __LINE__: TRICE(id(13664), "trace:default+i:default+h\n" ); //exp: time: default: trace:default+i:default+h + break; case __LINE__: TRICE(id(13665), "time:blue+i:blue+h\n" ); //exp: time: default: time:blue+i:blue+h + break; case __LINE__: TRICE(id(13666), "message:green+h:black\n" ); //exp: time: default: message:green+h:black + break; case __LINE__: TRICE(id(13667), "read:black+i:yellow+h\n" ); //exp: time: default: read:black+i:yellow+h + break; case __LINE__: TRICE(id(13668), "write:black+u:yellow+h\n" ); //exp: time: default: write:black+u:yellow+h + break; case __LINE__: TRICE(id(13669), "receive:black+h:black\n" ); //exp: time: default: receive:black+h:black + break; case __LINE__: TRICE(id(13670), "transmit:black:black+h\n" ); //exp: time: default: transmit:black:black+h + break; case __LINE__: TRICE(id(13671), "diag:yellow+i:default+h\n" ); //exp: time: default: diag:yellow+i:default+h + break; case __LINE__: TRICE(id(13672), "interrupt:magenta+i:default+h\n" ); //exp: time: default: interrupt:magenta+i:default+h + break; case __LINE__: TRICE(id(13673), "signal:118+i\n" ); //exp: time: default: signal:118+i + break; case __LINE__: TRICE(id(13674), "test:yellow+h:black\n" ); //exp: time: default: test:yellow+h:black + break; case __LINE__: TRICE(id(13675), "default:off\n" ); //exp: time: default: default:off + break; case __LINE__: TRICE(id(13676), "notice:blue:white+h\n" ); //exp: time: default: notice:blue:white+h + break; case __LINE__: TRICE(id(13677), "alert:magenta:magenta+h\n" ); //exp: time: default: alert:magenta:magenta+h + break; case __LINE__: TRICE(id(13678), "assert:yellow+i:blue\n" ); //exp: time: default: assert:yellow+i:blue + break; case __LINE__: TRICE(id(13679), "alarm:red+i:white+h\n" ); //exp: time: default: alarm:red+i:white+h + break; case __LINE__: TRICE(id(13680), "verbose:blue:default\n" ); //exp: time: default: verbose:blue:default #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("FATAL:magenta+b:red\n" ); //exp: time: default: FATAL:magenta+b:red - break; case __LINE__: trice("CRITICAL:red+i:default+h\n" ); //exp: time: default: CRITICAL:red+i:default+h - break; case __LINE__: trice("EMERGENCY:red+i:blue\n" ); //exp: time: default: EMERGENCY:red+i:blue - break; case __LINE__: trice("ERROR:11:red\n" ); //exp: time: default: ERROR:11:red - break; case __LINE__: trice("WARNING:11+i:red\n" ); //exp: time: default: WARNING:11+i:red - break; case __LINE__: trice("ATTENTION:11:green\n" ); //exp: time: default: ATTENTION:11:green - break; case __LINE__: trice("INFO:cyan+b:default+h\n" ); //exp: time: default: INFO:cyan+b:default+h - break; case __LINE__: trice("DEBUG:130+i\n" ); //exp: time: default: DEBUG:130+i - break; case __LINE__: trice("TRACE:default+i:default+h\n" ); //exp: time: default: TRACE:default+i:default+h - break; case __LINE__: trice("TIME:blue+i:blue+h\n" ); //exp: time: default: TIME:blue+i:blue+h - break; case __LINE__: trice("MESSAGE:green+h:black\n" ); //exp: time: default: MESSAGE:green+h:black - break; case __LINE__: trice("READ:black+i:yellow+h\n" ); //exp: time: default: READ:black+i:yellow+h - break; case __LINE__: trice("WRITE:black+u:yellow+h\n" ); //exp: time: default: WRITE:black+u:yellow+h - break; case __LINE__: trice("RECEIVE:black+h:black\n" ); //exp: time: default: RECEIVE:black+h:black - break; case __LINE__: trice("TRANSMIT:black:black+h\n" ); //exp: time: default: TRANSMIT:black:black+h - break; case __LINE__: trice("DIAG:yellow+i:default+h\n" ); //exp: time: default: DIAG:yellow+i:default+h - break; case __LINE__: trice("INTERRUPT:magenta+i:default+h\n" ); //exp: time: default: INTERRUPT:magenta+i:default+h - break; case __LINE__: trice("SIGNAL:118+i\n" ); //exp: time: default: SIGNAL:118+i - break; case __LINE__: trice("TEST:yellow+h:black\n" ); //exp: time: default: TEST:yellow+h:black - break; case __LINE__: trice("DEFAULT:off\n" ); //exp: time: default: DEFAULT:off - break; case __LINE__: trice("NOTICE:blue:white+h\n" ); //exp: time: default: NOTICE:blue:white+h - break; case __LINE__: trice("ALERT:magenta:magenta+h\n" ); //exp: time: default: ALERT:magenta:magenta+h - break; case __LINE__: trice("ASSERT:yellow+i:blue\n" ); //exp: time: default: ASSERT:yellow+i:blue - break; case __LINE__: trice("ALARM:red+i:white+h\n" ); //exp: time: default: ALARM:red+i:white+h - break; case __LINE__: trice("VERBOSE:blue:default\n" ); //exp: time: default: VERBOSE:blue:default - break; case __LINE__: trice("fatal:magenta+b:red\n" ); //exp: time: default: fatal:magenta+b:red - break; case __LINE__: trice("critical:red+i:default+h\n" ); //exp: time: default: critical:red+i:default+h - break; case __LINE__: trice("emergency:red+i:blue\n" ); //exp: time: default: emergency:red+i:blue - break; case __LINE__: trice("error:11:red\n" ); //exp: time: default: error:11:red - break; case __LINE__: trice("warning:11+i:red\n" ); //exp: time: default: warning:11+i:red - break; case __LINE__: trice("attention:11:green\n" ); //exp: time: default: attention:11:green - break; case __LINE__: trice("info:cyan+b:default+h\n" ); //exp: time: default: info:cyan+b:default+h - break; case __LINE__: trice("debug:130+i\n" ); //exp: time: default: debug:130+i - break; case __LINE__: trice("trace:default+i:default+h\n" ); //exp: time: default: trace:default+i:default+h - break; case __LINE__: trice("time:blue+i:blue+h\n" ); //exp: time: default: time:blue+i:blue+h - break; case __LINE__: trice("message:green+h:black\n" ); //exp: time: default: message:green+h:black - break; case __LINE__: trice("read:black+i:yellow+h\n" ); //exp: time: default: read:black+i:yellow+h - break; case __LINE__: trice("write:black+u:yellow+h\n" ); //exp: time: default: write:black+u:yellow+h - break; case __LINE__: trice("receive:black+h:black\n" ); //exp: time: default: receive:black+h:black - break; case __LINE__: trice("transmit:black:black+h\n" ); //exp: time: default: transmit:black:black+h - break; case __LINE__: trice("diag:yellow+i:default+h\n" ); //exp: time: default: diag:yellow+i:default+h - break; case __LINE__: trice("interrupt:magenta+i:default+h\n" ); //exp: time: default: interrupt:magenta+i:default+h - break; case __LINE__: trice("signal:118+i\n" ); //exp: time: default: signal:118+i - break; case __LINE__: trice("test:yellow+h:black\n" ); //exp: time: default: test:yellow+h:black - break; case __LINE__: trice("default:off\n" ); //exp: time: default: default:off - break; case __LINE__: trice("notice:blue:white+h\n" ); //exp: time: default: notice:blue:white+h - break; case __LINE__: trice("alert:magenta:magenta+h\n" ); //exp: time: default: alert:magenta:magenta+h - break; case __LINE__: trice("assert:yellow+i:blue\n" ); //exp: time: default: assert:yellow+i:blue - break; case __LINE__: trice("alarm:red+i:white+h\n" ); //exp: time: default: alarm:red+i:white+h - break; case __LINE__: trice("verbose:blue:default\n" ); //exp: time: default: verbose:blue:default + break; case __LINE__: trice(iD(13681), "FATAL:magenta+b:red\n" ); //exp: time: default: FATAL:magenta+b:red + break; case __LINE__: trice(iD(13682), "CRITICAL:red+i:default+h\n" ); //exp: time: default: CRITICAL:red+i:default+h + break; case __LINE__: trice(iD(13683), "EMERGENCY:red+i:blue\n" ); //exp: time: default: EMERGENCY:red+i:blue + break; case __LINE__: trice(iD(13684), "ERROR:11:red\n" ); //exp: time: default: ERROR:11:red + break; case __LINE__: trice(iD(13685), "WARNING:11+i:red\n" ); //exp: time: default: WARNING:11+i:red + break; case __LINE__: trice(iD(13686), "ATTENTION:11:green\n" ); //exp: time: default: ATTENTION:11:green + break; case __LINE__: trice(iD(13687), "INFO:cyan+b:default+h\n" ); //exp: time: default: INFO:cyan+b:default+h + break; case __LINE__: trice(iD(13688), "DEBUG:130+i\n" ); //exp: time: default: DEBUG:130+i + break; case __LINE__: trice(iD(13689), "TRACE:default+i:default+h\n" ); //exp: time: default: TRACE:default+i:default+h + break; case __LINE__: trice(iD(13690), "TIME:blue+i:blue+h\n" ); //exp: time: default: TIME:blue+i:blue+h + break; case __LINE__: trice(iD(13691), "MESSAGE:green+h:black\n" ); //exp: time: default: MESSAGE:green+h:black + break; case __LINE__: trice(iD(13692), "READ:black+i:yellow+h\n" ); //exp: time: default: READ:black+i:yellow+h + break; case __LINE__: trice(iD(13693), "WRITE:black+u:yellow+h\n" ); //exp: time: default: WRITE:black+u:yellow+h + break; case __LINE__: trice(iD(13694), "RECEIVE:black+h:black\n" ); //exp: time: default: RECEIVE:black+h:black + break; case __LINE__: trice(iD(13695), "TRANSMIT:black:black+h\n" ); //exp: time: default: TRANSMIT:black:black+h + break; case __LINE__: trice(iD(13696), "DIAG:yellow+i:default+h\n" ); //exp: time: default: DIAG:yellow+i:default+h + break; case __LINE__: trice(iD(13697), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: default: INTERRUPT:magenta+i:default+h + break; case __LINE__: trice(iD(13698), "SIGNAL:118+i\n" ); //exp: time: default: SIGNAL:118+i + break; case __LINE__: trice(iD(13699), "TEST:yellow+h:black\n" ); //exp: time: default: TEST:yellow+h:black + break; case __LINE__: trice(iD(13700), "DEFAULT:off\n" ); //exp: time: default: DEFAULT:off + break; case __LINE__: trice(iD(13701), "NOTICE:blue:white+h\n" ); //exp: time: default: NOTICE:blue:white+h + break; case __LINE__: trice(iD(13702), "ALERT:magenta:magenta+h\n" ); //exp: time: default: ALERT:magenta:magenta+h + break; case __LINE__: trice(iD(13703), "ASSERT:yellow+i:blue\n" ); //exp: time: default: ASSERT:yellow+i:blue + break; case __LINE__: trice(iD(13704), "ALARM:red+i:white+h\n" ); //exp: time: default: ALARM:red+i:white+h + break; case __LINE__: trice(iD(13705), "VERBOSE:blue:default\n" ); //exp: time: default: VERBOSE:blue:default + break; case __LINE__: trice(iD(13706), "fatal:magenta+b:red\n" ); //exp: time: default: fatal:magenta+b:red + break; case __LINE__: trice(iD(13707), "critical:red+i:default+h\n" ); //exp: time: default: critical:red+i:default+h + break; case __LINE__: trice(iD(13708), "emergency:red+i:blue\n" ); //exp: time: default: emergency:red+i:blue + break; case __LINE__: trice(iD(13709), "error:11:red\n" ); //exp: time: default: error:11:red + break; case __LINE__: trice(iD(13710), "warning:11+i:red\n" ); //exp: time: default: warning:11+i:red + break; case __LINE__: trice(iD(13711), "attention:11:green\n" ); //exp: time: default: attention:11:green + break; case __LINE__: trice(iD(13712), "info:cyan+b:default+h\n" ); //exp: time: default: info:cyan+b:default+h + break; case __LINE__: trice(iD(13713), "debug:130+i\n" ); //exp: time: default: debug:130+i + break; case __LINE__: trice(iD(13714), "trace:default+i:default+h\n" ); //exp: time: default: trace:default+i:default+h + break; case __LINE__: trice(iD(13715), "time:blue+i:blue+h\n" ); //exp: time: default: time:blue+i:blue+h + break; case __LINE__: trice(iD(13716), "message:green+h:black\n" ); //exp: time: default: message:green+h:black + break; case __LINE__: trice(iD(13717), "read:black+i:yellow+h\n" ); //exp: time: default: read:black+i:yellow+h + break; case __LINE__: trice(iD(13718), "write:black+u:yellow+h\n" ); //exp: time: default: write:black+u:yellow+h + break; case __LINE__: trice(iD(13719), "receive:black+h:black\n" ); //exp: time: default: receive:black+h:black + break; case __LINE__: trice(iD(13720), "transmit:black:black+h\n" ); //exp: time: default: transmit:black:black+h + break; case __LINE__: trice(iD(13721), "diag:yellow+i:default+h\n" ); //exp: time: default: diag:yellow+i:default+h + break; case __LINE__: trice(iD(13722), "interrupt:magenta+i:default+h\n" ); //exp: time: default: interrupt:magenta+i:default+h + break; case __LINE__: trice(iD(13723), "signal:118+i\n" ); //exp: time: default: signal:118+i + break; case __LINE__: trice(iD(13724), "test:yellow+h:black\n" ); //exp: time: default: test:yellow+h:black + break; case __LINE__: trice(iD(13725), "default:off\n" ); //exp: time: default: default:off + break; case __LINE__: trice(iD(13726), "notice:blue:white+h\n" ); //exp: time: default: notice:blue:white+h + break; case __LINE__: trice(iD(13727), "alert:magenta:magenta+h\n" ); //exp: time: default: alert:magenta:magenta+h + break; case __LINE__: trice(iD(13728), "assert:yellow+i:blue\n" ); //exp: time: default: assert:yellow+i:blue + break; case __LINE__: trice(iD(13729), "alarm:red+i:white+h\n" ); //exp: time: default: alarm:red+i:white+h + break; case __LINE__: trice(iD(13730), "verbose:blue:default\n" ); //exp: time: default: verbose:blue:default #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE(Id(0), "FATAL:magenta+b:red\n" ); //exp: time: be16default: FATAL:magenta+b:red - break; case __LINE__: TRICE(Id(0), "CRITICAL:red+i:default+h\n" ); //exp: time: be16default: CRITICAL:red+i:default+h - break; case __LINE__: TRICE(Id(0), "EMERGENCY:red+i:blue\n" ); //exp: time: be16default: EMERGENCY:red+i:blue - break; case __LINE__: TRICE(Id(0), "ERROR:11:red\n" ); //exp: time: be16default: ERROR:11:red - break; case __LINE__: TRICE(Id(0), "WARNING:11+i:red\n" ); //exp: time: be16default: WARNING:11+i:red - break; case __LINE__: TRICE(Id(0), "ATTENTION:11:green\n" ); //exp: time: be16default: ATTENTION:11:green - break; case __LINE__: TRICE(Id(0), "INFO:cyan+b:default+h\n" ); //exp: time: be16default: INFO:cyan+b:default+h - break; case __LINE__: TRICE(Id(0), "DEBUG:130+i\n" ); //exp: time: be16default: DEBUG:130+i - break; case __LINE__: TRICE(Id(0), "TRACE:default+i:default+h\n" ); //exp: time: be16default: TRACE:default+i:default+h - break; case __LINE__: TRICE(Id(0), "TIME:blue+i:blue+h\n" ); //exp: time: be16default: TIME:blue+i:blue+h - break; case __LINE__: TRICE(Id(0), "MESSAGE:green+h:black\n" ); //exp: time: be16default: MESSAGE:green+h:black - break; case __LINE__: TRICE(Id(0), "READ:black+i:yellow+h\n" ); //exp: time: be16default: READ:black+i:yellow+h - break; case __LINE__: TRICE(Id(0), "WRITE:black+u:yellow+h\n" ); //exp: time: be16default: WRITE:black+u:yellow+h - break; case __LINE__: TRICE(Id(0), "RECEIVE:black+h:black\n" ); //exp: time: be16default: RECEIVE:black+h:black - break; case __LINE__: TRICE(Id(0), "TRANSMIT:black:black+h\n" ); //exp: time: be16default: TRANSMIT:black:black+h - break; case __LINE__: TRICE(Id(0), "DIAG:yellow+i:default+h\n" ); //exp: time: be16default: DIAG:yellow+i:default+h - break; case __LINE__: TRICE(Id(0), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: be16default: INTERRUPT:magenta+i:default+h - break; case __LINE__: TRICE(Id(0), "SIGNAL:118+i\n" ); //exp: time: be16default: SIGNAL:118+i - break; case __LINE__: TRICE(Id(0), "TEST:yellow+h:black\n" ); //exp: time: be16default: TEST:yellow+h:black - break; case __LINE__: TRICE(Id(0), "DEFAULT:off\n" ); //exp: time: be16default: DEFAULT:off - break; case __LINE__: TRICE(Id(0), "NOTICE:blue:white+h\n" ); //exp: time: be16default: NOTICE:blue:white+h - break; case __LINE__: TRICE(Id(0), "ALERT:magenta:magenta+h\n" ); //exp: time: be16default: ALERT:magenta:magenta+h - break; case __LINE__: TRICE(Id(0), "ASSERT:yellow+i:blue\n" ); //exp: time: be16default: ASSERT:yellow+i:blue - break; case __LINE__: TRICE(Id(0), "ALARM:red+i:white+h\n" ); //exp: time: be16default: ALARM:red+i:white+h - break; case __LINE__: TRICE(Id(0), "VERBOSE:blue:default\n" ); //exp: time: be16default: VERBOSE:blue:default - break; case __LINE__: TRICE(Id(0), "fatal:magenta+b:red\n" ); //exp: time: be16default: fatal:magenta+b:red - break; case __LINE__: TRICE(Id(0), "critical:red+i:default+h\n" ); //exp: time: be16default: critical:red+i:default+h - break; case __LINE__: TRICE(Id(0), "emergency:red+i:blue\n" ); //exp: time: be16default: emergency:red+i:blue - break; case __LINE__: TRICE(Id(0), "error:11:red\n" ); //exp: time: be16default: error:11:red - break; case __LINE__: TRICE(Id(0), "warning:11+i:red\n" ); //exp: time: be16default: warning:11+i:red - break; case __LINE__: TRICE(Id(0), "attention:11:green\n" ); //exp: time: be16default: attention:11:green - break; case __LINE__: TRICE(Id(0), "info:cyan+b:default+h\n" ); //exp: time: be16default: info:cyan+b:default+h - break; case __LINE__: TRICE(Id(0), "debug:130+i\n" ); //exp: time: be16default: debug:130+i - break; case __LINE__: TRICE(Id(0), "trace:default+i:default+h\n" ); //exp: time: be16default: trace:default+i:default+h - break; case __LINE__: TRICE(Id(0), "time:blue+i:blue+h\n" ); //exp: time: be16default: time:blue+i:blue+h - break; case __LINE__: TRICE(Id(0), "message:green+h:black\n" ); //exp: time: be16default: message:green+h:black - break; case __LINE__: TRICE(Id(0), "read:black+i:yellow+h\n" ); //exp: time: be16default: read:black+i:yellow+h - break; case __LINE__: TRICE(Id(0), "write:black+u:yellow+h\n" ); //exp: time: be16default: write:black+u:yellow+h - break; case __LINE__: TRICE(Id(0), "receive:black+h:black\n" ); //exp: time: be16default: receive:black+h:black - break; case __LINE__: TRICE(Id(0), "transmit:black:black+h\n" ); //exp: time: be16default: transmit:black:black+h - break; case __LINE__: TRICE(Id(0), "diag:yellow+i:default+h\n" ); //exp: time: be16default: diag:yellow+i:default+h - break; case __LINE__: TRICE(Id(0), "interrupt:magenta+i:default+h\n" ); //exp: time: be16default: interrupt:magenta+i:default+h - break; case __LINE__: TRICE(Id(0), "signal:118+i\n" ); //exp: time: be16default: signal:118+i - break; case __LINE__: TRICE(Id(0), "test:yellow+h:black\n" ); //exp: time: be16default: test:yellow+h:black - break; case __LINE__: TRICE(Id(0), "default:off\n" ); //exp: time: be16default: default:off - break; case __LINE__: TRICE(Id(0), "notice:blue:white+h\n" ); //exp: time: be16default: notice:blue:white+h - break; case __LINE__: TRICE(Id(0), "alert:magenta:magenta+h\n" ); //exp: time: be16default: alert:magenta:magenta+h - break; case __LINE__: TRICE(Id(0), "assert:yellow+i:blue\n" ); //exp: time: be16default: assert:yellow+i:blue - break; case __LINE__: TRICE(Id(0), "alarm:red+i:white+h\n" ); //exp: time: be16default: alarm:red+i:white+h - break; case __LINE__: TRICE(Id(0), "verbose:blue:default\n" ); //exp: time: be16default: verbose:blue:default - - break; case __LINE__: Trice("FATAL:magenta+b:red\n" ); //exp: time: be16default: FATAL:magenta+b:red - break; case __LINE__: Trice("CRITICAL:red+i:default+h\n" ); //exp: time: be16default: CRITICAL:red+i:default+h - break; case __LINE__: Trice("EMERGENCY:red+i:blue\n" ); //exp: time: be16default: EMERGENCY:red+i:blue - break; case __LINE__: Trice("ERROR:11:red\n" ); //exp: time: be16default: ERROR:11:red - break; case __LINE__: Trice("WARNING:11+i:red\n" ); //exp: time: be16default: WARNING:11+i:red - break; case __LINE__: Trice("ATTENTION:11:green\n" ); //exp: time: be16default: ATTENTION:11:green - break; case __LINE__: Trice("INFO:cyan+b:default+h\n" ); //exp: time: be16default: INFO:cyan+b:default+h - break; case __LINE__: Trice("DEBUG:130+i\n" ); //exp: time: be16default: DEBUG:130+i - break; case __LINE__: Trice("TRACE:default+i:default+h\n" ); //exp: time: be16default: TRACE:default+i:default+h - break; case __LINE__: Trice("TIME:blue+i:blue+h\n" ); //exp: time: be16default: TIME:blue+i:blue+h - break; case __LINE__: Trice("MESSAGE:green+h:black\n" ); //exp: time: be16default: MESSAGE:green+h:black - break; case __LINE__: Trice("READ:black+i:yellow+h\n" ); //exp: time: be16default: READ:black+i:yellow+h - break; case __LINE__: Trice("WRITE:black+u:yellow+h\n" ); //exp: time: be16default: WRITE:black+u:yellow+h - break; case __LINE__: Trice("RECEIVE:black+h:black\n" ); //exp: time: be16default: RECEIVE:black+h:black - break; case __LINE__: Trice("TRANSMIT:black:black+h\n" ); //exp: time: be16default: TRANSMIT:black:black+h - break; case __LINE__: Trice("DIAG:yellow+i:default+h\n" ); //exp: time: be16default: DIAG:yellow+i:default+h - break; case __LINE__: Trice("INTERRUPT:magenta+i:default+h\n" ); //exp: time: be16default: INTERRUPT:magenta+i:default+h - break; case __LINE__: Trice("SIGNAL:118+i\n" ); //exp: time: be16default: SIGNAL:118+i - break; case __LINE__: Trice("TEST:yellow+h:black\n" ); //exp: time: be16default: TEST:yellow+h:black - break; case __LINE__: Trice("DEFAULT:off\n" ); //exp: time: be16default: DEFAULT:off - break; case __LINE__: Trice("NOTICE:blue:white+h\n" ); //exp: time: be16default: NOTICE:blue:white+h - break; case __LINE__: Trice("ALERT:magenta:magenta+h\n" ); //exp: time: be16default: ALERT:magenta:magenta+h - break; case __LINE__: Trice("ASSERT:yellow+i:blue\n" ); //exp: time: be16default: ASSERT:yellow+i:blue - break; case __LINE__: Trice("ALARM:red+i:white+h\n" ); //exp: time: be16default: ALARM:red+i:white+h - break; case __LINE__: Trice("VERBOSE:blue:default\n" ); //exp: time: be16default: VERBOSE:blue:default - break; case __LINE__: Trice("fatal:magenta+b:red\n" ); //exp: time: be16default: fatal:magenta+b:red - break; case __LINE__: Trice("critical:red+i:default+h\n" ); //exp: time: be16default: critical:red+i:default+h - break; case __LINE__: Trice("emergency:red+i:blue\n" ); //exp: time: be16default: emergency:red+i:blue - break; case __LINE__: Trice("error:11:red\n" ); //exp: time: be16default: error:11:red - break; case __LINE__: Trice("warning:11+i:red\n" ); //exp: time: be16default: warning:11+i:red - break; case __LINE__: Trice("attention:11:green\n" ); //exp: time: be16default: attention:11:green - break; case __LINE__: Trice("info:cyan+b:default+h\n" ); //exp: time: be16default: info:cyan+b:default+h - break; case __LINE__: Trice("debug:130+i\n" ); //exp: time: be16default: debug:130+i - break; case __LINE__: Trice("trace:default+i:default+h\n" ); //exp: time: be16default: trace:default+i:default+h - break; case __LINE__: Trice("time:blue+i:blue+h\n" ); //exp: time: be16default: time:blue+i:blue+h - break; case __LINE__: Trice("message:green+h:black\n" ); //exp: time: be16default: message:green+h:black - break; case __LINE__: Trice("read:black+i:yellow+h\n" ); //exp: time: be16default: read:black+i:yellow+h - break; case __LINE__: Trice("write:black+u:yellow+h\n" ); //exp: time: be16default: write:black+u:yellow+h - break; case __LINE__: Trice("receive:black+h:black\n" ); //exp: time: be16default: receive:black+h:black - break; case __LINE__: Trice("transmit:black:black+h\n" ); //exp: time: be16default: transmit:black:black+h - break; case __LINE__: Trice("diag:yellow+i:default+h\n" ); //exp: time: be16default: diag:yellow+i:default+h - break; case __LINE__: Trice("interrupt:magenta+i:default+h\n" ); //exp: time: be16default: interrupt:magenta+i:default+h - break; case __LINE__: Trice("signal:118+i\n" ); //exp: time: be16default: signal:118+i - break; case __LINE__: Trice("test:yellow+h:black\n" ); //exp: time: be16default: test:yellow+h:black - break; case __LINE__: Trice("default:off\n" ); //exp: time: be16default: default:off - break; case __LINE__: Trice("notice:blue:white+h\n" ); //exp: time: be16default: notice:blue:white+h - break; case __LINE__: Trice("alert:magenta:magenta+h\n" ); //exp: time: be16default: alert:magenta:magenta+h - break; case __LINE__: Trice("assert:yellow+i:blue\n" ); //exp: time: be16default: assert:yellow+i:blue - break; case __LINE__: Trice("alarm:red+i:white+h\n" ); //exp: time: be16default: alarm:red+i:white+h - break; case __LINE__: Trice("verbose:blue:default\n" ); //exp: time: be16default: verbose:blue:default - - break; case __LINE__: TRICE(ID(0), "FATAL:magenta+b:red\n" ); //exp: time:feed3322default: FATAL:magenta+b:red - break; case __LINE__: TRICE(ID(0), "CRITICAL:red+i:default+h\n" ); //exp: time:feed3322default: CRITICAL:red+i:default+h - break; case __LINE__: TRICE(ID(0), "EMERGENCY:red+i:blue\n" ); //exp: time:feed3322default: EMERGENCY:red+i:blue - break; case __LINE__: TRICE(ID(0), "ERROR:11:red\n" ); //exp: time:feed3322default: ERROR:11:red - break; case __LINE__: TRICE(ID(0), "WARNING:11+i:red\n" ); //exp: time:feed3322default: WARNING:11+i:red - break; case __LINE__: TRICE(ID(0), "ATTENTION:11:green\n" ); //exp: time:feed3322default: ATTENTION:11:green - break; case __LINE__: TRICE(ID(0), "INFO:cyan+b:default+h\n" ); //exp: time:feed3322default: INFO:cyan+b:default+h - break; case __LINE__: TRICE(ID(0), "DEBUG:130+i\n" ); //exp: time:feed3322default: DEBUG:130+i - break; case __LINE__: TRICE(ID(0), "TRACE:default+i:default+h\n" ); //exp: time:feed3322default: TRACE:default+i:default+h - break; case __LINE__: TRICE(ID(0), "TIME:blue+i:blue+h\n" ); //exp: time:feed3322default: TIME:blue+i:blue+h - break; case __LINE__: TRICE(ID(0), "MESSAGE:green+h:black\n" ); //exp: time:feed3322default: MESSAGE:green+h:black - break; case __LINE__: TRICE(ID(0), "READ:black+i:yellow+h\n" ); //exp: time:feed3322default: READ:black+i:yellow+h - break; case __LINE__: TRICE(ID(0), "WRITE:black+u:yellow+h\n" ); //exp: time:feed3322default: WRITE:black+u:yellow+h - break; case __LINE__: TRICE(ID(0), "RECEIVE:black+h:black\n" ); //exp: time:feed3322default: RECEIVE:black+h:black - break; case __LINE__: TRICE(ID(0), "TRANSMIT:black:black+h\n" ); //exp: time:feed3322default: TRANSMIT:black:black+h - break; case __LINE__: TRICE(ID(0), "DIAG:yellow+i:default+h\n" ); //exp: time:feed3322default: DIAG:yellow+i:default+h - break; case __LINE__: TRICE(ID(0), "INTERRUPT:magenta+i:default+h\n" ); //exp: time:feed3322default: INTERRUPT:magenta+i:default+h - break; case __LINE__: TRICE(ID(0), "SIGNAL:118+i\n" ); //exp: time:feed3322default: SIGNAL:118+i - break; case __LINE__: TRICE(ID(0), "TEST:yellow+h:black\n" ); //exp: time:feed3322default: TEST:yellow+h:black - break; case __LINE__: TRICE(ID(0), "DEFAULT:off\n" ); //exp: time:feed3322default: DEFAULT:off - break; case __LINE__: TRICE(ID(0), "NOTICE:blue:white+h\n" ); //exp: time:feed3322default: NOTICE:blue:white+h - break; case __LINE__: TRICE(ID(0), "ALERT:magenta:magenta+h\n" ); //exp: time:feed3322default: ALERT:magenta:magenta+h - break; case __LINE__: TRICE(ID(0), "ASSERT:yellow+i:blue\n" ); //exp: time:feed3322default: ASSERT:yellow+i:blue - break; case __LINE__: TRICE(ID(0), "ALARM:red+i:white+h\n" ); //exp: time:feed3322default: ALARM:red+i:white+h - break; case __LINE__: TRICE(ID(0), "VERBOSE:blue:default\n" ); //exp: time:feed3322default: VERBOSE:blue:default - break; case __LINE__: TRICE(ID(0), "fatal:magenta+b:red\n" ); //exp: time:feed3322default: fatal:magenta+b:red - break; case __LINE__: TRICE(ID(0), "critical:red+i:default+h\n" ); //exp: time:feed3322default: critical:red+i:default+h - break; case __LINE__: TRICE(ID(0), "emergency:red+i:blue\n" ); //exp: time:feed3322default: emergency:red+i:blue - break; case __LINE__: TRICE(ID(0), "error:11:red\n" ); //exp: time:feed3322default: error:11:red - break; case __LINE__: TRICE(ID(0), "warning:11+i:red\n" ); //exp: time:feed3322default: warning:11+i:red - break; case __LINE__: TRICE(ID(0), "attention:11:green\n" ); //exp: time:feed3322default: attention:11:green - break; case __LINE__: TRICE(ID(0), "info:cyan+b:default+h\n" ); //exp: time:feed3322default: info:cyan+b:default+h - break; case __LINE__: TRICE(ID(0), "debug:130+i\n" ); //exp: time:feed3322default: debug:130+i - break; case __LINE__: TRICE(ID(0), "trace:default+i:default+h\n" ); //exp: time:feed3322default: trace:default+i:default+h - break; case __LINE__: TRICE(ID(0), "time:blue+i:blue+h\n" ); //exp: time:feed3322default: time:blue+i:blue+h - break; case __LINE__: TRICE(ID(0), "message:green+h:black\n" ); //exp: time:feed3322default: message:green+h:black - break; case __LINE__: TRICE(ID(0), "read:black+i:yellow+h\n" ); //exp: time:feed3322default: read:black+i:yellow+h - break; case __LINE__: TRICE(ID(0), "write:black+u:yellow+h\n" ); //exp: time:feed3322default: write:black+u:yellow+h - break; case __LINE__: TRICE(ID(0), "receive:black+h:black\n" ); //exp: time:feed3322default: receive:black+h:black - break; case __LINE__: TRICE(ID(0), "transmit:black:black+h\n" ); //exp: time:feed3322default: transmit:black:black+h - break; case __LINE__: TRICE(ID(0), "diag:yellow+i:default+h\n" ); //exp: time:feed3322default: diag:yellow+i:default+h - break; case __LINE__: TRICE(ID(0), "interrupt:magenta+i:default+h\n" ); //exp: time:feed3322default: interrupt:magenta+i:default+h - break; case __LINE__: TRICE(ID(0), "signal:118+i\n" ); //exp: time:feed3322default: signal:118+i - break; case __LINE__: TRICE(ID(0), "test:yellow+h:black\n" ); //exp: time:feed3322default: test:yellow+h:black - break; case __LINE__: TRICE(ID(0), "default:off\n" ); //exp: time:feed3322default: default:off - break; case __LINE__: TRICE(ID(0), "notice:blue:white+h\n" ); //exp: time:feed3322default: notice:blue:white+h - break; case __LINE__: TRICE(ID(0), "alert:magenta:magenta+h\n" ); //exp: time:feed3322default: alert:magenta:magenta+h - break; case __LINE__: TRICE(ID(0), "assert:yellow+i:blue\n" ); //exp: time:feed3322default: assert:yellow+i:blue - break; case __LINE__: TRICE(ID(0), "alarm:red+i:white+h\n" ); //exp: time:feed3322default: alarm:red+i:white+h - break; case __LINE__: TRICE(ID(0), "verbose:blue:default\n" ); //exp: time:feed3322default: verbose:blue:default + break; case __LINE__: TRICE(Id(13731), "FATAL:magenta+b:red\n" ); //exp: time: be16default: FATAL:magenta+b:red + break; case __LINE__: TRICE(Id(13732), "CRITICAL:red+i:default+h\n" ); //exp: time: be16default: CRITICAL:red+i:default+h + break; case __LINE__: TRICE(Id(13733), "EMERGENCY:red+i:blue\n" ); //exp: time: be16default: EMERGENCY:red+i:blue + break; case __LINE__: TRICE(Id(13734), "ERROR:11:red\n" ); //exp: time: be16default: ERROR:11:red + break; case __LINE__: TRICE(Id(13735), "WARNING:11+i:red\n" ); //exp: time: be16default: WARNING:11+i:red + break; case __LINE__: TRICE(Id(13736), "ATTENTION:11:green\n" ); //exp: time: be16default: ATTENTION:11:green + break; case __LINE__: TRICE(Id(13737), "INFO:cyan+b:default+h\n" ); //exp: time: be16default: INFO:cyan+b:default+h + break; case __LINE__: TRICE(Id(13738), "DEBUG:130+i\n" ); //exp: time: be16default: DEBUG:130+i + break; case __LINE__: TRICE(Id(13739), "TRACE:default+i:default+h\n" ); //exp: time: be16default: TRACE:default+i:default+h + break; case __LINE__: TRICE(Id(13740), "TIME:blue+i:blue+h\n" ); //exp: time: be16default: TIME:blue+i:blue+h + break; case __LINE__: TRICE(Id(13741), "MESSAGE:green+h:black\n" ); //exp: time: be16default: MESSAGE:green+h:black + break; case __LINE__: TRICE(Id(13742), "READ:black+i:yellow+h\n" ); //exp: time: be16default: READ:black+i:yellow+h + break; case __LINE__: TRICE(Id(13743), "WRITE:black+u:yellow+h\n" ); //exp: time: be16default: WRITE:black+u:yellow+h + break; case __LINE__: TRICE(Id(13744), "RECEIVE:black+h:black\n" ); //exp: time: be16default: RECEIVE:black+h:black + break; case __LINE__: TRICE(Id(13745), "TRANSMIT:black:black+h\n" ); //exp: time: be16default: TRANSMIT:black:black+h + break; case __LINE__: TRICE(Id(13746), "DIAG:yellow+i:default+h\n" ); //exp: time: be16default: DIAG:yellow+i:default+h + break; case __LINE__: TRICE(Id(13747), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: be16default: INTERRUPT:magenta+i:default+h + break; case __LINE__: TRICE(Id(13748), "SIGNAL:118+i\n" ); //exp: time: be16default: SIGNAL:118+i + break; case __LINE__: TRICE(Id(13749), "TEST:yellow+h:black\n" ); //exp: time: be16default: TEST:yellow+h:black + break; case __LINE__: TRICE(Id(13750), "DEFAULT:off\n" ); //exp: time: be16default: DEFAULT:off + break; case __LINE__: TRICE(Id(13751), "NOTICE:blue:white+h\n" ); //exp: time: be16default: NOTICE:blue:white+h + break; case __LINE__: TRICE(Id(13752), "ALERT:magenta:magenta+h\n" ); //exp: time: be16default: ALERT:magenta:magenta+h + break; case __LINE__: TRICE(Id(13753), "ASSERT:yellow+i:blue\n" ); //exp: time: be16default: ASSERT:yellow+i:blue + break; case __LINE__: TRICE(Id(13754), "ALARM:red+i:white+h\n" ); //exp: time: be16default: ALARM:red+i:white+h + break; case __LINE__: TRICE(Id(13755), "VERBOSE:blue:default\n" ); //exp: time: be16default: VERBOSE:blue:default + break; case __LINE__: TRICE(Id(13756), "fatal:magenta+b:red\n" ); //exp: time: be16default: fatal:magenta+b:red + break; case __LINE__: TRICE(Id(13757), "critical:red+i:default+h\n" ); //exp: time: be16default: critical:red+i:default+h + break; case __LINE__: TRICE(Id(13758), "emergency:red+i:blue\n" ); //exp: time: be16default: emergency:red+i:blue + break; case __LINE__: TRICE(Id(13759), "error:11:red\n" ); //exp: time: be16default: error:11:red + break; case __LINE__: TRICE(Id(13760), "warning:11+i:red\n" ); //exp: time: be16default: warning:11+i:red + break; case __LINE__: TRICE(Id(13761), "attention:11:green\n" ); //exp: time: be16default: attention:11:green + break; case __LINE__: TRICE(Id(13762), "info:cyan+b:default+h\n" ); //exp: time: be16default: info:cyan+b:default+h + break; case __LINE__: TRICE(Id(13763), "debug:130+i\n" ); //exp: time: be16default: debug:130+i + break; case __LINE__: TRICE(Id(13764), "trace:default+i:default+h\n" ); //exp: time: be16default: trace:default+i:default+h + break; case __LINE__: TRICE(Id(13765), "time:blue+i:blue+h\n" ); //exp: time: be16default: time:blue+i:blue+h + break; case __LINE__: TRICE(Id(13766), "message:green+h:black\n" ); //exp: time: be16default: message:green+h:black + break; case __LINE__: TRICE(Id(13767), "read:black+i:yellow+h\n" ); //exp: time: be16default: read:black+i:yellow+h + break; case __LINE__: TRICE(Id(13768), "write:black+u:yellow+h\n" ); //exp: time: be16default: write:black+u:yellow+h + break; case __LINE__: TRICE(Id(13769), "receive:black+h:black\n" ); //exp: time: be16default: receive:black+h:black + break; case __LINE__: TRICE(Id(13770), "transmit:black:black+h\n" ); //exp: time: be16default: transmit:black:black+h + break; case __LINE__: TRICE(Id(13771), "diag:yellow+i:default+h\n" ); //exp: time: be16default: diag:yellow+i:default+h + break; case __LINE__: TRICE(Id(13772), "interrupt:magenta+i:default+h\n" ); //exp: time: be16default: interrupt:magenta+i:default+h + break; case __LINE__: TRICE(Id(13773), "signal:118+i\n" ); //exp: time: be16default: signal:118+i + break; case __LINE__: TRICE(Id(13774), "test:yellow+h:black\n" ); //exp: time: be16default: test:yellow+h:black + break; case __LINE__: TRICE(Id(13775), "default:off\n" ); //exp: time: be16default: default:off + break; case __LINE__: TRICE(Id(13776), "notice:blue:white+h\n" ); //exp: time: be16default: notice:blue:white+h + break; case __LINE__: TRICE(Id(13777), "alert:magenta:magenta+h\n" ); //exp: time: be16default: alert:magenta:magenta+h + break; case __LINE__: TRICE(Id(13778), "assert:yellow+i:blue\n" ); //exp: time: be16default: assert:yellow+i:blue + break; case __LINE__: TRICE(Id(13779), "alarm:red+i:white+h\n" ); //exp: time: be16default: alarm:red+i:white+h + break; case __LINE__: TRICE(Id(13780), "verbose:blue:default\n" ); //exp: time: be16default: verbose:blue:default + + break; case __LINE__: Trice(iD(13781), "FATAL:magenta+b:red\n" ); //exp: time: be16default: FATAL:magenta+b:red + break; case __LINE__: Trice(iD(13782), "CRITICAL:red+i:default+h\n" ); //exp: time: be16default: CRITICAL:red+i:default+h + break; case __LINE__: Trice(iD(13783), "EMERGENCY:red+i:blue\n" ); //exp: time: be16default: EMERGENCY:red+i:blue + break; case __LINE__: Trice(iD(13784), "ERROR:11:red\n" ); //exp: time: be16default: ERROR:11:red + break; case __LINE__: Trice(iD(13785), "WARNING:11+i:red\n" ); //exp: time: be16default: WARNING:11+i:red + break; case __LINE__: Trice(iD(13786), "ATTENTION:11:green\n" ); //exp: time: be16default: ATTENTION:11:green + break; case __LINE__: Trice(iD(13787), "INFO:cyan+b:default+h\n" ); //exp: time: be16default: INFO:cyan+b:default+h + break; case __LINE__: Trice(iD(13788), "DEBUG:130+i\n" ); //exp: time: be16default: DEBUG:130+i + break; case __LINE__: Trice(iD(13789), "TRACE:default+i:default+h\n" ); //exp: time: be16default: TRACE:default+i:default+h + break; case __LINE__: Trice(iD(13790), "TIME:blue+i:blue+h\n" ); //exp: time: be16default: TIME:blue+i:blue+h + break; case __LINE__: Trice(iD(13791), "MESSAGE:green+h:black\n" ); //exp: time: be16default: MESSAGE:green+h:black + break; case __LINE__: Trice(iD(13792), "READ:black+i:yellow+h\n" ); //exp: time: be16default: READ:black+i:yellow+h + break; case __LINE__: Trice(iD(13793), "WRITE:black+u:yellow+h\n" ); //exp: time: be16default: WRITE:black+u:yellow+h + break; case __LINE__: Trice(iD(13794), "RECEIVE:black+h:black\n" ); //exp: time: be16default: RECEIVE:black+h:black + break; case __LINE__: Trice(iD(13795), "TRANSMIT:black:black+h\n" ); //exp: time: be16default: TRANSMIT:black:black+h + break; case __LINE__: Trice(iD(13796), "DIAG:yellow+i:default+h\n" ); //exp: time: be16default: DIAG:yellow+i:default+h + break; case __LINE__: Trice(iD(13797), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: be16default: INTERRUPT:magenta+i:default+h + break; case __LINE__: Trice(iD(13798), "SIGNAL:118+i\n" ); //exp: time: be16default: SIGNAL:118+i + break; case __LINE__: Trice(iD(13799), "TEST:yellow+h:black\n" ); //exp: time: be16default: TEST:yellow+h:black + break; case __LINE__: Trice(iD(13800), "DEFAULT:off\n" ); //exp: time: be16default: DEFAULT:off + break; case __LINE__: Trice(iD(13801), "NOTICE:blue:white+h\n" ); //exp: time: be16default: NOTICE:blue:white+h + break; case __LINE__: Trice(iD(13802), "ALERT:magenta:magenta+h\n" ); //exp: time: be16default: ALERT:magenta:magenta+h + break; case __LINE__: Trice(iD(13803), "ASSERT:yellow+i:blue\n" ); //exp: time: be16default: ASSERT:yellow+i:blue + break; case __LINE__: Trice(iD(13804), "ALARM:red+i:white+h\n" ); //exp: time: be16default: ALARM:red+i:white+h + break; case __LINE__: Trice(iD(13805), "VERBOSE:blue:default\n" ); //exp: time: be16default: VERBOSE:blue:default + break; case __LINE__: Trice(iD(13806), "fatal:magenta+b:red\n" ); //exp: time: be16default: fatal:magenta+b:red + break; case __LINE__: Trice(iD(13807), "critical:red+i:default+h\n" ); //exp: time: be16default: critical:red+i:default+h + break; case __LINE__: Trice(iD(13808), "emergency:red+i:blue\n" ); //exp: time: be16default: emergency:red+i:blue + break; case __LINE__: Trice(iD(13809), "error:11:red\n" ); //exp: time: be16default: error:11:red + break; case __LINE__: Trice(iD(13810), "warning:11+i:red\n" ); //exp: time: be16default: warning:11+i:red + break; case __LINE__: Trice(iD(13811), "attention:11:green\n" ); //exp: time: be16default: attention:11:green + break; case __LINE__: Trice(iD(13812), "info:cyan+b:default+h\n" ); //exp: time: be16default: info:cyan+b:default+h + break; case __LINE__: Trice(iD(13813), "debug:130+i\n" ); //exp: time: be16default: debug:130+i + break; case __LINE__: Trice(iD(13814), "trace:default+i:default+h\n" ); //exp: time: be16default: trace:default+i:default+h + break; case __LINE__: Trice(iD(13815), "time:blue+i:blue+h\n" ); //exp: time: be16default: time:blue+i:blue+h + break; case __LINE__: Trice(iD(13816), "message:green+h:black\n" ); //exp: time: be16default: message:green+h:black + break; case __LINE__: Trice(iD(13817), "read:black+i:yellow+h\n" ); //exp: time: be16default: read:black+i:yellow+h + break; case __LINE__: Trice(iD(13818), "write:black+u:yellow+h\n" ); //exp: time: be16default: write:black+u:yellow+h + break; case __LINE__: Trice(iD(13819), "receive:black+h:black\n" ); //exp: time: be16default: receive:black+h:black + break; case __LINE__: Trice(iD(13820), "transmit:black:black+h\n" ); //exp: time: be16default: transmit:black:black+h + break; case __LINE__: Trice(iD(13821), "diag:yellow+i:default+h\n" ); //exp: time: be16default: diag:yellow+i:default+h + break; case __LINE__: Trice(iD(13822), "interrupt:magenta+i:default+h\n" ); //exp: time: be16default: interrupt:magenta+i:default+h + break; case __LINE__: Trice(iD(13823), "signal:118+i\n" ); //exp: time: be16default: signal:118+i + break; case __LINE__: Trice(iD(13824), "test:yellow+h:black\n" ); //exp: time: be16default: test:yellow+h:black + break; case __LINE__: Trice(iD(13825), "default:off\n" ); //exp: time: be16default: default:off + break; case __LINE__: Trice(iD(13826), "notice:blue:white+h\n" ); //exp: time: be16default: notice:blue:white+h + break; case __LINE__: Trice(iD(13827), "alert:magenta:magenta+h\n" ); //exp: time: be16default: alert:magenta:magenta+h + break; case __LINE__: Trice(iD(13828), "assert:yellow+i:blue\n" ); //exp: time: be16default: assert:yellow+i:blue + break; case __LINE__: Trice(iD(13829), "alarm:red+i:white+h\n" ); //exp: time: be16default: alarm:red+i:white+h + break; case __LINE__: Trice(iD(13830), "verbose:blue:default\n" ); //exp: time: be16default: verbose:blue:default + + break; case __LINE__: TRICE(ID(13831), "FATAL:magenta+b:red\n" ); //exp: time:feed3322default: FATAL:magenta+b:red + break; case __LINE__: TRICE(ID(13832), "CRITICAL:red+i:default+h\n" ); //exp: time:feed3322default: CRITICAL:red+i:default+h + break; case __LINE__: TRICE(ID(13833), "EMERGENCY:red+i:blue\n" ); //exp: time:feed3322default: EMERGENCY:red+i:blue + break; case __LINE__: TRICE(ID(13834), "ERROR:11:red\n" ); //exp: time:feed3322default: ERROR:11:red + break; case __LINE__: TRICE(ID(13835), "WARNING:11+i:red\n" ); //exp: time:feed3322default: WARNING:11+i:red + break; case __LINE__: TRICE(ID(13836), "ATTENTION:11:green\n" ); //exp: time:feed3322default: ATTENTION:11:green + break; case __LINE__: TRICE(ID(13837), "INFO:cyan+b:default+h\n" ); //exp: time:feed3322default: INFO:cyan+b:default+h + break; case __LINE__: TRICE(ID(13838), "DEBUG:130+i\n" ); //exp: time:feed3322default: DEBUG:130+i + break; case __LINE__: TRICE(ID(13839), "TRACE:default+i:default+h\n" ); //exp: time:feed3322default: TRACE:default+i:default+h + break; case __LINE__: TRICE(ID(13840), "TIME:blue+i:blue+h\n" ); //exp: time:feed3322default: TIME:blue+i:blue+h + break; case __LINE__: TRICE(ID(13841), "MESSAGE:green+h:black\n" ); //exp: time:feed3322default: MESSAGE:green+h:black + break; case __LINE__: TRICE(ID(13842), "READ:black+i:yellow+h\n" ); //exp: time:feed3322default: READ:black+i:yellow+h + break; case __LINE__: TRICE(ID(13843), "WRITE:black+u:yellow+h\n" ); //exp: time:feed3322default: WRITE:black+u:yellow+h + break; case __LINE__: TRICE(ID(13844), "RECEIVE:black+h:black\n" ); //exp: time:feed3322default: RECEIVE:black+h:black + break; case __LINE__: TRICE(ID(13845), "TRANSMIT:black:black+h\n" ); //exp: time:feed3322default: TRANSMIT:black:black+h + break; case __LINE__: TRICE(ID(13846), "DIAG:yellow+i:default+h\n" ); //exp: time:feed3322default: DIAG:yellow+i:default+h + break; case __LINE__: TRICE(ID(13847), "INTERRUPT:magenta+i:default+h\n" ); //exp: time:feed3322default: INTERRUPT:magenta+i:default+h + break; case __LINE__: TRICE(ID(13848), "SIGNAL:118+i\n" ); //exp: time:feed3322default: SIGNAL:118+i + break; case __LINE__: TRICE(ID(13849), "TEST:yellow+h:black\n" ); //exp: time:feed3322default: TEST:yellow+h:black + break; case __LINE__: TRICE(ID(13850), "DEFAULT:off\n" ); //exp: time:feed3322default: DEFAULT:off + break; case __LINE__: TRICE(ID(13851), "NOTICE:blue:white+h\n" ); //exp: time:feed3322default: NOTICE:blue:white+h + break; case __LINE__: TRICE(ID(13852), "ALERT:magenta:magenta+h\n" ); //exp: time:feed3322default: ALERT:magenta:magenta+h + break; case __LINE__: TRICE(ID(13853), "ASSERT:yellow+i:blue\n" ); //exp: time:feed3322default: ASSERT:yellow+i:blue + break; case __LINE__: TRICE(ID(13854), "ALARM:red+i:white+h\n" ); //exp: time:feed3322default: ALARM:red+i:white+h + break; case __LINE__: TRICE(ID(13855), "VERBOSE:blue:default\n" ); //exp: time:feed3322default: VERBOSE:blue:default + break; case __LINE__: TRICE(ID(13856), "fatal:magenta+b:red\n" ); //exp: time:feed3322default: fatal:magenta+b:red + break; case __LINE__: TRICE(ID(13857), "critical:red+i:default+h\n" ); //exp: time:feed3322default: critical:red+i:default+h + break; case __LINE__: TRICE(ID(13858), "emergency:red+i:blue\n" ); //exp: time:feed3322default: emergency:red+i:blue + break; case __LINE__: TRICE(ID(13859), "error:11:red\n" ); //exp: time:feed3322default: error:11:red + break; case __LINE__: TRICE(ID(13860), "warning:11+i:red\n" ); //exp: time:feed3322default: warning:11+i:red + break; case __LINE__: TRICE(ID(13861), "attention:11:green\n" ); //exp: time:feed3322default: attention:11:green + break; case __LINE__: TRICE(ID(13862), "info:cyan+b:default+h\n" ); //exp: time:feed3322default: info:cyan+b:default+h + break; case __LINE__: TRICE(ID(13863), "debug:130+i\n" ); //exp: time:feed3322default: debug:130+i + break; case __LINE__: TRICE(ID(13864), "trace:default+i:default+h\n" ); //exp: time:feed3322default: trace:default+i:default+h + break; case __LINE__: TRICE(ID(13865), "time:blue+i:blue+h\n" ); //exp: time:feed3322default: time:blue+i:blue+h + break; case __LINE__: TRICE(ID(13866), "message:green+h:black\n" ); //exp: time:feed3322default: message:green+h:black + break; case __LINE__: TRICE(ID(13867), "read:black+i:yellow+h\n" ); //exp: time:feed3322default: read:black+i:yellow+h + break; case __LINE__: TRICE(ID(13868), "write:black+u:yellow+h\n" ); //exp: time:feed3322default: write:black+u:yellow+h + break; case __LINE__: TRICE(ID(13869), "receive:black+h:black\n" ); //exp: time:feed3322default: receive:black+h:black + break; case __LINE__: TRICE(ID(13870), "transmit:black:black+h\n" ); //exp: time:feed3322default: transmit:black:black+h + break; case __LINE__: TRICE(ID(13871), "diag:yellow+i:default+h\n" ); //exp: time:feed3322default: diag:yellow+i:default+h + break; case __LINE__: TRICE(ID(13872), "interrupt:magenta+i:default+h\n" ); //exp: time:feed3322default: interrupt:magenta+i:default+h + break; case __LINE__: TRICE(ID(13873), "signal:118+i\n" ); //exp: time:feed3322default: signal:118+i + break; case __LINE__: TRICE(ID(13874), "test:yellow+h:black\n" ); //exp: time:feed3322default: test:yellow+h:black + break; case __LINE__: TRICE(ID(13875), "default:off\n" ); //exp: time:feed3322default: default:off + break; case __LINE__: TRICE(ID(13876), "notice:blue:white+h\n" ); //exp: time:feed3322default: notice:blue:white+h + break; case __LINE__: TRICE(ID(13877), "alert:magenta:magenta+h\n" ); //exp: time:feed3322default: alert:magenta:magenta+h + break; case __LINE__: TRICE(ID(13878), "assert:yellow+i:blue\n" ); //exp: time:feed3322default: assert:yellow+i:blue + break; case __LINE__: TRICE(ID(13879), "alarm:red+i:white+h\n" ); //exp: time:feed3322default: alarm:red+i:white+h + break; case __LINE__: TRICE(ID(13880), "verbose:blue:default\n" ); //exp: time:feed3322default: verbose:blue:default - break; case __LINE__: TRice("FATAL:magenta+b:red\n" ); //exp: time:feed3322default: FATAL:magenta+b:red - break; case __LINE__: TRice("CRITICAL:red+i:default+h\n" ); //exp: time:feed3322default: CRITICAL:red+i:default+h - break; case __LINE__: TRice("EMERGENCY:red+i:blue\n" ); //exp: time:feed3322default: EMERGENCY:red+i:blue - break; case __LINE__: TRice("ERROR:11:red\n" ); //exp: time:feed3322default: ERROR:11:red - break; case __LINE__: TRice("WARNING:11+i:red\n" ); //exp: time:feed3322default: WARNING:11+i:red - break; case __LINE__: TRice("ATTENTION:11:green\n" ); //exp: time:feed3322default: ATTENTION:11:green - break; case __LINE__: TRice("INFO:cyan+b:default+h\n" ); //exp: time:feed3322default: INFO:cyan+b:default+h - break; case __LINE__: TRice("DEBUG:130+i\n" ); //exp: time:feed3322default: DEBUG:130+i - break; case __LINE__: TRice("TRACE:default+i:default+h\n" ); //exp: time:feed3322default: TRACE:default+i:default+h - break; case __LINE__: TRice("TIME:blue+i:blue+h\n" ); //exp: time:feed3322default: TIME:blue+i:blue+h - break; case __LINE__: TRice("MESSAGE:green+h:black\n" ); //exp: time:feed3322default: MESSAGE:green+h:black - break; case __LINE__: TRice("READ:black+i:yellow+h\n" ); //exp: time:feed3322default: READ:black+i:yellow+h - break; case __LINE__: TRice("WRITE:black+u:yellow+h\n" ); //exp: time:feed3322default: WRITE:black+u:yellow+h - break; case __LINE__: TRice("RECEIVE:black+h:black\n" ); //exp: time:feed3322default: RECEIVE:black+h:black - break; case __LINE__: TRice("TRANSMIT:black:black+h\n" ); //exp: time:feed3322default: TRANSMIT:black:black+h - break; case __LINE__: TRice("DIAG:yellow+i:default+h\n" ); //exp: time:feed3322default: DIAG:yellow+i:default+h - break; case __LINE__: TRice("INTERRUPT:magenta+i:default+h\n" ); //exp: time:feed3322default: INTERRUPT:magenta+i:default+h - break; case __LINE__: TRice("SIGNAL:118+i\n" ); //exp: time:feed3322default: SIGNAL:118+i - break; case __LINE__: TRice("TEST:yellow+h:black\n" ); //exp: time:feed3322default: TEST:yellow+h:black - break; case __LINE__: TRice("DEFAULT:off\n" ); //exp: time:feed3322default: DEFAULT:off - break; case __LINE__: TRice("NOTICE:blue:white+h\n" ); //exp: time:feed3322default: NOTICE:blue:white+h - break; case __LINE__: TRice("ALERT:magenta:magenta+h\n" ); //exp: time:feed3322default: ALERT:magenta:magenta+h - break; case __LINE__: TRice("ASSERT:yellow+i:blue\n" ); //exp: time:feed3322default: ASSERT:yellow+i:blue - break; case __LINE__: TRice("ALARM:red+i:white+h\n" ); //exp: time:feed3322default: ALARM:red+i:white+h - break; case __LINE__: TRice("VERBOSE:blue:default\n" ); //exp: time:feed3322default: VERBOSE:blue:default - break; case __LINE__: TRice("fatal:magenta+b:red\n" ); //exp: time:feed3322default: fatal:magenta+b:red - break; case __LINE__: TRice("critical:red+i:default+h\n" ); //exp: time:feed3322default: critical:red+i:default+h - break; case __LINE__: TRice("emergency:red+i:blue\n" ); //exp: time:feed3322default: emergency:red+i:blue - break; case __LINE__: TRice("error:11:red\n" ); //exp: time:feed3322default: error:11:red - break; case __LINE__: TRice("warning:11+i:red\n" ); //exp: time:feed3322default: warning:11+i:red - break; case __LINE__: TRice("attention:11:green\n" ); //exp: time:feed3322default: attention:11:green - break; case __LINE__: TRice("info:cyan+b:default+h\n" ); //exp: time:feed3322default: info:cyan+b:default+h - break; case __LINE__: TRice("debug:130+i\n" ); //exp: time:feed3322default: debug:130+i - break; case __LINE__: TRice("trace:default+i:default+h\n" ); //exp: time:feed3322default: trace:default+i:default+h - break; case __LINE__: TRice("time:blue+i:blue+h\n" ); //exp: time:feed3322default: time:blue+i:blue+h - break; case __LINE__: TRice("message:green+h:black\n" ); //exp: time:feed3322default: message:green+h:black - break; case __LINE__: TRice("read:black+i:yellow+h\n" ); //exp: time:feed3322default: read:black+i:yellow+h - break; case __LINE__: TRice("write:black+u:yellow+h\n" ); //exp: time:feed3322default: write:black+u:yellow+h - break; case __LINE__: TRice("receive:black+h:black\n" ); //exp: time:feed3322default: receive:black+h:black - break; case __LINE__: TRice("transmit:black:black+h\n" ); //exp: time:feed3322default: transmit:black:black+h - break; case __LINE__: TRice("diag:yellow+i:default+h\n" ); //exp: time:feed3322default: diag:yellow+i:default+h - break; case __LINE__: TRice("interrupt:magenta+i:default+h\n" ); //exp: time:feed3322default: interrupt:magenta+i:default+h - break; case __LINE__: TRice("signal:118+i\n" ); //exp: time:feed3322default: signal:118+i - break; case __LINE__: TRice("test:yellow+h:black\n" ); //exp: time:feed3322default: test:yellow+h:black - break; case __LINE__: TRice("default:off\n" ); //exp: time:feed3322default: default:off - break; case __LINE__: TRice("notice:blue:white+h\n" ); //exp: time:feed3322default: notice:blue:white+h - break; case __LINE__: TRice("alert:magenta:magenta+h\n" ); //exp: time:feed3322default: alert:magenta:magenta+h - break; case __LINE__: TRice("assert:yellow+i:blue\n" ); //exp: time:feed3322default: assert:yellow+i:blue - break; case __LINE__: TRice("alarm:red+i:white+h\n" ); //exp: time:feed3322default: alarm:red+i:white+h - break; case __LINE__: TRice("verbose:blue:default\n" ); //exp: time:feed3322default: verbose:blue:default + break; case __LINE__: TRice(iD(13881), "FATAL:magenta+b:red\n" ); //exp: time:feed3322default: FATAL:magenta+b:red + break; case __LINE__: TRice(iD(13882), "CRITICAL:red+i:default+h\n" ); //exp: time:feed3322default: CRITICAL:red+i:default+h + break; case __LINE__: TRice(iD(13883), "EMERGENCY:red+i:blue\n" ); //exp: time:feed3322default: EMERGENCY:red+i:blue + break; case __LINE__: TRice(iD(13884), "ERROR:11:red\n" ); //exp: time:feed3322default: ERROR:11:red + break; case __LINE__: TRice(iD(13885), "WARNING:11+i:red\n" ); //exp: time:feed3322default: WARNING:11+i:red + break; case __LINE__: TRice(iD(13886), "ATTENTION:11:green\n" ); //exp: time:feed3322default: ATTENTION:11:green + break; case __LINE__: TRice(iD(13887), "INFO:cyan+b:default+h\n" ); //exp: time:feed3322default: INFO:cyan+b:default+h + break; case __LINE__: TRice(iD(13888), "DEBUG:130+i\n" ); //exp: time:feed3322default: DEBUG:130+i + break; case __LINE__: TRice(iD(13889), "TRACE:default+i:default+h\n" ); //exp: time:feed3322default: TRACE:default+i:default+h + break; case __LINE__: TRice(iD(13890), "TIME:blue+i:blue+h\n" ); //exp: time:feed3322default: TIME:blue+i:blue+h + break; case __LINE__: TRice(iD(13891), "MESSAGE:green+h:black\n" ); //exp: time:feed3322default: MESSAGE:green+h:black + break; case __LINE__: TRice(iD(13892), "READ:black+i:yellow+h\n" ); //exp: time:feed3322default: READ:black+i:yellow+h + break; case __LINE__: TRice(iD(13893), "WRITE:black+u:yellow+h\n" ); //exp: time:feed3322default: WRITE:black+u:yellow+h + break; case __LINE__: TRice(iD(13894), "RECEIVE:black+h:black\n" ); //exp: time:feed3322default: RECEIVE:black+h:black + break; case __LINE__: TRice(iD(13895), "TRANSMIT:black:black+h\n" ); //exp: time:feed3322default: TRANSMIT:black:black+h + break; case __LINE__: TRice(iD(13896), "DIAG:yellow+i:default+h\n" ); //exp: time:feed3322default: DIAG:yellow+i:default+h + break; case __LINE__: TRice(iD(13897), "INTERRUPT:magenta+i:default+h\n" ); //exp: time:feed3322default: INTERRUPT:magenta+i:default+h + break; case __LINE__: TRice(iD(13898), "SIGNAL:118+i\n" ); //exp: time:feed3322default: SIGNAL:118+i + break; case __LINE__: TRice(iD(13899), "TEST:yellow+h:black\n" ); //exp: time:feed3322default: TEST:yellow+h:black + break; case __LINE__: TRice(iD(13900), "DEFAULT:off\n" ); //exp: time:feed3322default: DEFAULT:off + break; case __LINE__: TRice(iD(13901), "NOTICE:blue:white+h\n" ); //exp: time:feed3322default: NOTICE:blue:white+h + break; case __LINE__: TRice(iD(13902), "ALERT:magenta:magenta+h\n" ); //exp: time:feed3322default: ALERT:magenta:magenta+h + break; case __LINE__: TRice(iD(13903), "ASSERT:yellow+i:blue\n" ); //exp: time:feed3322default: ASSERT:yellow+i:blue + break; case __LINE__: TRice(iD(13904), "ALARM:red+i:white+h\n" ); //exp: time:feed3322default: ALARM:red+i:white+h + break; case __LINE__: TRice(iD(13905), "VERBOSE:blue:default\n" ); //exp: time:feed3322default: VERBOSE:blue:default + break; case __LINE__: TRice(iD(13906), "fatal:magenta+b:red\n" ); //exp: time:feed3322default: fatal:magenta+b:red + break; case __LINE__: TRice(iD(13907), "critical:red+i:default+h\n" ); //exp: time:feed3322default: critical:red+i:default+h + break; case __LINE__: TRice(iD(13908), "emergency:red+i:blue\n" ); //exp: time:feed3322default: emergency:red+i:blue + break; case __LINE__: TRice(iD(13909), "error:11:red\n" ); //exp: time:feed3322default: error:11:red + break; case __LINE__: TRice(iD(13910), "warning:11+i:red\n" ); //exp: time:feed3322default: warning:11+i:red + break; case __LINE__: TRice(iD(13911), "attention:11:green\n" ); //exp: time:feed3322default: attention:11:green + break; case __LINE__: TRice(iD(13912), "info:cyan+b:default+h\n" ); //exp: time:feed3322default: info:cyan+b:default+h + break; case __LINE__: TRice(iD(13913), "debug:130+i\n" ); //exp: time:feed3322default: debug:130+i + break; case __LINE__: TRice(iD(13914), "trace:default+i:default+h\n" ); //exp: time:feed3322default: trace:default+i:default+h + break; case __LINE__: TRice(iD(13915), "time:blue+i:blue+h\n" ); //exp: time:feed3322default: time:blue+i:blue+h + break; case __LINE__: TRice(iD(13916), "message:green+h:black\n" ); //exp: time:feed3322default: message:green+h:black + break; case __LINE__: TRice(iD(13917), "read:black+i:yellow+h\n" ); //exp: time:feed3322default: read:black+i:yellow+h + break; case __LINE__: TRice(iD(13918), "write:black+u:yellow+h\n" ); //exp: time:feed3322default: write:black+u:yellow+h + break; case __LINE__: TRice(iD(13919), "receive:black+h:black\n" ); //exp: time:feed3322default: receive:black+h:black + break; case __LINE__: TRice(iD(13920), "transmit:black:black+h\n" ); //exp: time:feed3322default: transmit:black:black+h + break; case __LINE__: TRice(iD(13921), "diag:yellow+i:default+h\n" ); //exp: time:feed3322default: diag:yellow+i:default+h + break; case __LINE__: TRice(iD(13922), "interrupt:magenta+i:default+h\n" ); //exp: time:feed3322default: interrupt:magenta+i:default+h + break; case __LINE__: TRice(iD(13923), "signal:118+i\n" ); //exp: time:feed3322default: signal:118+i + break; case __LINE__: TRice(iD(13924), "test:yellow+h:black\n" ); //exp: time:feed3322default: test:yellow+h:black + break; case __LINE__: TRice(iD(13925), "default:off\n" ); //exp: time:feed3322default: default:off + break; case __LINE__: TRice(iD(13926), "notice:blue:white+h\n" ); //exp: time:feed3322default: notice:blue:white+h + break; case __LINE__: TRice(iD(13927), "alert:magenta:magenta+h\n" ); //exp: time:feed3322default: alert:magenta:magenta+h + break; case __LINE__: TRice(iD(13928), "assert:yellow+i:blue\n" ); //exp: time:feed3322default: assert:yellow+i:blue + break; case __LINE__: TRice(iD(13929), "alarm:red+i:white+h\n" ); //exp: time:feed3322default: alarm:red+i:white+h + break; case __LINE__: TRice(iD(13930), "verbose:blue:default\n" ); //exp: time:feed3322default: verbose:blue:default #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE64(id(0), "msg:%d (%%d)\n", -1 ); //exp: time: default: msg:-1 (%d) - - break; case __LINE__: trice("sig:TRICE8 with 1 to 12 values\n" ); - break; case __LINE__: trice("rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 - break; case __LINE__: trice("rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 - break; case __LINE__: trice("rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: trice("rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 - break; case __LINE__: trice("rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 - break; case __LINE__: trice("rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: trice("rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 - break; case __LINE__: trice("rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 - break; case __LINE__: trice("rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64(id(13931), "msg:%d (%%d)\n", -1 ); //exp: time: default: msg:-1 (%d) + + break; case __LINE__: trice(iD(13932), "sig:TRICE8 with 1 to 12 values\n" ); + break; case __LINE__: trice(iD(13933), "rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 + break; case __LINE__: trice(iD(13934), "rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 + break; case __LINE__: trice(iD(13935), "rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 + break; case __LINE__: trice(iD(13936), "rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 + break; case __LINE__: trice(iD(13937), "rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 + break; case __LINE__: trice(iD(13938), "rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice(iD(13939), "rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice(iD(13940), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice(iD(13941), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice(iD(13942), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice(iD(13943), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice(iD(13944), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice(iD(13945), "rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 + break; case __LINE__: trice(iD(13946), "rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 + break; case __LINE__: trice(iD(13947), "rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 + break; case __LINE__: trice(iD(13948), "rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 + break; case __LINE__: trice(iD(13949), "rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 + break; case __LINE__: trice(iD(13950), "rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice(iD(13951), "rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice(iD(13952), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice(iD(13953), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice(iD(13954), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice(iD(13955), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice(iD(13956), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice(iD(13957), "rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 + break; case __LINE__: trice(iD(13958), "rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 + break; case __LINE__: trice(iD(13959), "rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 + break; case __LINE__: trice(iD(13960), "rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 + break; case __LINE__: trice(iD(13961), "rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 + break; case __LINE__: trice(iD(13962), "rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice(iD(13963), "rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice(iD(13964), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice(iD(13965), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice(iD(13966), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice(iD(13967), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice(iD(13968), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("sig:TRICE_n with 1 to 12 values\n" ); - break; case __LINE__: TRICE_1 (id(0), "rd:TRICE_1 %d\n", -1 ); //exp: time: default: rd:TRICE_1 -1 - break; case __LINE__: TRICE_2 (id(0), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE_2 -1, -2 - break; case __LINE__: TRICE_3 (id(0), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE_3 -1, -2, -3 - break; case __LINE__: TRICE_4 (id(0), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE_4 -1, -2, -3, -4 - break; case __LINE__: TRICE_5 (id(0), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE_6 (id(0), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE_7 (id(0), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE_8 (id(0), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE_9 (id(0), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE_10(id(0), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE_11(id(0), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE_12(id(0), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE_1 (Id(0), "rd:TRICE_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE_1 -1 - break; case __LINE__: TRICE_2 (Id(0), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE_2 -1, -2 - break; case __LINE__: TRICE_3 (Id(0), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE_3 -1, -2, -3 - break; case __LINE__: TRICE_4 (Id(0), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE_4 -1, -2, -3, -4 - break; case __LINE__: TRICE_5 (Id(0), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE_6 (Id(0), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE_7 (Id(0), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE_8 (Id(0), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE_9 (Id(0), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE_10(Id(0), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE_11(Id(0), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE_12(Id(0), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE_1 (ID(0), "rd:TRICE_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE_1 -1 - break; case __LINE__: TRICE_2 (ID(0), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE_2 -1, -2 - break; case __LINE__: TRICE_3 (ID(0), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE_3 -1, -2, -3 - break; case __LINE__: TRICE_4 (ID(0), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE_4 -1, -2, -3, -4 - break; case __LINE__: TRICE_5 (ID(0), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE_6 (ID(0), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE_7 (ID(0), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE_8 (ID(0), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE_9 (ID(0), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE_10(ID(0), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE_11(ID(0), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE_12(ID(0), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice(iD(13969), "sig:TRICE_n with 1 to 12 values\n" ); + break; case __LINE__: TRICE_1 (id(13970), "rd:TRICE_1 %d\n", -1 ); //exp: time: default: rd:TRICE_1 -1 + break; case __LINE__: TRICE_2 (id(13971), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE_2 -1, -2 + break; case __LINE__: TRICE_3 (id(13972), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE_3 -1, -2, -3 + break; case __LINE__: TRICE_4 (id(13973), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE_4 -1, -2, -3, -4 + break; case __LINE__: TRICE_5 (id(13974), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE_6 (id(13975), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE_7 (id(13976), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE_8 (id(13977), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE_9 (id(13978), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE_10(id(13979), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE_11(id(13980), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE_12(id(13981), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE_1 (Id(13982), "rd:TRICE_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE_1 -1 + break; case __LINE__: TRICE_2 (Id(13983), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE_2 -1, -2 + break; case __LINE__: TRICE_3 (Id(13984), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE_3 -1, -2, -3 + break; case __LINE__: TRICE_4 (Id(13985), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE_4 -1, -2, -3, -4 + break; case __LINE__: TRICE_5 (Id(13986), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE_6 (Id(13987), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE_7 (Id(13988), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE_8 (Id(13989), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE_9 (Id(13990), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE_10(Id(13991), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE_11(Id(13992), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE_12(Id(13993), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE_1 (ID(13994), "rd:TRICE_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE_1 -1 + break; case __LINE__: TRICE_2 (ID(13995), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE_2 -1, -2 + break; case __LINE__: TRICE_3 (ID(13996), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE_3 -1, -2, -3 + break; case __LINE__: TRICE_4 (ID(13997), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE_4 -1, -2, -3, -4 + break; case __LINE__: TRICE_5 (ID(13998), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE_6 (ID(13999), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE_7 (ID(14000), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE_8 (ID(14001), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE_9 (ID(14002), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE_10(ID(14003), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE_11(ID(14004), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE_12(ID(14005), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE(ID(0), "sig:trice_n with 1 to 12 values\n" ); - break; case __LINE__: trice_1 ("rd:trice_1 %d\n", -1 ); //exp: time: default: rd:trice_1 -1 - break; case __LINE__: trice_2 ("rd:trice_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice_2 -1, -2 - break; case __LINE__: trice_3 ("rd:trice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice_3 -1, -2, -3 - break; case __LINE__: trice_4 ("rd:trice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice_4 -1, -2, -3, -4 - break; case __LINE__: trice_5 ("rd:trice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice_6 ("rd:trice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice_7 ("rd:trice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice_8 ("rd:trice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice_9 ("rd:trice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice_10("rd:trice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice_11("rd:trice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice_12("rd:trice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice_1 ("rd:Trice_1 %d\n", -1 ); //exp: time: be16default: rd:Trice_1 -1 - break; case __LINE__: Trice_2 ("rd:Trice_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice_2 -1, -2 - break; case __LINE__: Trice_3 ("rd:Trice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice_3 -1, -2, -3 - break; case __LINE__: Trice_4 ("rd:Trice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice_4 -1, -2, -3, -4 - break; case __LINE__: Trice_5 ("rd:Trice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice_6 ("rd:Trice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice_7 ("rd:Trice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice_8 ("rd:Trice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice_9 ("rd:Trice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice_10("rd:Trice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice_11("rd:Trice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice_12("rd:Trice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice_1 ("rd:TRice_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice_1 -1 - break; case __LINE__: TRice_2 ("rd:TRice_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice_2 -1, -2 - break; case __LINE__: TRice_3 ("rd:TRice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice_3 -1, -2, -3 - break; case __LINE__: TRice_4 ("rd:TRice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice_4 -1, -2, -3, -4 - break; case __LINE__: TRice_5 ("rd:TRice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice_6 ("rd:TRice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice_7 ("rd:TRice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice_8 ("rd:TRice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice_9 ("rd:TRice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice_10("rd:TRice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice_11("rd:TRice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice_12("rd:TRice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE(ID(14006), "sig:trice_n with 1 to 12 values\n" ); + break; case __LINE__: trice_1 (iD(14007), "rd:trice_1 %d\n", -1 ); //exp: time: default: rd:trice_1 -1 + break; case __LINE__: trice_2 (iD(14008), "rd:trice_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice_2 -1, -2 + break; case __LINE__: trice_3 (iD(14009), "rd:trice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice_3 -1, -2, -3 + break; case __LINE__: trice_4 (iD(14010), "rd:trice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice_4 -1, -2, -3, -4 + break; case __LINE__: trice_5 (iD(14011), "rd:trice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice_6 (iD(14012), "rd:trice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice_7 (iD(14013), "rd:trice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice_8 (iD(14014), "rd:trice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice_9 (iD(14015), "rd:trice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice_10(iD(14016), "rd:trice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice_11(iD(14017), "rd:trice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice_12(iD(14018), "rd:trice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice_1 (iD(14019), "rd:Trice_1 %d\n", -1 ); //exp: time: be16default: rd:Trice_1 -1 + break; case __LINE__: Trice_2 (iD(14020), "rd:Trice_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice_2 -1, -2 + break; case __LINE__: Trice_3 (iD(14021), "rd:Trice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice_3 -1, -2, -3 + break; case __LINE__: Trice_4 (iD(14022), "rd:Trice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice_4 -1, -2, -3, -4 + break; case __LINE__: Trice_5 (iD(14023), "rd:Trice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice_6 (iD(14024), "rd:Trice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice_7 (iD(14025), "rd:Trice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice_8 (iD(14026), "rd:Trice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice_9 (iD(14027), "rd:Trice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice_10(iD(14028), "rd:Trice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice_11(iD(14029), "rd:Trice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice_12(iD(14030), "rd:Trice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice_1 (iD(14031), "rd:TRice_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice_1 -1 + break; case __LINE__: TRice_2 (iD(14032), "rd:TRice_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice_2 -1, -2 + break; case __LINE__: TRice_3 (iD(14033), "rd:TRice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice_3 -1, -2, -3 + break; case __LINE__: TRice_4 (iD(14034), "rd:TRice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice_4 -1, -2, -3, -4 + break; case __LINE__: TRice_5 (iD(14035), "rd:TRice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice_6 (iD(14036), "rd:TRice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice_7 (iD(14037), "rd:TRice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice_8 (iD(14038), "rd:TRice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice_9 (iD(14039), "rd:TRice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice_10(iD(14040), "rd:TRice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice_11(iD(14041), "rd:TRice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice_12(iD(14042), "rd:TRice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("sig:TRICE8 with 1 to 12 values\n" ); - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d\n", -1 ); //exp: time: default: rd:TRICE8 -1 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE8 -1, -2 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE8 -1, -2, -3 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d\n", -1 ); //exp: time: be16default: rd:TRICE8 -1 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE8 -1, -2 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE8 -1 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE8 -1, -2 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice("sig:TRICE8_n with 1 to 12 values\n" ); - break; case __LINE__: TRICE8_1 (id(0), "rd:TRICE8_1 %d\n", -1 ); //exp: time: default: rd:TRICE8_1 -1 - break; case __LINE__: TRICE8_2 (id(0), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE8_2 -1, -2 - break; case __LINE__: TRICE8_3 (id(0), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE8_3 -1, -2, -3 - break; case __LINE__: TRICE8_4 (id(0), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE8_4 -1, -2, -3, -4 - break; case __LINE__: TRICE8_5 (id(0), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE8_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8_6 (id(0), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8_7 (id(0), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8_8 (id(0), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8_9 (id(0), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8_10(id(0), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8_11(id(0), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8_12(id(0), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE8_1 (Id(0), "rd:TRICE8_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE8_1 -1 - break; case __LINE__: TRICE8_2 (Id(0), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE8_2 -1, -2 - break; case __LINE__: TRICE8_3 (Id(0), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE8_3 -1, -2, -3 - break; case __LINE__: TRICE8_4 (Id(0), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE8_4 -1, -2, -3, -4 - break; case __LINE__: TRICE8_5 (Id(0), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE8_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8_6 (Id(0), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8_7 (Id(0), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8_8 (Id(0), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8_9 (Id(0), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8_10(Id(0), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8_11(Id(0), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8_12(Id(0), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE8_1 (ID(0), "rd:TRICE8_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE8_1 -1 - break; case __LINE__: TRICE8_2 (ID(0), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE8_2 -1, -2 - break; case __LINE__: TRICE8_3 (ID(0), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE8_3 -1, -2, -3 - break; case __LINE__: TRICE8_4 (ID(0), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE8_4 -1, -2, -3, -4 - break; case __LINE__: TRICE8_5 (ID(0), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE8_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8_6 (ID(0), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8_7 (ID(0), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8_8 (ID(0), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8_9 (ID(0), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8_10(ID(0), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8_11(ID(0), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8_12(ID(0), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice(iD(14043), "sig:TRICE8 with 1 to 12 values\n" ); + break; case __LINE__: TRICE8(id(14044), "rd:TRICE8 %d\n", -1 ); //exp: time: default: rd:TRICE8 -1 + break; case __LINE__: TRICE8(id(14045), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE8 -1, -2 + break; case __LINE__: TRICE8(id(14046), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE8 -1, -2, -3 + break; case __LINE__: TRICE8(id(14047), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4 + break; case __LINE__: TRICE8(id(14048), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8(id(14049), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8(id(14050), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8(id(14051), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8(id(14052), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8(id(14053), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8(id(14054), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8(id(14055), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE8(Id(14056), "rd:TRICE8 %d\n", -1 ); //exp: time: be16default: rd:TRICE8 -1 + break; case __LINE__: TRICE8(Id(14057), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE8 -1, -2 + break; case __LINE__: TRICE8(Id(14058), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3 + break; case __LINE__: TRICE8(Id(14059), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4 + break; case __LINE__: TRICE8(Id(14060), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8(Id(14061), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8(Id(14062), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8(Id(14063), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8(Id(14064), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8(Id(14065), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8(Id(14066), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8(Id(14067), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE8(ID(14068), "rd:TRICE8 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE8 -1 + break; case __LINE__: TRICE8(ID(14069), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE8 -1, -2 + break; case __LINE__: TRICE8(ID(14070), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3 + break; case __LINE__: TRICE8(ID(14071), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4 + break; case __LINE__: TRICE8(ID(14072), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8(ID(14073), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8(ID(14074), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8(ID(14075), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8(ID(14076), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8(ID(14077), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8(ID(14078), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8(ID(14079), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice(iD(14080), "sig:TRICE8_n with 1 to 12 values\n" ); + break; case __LINE__: TRICE8_1 (id(14081), "rd:TRICE8_1 %d\n", -1 ); //exp: time: default: rd:TRICE8_1 -1 + break; case __LINE__: TRICE8_2 (id(14082), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE8_2 -1, -2 + break; case __LINE__: TRICE8_3 (id(14083), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE8_3 -1, -2, -3 + break; case __LINE__: TRICE8_4 (id(14084), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE8_4 -1, -2, -3, -4 + break; case __LINE__: TRICE8_5 (id(14085), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE8_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8_6 (id(14086), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8_7 (id(14087), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8_8 (id(14088), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8_9 (id(14089), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8_10(id(14090), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8_11(id(14091), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8_12(id(14092), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE8_1 (Id(14093), "rd:TRICE8_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE8_1 -1 + break; case __LINE__: TRICE8_2 (Id(14094), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE8_2 -1, -2 + break; case __LINE__: TRICE8_3 (Id(14095), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE8_3 -1, -2, -3 + break; case __LINE__: TRICE8_4 (Id(14096), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE8_4 -1, -2, -3, -4 + break; case __LINE__: TRICE8_5 (Id(14097), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE8_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8_6 (Id(14098), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8_7 (Id(14099), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8_8 (Id(14100), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8_9 (Id(14101), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8_10(Id(14102), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8_11(Id(14103), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8_12(Id(14104), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE8_1 (ID(14105), "rd:TRICE8_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE8_1 -1 + break; case __LINE__: TRICE8_2 (ID(14106), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE8_2 -1, -2 + break; case __LINE__: TRICE8_3 (ID(14107), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE8_3 -1, -2, -3 + break; case __LINE__: TRICE8_4 (ID(14108), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE8_4 -1, -2, -3, -4 + break; case __LINE__: TRICE8_5 (ID(14109), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE8_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8_6 (ID(14110), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8_7 (ID(14111), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8_8 (ID(14112), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8_9 (ID(14113), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8_10(ID(14114), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8_11(ID(14115), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8_12(ID(14116), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("sig:trice8 with 1 to 12 values\n" ); - break; case __LINE__: trice8("rd:trice8 %d\n", -1 ); //exp: time: default: rd:trice8 -1 - break; case __LINE__: trice8("rd:trice8 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice8 -1, -2 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice8 -1, -2, -3 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice8 -1, -2, -3, -4 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice8("rd:Trice8 %d\n", -1 ); //exp: time: be16default: rd:Trice8 -1 - break; case __LINE__: Trice8("rd:Trice8 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice8 -1, -2 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice8 -1, -2, -3 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice8("rd:TRice8 %d\n", -1 ); //exp: time:feed3322default: rd:TRice8 -1 - break; case __LINE__: TRice8("rd:TRice8 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice8 -1, -2 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRICE(ID(0), "sig:trice8_n with 1 to 12 values\n" ); - break; case __LINE__: trice8_1 ("rd:trice8_1 %d\n", -1 ); //exp: time: default: rd:trice8_1 -1 - break; case __LINE__: trice8_2 ("rd:trice8_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice8_2 -1, -2 - break; case __LINE__: trice8_3 ("rd:trice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice8_3 -1, -2, -3 - break; case __LINE__: trice8_4 ("rd:trice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice8_4 -1, -2, -3, -4 - break; case __LINE__: trice8_5 ("rd:trice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice8_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice8_6 ("rd:trice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice8_7 ("rd:trice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice8_8 ("rd:trice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice8_9 ("rd:trice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice8_10("rd:trice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice8_11("rd:trice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice8_12("rd:trice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice8_1 ("rd:Trice8_1 %d\n", -1 ); //exp: time: be16default: rd:Trice8_1 -1 - break; case __LINE__: Trice8_2 ("rd:Trice8_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice8_2 -1, -2 - break; case __LINE__: Trice8_3 ("rd:Trice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice8_3 -1, -2, -3 - break; case __LINE__: Trice8_4 ("rd:Trice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice8_4 -1, -2, -3, -4 - break; case __LINE__: Trice8_5 ("rd:Trice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice8_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice8_6 ("rd:Trice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice8_7 ("rd:Trice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice8_8 ("rd:Trice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice8_9 ("rd:Trice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice8_10("rd:Trice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice8_11("rd:Trice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice8_12("rd:Trice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice8_1 ("rd:TRice8_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice8_1 -1 - break; case __LINE__: TRice8_2 ("rd:TRice8_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice8_2 -1, -2 - break; case __LINE__: TRice8_3 ("rd:TRice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice8_3 -1, -2, -3 - break; case __LINE__: TRice8_4 ("rd:TRice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice8_4 -1, -2, -3, -4 - break; case __LINE__: TRice8_5 ("rd:TRice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice8_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice8_6 ("rd:TRice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice8_7 ("rd:TRice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice8_8 ("rd:TRice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice8_9 ("rd:TRice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice8_10("rd:TRice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice8_11("rd:TRice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice8_12("rd:TRice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice("sig:TRICE16 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice16("rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 - break; case __LINE__: trice16("rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: trice16("rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 - break; case __LINE__: trice16("rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: trice16("rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 - break; case __LINE__: trice16("rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice(iD(14117), "sig:trice8 with 1 to 12 values\n" ); + break; case __LINE__: trice8(iD(14118), "rd:trice8 %d\n", -1 ); //exp: time: default: rd:trice8 -1 + break; case __LINE__: trice8(iD(14119), "rd:trice8 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice8 -1, -2 + break; case __LINE__: trice8(iD(14120), "rd:trice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice8 -1, -2, -3 + break; case __LINE__: trice8(iD(14121), "rd:trice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice8 -1, -2, -3, -4 + break; case __LINE__: trice8(iD(14122), "rd:trice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5 + break; case __LINE__: trice8(iD(14123), "rd:trice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice8(iD(14124), "rd:trice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice8(iD(14125), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice8(iD(14126), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice8(iD(14127), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice8(iD(14128), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice8(iD(14129), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice8(iD(14130), "rd:Trice8 %d\n", -1 ); //exp: time: be16default: rd:Trice8 -1 + break; case __LINE__: Trice8(iD(14131), "rd:Trice8 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice8 -1, -2 + break; case __LINE__: Trice8(iD(14132), "rd:Trice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice8 -1, -2, -3 + break; case __LINE__: Trice8(iD(14133), "rd:Trice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4 + break; case __LINE__: Trice8(iD(14134), "rd:Trice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5 + break; case __LINE__: Trice8(iD(14135), "rd:Trice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice8(iD(14136), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice8(iD(14137), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice8(iD(14138), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice8(iD(14139), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice8(iD(14140), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice8(iD(14141), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice8(iD(14142), "rd:TRice8 %d\n", -1 ); //exp: time:feed3322default: rd:TRice8 -1 + break; case __LINE__: TRice8(iD(14143), "rd:TRice8 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice8 -1, -2 + break; case __LINE__: TRice8(iD(14144), "rd:TRice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3 + break; case __LINE__: TRice8(iD(14145), "rd:TRice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4 + break; case __LINE__: TRice8(iD(14146), "rd:TRice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5 + break; case __LINE__: TRice8(iD(14147), "rd:TRice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice8(iD(14148), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice8(iD(14149), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice8(iD(14150), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice8(iD(14151), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice8(iD(14152), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice8(iD(14153), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRICE(ID(14154), "sig:trice8_n with 1 to 12 values\n" ); + break; case __LINE__: trice8_1 (iD(14155), "rd:trice8_1 %d\n", -1 ); //exp: time: default: rd:trice8_1 -1 + break; case __LINE__: trice8_2 (iD(14156), "rd:trice8_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice8_2 -1, -2 + break; case __LINE__: trice8_3 (iD(14157), "rd:trice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice8_3 -1, -2, -3 + break; case __LINE__: trice8_4 (iD(14158), "rd:trice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice8_4 -1, -2, -3, -4 + break; case __LINE__: trice8_5 (iD(14159), "rd:trice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice8_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice8_6 (iD(14160), "rd:trice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice8_7 (iD(14161), "rd:trice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice8_8 (iD(14162), "rd:trice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice8_9 (iD(14163), "rd:trice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice8_10(iD(14164), "rd:trice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice8_11(iD(14165), "rd:trice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice8_12(iD(14166), "rd:trice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice8_1 (iD(14167), "rd:Trice8_1 %d\n", -1 ); //exp: time: be16default: rd:Trice8_1 -1 + break; case __LINE__: Trice8_2 (iD(14168), "rd:Trice8_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice8_2 -1, -2 + break; case __LINE__: Trice8_3 (iD(14169), "rd:Trice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice8_3 -1, -2, -3 + break; case __LINE__: Trice8_4 (iD(14170), "rd:Trice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice8_4 -1, -2, -3, -4 + break; case __LINE__: Trice8_5 (iD(14171), "rd:Trice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice8_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice8_6 (iD(14172), "rd:Trice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice8_7 (iD(14173), "rd:Trice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice8_8 (iD(14174), "rd:Trice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice8_9 (iD(14175), "rd:Trice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice8_10(iD(14176), "rd:Trice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice8_11(iD(14177), "rd:Trice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice8_12(iD(14178), "rd:Trice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice8_1 (iD(14179), "rd:TRice8_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice8_1 -1 + break; case __LINE__: TRice8_2 (iD(14180), "rd:TRice8_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice8_2 -1, -2 + break; case __LINE__: TRice8_3 (iD(14181), "rd:TRice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice8_3 -1, -2, -3 + break; case __LINE__: TRice8_4 (iD(14182), "rd:TRice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice8_4 -1, -2, -3, -4 + break; case __LINE__: TRice8_5 (iD(14183), "rd:TRice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice8_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice8_6 (iD(14184), "rd:TRice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice8_7 (iD(14185), "rd:TRice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice8_8 (iD(14186), "rd:TRice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice8_9 (iD(14187), "rd:TRice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice8_10(iD(14188), "rd:TRice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice8_11(iD(14189), "rd:TRice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice8_12(iD(14190), "rd:TRice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice(iD(14191), "sig:TRICE16 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice16(iD(14192), "rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 + break; case __LINE__: trice16(iD(14193), "rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 + break; case __LINE__: trice16(iD(14194), "rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 + break; case __LINE__: trice16(iD(14195), "rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 + break; case __LINE__: trice16(iD(14196), "rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 + break; case __LINE__: trice16(iD(14197), "rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16(iD(14198), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16(iD(14199), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16(iD(14200), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16(iD(14201), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16(iD(14202), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16(iD(14203), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice16(iD(14204), "rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 + break; case __LINE__: trice16(iD(14205), "rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 + break; case __LINE__: trice16(iD(14206), "rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 + break; case __LINE__: trice16(iD(14207), "rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 + break; case __LINE__: trice16(iD(14208), "rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 + break; case __LINE__: trice16(iD(14209), "rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16(iD(14210), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16(iD(14211), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16(iD(14212), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16(iD(14213), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16(iD(14214), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16(iD(14215), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice16(iD(14216), "rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 + break; case __LINE__: trice16(iD(14217), "rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 + break; case __LINE__: trice16(iD(14218), "rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 + break; case __LINE__: trice16(iD(14219), "rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 + break; case __LINE__: trice16(iD(14220), "rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 + break; case __LINE__: trice16(iD(14221), "rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16(iD(14222), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16(iD(14223), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16(iD(14224), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16(iD(14225), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16(iD(14226), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16(iD(14227), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice ("sig:TRICE16_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE16_1 (id(0), "rd:TRICE16_1 %d\n", -1 ); //exp: time: default: rd:TRICE16_1 -1 - break; case __LINE__: TRICE16_2 (id(0), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16_2 -1, -2 - break; case __LINE__: TRICE16_3 (id(0), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16_3 -1, -2, -3 - break; case __LINE__: TRICE16_4 (id(0), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16_4 -1, -2, -3, -4 - break; case __LINE__: TRICE16_5 (id(0), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE16_6 (id(0), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE16_7 (id(0), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE16_8 (id(0), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE16_9 (id(0), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE16_10(id(0), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE16_11(id(0), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE16_12(id(0), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE16_1 (Id(0), "rd:TRICE16_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE16_1 -1 - break; case __LINE__: TRICE16_2 (Id(0), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE16_2 -1, -2 - break; case __LINE__: TRICE16_3 (Id(0), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE16_3 -1, -2, -3 - break; case __LINE__: TRICE16_4 (Id(0), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE16_4 -1, -2, -3, -4 - break; case __LINE__: TRICE16_5 (Id(0), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE16_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE16_6 (Id(0), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE16_7 (Id(0), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE16_8 (Id(0), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE16_9 (Id(0), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE16_10(Id(0), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE16_11(Id(0), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE16_12(Id(0), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE16_1 (ID(0), "rd:TRICE16_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE16_1 -1 - break; case __LINE__: TRICE16_2 (ID(0), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE16_2 -1, -2 - break; case __LINE__: TRICE16_3 (ID(0), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE16_3 -1, -2, -3 - break; case __LINE__: TRICE16_4 (ID(0), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE16_4 -1, -2, -3, -4 - break; case __LINE__: TRICE16_5 (ID(0), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE16_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE16_6 (ID(0), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE16_7 (ID(0), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE16_8 (ID(0), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE16_9 (ID(0), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE16_10(ID(0), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE16_11(ID(0), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE16_12(ID(0), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice (iD(14228), "sig:TRICE16_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE16_1 (id(14229), "rd:TRICE16_1 %d\n", -1 ); //exp: time: default: rd:TRICE16_1 -1 + break; case __LINE__: TRICE16_2 (id(14230), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16_2 -1, -2 + break; case __LINE__: TRICE16_3 (id(14231), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16_3 -1, -2, -3 + break; case __LINE__: TRICE16_4 (id(14232), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16_4 -1, -2, -3, -4 + break; case __LINE__: TRICE16_5 (id(14233), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE16_6 (id(14234), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE16_7 (id(14235), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE16_8 (id(14236), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE16_9 (id(14237), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE16_10(id(14238), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE16_11(id(14239), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE16_12(id(14240), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE16_1 (Id(14241), "rd:TRICE16_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE16_1 -1 + break; case __LINE__: TRICE16_2 (Id(14242), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE16_2 -1, -2 + break; case __LINE__: TRICE16_3 (Id(14243), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE16_3 -1, -2, -3 + break; case __LINE__: TRICE16_4 (Id(14244), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE16_4 -1, -2, -3, -4 + break; case __LINE__: TRICE16_5 (Id(14245), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE16_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE16_6 (Id(14246), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE16_7 (Id(14247), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE16_8 (Id(14248), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE16_9 (Id(14249), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE16_10(Id(14250), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE16_11(Id(14251), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE16_12(Id(14252), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE16_1 (ID(14253), "rd:TRICE16_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE16_1 -1 + break; case __LINE__: TRICE16_2 (ID(14254), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE16_2 -1, -2 + break; case __LINE__: TRICE16_3 (ID(14255), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE16_3 -1, -2, -3 + break; case __LINE__: TRICE16_4 (ID(14256), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE16_4 -1, -2, -3, -4 + break; case __LINE__: TRICE16_5 (ID(14257), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE16_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE16_6 (ID(14258), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE16_7 (ID(14259), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE16_8 (ID(14260), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE16_9 (ID(14261), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE16_10(ID(14262), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE16_11(ID(14263), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE16_12(ID(14264), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("sig:trice16 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice16("rd:trice16 %d\n", -1 ); //exp: time: default: rd:trice16 -1 - break; case __LINE__: trice16("rd:trice16 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice16 -1, -2 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice16 -1, -2, -3 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 -1, -2, -3, -4 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice16("rd:Trice16 %d\n", -1 ); //exp: time: be16default: rd:Trice16 -1 - break; case __LINE__: Trice16("rd:Trice16 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice16 -1, -2 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice16 -1, -2, -3 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice16("rd:TRice16 %d\n", -1 ); //exp: time:feed3322default: rd:TRice16 -1 - break; case __LINE__: TRice16("rd:TRice16 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice16 -1, -2 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice ("sig:trice16_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice16_1 ("rd:trice16_1 %d\n", -1 ); //exp: time: default: rd:trice16_1 -1 - break; case __LINE__: trice16_2 ("rd:trice16_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice16_2 -1, -2 - break; case __LINE__: trice16_3 ("rd:trice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice16_3 -1, -2, -3 - break; case __LINE__: trice16_4 ("rd:trice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16_4 -1, -2, -3, -4 - break; case __LINE__: trice16_5 ("rd:trice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice16_6 ("rd:trice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16_7 ("rd:trice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16_8 ("rd:trice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16_9 ("rd:trice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16_10("rd:trice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16_11("rd:trice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16_12("rd:trice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice16_1 ("rd:Trice16_1 %d\n", -1 ); //exp: time: be16default: rd:Trice16_1 -1 - break; case __LINE__: Trice16_2 ("rd:Trice16_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice16_2 -1, -2 - break; case __LINE__: Trice16_3 ("rd:Trice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice16_3 -1, -2, -3 - break; case __LINE__: Trice16_4 ("rd:Trice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice16_4 -1, -2, -3, -4 - break; case __LINE__: Trice16_5 ("rd:Trice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice16_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice16_6 ("rd:Trice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice16_7 ("rd:Trice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice16_8 ("rd:Trice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice16_9 ("rd:Trice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice16_10("rd:Trice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice16_11("rd:Trice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice16_12("rd:Trice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice16_1 ("rd:TRice16_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice16_1 -1 - break; case __LINE__: TRice16_2 ("rd:TRice16_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice16_2 -1, -2 - break; case __LINE__: TRice16_3 ("rd:TRice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice16_3 -1, -2, -3 - break; case __LINE__: TRice16_4 ("rd:TRice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice16_4 -1, -2, -3, -4 - break; case __LINE__: TRice16_5 ("rd:TRice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice16_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice16_6 ("rd:TRice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice16_7 ("rd:TRice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice16_8 ("rd:TRice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice16_9 ("rd:TRice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice16_10("rd:TRice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice16_11("rd:TRice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice16_12("rd:TRice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice(iD(14265), "sig:trice16 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice16(iD(14266), "rd:trice16 %d\n", -1 ); //exp: time: default: rd:trice16 -1 + break; case __LINE__: trice16(iD(14267), "rd:trice16 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice16 -1, -2 + break; case __LINE__: trice16(iD(14268), "rd:trice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice16 -1, -2, -3 + break; case __LINE__: trice16(iD(14269), "rd:trice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 -1, -2, -3, -4 + break; case __LINE__: trice16(iD(14270), "rd:trice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5 + break; case __LINE__: trice16(iD(14271), "rd:trice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16(iD(14272), "rd:trice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16(iD(14273), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16(iD(14274), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16(iD(14275), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16(iD(14276), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16(iD(14277), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice16(iD(14278), "rd:Trice16 %d\n", -1 ); //exp: time: be16default: rd:Trice16 -1 + break; case __LINE__: Trice16(iD(14279), "rd:Trice16 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice16 -1, -2 + break; case __LINE__: Trice16(iD(14280), "rd:Trice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice16 -1, -2, -3 + break; case __LINE__: Trice16(iD(14281), "rd:Trice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4 + break; case __LINE__: Trice16(iD(14282), "rd:Trice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5 + break; case __LINE__: Trice16(iD(14283), "rd:Trice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice16(iD(14284), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice16(iD(14285), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice16(iD(14286), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice16(iD(14287), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice16(iD(14288), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice16(iD(14289), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice16(iD(14290), "rd:TRice16 %d\n", -1 ); //exp: time:feed3322default: rd:TRice16 -1 + break; case __LINE__: TRice16(iD(14291), "rd:TRice16 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice16 -1, -2 + break; case __LINE__: TRice16(iD(14292), "rd:TRice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3 + break; case __LINE__: TRice16(iD(14293), "rd:TRice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4 + break; case __LINE__: TRice16(iD(14294), "rd:TRice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5 + break; case __LINE__: TRice16(iD(14295), "rd:TRice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice16(iD(14296), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice16(iD(14297), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice16(iD(14298), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice16(iD(14299), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice16(iD(14300), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice16(iD(14301), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice (iD(14302), "sig:trice16_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice16_1 (iD(14303), "rd:trice16_1 %d\n", -1 ); //exp: time: default: rd:trice16_1 -1 + break; case __LINE__: trice16_2 (iD(14304), "rd:trice16_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice16_2 -1, -2 + break; case __LINE__: trice16_3 (iD(14305), "rd:trice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice16_3 -1, -2, -3 + break; case __LINE__: trice16_4 (iD(14306), "rd:trice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16_4 -1, -2, -3, -4 + break; case __LINE__: trice16_5 (iD(14307), "rd:trice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice16_6 (iD(14308), "rd:trice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16_7 (iD(14309), "rd:trice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16_8 (iD(14310), "rd:trice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16_9 (iD(14311), "rd:trice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16_10(iD(14312), "rd:trice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16_11(iD(14313), "rd:trice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16_12(iD(14314), "rd:trice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice16_1 (iD(14315), "rd:Trice16_1 %d\n", -1 ); //exp: time: be16default: rd:Trice16_1 -1 + break; case __LINE__: Trice16_2 (iD(14316), "rd:Trice16_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice16_2 -1, -2 + break; case __LINE__: Trice16_3 (iD(14317), "rd:Trice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice16_3 -1, -2, -3 + break; case __LINE__: Trice16_4 (iD(14318), "rd:Trice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice16_4 -1, -2, -3, -4 + break; case __LINE__: Trice16_5 (iD(14319), "rd:Trice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice16_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice16_6 (iD(14320), "rd:Trice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice16_7 (iD(14321), "rd:Trice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice16_8 (iD(14322), "rd:Trice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice16_9 (iD(14323), "rd:Trice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice16_10(iD(14324), "rd:Trice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice16_11(iD(14325), "rd:Trice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice16_12(iD(14326), "rd:Trice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice16_1 (iD(14327), "rd:TRice16_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice16_1 -1 + break; case __LINE__: TRice16_2 (iD(14328), "rd:TRice16_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice16_2 -1, -2 + break; case __LINE__: TRice16_3 (iD(14329), "rd:TRice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice16_3 -1, -2, -3 + break; case __LINE__: TRice16_4 (iD(14330), "rd:TRice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice16_4 -1, -2, -3, -4 + break; case __LINE__: TRice16_5 (iD(14331), "rd:TRice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice16_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice16_6 (iD(14332), "rd:TRice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice16_7 (iD(14333), "rd:TRice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice16_8 (iD(14334), "rd:TRice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice16_9 (iD(14335), "rd:TRice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice16_10(iD(14336), "rd:TRice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice16_11(iD(14337), "rd:TRice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice16_12(iD(14338), "rd:TRice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice ("sig:TRICE32 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d\n", -1 ); //exp: time: default: rd:TRICE32 -1 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE32 -1, -2 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE32 -1, -2, -3 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d\n", -1 ); //exp: time: be16default: rd:TRICE32 -1 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE32 -1, -2 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE32 -1 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE32 -1, -2 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice ("signal:TRICE32_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE32_1 (id(0), "rd:TRICE32_1 %d\n", -1 ); //exp: time: default: rd:TRICE32_1 -1 - break; case __LINE__: TRICE32_2 (id(0), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE32_2 -1, -2 - break; case __LINE__: TRICE32_3 (id(0), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE32_3 -1, -2, -3 - break; case __LINE__: TRICE32_4 (id(0), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE32_4 -1, -2, -3, -4 - break; case __LINE__: TRICE32_5 (id(0), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE32_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32_6 (id(0), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32_7 (id(0), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32_8 (id(0), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32_9 (id(0), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32_10(id(0), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32_11(id(0), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32_12(id(0), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE32_1 (Id(0), "rd:TRICE32_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE32_1 -1 - break; case __LINE__: TRICE32_2 (Id(0), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE32_2 -1, -2 - break; case __LINE__: TRICE32_3 (Id(0), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE32_3 -1, -2, -3 - break; case __LINE__: TRICE32_4 (Id(0), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE32_4 -1, -2, -3, -4 - break; case __LINE__: TRICE32_5 (Id(0), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE32_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32_6 (Id(0), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32_7 (Id(0), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32_8 (Id(0), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32_9 (Id(0), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32_10(Id(0), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32_11(Id(0), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32_12(Id(0), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE32_1 (ID(0), "rd:TRICE32_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE32_1 -1 - break; case __LINE__: TRICE32_2 (ID(0), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE32_2 -1, -2 - break; case __LINE__: TRICE32_3 (ID(0), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE32_3 -1, -2, -3 - break; case __LINE__: TRICE32_4 (ID(0), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE32_4 -1, -2, -3, -4 - break; case __LINE__: TRICE32_5 (ID(0), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE32_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32_6 (ID(0), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32_7 (ID(0), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32_8 (ID(0), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32_9 (ID(0), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32_10(ID(0), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32_11(ID(0), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32_12(ID(0), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice (iD(14339), "sig:TRICE32 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE32(id(14340), "rd:TRICE32 %d\n", -1 ); //exp: time: default: rd:TRICE32 -1 + break; case __LINE__: TRICE32(id(14341), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE32 -1, -2 + break; case __LINE__: TRICE32(id(14342), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE32 -1, -2, -3 + break; case __LINE__: TRICE32(id(14343), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4 + break; case __LINE__: TRICE32(id(14344), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32(id(14345), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32(id(14346), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32(id(14347), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32(id(14348), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32(id(14349), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32(id(14350), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32(id(14351), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE32(Id(14352), "rd:TRICE32 %d\n", -1 ); //exp: time: be16default: rd:TRICE32 -1 + break; case __LINE__: TRICE32(Id(14353), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE32 -1, -2 + break; case __LINE__: TRICE32(Id(14354), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3 + break; case __LINE__: TRICE32(Id(14355), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4 + break; case __LINE__: TRICE32(Id(14356), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32(Id(14357), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32(Id(14358), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32(Id(14359), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32(Id(14360), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32(Id(14361), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32(Id(14362), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32(Id(14363), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE32(ID(14364), "rd:TRICE32 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE32 -1 + break; case __LINE__: TRICE32(ID(14365), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE32 -1, -2 + break; case __LINE__: TRICE32(ID(14366), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3 + break; case __LINE__: TRICE32(ID(14367), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4 + break; case __LINE__: TRICE32(ID(14368), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32(ID(14369), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32(ID(14370), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32(ID(14371), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32(ID(14372), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32(ID(14373), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32(ID(14374), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32(ID(14375), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice (iD(14376), "signal:TRICE32_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE32_1 (id(14377), "rd:TRICE32_1 %d\n", -1 ); //exp: time: default: rd:TRICE32_1 -1 + break; case __LINE__: TRICE32_2 (id(14378), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE32_2 -1, -2 + break; case __LINE__: TRICE32_3 (id(14379), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE32_3 -1, -2, -3 + break; case __LINE__: TRICE32_4 (id(14380), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE32_4 -1, -2, -3, -4 + break; case __LINE__: TRICE32_5 (id(14381), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE32_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32_6 (id(14382), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32_7 (id(14383), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32_8 (id(14384), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32_9 (id(14385), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32_10(id(14386), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32_11(id(14387), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32_12(id(14388), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE32_1 (Id(14389), "rd:TRICE32_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE32_1 -1 + break; case __LINE__: TRICE32_2 (Id(14390), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE32_2 -1, -2 + break; case __LINE__: TRICE32_3 (Id(14391), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE32_3 -1, -2, -3 + break; case __LINE__: TRICE32_4 (Id(14392), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE32_4 -1, -2, -3, -4 + break; case __LINE__: TRICE32_5 (Id(14393), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE32_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32_6 (Id(14394), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32_7 (Id(14395), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32_8 (Id(14396), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32_9 (Id(14397), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32_10(Id(14398), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32_11(Id(14399), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32_12(Id(14400), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE32_1 (ID(14401), "rd:TRICE32_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE32_1 -1 + break; case __LINE__: TRICE32_2 (ID(14402), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE32_2 -1, -2 + break; case __LINE__: TRICE32_3 (ID(14403), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE32_3 -1, -2, -3 + break; case __LINE__: TRICE32_4 (ID(14404), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE32_4 -1, -2, -3, -4 + break; case __LINE__: TRICE32_5 (ID(14405), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE32_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32_6 (ID(14406), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32_7 (ID(14407), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32_8 (ID(14408), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32_9 (ID(14409), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32_10(ID(14410), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32_11(ID(14411), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32_12(ID(14412), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice ("sig:trice32 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice32("rd:trice32 %d\n", -1 ); //exp: time: default: rd:trice32 -1 - break; case __LINE__: trice32("rd:trice32 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice32 -1, -2 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice32 -1, -2, -3 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice32 -1, -2, -3, -4 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice32("rd:Trice32 %d\n", -1 ); //exp: time: be16default: rd:Trice32 -1 - break; case __LINE__: Trice32("rd:Trice32 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice32 -1, -2 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice32 -1, -2, -3 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice32("rd:TRice32 %d\n", -1 ); //exp: time:feed3322default: rd:TRice32 -1 - break; case __LINE__: TRice32("rd:TRice32 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice32 -1, -2 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice ("signal:trice32_n with 1 to 12 values (line %d)\n", __LINE__ ); - - break; case __LINE__: trice32_1 ("rd:trice32_1 %d\n", -1 ); //exp: time: default: rd:trice32_1 -1 - break; case __LINE__: trice32_2 ("rd:trice32_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice32_2 -1, -2 - break; case __LINE__: trice32_3 ("rd:trice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice32_3 -1, -2, -3 - break; case __LINE__: trice32_4 ("rd:trice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice32_4 -1, -2, -3, -4 - break; case __LINE__: trice32_5 ("rd:trice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice32_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice32_6 ("rd:trice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice32_7 ("rd:trice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice32_8 ("rd:trice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice32_9 ("rd:trice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice32_10("rd:trice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice32_11("rd:trice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice32_12("rd:trice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice32_1 ("rd:Trice32_1 %d\n", -1 ); //exp: time: be16default: rd:Trice32_1 -1 - break; case __LINE__: Trice32_2 ("rd:Trice32_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice32_2 -1, -2 - break; case __LINE__: Trice32_3 ("rd:Trice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice32_3 -1, -2, -3 - break; case __LINE__: Trice32_4 ("rd:Trice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice32_4 -1, -2, -3, -4 - break; case __LINE__: Trice32_5 ("rd:Trice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice32_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice32_6 ("rd:Trice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice32_7 ("rd:Trice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice32_8 ("rd:Trice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice32_9 ("rd:Trice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice32_10("rd:Trice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice32_11("rd:Trice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice32_12("rd:Trice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice32_1 ("rd:TRice32_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice32_1 -1 - break; case __LINE__: TRice32_2 ("rd:TRice32_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice32_2 -1, -2 - break; case __LINE__: TRice32_3 ("rd:TRice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice32_3 -1, -2, -3 - break; case __LINE__: TRice32_4 ("rd:TRice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice32_4 -1, -2, -3, -4 - break; case __LINE__: TRice32_5 ("rd:TRice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice32_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice32_6 ("rd:TRice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice32_7 ("rd:TRice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice32_8 ("rd:TRice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice32_9 ("rd:TRice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice32_10("rd:TRice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice32_11("rd:TRice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice32_12("rd:TRice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice (iD(14413), "sig:trice32 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice32(iD(14414), "rd:trice32 %d\n", -1 ); //exp: time: default: rd:trice32 -1 + break; case __LINE__: trice32(iD(14415), "rd:trice32 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice32 -1, -2 + break; case __LINE__: trice32(iD(14416), "rd:trice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice32 -1, -2, -3 + break; case __LINE__: trice32(iD(14417), "rd:trice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice32 -1, -2, -3, -4 + break; case __LINE__: trice32(iD(14418), "rd:trice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5 + break; case __LINE__: trice32(iD(14419), "rd:trice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice32(iD(14420), "rd:trice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice32(iD(14421), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice32(iD(14422), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice32(iD(14423), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice32(iD(14424), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice32(iD(14425), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice32(iD(14426), "rd:Trice32 %d\n", -1 ); //exp: time: be16default: rd:Trice32 -1 + break; case __LINE__: Trice32(iD(14427), "rd:Trice32 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice32 -1, -2 + break; case __LINE__: Trice32(iD(14428), "rd:Trice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice32 -1, -2, -3 + break; case __LINE__: Trice32(iD(14429), "rd:Trice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4 + break; case __LINE__: Trice32(iD(14430), "rd:Trice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5 + break; case __LINE__: Trice32(iD(14431), "rd:Trice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice32(iD(14432), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice32(iD(14433), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice32(iD(14434), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice32(iD(14435), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice32(iD(14436), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice32(iD(14437), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice32(iD(14438), "rd:TRice32 %d\n", -1 ); //exp: time:feed3322default: rd:TRice32 -1 + break; case __LINE__: TRice32(iD(14439), "rd:TRice32 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice32 -1, -2 + break; case __LINE__: TRice32(iD(14440), "rd:TRice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3 + break; case __LINE__: TRice32(iD(14441), "rd:TRice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4 + break; case __LINE__: TRice32(iD(14442), "rd:TRice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5 + break; case __LINE__: TRice32(iD(14443), "rd:TRice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice32(iD(14444), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice32(iD(14445), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice32(iD(14446), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice32(iD(14447), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice32(iD(14448), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice32(iD(14449), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice (iD(14450), "signal:trice32_n with 1 to 12 values (line %d)\n", __LINE__ ); + + break; case __LINE__: trice32_1 (iD(14451), "rd:trice32_1 %d\n", -1 ); //exp: time: default: rd:trice32_1 -1 + break; case __LINE__: trice32_2 (iD(14452), "rd:trice32_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice32_2 -1, -2 + break; case __LINE__: trice32_3 (iD(14453), "rd:trice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice32_3 -1, -2, -3 + break; case __LINE__: trice32_4 (iD(14454), "rd:trice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice32_4 -1, -2, -3, -4 + break; case __LINE__: trice32_5 (iD(14455), "rd:trice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice32_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice32_6 (iD(14456), "rd:trice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice32_7 (iD(14457), "rd:trice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice32_8 (iD(14458), "rd:trice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice32_9 (iD(14459), "rd:trice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice32_10(iD(14460), "rd:trice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice32_11(iD(14461), "rd:trice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice32_12(iD(14462), "rd:trice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice32_1 (iD(14463), "rd:Trice32_1 %d\n", -1 ); //exp: time: be16default: rd:Trice32_1 -1 + break; case __LINE__: Trice32_2 (iD(14464), "rd:Trice32_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice32_2 -1, -2 + break; case __LINE__: Trice32_3 (iD(14465), "rd:Trice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice32_3 -1, -2, -3 + break; case __LINE__: Trice32_4 (iD(14466), "rd:Trice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice32_4 -1, -2, -3, -4 + break; case __LINE__: Trice32_5 (iD(14467), "rd:Trice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice32_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice32_6 (iD(14468), "rd:Trice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice32_7 (iD(14469), "rd:Trice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice32_8 (iD(14470), "rd:Trice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice32_9 (iD(14471), "rd:Trice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice32_10(iD(14472), "rd:Trice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice32_11(iD(14473), "rd:Trice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice32_12(iD(14474), "rd:Trice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice32_1 (iD(14475), "rd:TRice32_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice32_1 -1 + break; case __LINE__: TRice32_2 (iD(14476), "rd:TRice32_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice32_2 -1, -2 + break; case __LINE__: TRice32_3 (iD(14477), "rd:TRice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice32_3 -1, -2, -3 + break; case __LINE__: TRice32_4 (iD(14478), "rd:TRice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice32_4 -1, -2, -3, -4 + break; case __LINE__: TRice32_5 (iD(14479), "rd:TRice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice32_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice32_6 (iD(14480), "rd:TRice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice32_7 (iD(14481), "rd:TRice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice32_8 (iD(14482), "rd:TRice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice32_9 (iD(14483), "rd:TRice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice32_10(iD(14484), "rd:TRice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice32_11(iD(14485), "rd:TRice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice32_12(iD(14486), "rd:TRice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice ("sig:TRICE64 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d\n", -1 ); //exp: time: default: rd:TRICE64 -1 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE64 -1, -2 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE64 -1, -2, -3 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d\n", -1 ); //exp: time: be16default: rd:TRICE64 -1 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE64 -1, -2 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE64 -1 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE64 -1, -2 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice ("signal:TRICE64_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE64_1 (id(0), "rd:TRICE64_1 %d\n", -1 ); //exp: time: default: rd:TRICE64_1 -1 - break; case __LINE__: TRICE64_2 (id(0), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE64_2 -1, -2 - break; case __LINE__: TRICE64_3 (id(0), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE64_3 -1, -2, -3 - break; case __LINE__: TRICE64_4 (id(0), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE64_4 -1, -2, -3, -4 - break; case __LINE__: TRICE64_5 (id(0), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE64_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64_6 (id(0), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64_7 (id(0), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64_8 (id(0), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64_9 (id(0), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64_10(id(0), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64_11(id(0), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64_12(id(0), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE64_1 (Id(0), "rd:TRICE64_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE64_1 -1 - break; case __LINE__: TRICE64_2 (Id(0), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE64_2 -1, -2 - break; case __LINE__: TRICE64_3 (Id(0), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE64_3 -1, -2, -3 - break; case __LINE__: TRICE64_4 (Id(0), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE64_4 -1, -2, -3, -4 - break; case __LINE__: TRICE64_5 (Id(0), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE64_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64_6 (Id(0), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64_7 (Id(0), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64_8 (Id(0), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64_9 (Id(0), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64_10(Id(0), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64_11(Id(0), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64_12(Id(0), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE64_1 (ID(0), "rd:TRICE64_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE64_1 -1 - break; case __LINE__: TRICE64_2 (ID(0), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE64_2 -1, -2 - break; case __LINE__: TRICE64_3 (ID(0), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE64_3 -1, -2, -3 - break; case __LINE__: TRICE64_4 (ID(0), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE64_4 -1, -2, -3, -4 - break; case __LINE__: TRICE64_5 (ID(0), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE64_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64_6 (ID(0), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64_7 (ID(0), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64_8 (ID(0), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64_9 (ID(0), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64_10(ID(0), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64_11(ID(0), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64_12(ID(0), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice (iD(14487), "sig:TRICE64 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE64(id(14488), "rd:TRICE64 %d\n", -1 ); //exp: time: default: rd:TRICE64 -1 + break; case __LINE__: TRICE64(id(14489), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE64 -1, -2 + break; case __LINE__: TRICE64(id(14490), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE64 -1, -2, -3 + break; case __LINE__: TRICE64(id(14491), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4 + break; case __LINE__: TRICE64(id(14492), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64(id(14493), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64(id(14494), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64(id(14495), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64(id(14496), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64(id(14497), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64(id(14498), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64(id(14499), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64(Id(14500), "rd:TRICE64 %d\n", -1 ); //exp: time: be16default: rd:TRICE64 -1 + break; case __LINE__: TRICE64(Id(14501), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE64 -1, -2 + break; case __LINE__: TRICE64(Id(14502), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3 + break; case __LINE__: TRICE64(Id(14503), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4 + break; case __LINE__: TRICE64(Id(14504), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64(Id(14505), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64(Id(14506), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64(Id(14507), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64(Id(14508), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64(Id(14509), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64(Id(14510), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64(Id(14511), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64(ID(14512), "rd:TRICE64 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE64 -1 + break; case __LINE__: TRICE64(ID(14513), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE64 -1, -2 + break; case __LINE__: TRICE64(ID(14514), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3 + break; case __LINE__: TRICE64(ID(14515), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4 + break; case __LINE__: TRICE64(ID(14516), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64(ID(14517), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64(ID(14518), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64(ID(14519), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64(ID(14520), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64(ID(14521), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64(ID(14522), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64(ID(14523), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice (iD(14524), "signal:TRICE64_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE64_1 (id(14525), "rd:TRICE64_1 %d\n", -1 ); //exp: time: default: rd:TRICE64_1 -1 + break; case __LINE__: TRICE64_2 (id(14526), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE64_2 -1, -2 + break; case __LINE__: TRICE64_3 (id(14527), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE64_3 -1, -2, -3 + break; case __LINE__: TRICE64_4 (id(14528), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE64_4 -1, -2, -3, -4 + break; case __LINE__: TRICE64_5 (id(14529), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE64_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64_6 (id(14530), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64_7 (id(14531), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64_8 (id(14532), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64_9 (id(14533), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64_10(id(14534), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64_11(id(14535), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64_12(id(14536), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64_1 (Id(14537), "rd:TRICE64_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE64_1 -1 + break; case __LINE__: TRICE64_2 (Id(14538), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE64_2 -1, -2 + break; case __LINE__: TRICE64_3 (Id(14539), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE64_3 -1, -2, -3 + break; case __LINE__: TRICE64_4 (Id(14540), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE64_4 -1, -2, -3, -4 + break; case __LINE__: TRICE64_5 (Id(14541), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE64_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64_6 (Id(14542), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64_7 (Id(14543), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64_8 (Id(14544), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64_9 (Id(14545), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64_10(Id(14546), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64_11(Id(14547), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64_12(Id(14548), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64_1 (ID(14549), "rd:TRICE64_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE64_1 -1 + break; case __LINE__: TRICE64_2 (ID(14550), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE64_2 -1, -2 + break; case __LINE__: TRICE64_3 (ID(14551), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE64_3 -1, -2, -3 + break; case __LINE__: TRICE64_4 (ID(14552), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE64_4 -1, -2, -3, -4 + break; case __LINE__: TRICE64_5 (ID(14553), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE64_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64_6 (ID(14554), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64_7 (ID(14555), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64_8 (ID(14556), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64_9 (ID(14557), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64_10(ID(14558), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64_11(ID(14559), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64_12(ID(14560), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice ("sig:trice64 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice64("rd:trice64 %d\n", -1 ); //exp: time: default: rd:trice64 -1 - break; case __LINE__: trice64("rd:trice64 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice64 -1, -2 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice64 -1, -2, -3 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice64 -1, -2, -3, -4 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice64("rd:Trice64 %d\n", -1 ); //exp: time: be16default: rd:Trice64 -1 - break; case __LINE__: Trice64("rd:Trice64 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice64 -1, -2 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice64 -1, -2, -3 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice64("rd:TRice64 %d\n", -1 ); //exp: time:feed3322default: rd:TRice64 -1 - break; case __LINE__: TRice64("rd:TRice64 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice64 -1, -2 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice ("signal:trice64_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice64_1 ("rd:trice64_1 %d\n", -1 ); //exp: time: default: rd:trice64_1 -1 - break; case __LINE__: trice64_2 ("rd:trice64_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice64_2 -1, -2 - break; case __LINE__: trice64_3 ("rd:trice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice64_3 -1, -2, -3 - break; case __LINE__: trice64_4 ("rd:trice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice64_4 -1, -2, -3, -4 - break; case __LINE__: trice64_5 ("rd:trice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice64_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice64_6 ("rd:trice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice64_7 ("rd:trice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice64_8 ("rd:trice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice64_9 ("rd:trice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice64_10("rd:trice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice64_11("rd:trice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice64_12("rd:trice64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice64_1 ("rd:Trice64_1 %d\n", -1 ); //exp: time: be16default: rd:Trice64_1 -1 - break; case __LINE__: Trice64_2 ("rd:Trice64_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice64_2 -1, -2 - break; case __LINE__: Trice64_3 ("rd:Trice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice64_3 -1, -2, -3 - break; case __LINE__: Trice64_4 ("rd:Trice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice64_4 -1, -2, -3, -4 - break; case __LINE__: Trice64_5 ("rd:Trice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice64_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice64_6 ("rd:Trice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice64_7 ("rd:Trice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice64_8 ("rd:Trice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice64_9 ("rd:Trice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice64_10("rd:Trice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice64_11("rd:Trice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice64_12("rd:Trice64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice64_1 ("rd:TRice64_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice64_1 -1 - break; case __LINE__: TRice64_2 ("rd:TRice64_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice64_2 -1, -2 - break; case __LINE__: TRice64_3 ("rd:TRice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice64_3 -1, -2, -3 - break; case __LINE__: TRice64_4 ("rd:TRice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice64_4 -1, -2, -3, -4 - break; case __LINE__: TRice64_5 ("rd:TRice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice64_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice64_6 ("rd:TRice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice64_7 ("rd:TRice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice64_8 ("rd:TRice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice64_9 ("rd:TRice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice64_10("rd:TRice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice64_11("rd:TRice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice32_12("rd:TRice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice (iD(14561), "sig:trice64 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice64(iD(14562), "rd:trice64 %d\n", -1 ); //exp: time: default: rd:trice64 -1 + break; case __LINE__: trice64(iD(14563), "rd:trice64 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice64 -1, -2 + break; case __LINE__: trice64(iD(14564), "rd:trice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice64 -1, -2, -3 + break; case __LINE__: trice64(iD(14565), "rd:trice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice64 -1, -2, -3, -4 + break; case __LINE__: trice64(iD(14566), "rd:trice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5 + break; case __LINE__: trice64(iD(14567), "rd:trice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice64(iD(14568), "rd:trice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice64(iD(14569), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice64(iD(14570), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice64(iD(14571), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice64(iD(14572), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice64(iD(14573), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice64(iD(14574), "rd:Trice64 %d\n", -1 ); //exp: time: be16default: rd:Trice64 -1 + break; case __LINE__: Trice64(iD(14575), "rd:Trice64 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice64 -1, -2 + break; case __LINE__: Trice64(iD(14576), "rd:Trice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice64 -1, -2, -3 + break; case __LINE__: Trice64(iD(14577), "rd:Trice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4 + break; case __LINE__: Trice64(iD(14578), "rd:Trice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5 + break; case __LINE__: Trice64(iD(14579), "rd:Trice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice64(iD(14580), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice64(iD(14581), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice64(iD(14582), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice64(iD(14583), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice64(iD(14584), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice64(iD(14585), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice64(iD(14586), "rd:TRice64 %d\n", -1 ); //exp: time:feed3322default: rd:TRice64 -1 + break; case __LINE__: TRice64(iD(14587), "rd:TRice64 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice64 -1, -2 + break; case __LINE__: TRice64(iD(14588), "rd:TRice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3 + break; case __LINE__: TRice64(iD(14589), "rd:TRice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4 + break; case __LINE__: TRice64(iD(14590), "rd:TRice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5 + break; case __LINE__: TRice64(iD(14591), "rd:TRice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice64(iD(14592), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice64(iD(14593), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice64(iD(14594), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice64(iD(14595), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice64(iD(14596), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice64(iD(14597), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice (iD(14598), "signal:trice64_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice64_1 (iD(14599), "rd:trice64_1 %d\n", -1 ); //exp: time: default: rd:trice64_1 -1 + break; case __LINE__: trice64_2 (iD(14600), "rd:trice64_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice64_2 -1, -2 + break; case __LINE__: trice64_3 (iD(14601), "rd:trice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice64_3 -1, -2, -3 + break; case __LINE__: trice64_4 (iD(14602), "rd:trice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice64_4 -1, -2, -3, -4 + break; case __LINE__: trice64_5 (iD(14603), "rd:trice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice64_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice64_6 (iD(14604), "rd:trice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice64_7 (iD(14605), "rd:trice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice64_8 (iD(14606), "rd:trice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice64_9 (iD(14607), "rd:trice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice64_10(iD(14608), "rd:trice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice64_11(iD(14609), "rd:trice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice64_12(iD(14610), "rd:trice64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice64_1 (iD(14611), "rd:Trice64_1 %d\n", -1 ); //exp: time: be16default: rd:Trice64_1 -1 + break; case __LINE__: Trice64_2 (iD(14612), "rd:Trice64_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice64_2 -1, -2 + break; case __LINE__: Trice64_3 (iD(14613), "rd:Trice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice64_3 -1, -2, -3 + break; case __LINE__: Trice64_4 (iD(14614), "rd:Trice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice64_4 -1, -2, -3, -4 + break; case __LINE__: Trice64_5 (iD(14615), "rd:Trice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice64_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice64_6 (iD(14616), "rd:Trice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice64_7 (iD(14617), "rd:Trice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice64_8 (iD(14618), "rd:Trice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice64_9 (iD(14619), "rd:Trice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice64_10(iD(14620), "rd:Trice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice64_11(iD(14621), "rd:Trice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice64_12(iD(14622), "rd:Trice64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice64_1 (iD(14623), "rd:TRice64_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice64_1 -1 + break; case __LINE__: TRice64_2 (iD(14624), "rd:TRice64_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice64_2 -1, -2 + break; case __LINE__: TRice64_3 (iD(14625), "rd:TRice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice64_3 -1, -2, -3 + break; case __LINE__: TRice64_4 (iD(14626), "rd:TRice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice64_4 -1, -2, -3, -4 + break; case __LINE__: TRice64_5 (iD(14627), "rd:TRice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice64_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice64_6 (iD(14628), "rd:TRice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice64_7 (iD(14629), "rd:TRice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice64_8 (iD(14630), "rd:TRice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice64_9 (iD(14631), "rd:TRice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice64_10(iD(14632), "rd:TRice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice64_11(iD(14633), "rd:TRice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice32_12(iD(14634), "rd:TRice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 break; case __LINE__:{ - TRICE(Id(0), "sig:Colors and ticks\n" ); - TRICE(Id(0), "--------------------------------------------------\n"); - TRICE(Id(0), "--------------------------------------------------\n"); - TRICE(Id(0), "dbg:12345 as 16bit is %016b\n", 12345); - TRICE(Id(0), "--------------------------------------------------\n"); - TRICE(Id(0), "sig:This ASSERT error is just a demo and no real error:\n"); - TRICE(Id(0), "--------------------------------------------------\n"); - TRICE(Id(0), "ERR:error message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "WRN:warning message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "ATT:attention message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "DIA:diagnostics message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "TIM:timing message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "DBG:debug message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "SIG:signal message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "RD:read message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "WR:write message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "ISR:interrupt message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "MSG:normal message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "INFO:informal message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(0), "time:TRICE32_1 message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14635), "sig:Colors and ticks\n" ); + TRICE(Id(14636), "--------------------------------------------------\n"); + TRICE(Id(14637), "--------------------------------------------------\n"); + TRICE(Id(14638), "dbg:12345 as 16bit is %016b\n", 12345); + TRICE(Id(14639), "--------------------------------------------------\n"); + TRICE(Id(14640), "sig:This ASSERT error is just a demo and no real error:\n"); + TRICE(Id(14641), "--------------------------------------------------\n"); + TRICE(Id(14642), "ERR:error message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14643), "WRN:warning message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14644), "ATT:attention message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14645), "DIA:diagnostics message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14646), "TIM:timing message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14647), "DBG:debug message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14648), "SIG:signal message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14649), "RD:read message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14650), "WR:write message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14651), "ISR:interrupt message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14652), "MSG:normal message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14653), "INFO:informal message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(14654), "time:TRICE32_1 message, SysTick is %6u\n", SYSTICKVAL); } #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE(ID(0), "sig:Various ranges and formats\n" ); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%03x -> %03x %03x %03x %03x\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4d -> %4d %4d %4d %4d\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4u -> %4u %4u %4u %4u\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4o -> %4o %4o %4o %4o\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4O -> %4O %4O %4O %4O\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4X -> %4X %4X %4X %4X\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4x -> %4x %4x %4x %4x\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%8b -> %8b %8b %8b %8b\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%08b -> %08b %08b %08b %08b\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE16(ID(0), "tst:TRICE16 %%05x -> %05x %05x %05x %05x\n", 1, 0x7fff, 0x8000, 0xffff); - break; case __LINE__: TRICE16(ID(0), "tst:TRICE16 %%6d -> %6d %6d %6d %6d\n", 1, 0x7fff, 0x8000, 0xffff); - break; case __LINE__: TRICE16(ID(0), "tst:TRICE16 %%7o -> %7o %7o %7o %7o\n", 1, 0x7fff, 0x8000, 0xffff); - break; case __LINE__: TRICE32(ID(0), "tst:TRICE32 %%09x -> %09x %09x %09x %09x\n", 1, 0x7fffffff, 0x80000000, 0xffffffff); - break; case __LINE__: TRICE32(ID(0), "tst:TRICE32 %%10d -> %10d %10d %10d %10x\n", 1, 0x7fffffff, 0x80000000, 0xffffffff); - break; case __LINE__: TRICE32(ID(0), "att:TRICE32 %40b\n", 0xAAAAAAAA); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %%09x -> %09x %09x %09x %09x\n", 1, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %%10d -> %10d %10d %10d %10x\n", 1, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff); - break; case __LINE__: TRICE64(ID(0), "att:TRICE64 %70b\n", 0xAAAAAAAAAAAAAAAA); - break; case __LINE__: TRICE(ID(0), "sig:Legacy TRICE8\n" ); - break; case __LINE__: TRICE8_1(ID(0), "tst:TRICE8_1 %02x\n", 0xA1); - break; case __LINE__: TRICE8_2(ID(0), "tst:TRICE8_2 %02x %02x\n", 0xA1, 0xA2); - break; case __LINE__: TRICE8_3(ID(0), "tst:TRICE8_3 %02x %02x %02x\n", 0xA1, 0xA2, 0xA3); - break; case __LINE__: TRICE8_4(ID(0), "tst:TRICE8_4 %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4); - break; case __LINE__: TRICE8_5(ID(0), "tst:TRICE8_5 %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5 ); - break; case __LINE__: TRICE8_6(ID(0), "tst:TRICE8_6 %02x %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6); - break; case __LINE__: TRICE8_7(ID(0), "tst:TRICE8_7 %02x %02x %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7); - break; case __LINE__: TRICE8_8(ID(0), "tst:TRICE8_8 %02X %02X %02X %02X %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8); //exp: time:feed3322default: tst:TRICE8_8 A1 A2 A3 A4 a5 a6 a7 a8 + break; case __LINE__: TRICE(ID(14655), "sig:Various ranges and formats\n" ); + break; case __LINE__: TRICE8 (ID(14656), "tst:TRICE8 %%03x -> %03x %03x %03x %03x\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(14657), "tst:TRICE8 %%4d -> %4d %4d %4d %4d\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(14658), "tst:TRICE8 %%4u -> %4u %4u %4u %4u\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(14659), "tst:TRICE8 %%4o -> %4o %4o %4o %4o\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(14660), "tst:TRICE8 %%4O -> %4O %4O %4O %4O\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(14661), "tst:TRICE8 %%4X -> %4X %4X %4X %4X\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(14662), "tst:TRICE8 %%4x -> %4x %4x %4x %4x\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(14663), "tst:TRICE8 %%8b -> %8b %8b %8b %8b\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(14664), "tst:TRICE8 %%08b -> %08b %08b %08b %08b\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE16(ID(14665), "tst:TRICE16 %%05x -> %05x %05x %05x %05x\n", 1, 0x7fff, 0x8000, 0xffff); + break; case __LINE__: TRICE16(ID(14666), "tst:TRICE16 %%6d -> %6d %6d %6d %6d\n", 1, 0x7fff, 0x8000, 0xffff); + break; case __LINE__: TRICE16(ID(14667), "tst:TRICE16 %%7o -> %7o %7o %7o %7o\n", 1, 0x7fff, 0x8000, 0xffff); + break; case __LINE__: TRICE32(ID(14668), "tst:TRICE32 %%09x -> %09x %09x %09x %09x\n", 1, 0x7fffffff, 0x80000000, 0xffffffff); + break; case __LINE__: TRICE32(ID(14669), "tst:TRICE32 %%10d -> %10d %10d %10d %10x\n", 1, 0x7fffffff, 0x80000000, 0xffffffff); + break; case __LINE__: TRICE32(ID(14670), "att:TRICE32 %40b\n", 0xAAAAAAAA); + break; case __LINE__: TRICE64(ID(14671), "tst:TRICE64 %%09x -> %09x %09x %09x %09x\n", 1, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff); + break; case __LINE__: TRICE64(ID(14672), "tst:TRICE64 %%10d -> %10d %10d %10d %10x\n", 1, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff); + break; case __LINE__: TRICE64(ID(14673), "att:TRICE64 %70b\n", 0xAAAAAAAAAAAAAAAA); + break; case __LINE__: TRICE(ID(14674), "sig:Legacy TRICE8\n" ); + break; case __LINE__: TRICE8_1(ID(14675), "tst:TRICE8_1 %02x\n", 0xA1); + break; case __LINE__: TRICE8_2(ID(14676), "tst:TRICE8_2 %02x %02x\n", 0xA1, 0xA2); + break; case __LINE__: TRICE8_3(ID(14677), "tst:TRICE8_3 %02x %02x %02x\n", 0xA1, 0xA2, 0xA3); + break; case __LINE__: TRICE8_4(ID(14678), "tst:TRICE8_4 %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4); + break; case __LINE__: TRICE8_5(ID(14679), "tst:TRICE8_5 %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5 ); + break; case __LINE__: TRICE8_6(ID(14680), "tst:TRICE8_6 %02x %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6); + break; case __LINE__: TRICE8_7(ID(14681), "tst:TRICE8_7 %02x %02x %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7); + break; case __LINE__: TRICE8_8(ID(14682), "tst:TRICE8_8 %02X %02X %02X %02X %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8); //exp: time:feed3322default: tst:TRICE8_8 A1 A2 A3 A4 a5 a6 a7 a8 break; case __LINE__: { - TRICE8_1(Id(0), "tst:TRICE8_1 %d\n", -1); - TRICE8_2(Id(0), "tst:TRICE8_2 %d %d\n", -1, -2); - TRICE8_3(Id(0), "tst:TRICE8_3 %d %d %d\n", -1, -2, -3); - TRICE8_4(Id(0), "tst:TRICE8_4 %d %d %d %d\n", -1, -2, -3, -4); - TRICE8_5(Id(0), "tst:TRICE8_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5); - TRICE8_6(Id(0), "tst:TRICE8_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6); - TRICE8_7(Id(0), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7); - TRICE8_8(Id(0), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8); + TRICE8_1(Id(14683), "tst:TRICE8_1 %d\n", -1); + TRICE8_2(Id(14684), "tst:TRICE8_2 %d %d\n", -1, -2); + TRICE8_3(Id(14685), "tst:TRICE8_3 %d %d %d\n", -1, -2, -3); + TRICE8_4(Id(14686), "tst:TRICE8_4 %d %d %d %d\n", -1, -2, -3, -4); + TRICE8_5(Id(14687), "tst:TRICE8_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5); + TRICE8_6(Id(14688), "tst:TRICE8_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6); + TRICE8_7(Id(14689), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7); + TRICE8_8(Id(14690), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8); } - break; case __LINE__: TRICE8_1(ID(0), "tst:TRICE8_1 %d\n", 1); - break; case __LINE__: TRICE8_2(ID(0), "tst:TRICE8_2 %d %d\n", 1, 2); - break; case __LINE__: TRICE8_3(ID(0), "tst:TRICE8_3 %d %d %d\n", 1, 2, 3); - break; case __LINE__: TRICE8_4(ID(0), "tst:TRICE8_4 %d %d %d %d\n", 1, 2, 3, 4); - break; case __LINE__: TRICE8_5(ID(0), "tst:TRICE8_5 %d %d %d %d %d\n", 1, 2, 3, 4, 5); - break; case __LINE__: TRICE8_6(ID(0), "tst:TRICE8_6 %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6); - break; case __LINE__: TRICE8_7(ID(0), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7); - break; case __LINE__: TRICE8_8(ID(0), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7, 8); - break; case __LINE__: TRICE8_1(ID(0), "tst:TRICE8_1 %u\n", 201); - break; case __LINE__: TRICE8_2(ID(0), "tst:TRICE8_2 %u %u\n", 201, 202); - break; case __LINE__: TRICE8_3(ID(0), "tst:TRICE8_3 %u %u %u\n", 201, 202, 203); - break; case __LINE__: TRICE8_4(ID(0), "tst:TRICE8_4 %u %u %u %u\n", 201, 202, 203, 204); - break; case __LINE__: TRICE8_5(ID(0), "tst:TRICE8_5 %u %u %u %u %u\n", 201, 202, 203, 204, 205); - break; case __LINE__: TRICE8_6(ID(0), "tst:TRICE8_6 %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206); - break; case __LINE__: TRICE8_7(ID(0), "tst:TRICE8_7 %u %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206, 207); - break; case __LINE__: TRICE8_8(ID(0), "tst:TRICE8_8 %u %u %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206, 207, 208); - break; case __LINE__: TRICE8_8(ID(0), "tst:TRICE8_1 %%d=%d, %%u=%u, 0x%%x=0x%x, 0x%%2x=0x%2x, 0x%%02x=0x%02x, 0x%%3x=0x%3x, 0x%%03x=0x%03x, %%b=%b\n", 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81); - - break; case __LINE__: TRICE (ID(0), "sig:Legacy TRICE16-64\n" ); + break; case __LINE__: TRICE8_1(ID(14691), "tst:TRICE8_1 %d\n", 1); + break; case __LINE__: TRICE8_2(ID(14692), "tst:TRICE8_2 %d %d\n", 1, 2); + break; case __LINE__: TRICE8_3(ID(14693), "tst:TRICE8_3 %d %d %d\n", 1, 2, 3); + break; case __LINE__: TRICE8_4(ID(14694), "tst:TRICE8_4 %d %d %d %d\n", 1, 2, 3, 4); + break; case __LINE__: TRICE8_5(ID(14695), "tst:TRICE8_5 %d %d %d %d %d\n", 1, 2, 3, 4, 5); + break; case __LINE__: TRICE8_6(ID(14696), "tst:TRICE8_6 %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6); + break; case __LINE__: TRICE8_7(ID(14697), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7); + break; case __LINE__: TRICE8_8(ID(14698), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7, 8); + break; case __LINE__: TRICE8_1(ID(14699), "tst:TRICE8_1 %u\n", 201); + break; case __LINE__: TRICE8_2(ID(14700), "tst:TRICE8_2 %u %u\n", 201, 202); + break; case __LINE__: TRICE8_3(ID(14701), "tst:TRICE8_3 %u %u %u\n", 201, 202, 203); + break; case __LINE__: TRICE8_4(ID(14702), "tst:TRICE8_4 %u %u %u %u\n", 201, 202, 203, 204); + break; case __LINE__: TRICE8_5(ID(14703), "tst:TRICE8_5 %u %u %u %u %u\n", 201, 202, 203, 204, 205); + break; case __LINE__: TRICE8_6(ID(14704), "tst:TRICE8_6 %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206); + break; case __LINE__: TRICE8_7(ID(14705), "tst:TRICE8_7 %u %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206, 207); + break; case __LINE__: TRICE8_8(ID(14706), "tst:TRICE8_8 %u %u %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206, 207, 208); + break; case __LINE__: TRICE8_8(ID(14707), "tst:TRICE8_1 %%d=%d, %%u=%u, 0x%%x=0x%x, 0x%%2x=0x%2x, 0x%%02x=0x%02x, 0x%%3x=0x%3x, 0x%%03x=0x%03x, %%b=%b\n", 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81); + + break; case __LINE__: TRICE (ID(14708), "sig:Legacy TRICE16-64\n" ); break; case __LINE__: { - TRICE16_1(Id(0), "tst:TRICE16_1 %d\n", -111); - TRICE16_2(Id(0), "tst:TRICE16_2 %d %d\n", -111, -222); - TRICE16_3(Id(0), "tst:TRICE16_3 %d %d %d\n", -111, -222, -333); - TRICE16_4(Id(0), "tst:TRICE16_4 %d %d %d %d\n", -111, -222, -333, -444); + TRICE16_1(Id(14709), "tst:TRICE16_1 %d\n", -111); + TRICE16_2(Id(14710), "tst:TRICE16_2 %d %d\n", -111, -222); + TRICE16_3(Id(14711), "tst:TRICE16_3 %d %d %d\n", -111, -222, -333); + TRICE16_4(Id(14712), "tst:TRICE16_4 %d %d %d %d\n", -111, -222, -333, -444); } break; case __LINE__: { - TRICE32_1(Id(0), "tst:TRICE32_1 %08x\n", 0x0123cafe); - TRICE32_1(Id(0), "tst:TRICE32_1 %d\n", -111); - TRICE32_2(Id(0), "tst:TRICE32_2 %x %x\n", -111, -222); - TRICE32_2(Id(0), "tst:TRICE32_2 %d %d\n", -111, -222); - TRICE32_3(Id(0), "tst:TRICE32_3 %x %x %x\n", -111, -222, -333); - TRICE32_3(Id(0), "tst:TRICE32_3 %d %d %d\n", -111, -222, -333); - TRICE32_4(Id(0), "tst:TRICE32_4 %x %x %x %x\n", -111, -222, -333, -444); - TRICE32_4(Id(0), "tst:TRICE32_4 %d %d %d %d\n", -111, -222, -333, -444); + TRICE32_1(Id(14713), "tst:TRICE32_1 %08x\n", 0x0123cafe); + TRICE32_1(Id(14714), "tst:TRICE32_1 %d\n", -111); + TRICE32_2(Id(14715), "tst:TRICE32_2 %x %x\n", -111, -222); + TRICE32_2(Id(14716), "tst:TRICE32_2 %d %d\n", -111, -222); + TRICE32_3(Id(14717), "tst:TRICE32_3 %x %x %x\n", -111, -222, -333); + TRICE32_3(Id(14718), "tst:TRICE32_3 %d %d %d\n", -111, -222, -333); + TRICE32_4(Id(14719), "tst:TRICE32_4 %x %x %x %x\n", -111, -222, -333, -444); + TRICE32_4(Id(14720), "tst:TRICE32_4 %d %d %d %d\n", -111, -222, -333, -444); } break; case __LINE__: { - TRICE64_1(Id(0), "tst:TRICE64_1 %d\n", -111); - TRICE64_2(Id(0), "tst:TRICE64_2 %d %d\n", -111, -222); - TRICE16_1(Id(0), "tst:TRICE16_1 %u\n", 60001); - TRICE16_2(Id(0), "tst:TRICE16_2 %u %u\n", 60001, 60002); - TRICE16_3(Id(0), "tst:TRICE16_3 %u %u %u\n", 60001, 60002, 60003); - TRICE16_4(Id(0), "tst:TRICE16_4 %u %u %u %u\n", 60001, 60002, 60003, 60004); + TRICE64_1(Id(14721), "tst:TRICE64_1 %d\n", -111); + TRICE64_2(Id(14722), "tst:TRICE64_2 %d %d\n", -111, -222); + TRICE16_1(Id(14723), "tst:TRICE16_1 %u\n", 60001); + TRICE16_2(Id(14724), "tst:TRICE16_2 %u %u\n", 60001, 60002); + TRICE16_3(Id(14725), "tst:TRICE16_3 %u %u %u\n", 60001, 60002, 60003); + TRICE16_4(Id(14726), "tst:TRICE16_4 %u %u %u %u\n", 60001, 60002, 60003, 60004); } break; case __LINE__: { - TRICE32_1(Id(0), "tst:TRICE32_1 %u\n", 4000000001); - TRICE32_2(Id(0), "tst:TRICE32_2 %u %u\n", 4000000001, 4000000002); - TRICE32_3(Id(0), "tst:TRICE32_3 %u %u %u\n", 4000000001, 4000000002, 4000000003); - TRICE32_4(Id(0), "tst:TRICE32_4 %u %u %u %u\n", 4000000001, 4000000002, 4000000003, 4000000004); + TRICE32_1(Id(14727), "tst:TRICE32_1 %u\n", 4000000001); + TRICE32_2(Id(14728), "tst:TRICE32_2 %u %u\n", 4000000001, 4000000002); + TRICE32_3(Id(14729), "tst:TRICE32_3 %u %u %u\n", 4000000001, 4000000002, 4000000003); + TRICE32_4(Id(14730), "tst:TRICE32_4 %u %u %u %u\n", 4000000001, 4000000002, 4000000003, 4000000004); } break; case __LINE__: { - TRICE64_1(Id(0), "tst:TRICE64_1 %x\n", -1); - TRICE64_2(Id(0), "tst:TRICE64_2 %x %x\n", -1, -2); - TRICE64_1(Id(0), "tst:TRICE64_1 %u\n", -1); - TRICE64_2(Id(0), "tst:TRICE64_2 %u %u\n", -1, -2); + TRICE64_1(Id(14731), "tst:TRICE64_1 %x\n", -1); + TRICE64_2(Id(14732), "tst:TRICE64_2 %x %x\n", -1, -2); + TRICE64_1(Id(14733), "tst:TRICE64_1 %u\n", -1); + TRICE64_2(Id(14734), "tst:TRICE64_2 %u %u\n", -1, -2); } #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("sig:colored single letters and several TRICE macros in one line\n" ); + break; case __LINE__: trice(iD(14735), "sig:colored single letters and several TRICE macros in one line\n" ); break; case __LINE__: { - trice("e:A"); - trice("w:B"); - trice("a:c"); - trice("wr:d"); - trice("rd:e\n"); - trice("diag:f"); - trice("d:G"); - trice("t:H"); - trice("time:i"); - trice("message:J"); - trice("dbg:k\n"); - trice("1"); - trice("2"); - trice("3"); - trice("4"); - trice("e:7"); - trice("m:12"); - trice("m:123\n"); - trice("e:A"); trice("w:B"); trice("a:c"); - trice("wr:d"); trice("rd:e\n"); trice("diag:f"); + trice(iD(14736), "e:A"); + trice(iD(14737), "w:B"); + trice(iD(14738), "a:c"); + trice(iD(14739), "wr:d"); + trice(iD(14740), "rd:e\n"); + trice(iD(14741), "diag:f"); + trice(iD(14742), "d:G"); + trice(iD(14743), "t:H"); + trice(iD(14744), "time:i"); + trice(iD(14745), "message:J"); + trice(iD(14746), "dbg:k\n"); + trice(iD(14747), "1"); + trice(iD(14748), "2"); + trice(iD(14749), "3"); + trice(iD(14750), "4"); + trice(iD(14751), "e:7"); + trice(iD(14752), "m:12"); + trice(iD(14753), "m:123\n"); + trice(iD(14754), "e:A"); trice(iD(14755), "w:B"); trice(iD(14756), "a:c"); + trice(iD(14757), "wr:d"); trice(iD(14758), "rd:e\n"); trice(iD(14759), "diag:f"); } #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("sig:TRICE8 with variable param count 1 to 12\n" ); + break; case __LINE__: trice(iD(14760), "sig:TRICE8 with variable param count 1 to 12\n" ); break; case __LINE__: { - TRICE8(Id(0), "tst:TRICE8 %d\n", -1 ); - TRICE8(Id(0), "tst:TRICE8 %d %d\n", -1, -2 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d\n", -1, -2, -3 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE8(Id(0), "tst:TRICE8 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); + TRICE8(Id(14761), "tst:TRICE8 %d\n", -1 ); + TRICE8(Id(14762), "tst:TRICE8 %d %d\n", -1, -2 ); + TRICE8(Id(14763), "tst:TRICE8 %d %d %d\n", -1, -2, -3 ); + TRICE8(Id(14764), "tst:TRICE8 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE8(Id(14765), "tst:TRICE8 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE8(Id(14766), "tst:TRICE8 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE8(Id(14767), "tst:TRICE8 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE8(Id(14768), "tst:TRICE8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE8(Id(14769), "tst:TRICE8 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE8(Id(14770), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE8(Id(14771), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE8(Id(14772), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE8(Id(14773), "tst:TRICE8 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); } break; case __LINE__: { - TRICE8_1 (Id(0), "tst:TRICE8_1 %d\n", -1 ); - TRICE8_2 (Id(0), "tst:TRICE8_2 %d %d\n", -1, -2 ); - TRICE8_3 (Id(0), "tst:TRICE8_3 %d %d %d\n", -1, -2, -3 ); - TRICE8_4 (Id(0), "tst:TRICE8_4 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE8_5 (Id(0), "tst:TRICE8_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE8_6 (Id(0), "tst:TRICE8_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE8_7 (Id(0), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE8_8 (Id(0), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE8_9 (Id(0), "tst:TRICE8_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE8_10(Id(0), "tst:TRICE8_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE8_11(Id(0), "tst:TRICE8_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE8_12(Id(0), "tst:TRICE8_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE8 (Id(0), "tst:TRICE8 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); - TRICE8_9 (Id(0), "tst:TRICE8_9 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); + TRICE8_1 (Id(14774), "tst:TRICE8_1 %d\n", -1 ); + TRICE8_2 (Id(14775), "tst:TRICE8_2 %d %d\n", -1, -2 ); + TRICE8_3 (Id(14776), "tst:TRICE8_3 %d %d %d\n", -1, -2, -3 ); + TRICE8_4 (Id(14777), "tst:TRICE8_4 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE8_5 (Id(14778), "tst:TRICE8_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE8_6 (Id(14779), "tst:TRICE8_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE8_7 (Id(14780), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE8_8 (Id(14781), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE8_9 (Id(14782), "tst:TRICE8_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE8_10(Id(14783), "tst:TRICE8_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE8_11(Id(14784), "tst:TRICE8_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE8_12(Id(14785), "tst:TRICE8_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE8 (Id(14786), "tst:TRICE8 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); + TRICE8_9 (Id(14787), "tst:TRICE8_9 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); } - break; case __LINE__: trice("sig:TRICE16 with variable param count 1 to 12\n" ); + break; case __LINE__: trice(iD(14788), "sig:TRICE16 with variable param count 1 to 12\n" ); break; case __LINE__: { - TRICE16(Id(0), "tst:TRICE16 %d\n", -1 ); - TRICE16(Id(0), "tst:TRICE16 %d %d\n", -1, -2 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d\n", -1, -2, -3 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE16(Id(0), "tst:TRICE16 %t %b %x %X %d %u %o %O %p\n", 3, 3, 3, 3, 3, 3, 3, 3, 3 ); + TRICE16(Id(14789), "tst:TRICE16 %d\n", -1 ); + TRICE16(Id(14790), "tst:TRICE16 %d %d\n", -1, -2 ); + TRICE16(Id(14791), "tst:TRICE16 %d %d %d\n", -1, -2, -3 ); + TRICE16(Id(14792), "tst:TRICE16 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE16(Id(14793), "tst:TRICE16 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE16(Id(14794), "tst:TRICE16 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE16(Id(14795), "tst:TRICE16 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE16(Id(14796), "tst:TRICE16 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE16(Id(14797), "tst:TRICE16 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE16(Id(14798), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE16(Id(14799), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE16(Id(14800), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE16(Id(14801), "tst:TRICE16 %t %b %x %X %d %u %o %O %p\n", 3, 3, 3, 3, 3, 3, 3, 3, 3 ); } break; case __LINE__: { - TRICE16_1 (ID(0), "tst:TRICE16_1 %d\n", -1 ); - TRICE16_2 (ID(0), "tst:TRICE16_2 %d %d\n", -1, -2 ); - TRICE16_3 (ID(0), "tst:TRICE16_3 %d %d %d\n", -1, -2, -3 ); - TRICE16_4 (ID(0), "tst:TRICE16_4 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE16_5 (ID(0), "tst:TRICE16_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE16_6 (ID(0), "tst:TRICE16_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE16_7 (ID(0), "tst:TRICE16_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE16_8 (ID(0), "tst:TRICE16_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE16_9 (ID(0), "tst:TRICE16_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE16_10(ID(0), "tst:TRICE16_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE16_11(ID(0), "tst:TRICE16_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE16_12(ID(0), "tst:TRICE16_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE16_9 (ID(0), "tst:TRICE16 %t %b %x %X %d %u %o %O %p\n", 3, 3, 3, 3, 3, 3, 3, 3, 3 ); + TRICE16_1 (ID(14802), "tst:TRICE16_1 %d\n", -1 ); + TRICE16_2 (ID(14803), "tst:TRICE16_2 %d %d\n", -1, -2 ); + TRICE16_3 (ID(14804), "tst:TRICE16_3 %d %d %d\n", -1, -2, -3 ); + TRICE16_4 (ID(14805), "tst:TRICE16_4 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE16_5 (ID(14806), "tst:TRICE16_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE16_6 (ID(14807), "tst:TRICE16_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE16_7 (ID(14808), "tst:TRICE16_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE16_8 (ID(14809), "tst:TRICE16_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE16_9 (ID(14810), "tst:TRICE16_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE16_10(ID(14811), "tst:TRICE16_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE16_11(ID(14812), "tst:TRICE16_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE16_12(ID(14813), "tst:TRICE16_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE16_9 (ID(14814), "tst:TRICE16 %t %b %x %X %d %u %o %O %p\n", 3, 3, 3, 3, 3, 3, 3, 3, 3 ); } - break; case __LINE__: trice("sig:TRICE32 with variable param count 1 to 12\n" ); + break; case __LINE__: trice(iD(14815), "sig:TRICE32 with variable param count 1 to 12\n" ); break; case __LINE__: { - TRICE32(Id(0), "tst:TRICE32 %d\n", -1 ); - TRICE32(Id(0), "tst:TRICE32 %d %d\n", -1, -2 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d\n", -1, -2, -3 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE32(Id(0), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); + TRICE32(Id(14816), "tst:TRICE32 %d\n", -1 ); + TRICE32(Id(14817), "tst:TRICE32 %d %d\n", -1, -2 ); + TRICE32(Id(14818), "tst:TRICE32 %d %d %d\n", -1, -2, -3 ); + TRICE32(Id(14819), "tst:TRICE32 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE32(Id(14820), "tst:TRICE32 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE32(Id(14821), "tst:TRICE32 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE32(Id(14822), "tst:TRICE32 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE32(Id(14823), "tst:TRICE32 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE32(Id(14824), "tst:TRICE32 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE32(Id(14825), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE32(Id(14826), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE32(Id(14827), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE32(Id(14828), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); } break; case __LINE__: { - TRICE32_1 (Id(0), "tst:TRICE32_1 %d\n", -1 ); - TRICE32_2 (Id(0), "tst:TRICE32_2 %d %d\n", -1, -2 ); - TRICE32_3 (Id(0), "tst:TRICE32_3 %d %d %d\n", -1, -2, -3 ); - TRICE32_4 (Id(0), "tst:TRICE32_4 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE32_5 (Id(0), "tst:TRICE32_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE32_6 (Id(0), "tst:TRICE32_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE32_7 (Id(0), "tst:TRICE32_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE32_8 (Id(0), "tst:TRICE32_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE32_9 (Id(0), "tst:TRICE32_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE32_10(Id(0), "tst:TRICE32_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE32_11(Id(0), "tst:TRICE32_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE32_12(Id(0), "tst:TRICE32_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE32 (Id(0), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); - TRICE32_12(Id(0), "tst:TRICE32_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); + TRICE32_1 (Id(14829), "tst:TRICE32_1 %d\n", -1 ); + TRICE32_2 (Id(14830), "tst:TRICE32_2 %d %d\n", -1, -2 ); + TRICE32_3 (Id(14831), "tst:TRICE32_3 %d %d %d\n", -1, -2, -3 ); + TRICE32_4 (Id(14832), "tst:TRICE32_4 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE32_5 (Id(14833), "tst:TRICE32_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE32_6 (Id(14834), "tst:TRICE32_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE32_7 (Id(14835), "tst:TRICE32_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE32_8 (Id(14836), "tst:TRICE32_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE32_9 (Id(14837), "tst:TRICE32_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE32_10(Id(14838), "tst:TRICE32_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE32_11(Id(14839), "tst:TRICE32_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE32_12(Id(14840), "tst:TRICE32_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE32 (Id(14841), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); + TRICE32_12(Id(14842), "tst:TRICE32_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); } - break; case __LINE__: trice("sig:TRICE64 with variable param count 1 to 12\n" ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d\n", -1 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d\n", -1, -2 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d\n", -1, -2, -3 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d\n", -1, -2, -3, -4 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aDouble(3.14159), aDouble(3.14159), aDouble(3.14159)); - break; case __LINE__: TRICE64_1 (ID(0), "tst:TRICE64_1 %d\n", -1 ); - break; case __LINE__: TRICE64_2 (ID(0), "tst:TRICE64_2 %d %d\n", -1, -2 ); - break; case __LINE__: TRICE64_3 (ID(0), "tst:TRICE64_3 %d %d %d\n", -1, -2, -3 ); - break; case __LINE__: TRICE64_4 (ID(0), "tst:TRICE64_4 %d %d %d %d\n", -1, -2, -3, -4 ); - break; case __LINE__: TRICE64_5 (ID(0), "tst:TRICE64_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - break; case __LINE__: TRICE64_6 (ID(0), "tst:TRICE64_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - break; case __LINE__: TRICE64_7 (ID(0), "tst:TRICE64_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - break; case __LINE__: TRICE64_8 (ID(0), "tst:TRICE64_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - break; case __LINE__: TRICE64_9 (ID(0), "tst:TRICE64_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - break; case __LINE__: TRICE64_10(ID(0), "tst:TRICE64_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - break; case __LINE__: TRICE64_11(ID(0), "tst:TRICE64_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - break; case __LINE__: TRICE64_12(ID(0), "tst:TRICE64_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - break; case __LINE__: TRICE64_12(ID(0), "tst:TRICE64_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aDouble(3.14159), aDouble(3.14159), aDouble(3.14159)); + break; case __LINE__: trice(iD(14843), "sig:TRICE64 with variable param count 1 to 12\n" ); + break; case __LINE__: TRICE64(ID(14844), "tst:TRICE64 %d\n", -1 ); + break; case __LINE__: TRICE64(ID(14845), "tst:TRICE64 %d %d\n", -1, -2 ); + break; case __LINE__: TRICE64(ID(14846), "tst:TRICE64 %d %d %d\n", -1, -2, -3 ); + break; case __LINE__: TRICE64(ID(14847), "tst:TRICE64 %d %d %d %d\n", -1, -2, -3, -4 ); + break; case __LINE__: TRICE64(ID(14848), "tst:TRICE64 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + break; case __LINE__: TRICE64(ID(14849), "tst:TRICE64 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + break; case __LINE__: TRICE64(ID(14850), "tst:TRICE64 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + break; case __LINE__: TRICE64(ID(14851), "tst:TRICE64 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + break; case __LINE__: TRICE64(ID(14852), "tst:TRICE64 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + break; case __LINE__: TRICE64(ID(14853), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + break; case __LINE__: TRICE64(ID(14854), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + break; case __LINE__: TRICE64(ID(14855), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + break; case __LINE__: TRICE64(ID(14856), "tst:TRICE64 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aDouble(3.14159), aDouble(3.14159), aDouble(3.14159)); + break; case __LINE__: TRICE64_1 (ID(14857), "tst:TRICE64_1 %d\n", -1 ); + break; case __LINE__: TRICE64_2 (ID(14858), "tst:TRICE64_2 %d %d\n", -1, -2 ); + break; case __LINE__: TRICE64_3 (ID(14859), "tst:TRICE64_3 %d %d %d\n", -1, -2, -3 ); + break; case __LINE__: TRICE64_4 (ID(14860), "tst:TRICE64_4 %d %d %d %d\n", -1, -2, -3, -4 ); + break; case __LINE__: TRICE64_5 (ID(14861), "tst:TRICE64_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + break; case __LINE__: TRICE64_6 (ID(14862), "tst:TRICE64_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + break; case __LINE__: TRICE64_7 (ID(14863), "tst:TRICE64_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + break; case __LINE__: TRICE64_8 (ID(14864), "tst:TRICE64_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + break; case __LINE__: TRICE64_9 (ID(14865), "tst:TRICE64_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + break; case __LINE__: TRICE64_10(ID(14866), "tst:TRICE64_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + break; case __LINE__: TRICE64_11(ID(14867), "tst:TRICE64_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + break; case __LINE__: TRICE64_12(ID(14868), "tst:TRICE64_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + break; case __LINE__: TRICE64_12(ID(14869), "tst:TRICE64_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aDouble(3.14159), aDouble(3.14159), aDouble(3.14159)); #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("att:positive and negative float in format variants\n"); + break; case __LINE__: trice(iD(14870), "att:positive and negative float in format variants\n"); break; case __LINE__: { - trice("rd:TRICE float %f (%%f)\n", aFloat(x) ); - trice("rd:TRICE float %9f (%%9f)\n", aFloat(x) ); - trice("rd:TRICE float %.9f (%%.9f)\n", aFloat(x) ); - trice("rd:TRICE float %9.f (%%9.f)\n", aFloat(x) ); - trice("rd:TRICE float %9.6f (%%9.6f)\n", aFloat(x) ); - trice("rd:TRICE float %f (%%f)\n", aFloat(-x) ); - trice("rd:TRICE float %9f (%%9f)\n", aFloat(-x) ); - trice("rd:TRICE float %.9f (%%.9f)\n", aFloat(-x) ); - trice("rd:TRICE float %9.f (%%9.f)\n", aFloat(-x) ); - trice("rd:TRICE float %9.6f (%%9.6f)\n", aFloat(-x) ); - trice("rd:TRICE float %+f (%%f)\n", aFloat(x) ); - trice("rd:TRICE float %+9f (%%9f)\n", aFloat(x) ); - trice("rd:TRICE float %+.9f (%%.9f)\n", aFloat(x) ); - trice("rd:TRICE float %+9.f (%%9.f)\n", aFloat(x) ); - trice("rd:TRICE float %+9.6f (%%9.6f)\n", aFloat(x) ); - trice("rd:TRICE float %+f (%%f)\n", aFloat(-x) ); - trice("rd:TRICE float %+9f (%%9f)\n", aFloat(-x) ); - trice("rd:TRICE float %+.9f (%%.9f)\n", aFloat(-x) ); - trice("rd:TRICE float %+9.f (%%9.f)\n", aFloat(-x) ); - trice("rd:TRICE float %+9.6f (%%9.6f)\n", aFloat(-x) ); - trice("rd:TRICE float %-f (%%f)\n", aFloat(x) ); - trice("rd:TRICE float %-9f (%%9f)\n", aFloat(x) ); - trice("rd:TRICE float %-.9f (%%.9f)\n", aFloat(x) ); - trice("rd:TRICE float %-9.f (%%9.f)\n", aFloat(x) ); - trice("rd:TRICE float %-9.6f (%%9.6f)\n", aFloat(x) ); - trice("rd:TRICE float %-f (%%f)\n", aFloat(-x) ); - trice("rd:TRICE float %-9f (%%9f)\n", aFloat(-x) ); - trice("rd:TRICE float %-.9f (%%.9f)\n", aFloat(-x) ); - trice("rd:TRICE float %-9.f (%%9.f)\n", aFloat(-x) ); - trice("rd:TRICE float %-9.6f (%%9.6f)\n", aFloat(-x) ); + trice(iD(14871), "rd:TRICE float %f (%%f)\n", aFloat(x) ); + trice(iD(14872), "rd:TRICE float %9f (%%9f)\n", aFloat(x) ); + trice(iD(14873), "rd:TRICE float %.9f (%%.9f)\n", aFloat(x) ); + trice(iD(14874), "rd:TRICE float %9.f (%%9.f)\n", aFloat(x) ); + trice(iD(14875), "rd:TRICE float %9.6f (%%9.6f)\n", aFloat(x) ); + trice(iD(14876), "rd:TRICE float %f (%%f)\n", aFloat(-x) ); + trice(iD(14877), "rd:TRICE float %9f (%%9f)\n", aFloat(-x) ); + trice(iD(14878), "rd:TRICE float %.9f (%%.9f)\n", aFloat(-x) ); + trice(iD(14879), "rd:TRICE float %9.f (%%9.f)\n", aFloat(-x) ); + trice(iD(14880), "rd:TRICE float %9.6f (%%9.6f)\n", aFloat(-x) ); + trice(iD(14881), "rd:TRICE float %+f (%%f)\n", aFloat(x) ); + trice(iD(14882), "rd:TRICE float %+9f (%%9f)\n", aFloat(x) ); + trice(iD(14883), "rd:TRICE float %+.9f (%%.9f)\n", aFloat(x) ); + trice(iD(14884), "rd:TRICE float %+9.f (%%9.f)\n", aFloat(x) ); + trice(iD(14885), "rd:TRICE float %+9.6f (%%9.6f)\n", aFloat(x) ); + trice(iD(14886), "rd:TRICE float %+f (%%f)\n", aFloat(-x) ); + trice(iD(14887), "rd:TRICE float %+9f (%%9f)\n", aFloat(-x) ); + trice(iD(14888), "rd:TRICE float %+.9f (%%.9f)\n", aFloat(-x) ); + trice(iD(14889), "rd:TRICE float %+9.f (%%9.f)\n", aFloat(-x) ); + trice(iD(14890), "rd:TRICE float %+9.6f (%%9.6f)\n", aFloat(-x) ); + trice(iD(14891), "rd:TRICE float %-f (%%f)\n", aFloat(x) ); + trice(iD(14892), "rd:TRICE float %-9f (%%9f)\n", aFloat(x) ); + trice(iD(14893), "rd:TRICE float %-.9f (%%.9f)\n", aFloat(x) ); + trice(iD(14894), "rd:TRICE float %-9.f (%%9.f)\n", aFloat(x) ); + trice(iD(14895), "rd:TRICE float %-9.6f (%%9.6f)\n", aFloat(x) ); + trice(iD(14896), "rd:TRICE float %-f (%%f)\n", aFloat(-x) ); + trice(iD(14897), "rd:TRICE float %-9f (%%9f)\n", aFloat(-x) ); + trice(iD(14898), "rd:TRICE float %-.9f (%%.9f)\n", aFloat(-x) ); + trice(iD(14899), "rd:TRICE float %-9.f (%%9.f)\n", aFloat(-x) ); + trice(iD(14900), "rd:TRICE float %-9.6f (%%9.6f)\n", aFloat(-x) ); } #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice("att:positive float & double in variants\n"); - break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %e (%%e)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %f (%%f)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %g (%%g)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %E (%%E)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %F (%%F)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %G (%%G)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %e (%%e)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %f (%%f)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %g (%%g)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %E (%%E)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %F (%%F)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %G (%%G)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(0), "rd:TRICE float %e (%%e)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(0), "rd:TRICE float %f (%%f)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(0), "rd:TRICE float %g (%%g)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(0), "rd:TRICE float %E (%%E)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(0), "rd:TRICE float %F (%%F)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(0), "rd:TRICE float %G (%%G)\n", aFloat(x) ); - break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %e (%%e), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %f (%%f), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %g (%%g), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %E (%%E), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %F (%%F), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %G (%%G), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %e (%%e), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %f (%%f), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %g (%%g), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %E (%%E), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %F (%%F), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %G (%%G), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: trice("att:negative float & double\n" ); - break; case __LINE__: trice("rd:TRICE float %e (%%e)\n", aFloat(-x) ); - break; case __LINE__: trice("rd:TRICE float %f (%%f)\n", aFloat(-x) ); - break; case __LINE__: trice("rd:TRICE float %g (%%g)\n", aFloat(-x) ); - break; case __LINE__: trice("rd:TRICE float %E (%%E)\n", aFloat(-x) ); - break; case __LINE__: trice("rd:TRICE float %F (%%F)\n", aFloat(-x) ); - break; case __LINE__: trice("rd:TRICE float %G (%%G)\n", aFloat(-x) ); - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %e (%%e), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %f (%%f), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %g (%%g), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %E (%%E), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %F (%%F), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %G (%%G), aDouble(y)\n", aDouble(-y) ); - - break; case __LINE__: TRICE (ID(0), "att:formatted float\n" ); + break; case __LINE__: trice(iD(14901), "att:positive float & double in variants\n"); + break; case __LINE__: TRICE32_1(ID(14902), "rd:TRICE32_1 float %e (%%e)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(14903), "rd:TRICE32_1 float %f (%%f)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(14904), "rd:TRICE32_1 float %g (%%g)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(14905), "rd:TRICE32_1 float %E (%%E)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(14906), "rd:TRICE32_1 float %F (%%F)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(14907), "rd:TRICE32_1 float %G (%%G)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(14908), "rd:TRICE32 float %e (%%e)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(14909), "rd:TRICE32 float %f (%%f)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(14910), "rd:TRICE32 float %g (%%g)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(14911), "rd:TRICE32 float %E (%%E)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(14912), "rd:TRICE32 float %F (%%F)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(14913), "rd:TRICE32 float %G (%%G)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(14914), "rd:TRICE float %e (%%e)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(14915), "rd:TRICE float %f (%%f)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(14916), "rd:TRICE float %g (%%g)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(14917), "rd:TRICE float %E (%%E)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(14918), "rd:TRICE float %F (%%F)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(14919), "rd:TRICE float %G (%%G)\n", aFloat(x) ); + break; case __LINE__: TRICE64 (ID(14920), "rd:TRICE64 double %e (%%e), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(14921), "rd:TRICE64 double %f (%%f), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(14922), "rd:TRICE64 double %g (%%g), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(14923), "rd:TRICE64 double %E (%%E), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(14924), "rd:TRICE64 double %F (%%F), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(14925), "rd:TRICE64 double %G (%%G), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(14926), "rd:TRICE64_1 double %e (%%e), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(14927), "rd:TRICE64_1 double %f (%%f), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(14928), "rd:TRICE64_1 double %g (%%g), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(14929), "rd:TRICE64_1 double %E (%%E), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(14930), "rd:TRICE64_1 double %F (%%F), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(14931), "rd:TRICE64_1 double %G (%%G), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: trice(iD(14932), "att:negative float & double\n" ); + break; case __LINE__: trice(iD(14933), "rd:TRICE float %e (%%e)\n", aFloat(-x) ); + break; case __LINE__: trice(iD(14934), "rd:TRICE float %f (%%f)\n", aFloat(-x) ); + break; case __LINE__: trice(iD(14935), "rd:TRICE float %g (%%g)\n", aFloat(-x) ); + break; case __LINE__: trice(iD(14936), "rd:TRICE float %E (%%E)\n", aFloat(-x) ); + break; case __LINE__: trice(iD(14937), "rd:TRICE float %F (%%F)\n", aFloat(-x) ); + break; case __LINE__: trice(iD(14938), "rd:TRICE float %G (%%G)\n", aFloat(-x) ); + break; case __LINE__: TRICE64(ID(14939), "rd:TRICE64 double %e (%%e), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(14940), "rd:TRICE64 double %f (%%f), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(14941), "rd:TRICE64 double %g (%%g), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(14942), "rd:TRICE64 double %E (%%E), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(14943), "rd:TRICE64 double %F (%%F), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(14944), "rd:TRICE64 double %G (%%G), aDouble(y)\n", aDouble(-y) ); + + break; case __LINE__: TRICE (ID(15511), "att:formatted float\n" ); break; case __LINE__: { - TRICE32(Id(0), "rd:TRICE32 float %12.6e (%%12.6e)\n", aFloat(x) ); - TRICE32(Id(0), "rd:TRICE32 float %12.6f (%%12.6f)\n", aFloat(x) ); - TRICE32(Id(0), "rd:TRICE32 float %12.6g (%%12.6g)\n", aFloat(x) ); - TRICE32(Id(0), "rd:TRICE32 float %12.6E (%%12.6E)\n", aFloat(x) ); - TRICE32(Id(0), "rd:TRICE32 float %12.6F (%%12.6F)\n", aFloat(x) ); - TRICE32(Id(0), "rd:TRICE32 float %12.6G (%%12.6G)\n", aFloat(x) ); + TRICE32(Id(14946), "rd:TRICE32 float %12.6e (%%12.6e)\n", aFloat(x) ); + TRICE32(Id(14947), "rd:TRICE32 float %12.6f (%%12.6f)\n", aFloat(x) ); + TRICE32(Id(14948), "rd:TRICE32 float %12.6g (%%12.6g)\n", aFloat(x) ); + TRICE32(Id(14949), "rd:TRICE32 float %12.6E (%%12.6E)\n", aFloat(x) ); + TRICE32(Id(14950), "rd:TRICE32 float %12.6F (%%12.6F)\n", aFloat(x) ); + TRICE32(Id(14951), "rd:TRICE32 float %12.6G (%%12.6G)\n", aFloat(x) ); } - break; case __LINE__: TRICE (ID(0), "att:formatted double\n" ); + break; case __LINE__: TRICE (ID(16161), "att:formatted double\n" ); break; case __LINE__: { - TRICE64(Id(0), "rd:TRICE64 double %12.6e (%%12.6e), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(0), "rd:TRICE64 double %12.6f (%%12.6f), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(0), "rd:TRICE64 double %12.6g (%%12.6g), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(0), "rd:TRICE64 double %12.6E (%%12.6E), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(0), "rd:TRICE64 double %12.6F (%%12.6F), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(0), "rd:TRICE64 double %12.6G (%%12.6G), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(14952), "rd:TRICE64 double %12.6e (%%12.6e), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(14953), "rd:TRICE64 double %12.6f (%%12.6f), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(14954), "rd:TRICE64 double %12.6g (%%12.6g), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(14955), "rd:TRICE64 double %12.6E (%%12.6E), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(14956), "rd:TRICE64 double %12.6F (%%12.6F), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(14957), "rd:TRICE64 double %12.6G (%%12.6G), aDouble(y)\n", aDouble(y) ); } - break; case __LINE__: TRICE (ID(0), "att:Various single arguments\n" ); + break; case __LINE__: TRICE (ID(14958), "att:Various single arguments\n" ); break; case __LINE__: { - TRICE8(Id(0), "rd:TRICE8 line %t (%%t ,0)\n", 0 ); - TRICE8(Id(0), "rd:TRICE8 line %t (%%t ,2)\n", 2 ); - TRICE8(Id(0), "rd:TRICE8 line %u (%%u ,-1)\n", -1 ); - TRICE8(Id(0), "rd:TRICE8 line %b (%%b ,-1)\n", -1 ); - TRICE8(Id(0), "rd:TRICE8 line %o (%%o ,-1)\n", -1 ); - TRICE8(Id(0), "rd:TRICE8 line %O (%%O ,-1)\n", -1 ); - TRICE8(Id(0), "rd:TRICE8 line %X (%%X ,-1)\n", -1 ); - TRICE8(Id(0), "rd:TRICE8 line %x (%%x ,-1)\n", -1 ); - TRICE8(Id(0), "rd:TRICE8 line %d (%%d ,-1)\n", -1 ); + TRICE8(Id(14959), "rd:TRICE8 line %t (%%t ,0)\n", 0 ); + TRICE8(Id(14960), "rd:TRICE8 line %t (%%t ,2)\n", 2 ); + TRICE8(Id(14961), "rd:TRICE8 line %u (%%u ,-1)\n", -1 ); + TRICE8(Id(14962), "rd:TRICE8 line %b (%%b ,-1)\n", -1 ); + TRICE8(Id(14963), "rd:TRICE8 line %o (%%o ,-1)\n", -1 ); + TRICE8(Id(14964), "rd:TRICE8 line %O (%%O ,-1)\n", -1 ); + TRICE8(Id(14965), "rd:TRICE8 line %X (%%X ,-1)\n", -1 ); + TRICE8(Id(14966), "rd:TRICE8 line %x (%%x ,-1)\n", -1 ); + TRICE8(Id(14967), "rd:TRICE8 line %d (%%d ,-1)\n", -1 ); } break; case __LINE__: { - TRICE16_1(Id(0), "rd:TRICE16_1 line %t (%%t ,0)\n", 0 ); - TRICE16_1(Id(0), "rd:TRICE16_1 line %t (%%t ,2)\n", 2 ); - TRICE16_1(Id(0), "rd:TRICE16_1 line %u (%%u -1)\n", -1 ); - TRICE16_1(Id(0), "rd:TRICE16_1 line %b (%%b -1)\n", -1 ); - TRICE16_1(Id(0), "rd:TRICE16_1 line %o (%%o -1)\n", -1 ); - TRICE16_1(Id(0), "rd:TRICE16_1 line %x (%%x -1)\n", -1 ); - TRICE16_1(Id(0), "rd:TRICE16_1 line %d (%%d -1)\n", -1 ); - Trice("rd:Trice line %t (%%t -1)\n", 0 ); - Trice("rd:Trice line %t (%%t -1)\n", 2 ); - Trice("rd:Trice line %u (%%u)\n", -1 ); - Trice("rd:Trice line %b (%%b)\n", -2 ); - Trice("rd:Trice line %o (%%o)\n", -3 ); - Trice("rd:Trice line %x (%%x)\n", -4 ); - Trice("rd:Trice line %d (%%d)\n", -5 ); + TRICE16_1(Id(14968), "rd:TRICE16_1 line %t (%%t ,0)\n", 0 ); + TRICE16_1(Id(14969), "rd:TRICE16_1 line %t (%%t ,2)\n", 2 ); + TRICE16_1(Id(14970), "rd:TRICE16_1 line %u (%%u -1)\n", -1 ); + TRICE16_1(Id(14971), "rd:TRICE16_1 line %b (%%b -1)\n", -1 ); + TRICE16_1(Id(14972), "rd:TRICE16_1 line %o (%%o -1)\n", -1 ); + TRICE16_1(Id(14973), "rd:TRICE16_1 line %x (%%x -1)\n", -1 ); + TRICE16_1(Id(14974), "rd:TRICE16_1 line %d (%%d -1)\n", -1 ); + Trice(iD(15805), "rd:Trice line %t (%%t -1)\n", 0 ); + Trice(iD(15491), "rd:Trice line %t (%%t -1)\n", 2 ); + Trice(iD(15971), "rd:Trice line %u (%%u)\n", -1 ); + Trice(iD(16018), "rd:Trice line %b (%%b)\n", -2 ); + Trice(iD(15858), "rd:Trice line %o (%%o)\n", -3 ); + Trice(iD(15700), "rd:Trice line %x (%%x)\n", -4 ); + Trice(iD(16322), "rd:Trice line %d (%%d)\n", -5 ); } - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 0 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 1 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 2 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 3 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 4 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 5 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 6 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 7 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 8 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 9 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 10 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 11 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 12 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 13 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 14 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 15 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 16 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 17 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 18 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 19 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 120 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 121 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 122 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 123 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 124 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 125 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 126 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 127 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 128 ); - break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 129 ); + break; case __LINE__: TRICE_N(id(14982), "msg:%s\n", A, 0 ); + break; case __LINE__: TRICE_N(id(14983), "msg:%s\n", A, 1 ); + break; case __LINE__: TRICE_N(id(14984), "msg:%s\n", A, 2 ); + break; case __LINE__: TRICE_N(id(14985), "msg:%s\n", A, 3 ); + break; case __LINE__: TRICE_N(id(14986), "msg:%s\n", A, 4 ); + break; case __LINE__: TRICE_N(id(14987), "msg:%s\n", A, 5 ); + break; case __LINE__: TRICE_N(id(14988), "msg:%s\n", A, 6 ); + break; case __LINE__: TRICE_N(id(14989), "msg:%s\n", A, 7 ); + break; case __LINE__: TRICE_N(id(14990), "msg:%s\n", A, 8 ); + break; case __LINE__: TRICE_N(id(14991), "msg:%s\n", A, 9 ); + break; case __LINE__: TRICE_N(id(14992), "msg:%s\n", A, 10 ); + break; case __LINE__: TRICE_N(id(14993), "msg:%s\n", A, 11 ); + break; case __LINE__: TRICE_N(id(14994), "msg:%s\n", A, 12 ); + break; case __LINE__: TRICE_N(id(14995), "msg:%s\n", A, 13 ); + break; case __LINE__: TRICE_N(id(14996), "msg:%s\n", A, 14 ); + break; case __LINE__: TRICE_N(id(14997), "msg:%s\n", A, 15 ); + break; case __LINE__: TRICE_N(id(14998), "msg:%s\n", A, 16 ); + break; case __LINE__: TRICE_N(id(14999), "msg:%s\n", A, 17 ); + break; case __LINE__: TRICE_N(id(15000), "msg:%s\n", A, 18 ); + break; case __LINE__: TRICE_N(id(15001), "msg:%s\n", A, 19 ); + break; case __LINE__: TRICE_N(id(15002), "msg:%s\n", A, 120 ); + break; case __LINE__: TRICE_N(id(15003), "msg:%s\n", A, 121 ); + break; case __LINE__: TRICE_N(id(15004), "msg:%s\n", A, 122 ); + break; case __LINE__: TRICE_N(id(15005), "msg:%s\n", A, 123 ); + break; case __LINE__: TRICE_N(id(15006), "msg:%s\n", A, 124 ); + break; case __LINE__: TRICE_N(id(15007), "msg:%s\n", A, 125 ); + break; case __LINE__: TRICE_N(id(15008), "msg:%s\n", A, 126 ); + break; case __LINE__: TRICE_N(id(15009), "msg:%s\n", A, 127 ); + break; case __LINE__: TRICE_N(id(15010), "msg:%s\n", A, 128 ); + break; case __LINE__: TRICE_N(id(15011), "msg:%s\n", A, 129 ); #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: triceN("msg:%s\n", A, 0 ); - break; case __LINE__: triceN("msg:%s\n", A, 1 ); - break; case __LINE__: triceN("msg:%s\n", A, 2 ); - break; case __LINE__: triceN("msg:%s\n", A, 3 ); - break; case __LINE__: triceN("msg:%s\n", A, 4 ); - break; case __LINE__: triceN("msg:%s\n", A, 5 ); - break; case __LINE__: triceN("msg:%s\n", A, 6 ); - break; case __LINE__: triceN("msg:%s\n", A, 7 ); - break; case __LINE__: triceN("msg:%s\n", A, 8 ); - break; case __LINE__: triceN("msg:%s\n", A, 9 ); - break; case __LINE__: triceN("msg:%s\n", A, 10 ); - break; case __LINE__: triceN("msg:%s\n", A, 11 ); - break; case __LINE__: triceN("msg:%s\n", A, 12 ); - break; case __LINE__: triceN("msg:%s\n", A, 13 ); - break; case __LINE__: triceN("msg:%s\n", A, 14 ); - break; case __LINE__: triceN("msg:%s\n", A, 15 ); - break; case __LINE__: triceN("msg:%s\n", A, 16 ); - break; case __LINE__: triceN("msg:%s\n", A, 17 ); - break; case __LINE__: triceN("msg:%s\n", A, 18 ); - break; case __LINE__: triceN("msg:%s\n", A, 19 ); - break; case __LINE__: triceN("msg:%s\n", A, 120 ); - break; case __LINE__: triceN("msg:%s\n", A, 121 ); - break; case __LINE__: triceN("msg:%s\n", A, 122 ); - break; case __LINE__: triceN("msg:%s\n", A, 123 ); - break; case __LINE__: triceN("msg:%s\n", A, 124 ); - break; case __LINE__: triceN("msg:%s\n", A, 125 ); - break; case __LINE__: triceN("msg:%s\n", A, 126 ); - break; case __LINE__: triceN("msg:%s\n", A, 127 ); - break; case __LINE__: triceN("msg:%s\n", A, 128 ); - break; case __LINE__: triceN("msg:%s\n", A, 129 ); - - break; case __LINE__: trice("sig:TRICE with 1 to 12 values\n" ); - break; case __LINE__: trice("rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 - break; case __LINE__: trice("rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 - break; case __LINE__: trice("rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice("sig:TRICE_n with 1 to 12 values\n" ); - break; case __LINE__: trice("rd:TRICE_1 %d\n", -1 ); //exp: time: default: rd:TRICE_1 -1 - break; case __LINE__: trice("rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE_2 -1, -2 - break; case __LINE__: trice("rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE_3 -1, -2, -3 - break; case __LINE__: trice("rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE_4 -1, -2, -3, -4 - break; case __LINE__: trice("rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice("rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice("rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice("rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice("rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice("rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice("rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice("rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: triceN(iD(15012), "msg:%s\n", A, 0 ); + break; case __LINE__: triceN(iD(15013), "msg:%s\n", A, 1 ); + break; case __LINE__: triceN(iD(15014), "msg:%s\n", A, 2 ); + break; case __LINE__: triceN(iD(15015), "msg:%s\n", A, 3 ); + break; case __LINE__: triceN(iD(15016), "msg:%s\n", A, 4 ); + break; case __LINE__: triceN(iD(15017), "msg:%s\n", A, 5 ); + break; case __LINE__: triceN(iD(15018), "msg:%s\n", A, 6 ); + break; case __LINE__: triceN(iD(15019), "msg:%s\n", A, 7 ); + break; case __LINE__: triceN(iD(15020), "msg:%s\n", A, 8 ); + break; case __LINE__: triceN(iD(15021), "msg:%s\n", A, 9 ); + break; case __LINE__: triceN(iD(15022), "msg:%s\n", A, 10 ); + break; case __LINE__: triceN(iD(15023), "msg:%s\n", A, 11 ); + break; case __LINE__: triceN(iD(15024), "msg:%s\n", A, 12 ); + break; case __LINE__: triceN(iD(15025), "msg:%s\n", A, 13 ); + break; case __LINE__: triceN(iD(15026), "msg:%s\n", A, 14 ); + break; case __LINE__: triceN(iD(15027), "msg:%s\n", A, 15 ); + break; case __LINE__: triceN(iD(15028), "msg:%s\n", A, 16 ); + break; case __LINE__: triceN(iD(15029), "msg:%s\n", A, 17 ); + break; case __LINE__: triceN(iD(15030), "msg:%s\n", A, 18 ); + break; case __LINE__: triceN(iD(15031), "msg:%s\n", A, 19 ); + break; case __LINE__: triceN(iD(15032), "msg:%s\n", A, 120 ); + break; case __LINE__: triceN(iD(15033), "msg:%s\n", A, 121 ); + break; case __LINE__: triceN(iD(15034), "msg:%s\n", A, 122 ); + break; case __LINE__: triceN(iD(15035), "msg:%s\n", A, 123 ); + break; case __LINE__: triceN(iD(15036), "msg:%s\n", A, 124 ); + break; case __LINE__: triceN(iD(15037), "msg:%s\n", A, 125 ); + break; case __LINE__: triceN(iD(15038), "msg:%s\n", A, 126 ); + break; case __LINE__: triceN(iD(15039), "msg:%s\n", A, 127 ); + break; case __LINE__: triceN(iD(15040), "msg:%s\n", A, 128 ); + break; case __LINE__: triceN(iD(15041), "msg:%s\n", A, 129 ); + + break; case __LINE__: trice(iD(15042), "sig:TRICE with 1 to 12 values\n" ); + break; case __LINE__: trice(iD(15043), "rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 + break; case __LINE__: trice(iD(15044), "rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 + break; case __LINE__: trice(iD(15045), "rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 + break; case __LINE__: trice(iD(15046), "rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 + break; case __LINE__: trice(iD(15047), "rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 + break; case __LINE__: trice(iD(15048), "rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice(iD(15049), "rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice(iD(15050), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice(iD(15051), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice(iD(15052), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice(iD(15053), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice(iD(15054), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice(iD(15055), "sig:TRICE_n with 1 to 12 values\n" ); + break; case __LINE__: trice(iD(15056), "rd:TRICE_1 %d\n", -1 ); //exp: time: default: rd:TRICE_1 -1 + break; case __LINE__: trice(iD(15057), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE_2 -1, -2 + break; case __LINE__: trice(iD(15058), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE_3 -1, -2, -3 + break; case __LINE__: trice(iD(15059), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE_4 -1, -2, -3, -4 + break; case __LINE__: trice(iD(15060), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice(iD(15061), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice(iD(15062), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice(iD(15063), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice(iD(15064), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice(iD(15065), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice(iD(15066), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice(iD(15067), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRice("sig:Trice16 with 1 to 12 pointer\n" ); + break; case __LINE__: TRice(iD(15522), "sig:Trice16 with 1 to 12 pointer\n" ); break; case __LINE__: { - Trice16("rd:Trice16 %p\n", -1 ); - Trice16("rd:Trice16 %p, %p\n", -1, -2 ); - Trice16("rd:Trice16 %p, %p, %p\n", -1, -2, -3 ); - Trice16("rd:Trice16 %p, %p, %p, %p\n", -1, -2, -3, -4 ); - Trice16("rd:Trice16 %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5 ); - Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6 ); - Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7); - Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); - Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + Trice16(iD(16271), "rd:Trice16 %p\n", -1 ); + Trice16(iD(15724), "rd:Trice16 %p, %p\n", -1, -2 ); + Trice16(iD(16307), "rd:Trice16 %p, %p, %p\n", -1, -2, -3 ); + Trice16(iD(15475), "rd:Trice16 %p, %p, %p, %p\n", -1, -2, -3, -4 ); + Trice16(iD(15583), "rd:Trice16 %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5 ); + Trice16(iD(16204), "rd:Trice16 %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6 ); + Trice16(iD(16292), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7); + Trice16(iD(16219), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + Trice16(iD(16004), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + Trice16(iD(16135), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); + Trice16(iD(15360), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + Trice16(iD(15608), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); } - break; case __LINE__: TRice("sig:TRICE16 with 1 to 12 hex\n" ); + break; case __LINE__: TRice(iD(15260), "sig:TRICE16 with 1 to 12 hex\n" ); break; case __LINE__: { - Trice16("rd:Trice16 %X\n", -1 ); - Trice16("rd:Trice16 %X, %X\n", -1, -2 ); - Trice16("rd:Trice16 %X, %X, %X\n", -1, -2, -3 ); - Trice16("rd:Trice16 %X, %X, %X, %X\n", -1, -2, -3, -4 ); - Trice16("rd:Trice16 %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5 ); - Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6 ); - Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7); - Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); - Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + Trice16(iD(15242), "rd:Trice16 %X\n", -1 ); + Trice16(iD(15340), "rd:Trice16 %X, %X\n", -1, -2 ); + Trice16(iD(16267), "rd:Trice16 %X, %X, %X\n", -1, -2, -3 ); + Trice16(iD(15545), "rd:Trice16 %X, %X, %X, %X\n", -1, -2, -3, -4 ); + Trice16(iD(15696), "rd:Trice16 %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5 ); + Trice16(iD(15525), "rd:Trice16 %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6 ); + Trice16(iD(15588), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7); + Trice16(iD(15749), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + Trice16(iD(15632), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + Trice16(iD(15881), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); + Trice16(iD(15785), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + Trice16(iD(15329), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); } #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice_0("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice0("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice_0("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE8(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice8("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice8("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice8("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE8_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice8_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice8_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice8_0("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice16("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice16("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE16_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE16_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE16_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE16_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice16_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice16_0("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE32(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice32("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice32("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice32("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE32_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice32_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice32_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice32_0("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE64(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice64("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice64("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice64("w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE64_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice64_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice64_0("w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice64_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE(ID(15094), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE(id(15095), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE(Id(15096), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE(ID(15097), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice(iD(15098), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice(iD(15099), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice(iD(15100), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE_0(ID(15101), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(id(15102), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(Id(15103), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(ID(15104), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice_0(iD(15105), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice_0(iD(15106), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice_0(iD(15107), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE0(ID(15108), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE0(id(15109), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE0(Id(15110), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE0(ID(15111), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice0(iD(15112), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice0(iD(15113), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice0(iD(15114), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE_0(ID(15115), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(id(15116), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(Id(15117), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(ID(15118), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice_0(iD(15119), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice_0(iD(15120), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice_0(iD(15121), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE8(ID(15122), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8(id(15123), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8(Id(15124), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8(ID(15125), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice8(iD(15126), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice8(iD(15127), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice8(iD(15128), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE8_0(ID(15129), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8_0(id(15130), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8_0(Id(15131), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8_0(ID(15132), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice8_0(iD(15133), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice8_0(iD(15134), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice8_0(iD(15135), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: trice16(iD(15136), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16(iD(15137), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16(iD(15138), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16(iD(15139), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16(iD(15140), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice16(iD(15141), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice16(iD(15142), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE16_0(ID(15143), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE16_0(id(15144), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE16_0(Id(15145), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE16_0(ID(15146), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16_0(iD(15147), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice16_0(iD(15148), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice16_0(iD(15149), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE32(ID(15150), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32(id(15151), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32(Id(15152), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32(ID(15153), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice32(iD(15154), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice32(iD(15155), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice32(iD(15156), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE32_0(ID(15157), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32_0(id(15158), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32_0(Id(15159), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32_0(ID(15160), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice32_0(iD(15161), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice32_0(iD(15162), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice32_0(iD(15163), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE64(ID(15164), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64(id(15165), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64(Id(15166), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64(ID(15167), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice64(iD(15168), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice64(iD(15169), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice64(iD(15170), "w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE64_0(ID(15171), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64_0(id(15172), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64_0(Id(15173), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64_0(ID(15174), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice64_0(iD(15175), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice64_0(iD(15176), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice64_0(iD(15177), "w: Hello! 👋🙂 \a\n" ); // with sound! #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) } @@ -2595,8 +2595,8 @@ static int64_t DoubleToInt64(double f) { int size = sizeof(src->element); \ memcpy(p, &(src->element), size); \ p += size; \ - TRICE_S(ID(0), "rd:sizeof(%8s)", n); \ - TRICE(ID(0), " = %d\n", size); \ + TRICE_S(ID(15178), "rd:sizeof(%8s)", n); \ + TRICE(ID(15179), " = %d\n", size); \ } while (0); //! DCOPY is a helper macro for struct deserialization. @@ -2606,8 +2606,8 @@ static int64_t DoubleToInt64(double f) { int size = sizeof(dst->element); \ memcpy(&(dst->element), p, size); \ p += size; \ - TRICE_S(ID(0), "rd:sizeof(%8s)", n); \ - TRICE(ID(0), " = %d\n", size); \ + TRICE_S(ID(15180), "rd:sizeof(%8s)", n); \ + TRICE(ID(15181), " = %d\n", size); \ } while (0); typedef struct { @@ -2727,25 +2727,25 @@ static void exampleOfManualSerialization(void) { #else int len = 0; #endif - TRICE(Id(0), "inf: Tryout tx struct:"); - TRICE8_B(Id(0), " %02x ", &tx, sizeof(tx)); - TRICE(Id(0), "\n"); + TRICE(Id(15182), "inf: Tryout tx struct:"); + TRICE8_B(Id(15183), " %02x ", &tx, sizeof(tx)); + TRICE(Id(15184), "\n"); - TRICE(Id(0), "inf: Tryout buffer:"); - TRICE8_B(Id(0), " %02x ", dst, len); // lint !e670 - TRICE(Id(0), "\n"); + TRICE(Id(15185), "inf: Tryout buffer:"); + TRICE8_B(Id(15186), " %02x ", dst, len); // lint !e670 + TRICE(Id(15187), "\n"); #if !TRICE_OFF char* src = dst; // "copy" - assume, data transferred now ("data transfer") len = deserializeTryout(&rx, src); #endif - TRICE(Id(0), "inf: Tryout rx struct:"); - TRICE8_B(Id(0), " %02x ", &rx, sizeof(rx)); - TRICE(Id(0), "\n"); + TRICE(Id(15188), "inf: Tryout rx struct:"); + TRICE8_B(Id(15189), " %02x ", &rx, sizeof(rx)); + TRICE(Id(15190), "\n"); - TRICE(Id(0), "inf:sizeOf(Trypout) = %d, buffer length = %d\n", sizeof(tx), len); - TRICE8_F(Id(0), "info:TryoutStructFunction", &tx, sizeof(tx)); - TRICE8_F(Id(0), "info:TryoutBufferFunction", dst, len); // lint !e670 + TRICE(Id(15191), "inf:sizeOf(Trypout) = %d, buffer length = %d\n", sizeof(tx), len); + TRICE8_F(Id(15192), "info:TryoutStructFunction", &tx, sizeof(tx)); + TRICE8_F(Id(15193), "info:TryoutBufferFunction", dst, len); // lint !e670 } static void exampleOfManualJSONencoding(void) { @@ -2756,15 +2756,15 @@ static void exampleOfManualJSONencoding(void) { } Ex_t; Ex_t Ex = {-1, 2, (float)2.781}; #endif - Trice("att:MyStructEvaluationFunction(json:ExA{Apple:%d, Birn:%u, Fisch:%f}\n", Ex.Apple, Ex.Birn, aFloat(Ex.Fish)); + Trice(iD(15194), "att:MyStructEvaluationFunction(json:ExA{Apple:%d, Birn:%u, Fisch:%f}\n", Ex.Apple, Ex.Birn, aFloat(Ex.Fish)); } static void dynString(int n) { char* s = "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,"; const size_t l = strlen(s); n = n < l ? n : l; - // trice("sig:%3d:", n ); - this gets overwritten in CGO_Test case, so we avoid it to keep testing simple. - TRICE_N(id(0), "wr:%s\n", s, n); + // trice(iD(15195), "sig:%3d:", n ); - this gets overwritten in CGO_Test case, so we avoid it to keep testing simple. + TRICE_N(id(15196), "wr:%s\n", s, n); } #endif // #ifndef TRICE_CHECK_MIN diff --git a/examples/F030_inst/Core/Inc/SEGGER_RTT_Conf.h b/examples/F030_inst/Core/Inc/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/examples/F030_inst/Core/Inc/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/examples/F030_inst/Core/Inc/triceConfig.h b/examples/F030_inst/Core/Inc/triceConfig.h index 4aaa4f5ad..1bfd1f135 100644 --- a/examples/F030_inst/Core/Inc/triceConfig.h +++ b/examples/F030_inst/Core/Inc/triceConfig.h @@ -10,7 +10,7 @@ extern "C" { #endif //! TRICE_CLEAN, if found inside triceConfig.h, is modified by the Trice tool to silent editor warnings in the cleaned state. -#define TRICE_CLEAN 1 // Do not define this at an other place! But you can delete this here. +#define TRICE_CLEAN 0 // Do not define this at an other place! But you can delete this here. extern uint32_t ms32; //! ms32 is a 32-bit millisecond counter, counting circular in steps of 1 every ms. #include "stm32f0xx_ll_system.h" diff --git a/examples/F030_inst/Core/Src/stm32f0xx_it.c b/examples/F030_inst/Core/Src/stm32f0xx_it.c index b6c6ad5b0..72bb04f21 100644 --- a/examples/F030_inst/Core/Src/stm32f0xx_it.c +++ b/examples/F030_inst/Core/Src/stm32f0xx_it.c @@ -159,13 +159,13 @@ void USART2_IRQHandler(void) static int index = 0; uint8_t v; if( LL_USART_IsActiveFlag_ORE(TRICE_UARTA) ){ - TRice("WARNING:USARTq OverRun Error Flag is set!\n" ); + TRice(iD(13000), "WARNING:USARTq OverRun Error Flag is set!\n" ); } v = LL_USART_ReceiveData8(TRICE_UARTA); // implicit clears the flag rxBuf[index] = (char)v; index += index < TRICE_COMMAND_SIZE_MAX ? 1 : 0; if( v == 0 ){ // command end - TRICE_S(Id(0), "rx:received command:%s\n", rxBuf ); + TRICE_S(Id(13001), "rx:received command:%s\n", rxBuf ); strcpy(triceCommandBuffer, rxBuf ); triceCommandFlag = 1; index = 0; diff --git a/examples/G0B1_inst/Core/Inc/SEGGER_RTT_Conf.h b/examples/G0B1_inst/Core/Inc/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/examples/G0B1_inst/Core/Inc/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/examples/G0B1_inst/Core/Inc/triceConfig.h b/examples/G0B1_inst/Core/Inc/triceConfig.h index 59a380be4..b272e5611 100644 --- a/examples/G0B1_inst/Core/Inc/triceConfig.h +++ b/examples/G0B1_inst/Core/Inc/triceConfig.h @@ -10,7 +10,7 @@ extern "C" { #endif //! TRICE_CLEAN, if found inside triceConfig.h, is modified by the Trice tool to silent editor warnings in the cleaned state. -#define TRICE_CLEAN 1 // Do not define this at an other place! But you can delete this here. +#define TRICE_CLEAN 0 // Do not define this at an other place! But you can delete this here. // hardware specific trice lib settings #include "main.h" diff --git a/examples/G0B1_inst/Core/Src/main.c b/examples/G0B1_inst/Core/Src/main.c index 770cc5713..3949fec23 100644 --- a/examples/G0B1_inst/Core/Src/main.c +++ b/examples/G0B1_inst/Core/Src/main.c @@ -311,7 +311,7 @@ void StartDefaultTask(void const * argument) { /* USER CODE BEGIN 5 */ TRICE_UNUSED(argument) - TRice("msg:StartDefaultTask\n"); + TRice(iD(13003), "msg:StartDefaultTask\n"); /* Infinite loop */ for(;;) { @@ -338,7 +338,7 @@ void StartTask02(void const * argument) { /* USER CODE BEGIN StartTask02 */ TRICE_UNUSED(argument) - TRice("msg:StartTask02:Diagnostics and TriceTransfer\n" ); + TRice(iD(13004), "msg:StartTask02:Diagnostics and TriceTransfer\n" ); /* Infinite loop */ for(;;) { diff --git a/examples/G0B1_inst/Core/Src/stm32g0xx_it.c b/examples/G0B1_inst/Core/Src/stm32g0xx_it.c index 83716381d..1a611abf2 100644 --- a/examples/G0B1_inst/Core/Src/stm32g0xx_it.c +++ b/examples/G0B1_inst/Core/Src/stm32g0xx_it.c @@ -116,7 +116,7 @@ void TIM17_FDCAN_IT1_IRQHandler(void) #if !TRICE_OFF static int i = 0; if( i++>25000 ){ - trice("isr:TIM17_FDCAN_IT1_IRQHandler! (%u ms)\n", i ); + trice(iD(13002), "isr:TIM17_FDCAN_IT1_IRQHandler! (%u ms)\n", i ); i = 0; } #endif diff --git a/examples/L432_inst/Core/Inc/SEGGER_RTT_Conf.h b/examples/L432_inst/Core/Inc/SEGGER_RTT_Conf.h new file mode 100644 index 000000000..dc37b31e9 --- /dev/null +++ b/examples/L432_inst/Core/Inc/SEGGER_RTT_Conf.h @@ -0,0 +1,429 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2021 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 8.12a * +* * +********************************************************************** + +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 24316 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS + #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#endif +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS + #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) +#endif + +#ifndef BUFFER_SIZE_UP + #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#endif + +#ifndef BUFFER_SIZE_DOWN + #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) +#endif + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) +#endif + +#ifndef SEGGER_RTT_MODE_DEFAULT + #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) +#endif + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP + #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +#endif +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +// +// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. +// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. +// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. +// (Higher priority = lower priority number) +// Default value for embOS: 128u +// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC +// or define SEGGER_RTT_LOCK() to completely disable interrupts. +// +#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) +#endif + +/********************************************************************* +* +* RTT lock configuration for SEGGER Embedded Studio, +* Rowley CrossStudio and GCC +*/ +#if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) + #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, primask \n\t" \ + "movs r1, #1 \n\t" \ + "msr primask, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs %0, basepri \n\t" \ + "mov r1, %1 \n\t" \ + "msr basepri, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : \ + ); \ + } + + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #elif defined(__riscv) || defined(__riscv_xlen) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("csrr %0, mstatus \n\t" \ + "csrci mstatus, 8 \n\t" \ + "andi %0, %0, 8 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ + "or %0, %0, a1 \n\t" \ + "csrs mstatus, %0 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "a1" \ + ); \ + } + #else + #define SEGGER_RTT_LOCK() + #define SEGGER_RTT_UNLOCK() + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR EWARM +*/ +#ifdef __ICCARM__ + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ + (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ + (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ + (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ + __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ + } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RX +*/ +#ifdef __ICCRX__ + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for IAR RL78 +*/ +#ifdef __ICCRL78__ + #define SEGGER_RTT_LOCK() { \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ + __disable_interrupt(); + + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for KEIL ARM +*/ +#ifdef __CC_ARM + #if (defined __TARGET_ARCH_6S_M) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char BASEPRI __asm( "basepri"); \ + _SEGGER_RTT__LockState = BASEPRI; \ + BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ + __schedule_barrier(); + + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ + __schedule_barrier(); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for TI ARM +*/ +#ifdef __TI_ARM__ + #if defined (__TI_ARM_V6M0__) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ + __set_PRIMASK(1); + + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ + } + #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) + #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY + #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) + #endif + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ + } + #endif +#endif + +/********************************************************************* +* +* RTT lock configuration for CCRX +*/ +#ifdef __RX + #include + #define SEGGER_RTT_LOCK() { \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ + clrpsw_i(); + + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration for embOS Simulation on Windows +* (Can also be used for generic RTT locking with embOS) +*/ +#if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) + +void OS_SIM_EnterCriticalSection(void); +void OS_SIM_LeaveCriticalSection(void); + +#define SEGGER_RTT_LOCK() { \ + OS_SIM_EnterCriticalSection(); + +#define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ + } +#endif + +/********************************************************************* +* +* RTT lock configuration fallback +*/ +#ifndef SEGGER_RTT_LOCK + #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) +#endif + +#ifndef SEGGER_RTT_UNLOCK + #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) +#endif + +#endif +/*************************** End of file ****************************/ diff --git a/examples/L432_inst/Core/Inc/triceConfig.h b/examples/L432_inst/Core/Inc/triceConfig.h index fbda044ca..7ee9230b3 100644 --- a/examples/L432_inst/Core/Inc/triceConfig.h +++ b/examples/L432_inst/Core/Inc/triceConfig.h @@ -11,7 +11,7 @@ extern "C" { #endif //! TRICE_CLEAN, if found inside triceConfig.h, is modified by the Trice tool to silent editor warnings in the cleaned state. -#define TRICE_CLEAN 1 // Do not define this at an other place! But you can delete this here. +#define TRICE_CLEAN 0 // Do not define this at an other place! But you can delete this here. #include @@ -1064,7 +1064,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS #elif CONFIGURATION == 97 ///////////////////////////////////////////////////////////// -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration with direct RTT output only and optimized for speed\n", CONFIGURATION ); +#define LogConfigInfo() trice8(iD(13009), "dbg:CONFIGURATION == %d - An example configuration with direct RTT output only and optimized for speed\n", CONFIGURATION ); #define TRICE_DIRECT_OUTPUT 1 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_PROTECT 0 @@ -1074,7 +1074,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 #elif CONFIGURATION == 98 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - UART, no cycle counter, no critical sections.\n", CONFIGURATION ); +#define LogConfigInfo() trice8(iD(13010), "dbg:CONFIGURATION == %d - UART, no cycle counter, no critical sections.\n", CONFIGURATION ); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 @@ -1093,14 +1093,14 @@ void SomeExampleTrices(int burstCount); #define TRICE_LEAVE_CRITICAL_SECTION } #elif CONFIGURATION == 99 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An minimum configuration example.\n", CONFIGURATION ); +#define LogConfigInfo() trice8(iD(13011), "dbg:CONFIGURATION == %d - An minimum configuration example.\n", CONFIGURATION ); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 #define TRICE_BUFFER TRICE_RING_BUFFER #elif CONFIGURATION == 100 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration with direct RTT output and parallel deferred UART output.\n", CONFIGURATION ); +#define LogConfigInfo() trice8(iD(13012), "dbg:CONFIGURATION == %d - An example configuration with direct RTT output and parallel deferred UART output.\n", CONFIGURATION ); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 @@ -1119,7 +1119,7 @@ void SomeExampleTrices(int burstCount); #endif #ifndef LogConfigInfo -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration\n", CONFIGURATION ); +#define LogConfigInfo() trice8(iD(13013), "dbg:CONFIGURATION == %d - An example configuration\n", CONFIGURATION ); #endif #ifdef __cplusplus diff --git a/examples/L432_inst/Core/Src/main.c b/examples/L432_inst/Core/Src/main.c index e57beda32..0210fa084 100644 --- a/examples/L432_inst/Core/Src/main.c +++ b/examples/L432_inst/Core/Src/main.c @@ -335,7 +335,7 @@ void StartDefaultTask(void const * argument) { /* USER CODE BEGIN 5 */ TRICE_UNUSED(argument) - TRice("msg:StartDefaultTask\n"); + TRice(iD(13005), "msg:StartDefaultTask\n"); /* Infinite loop */ for(;;) { @@ -362,7 +362,7 @@ void StartTask02(void const * argument) { /* USER CODE BEGIN StartTask02 */ TRICE_UNUSED(argument) - TRice("msg:StartTask02:Diagnostics and TriceTransfer\n" ); + TRice(iD(13006), "msg:StartTask02:Diagnostics and TriceTransfer\n" ); /* Infinite loop */ for(;;) { diff --git a/examples/L432_inst/Core/Src/stm32l4xx_it.c b/examples/L432_inst/Core/Src/stm32l4xx_it.c index 109107538..063631347 100644 --- a/examples/L432_inst/Core/Src/stm32l4xx_it.c +++ b/examples/L432_inst/Core/Src/stm32l4xx_it.c @@ -188,13 +188,13 @@ void USART2_IRQHandler(void) static int index = 0; uint8_t v; if( LL_USART_IsActiveFlag_ORE(TRICE_UARTA) ){ - TRice("WARNING:USARTq OverRun Error Flag is set!\n" ); + TRice(iD(13007), "WARNING:USARTq OverRun Error Flag is set!\n" ); } v = LL_USART_ReceiveData8(TRICE_UARTA); // implicit clears the flag rxBuf[index] = (char)v; index += index < TRICE_COMMAND_SIZE_MAX ? 1 : 0; if( v == 0 ){ // command end - TRICE_S(Id(0), "rx:received command:%s\n", rxBuf ); + TRICE_S(Id(13008), "rx:received command:%s\n", rxBuf ); strcpy(triceCommandBuffer, rxBuf ); triceCommandFlag = 1; index = 0; diff --git a/examples/exampleData/triceExamples.c b/examples/exampleData/triceExamples.c index d60d98a03..256ec2675 100644 --- a/examples/exampleData/triceExamples.c +++ b/examples/exampleData/triceExamples.c @@ -9,47 +9,47 @@ //! TriceHeadLine emits a decorated name. The name length should be 18 characters. void TriceHeadLine(char* name) { //! This is usable as the very first trice sequence after restart. Adapt it. Use a UTF-8 capable editor like VS-Code or use pure ASCII. - TriceS("w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", name); + TriceS(iD(16369), "w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", name); } //! SomeExampleTrices generates a few Trice example logs and a burst of Trices. void SomeExampleTrices(int burstCount) { - // TRICE32_0(ID(0), "att:🐁 Speedy Gonzales A 32-bit time stamp\n"); - // TRICE32_0(ID(0), "att:🐁 Speedy Gonzales B 32-bit time stamp\n"); - // TRICE32_0(ID(0), "att:🐁 Speedy Gonzales C 32-bit time stamp\n"); - // TRICE32_0(ID(0), "att:🐁 Speedy Gonzales D 32-bit time stamp\n"); - // TRICE32_0(Id(0), "att:🐁 Speedy Gonzales E 16-bit time stamp\n"); - // TRICE32_0(Id(0), "att:🐁 Speedy Gonzales F 16-bit time stamp\n"); - // TRICE32_0(Id(0), "att:🐁 Speedy Gonzales G 16-bit time stamp\n"); - // TRICE32_0(Id(0), "att:🐁 Speedy Gonzales H 16-bit time stamp\n"); - // TRICE32_0(id(0), "att:🐁 Speedy Gonzales I without time stamp\n"); - // TRICE32_0(id(0), "att:🐁 Speedy Gonzales J without time stamp\n"); - // TRICE32_0(id(0), "att:🐁 Speedy Gonzales K without time stamp\n"); - // TRICE32_0(id(0), "att:🐁 Speedy Gonzales L without time stamp\n"); - TRice("att:🐁 Speedy Gonzales a 32-bit time stamp\n"); - TRice("att:🐁 Speedy Gonzales b 32-bit time stamp\n"); - TRice("att:🐁 Speedy Gonzales c 32-bit time stamp\n"); - TRice("att:🐁 Speedy Gonzales d 32-bit time stamp\n"); - Trice("att:🐁 Speedy Gonzales e 16-bit time stamp\n"); - Trice("att:🐁 Speedy Gonzales f 16-bit time stamp\n"); - Trice("att:🐁 Speedy Gonzales g 16-bit time stamp\n"); - Trice("att:🐁 Speedy Gonzales h 16-bit time stamp\n"); - // trice("att:🐁 Speedy Gonzales i without time stamp\n"); - // trice("att:🐁 Speedy Gonzales j without time stamp\n"); - // trice("att:🐁 Speedy Gonzales k without time stamp\n"); - // trice("att:🐁 Speedy Gonzales l without time stamp\n"); + // TRICE32_0(ID(16368), "att:🐁 Speedy Gonzales A 32-bit time stamp\n"); + // TRICE32_0(ID(16367), "att:🐁 Speedy Gonzales B 32-bit time stamp\n"); + // TRICE32_0(ID(16366), "att:🐁 Speedy Gonzales C 32-bit time stamp\n"); + // TRICE32_0(ID(16365), "att:🐁 Speedy Gonzales D 32-bit time stamp\n"); + // TRICE32_0(Id(16364), "att:🐁 Speedy Gonzales E 16-bit time stamp\n"); + // TRICE32_0(Id(16363), "att:🐁 Speedy Gonzales F 16-bit time stamp\n"); + // TRICE32_0(Id(16362), "att:🐁 Speedy Gonzales G 16-bit time stamp\n"); + // TRICE32_0(Id(16361), "att:🐁 Speedy Gonzales H 16-bit time stamp\n"); + // TRICE32_0(id(16360), "att:🐁 Speedy Gonzales I without time stamp\n"); + // TRICE32_0(id(16359), "att:🐁 Speedy Gonzales J without time stamp\n"); + // TRICE32_0(id(16358), "att:🐁 Speedy Gonzales K without time stamp\n"); + // TRICE32_0(id(16357), "att:🐁 Speedy Gonzales L without time stamp\n"); + TRice(iD(16356), "att:🐁 Speedy Gonzales a 32-bit time stamp\n"); + TRice(iD(16355), "att:🐁 Speedy Gonzales b 32-bit time stamp\n"); + TRice(iD(16354), "att:🐁 Speedy Gonzales c 32-bit time stamp\n"); + TRice(iD(16353), "att:🐁 Speedy Gonzales d 32-bit time stamp\n"); + Trice(iD(16352), "att:🐁 Speedy Gonzales e 16-bit time stamp\n"); + Trice(iD(16351), "att:🐁 Speedy Gonzales f 16-bit time stamp\n"); + Trice(iD(16350), "att:🐁 Speedy Gonzales g 16-bit time stamp\n"); + Trice(iD(16349), "att:🐁 Speedy Gonzales h 16-bit time stamp\n"); + // trice(iD(16348), "att:🐁 Speedy Gonzales i without time stamp\n"); + // trice(iD(16347), "att:🐁 Speedy Gonzales j without time stamp\n"); + // trice(iD(16346), "att:🐁 Speedy Gonzales k without time stamp\n"); + // trice(iD(16345), "att:🐁 Speedy Gonzales l without time stamp\n"); char* aString = "2.71828182845904523536"; - TriceS("rd:%s <- float number as string\n", aString); - Trice64("msg:%.20f (double with more ciphers than precision)\n", aDouble(2.71828182845904523536)); - Trice("msg:%.20f (float with more ciphers than precision)\n", aFloat(2.71828182845904523536)); - Trice("msg:%f (default rounded float)\n", aFloat(2.71828182845904523536)); - Trice("info:A Buffer:\n"); - Trice8B("msg:%02x \n", aString, strlen(aString)); - Trice32B("msg:%08x \n", aString, strlen(aString) >> 2); - Trice16F("att:ARemoteFunctionName", aString, strlen(aString) >> 1); - trice("info:%d times a 16 byte long Trice messages, which may not be written all if the buffer is too small:\n", burstCount); + TriceS(iD(16344), "rd:%s <- float number as string\n", aString); + Trice64(iD(16343), "msg:%.20f (double with more ciphers than precision)\n", aDouble(2.71828182845904523536)); + Trice(iD(16342), "msg:%.20f (float with more ciphers than precision)\n", aFloat(2.71828182845904523536)); + Trice(iD(16341), "msg:%f (default rounded float)\n", aFloat(2.71828182845904523536)); + Trice(iD(16340), "info:A Buffer:\n"); + Trice8B(iD(16339), "msg:%02x \n", aString, strlen(aString)); + Trice32B(iD(16338), "msg:%08x \n", aString, strlen(aString) >> 2); + Trice16F(iD(16337), "att:ARemoteFunctionName", aString, strlen(aString) >> 1); + trice(iD(16336), "info:%d times a 16 byte long Trice messages, which may not be written all if the buffer is too small:\n", burstCount); for (int i = 0; i < burstCount; i++) { - Trice("i=%x %x\n", 0x44444400 + i, 0xaaaaaa00 + i); + Trice(iD(16335), "i=%x %x\n", 0x44444400 + i, 0xaaaaaa00 + i); } } @@ -58,23 +58,23 @@ void LogTriceConfiguration(void) { #ifdef LogConfigInfo LogConfigInfo(); #endif - trice("deb:TRICE_DIRECT_OUTPUT == %d, TRICE_DEFERRED_OUTPUT == %d\n", TRICE_DIRECT_OUTPUT, TRICE_DEFERRED_OUTPUT); + trice(iD(16334), "deb:TRICE_DIRECT_OUTPUT == %d, TRICE_DEFERRED_OUTPUT == %d\n", TRICE_DIRECT_OUTPUT, TRICE_DEFERRED_OUTPUT); #if TRICE_BUFFER == TRICE_STACK_BUFFER - trice("deb:TRICE_STACK_BUFFER, "); + trice(iD(16333), "deb:TRICE_STACK_BUFFER, "); #elif TRICE_BUFFER == TRICE_STATIC_BUFFER - trice("deb:TRICE_STATIC_BUFFER, "); + trice(iD(16332), "deb:TRICE_STATIC_BUFFER, "); #elif TRICE_BUFFER == TRICE_DOUBLE_BUFFER - trice("deb:TRICE_DOUBLE_BUFFER, "); + trice(iD(16331), "deb:TRICE_DOUBLE_BUFFER, "); #elif TRICE_BUFFER == TRICE_RING_BUFFER - trice("deb:TRICE_RING_BUFFER, "); + trice(iD(16330), "deb:TRICE_RING_BUFFER, "); #endif #if TRICE_DEFERRED_TRANSFER_MODE == TRICE_SINGLE_PACK_MODE - trice("deb:TRICE_SINGLE_PACK_MODE\n"); + trice(iD(16329), "deb:TRICE_SINGLE_PACK_MODE\n"); #else - trice("deb:TRICE_MULTI_PACK_MODE\n"); + trice(iD(16328), "deb:TRICE_MULTI_PACK_MODE\n"); #endif - trice("deb:_CYCLE == %d, _PROTECT == %d, _DIAG == %d, XTEA == %d\n", TRICE_CYCLE_COUNTER, TRICE_PROTECT, TRICE_DIAGNOSTICS, TRICE_DEFERRED_XTEA_ENCRYPT); - trice("d:_SINGLE_MAX_SIZE=%d, _BUFFER_SIZE=%d, _DEFERRED_BUFFER_SIZE=%d\n", TRICE_SINGLE_MAX_SIZE, TRICE_BUFFER_SIZE, TRICE_DEFERRED_BUFFER_SIZE); + trice(iD(16327), "deb:_CYCLE == %d, _PROTECT == %d, _DIAG == %d, XTEA == %d\n", TRICE_CYCLE_COUNTER, TRICE_PROTECT, TRICE_DIAGNOSTICS, TRICE_DEFERRED_XTEA_ENCRYPT); + trice(iD(16326), "d:_SINGLE_MAX_SIZE=%d, _BUFFER_SIZE=%d, _DEFERRED_BUFFER_SIZE=%d\n", TRICE_SINGLE_MAX_SIZE, TRICE_BUFFER_SIZE, TRICE_DEFERRED_BUFFER_SIZE); } #endif // #if !TRICE_OFF diff --git a/examples/exampleData/triceLogDiagData.c b/examples/exampleData/triceLogDiagData.c index 38be708af..1043fced8 100644 --- a/examples/exampleData/triceLogDiagData.c +++ b/examples/exampleData/triceLogDiagData.c @@ -16,44 +16,44 @@ void TriceLogDiagnosticData(void) { #ifdef SEGGER_RTT int RTT0_wrSpaceMin = BUFFER_SIZE_UP - RTT0_writeDepthMax; if ((RTT0_wrSpaceMin < TRICE_BUFFER_SIZE)) { - trice16("WARNING:RTT0_writeDepthMax=%u (BUFFER_SIZE_UP=%u)\n", RTT0_writeDepthMax, BUFFER_SIZE_UP); + trice16(iD(16383), "WARNING:RTT0_writeDepthMax=%u (BUFFER_SIZE_UP=%u)\n", RTT0_writeDepthMax, BUFFER_SIZE_UP); } else { - trice16("diag:RTT0_writeDepthMax=%u (BUFFER_SIZE_UP=%u)\n", RTT0_writeDepthMax, BUFFER_SIZE_UP); + trice16(iD(16382), "diag:RTT0_writeDepthMax=%u (BUFFER_SIZE_UP=%u)\n", RTT0_writeDepthMax, BUFFER_SIZE_UP); } #endif // #ifdef SEGGER_RTT if (TriceErrorCount > 0) { - trice16("err:TriceErrorCount = %u\n", TriceErrorCount); + trice16(iD(16381), "err:TriceErrorCount = %u\n", TriceErrorCount); } #if TRICE_PROTECT == 1 #if TRICE_DIRECT_OUTPUT == 1 if (TriceDirectOverflowCount != 0) { - trice16("err:TriceDirectOverflowCount = %u\n", TriceDirectOverflowCount); + trice16(iD(16380), "err:TriceDirectOverflowCount = %u\n", TriceDirectOverflowCount); } #endif // #if TRICE_DIRECT_OUTPUT == 1 #if TRICE_DEFERRED_OUTPUT == 1 if (TriceDeferredOverflowCount != 0) { - trice16("err:TriceDeferredOverflowCount = %u\n", TriceDeferredOverflowCount); + trice16(iD(16379), "err:TriceDeferredOverflowCount = %u\n", TriceDeferredOverflowCount); } #endif // #if TRICE_DEFERRED_OUTPUT == 1 #endif // #if TRICE_PROTECT == 1 unsigned triceSingleDepthMax = TRICE_DATA_OFFSET + (TriceSingleMaxWordCount << 2); // lint !e845 Info 845: The left argument to operator '<<' is certain to be 0 if (triceSingleDepthMax <= TRICE_BUFFER_SIZE) { - trice16("diag:triceSingleDepthMax =%4u of %d (TRICE_BUFFER_SIZE)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE); + trice16(iD(16378), "diag:triceSingleDepthMax =%4u of %d (TRICE_BUFFER_SIZE)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE); } else { - trice16("err:triceSingleDepthMax =%4u of %d (TRICE_BUFFER_SIZE overflow!)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE); + trice16(iD(16377), "err:triceSingleDepthMax =%4u of %d (TRICE_BUFFER_SIZE overflow!)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE); } if (TriceDataOffsetDepthMax < 0 || TriceDataOffsetDepthMax >= TRICE_DATA_OFFSET) { - trice16("err:TriceDataOffsetDepthMax = %d of %d (TRICE_DATA_OFFSET)\n", TriceDataOffsetDepthMax, TRICE_DATA_OFFSET); + trice16(iD(16376), "err:TriceDataOffsetDepthMax = %d of %d (TRICE_DATA_OFFSET)\n", TriceDataOffsetDepthMax, TRICE_DATA_OFFSET); } else if (TriceDataOffsetDepthMax != 0) { - trice16("diag:TriceDataOffsetDepthMax = %d of %d (TRICE_DATA_OFFSET)\n", TriceDataOffsetDepthMax, TRICE_DATA_OFFSET); + trice16(iD(16375), "diag:TriceDataOffsetDepthMax = %d of %d (TRICE_DATA_OFFSET)\n", TriceDataOffsetDepthMax, TRICE_DATA_OFFSET); } if (TriceDynStringBufTruncateCount != 0) { - trice16("wrn:TriceDynStringBufTruncateCount = %u\n", TriceDynStringBufTruncateCount); + trice16(iD(15556), "wrn:TriceDynStringBufTruncateCount = %u\n", TriceDynStringBufTruncateCount); } #if TRICE_BUFFER == TRICE_STACK_BUFFER @@ -64,17 +64,17 @@ void TriceLogDiagnosticData(void) { #if TRICE_BUFFER == TRICE_DOUBLE_BUFFER if (TriceHalfBufferDepthMax <= TRICE_DEFERRED_BUFFER_SIZE / 2) { - trice16("diag:TriceHalfBufferDepthMax =%4u of%5d\n", TriceHalfBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE / 2); + trice16(iD(16373), "diag:TriceHalfBufferDepthMax =%4u of%5d\n", TriceHalfBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE / 2); } else { - trice16("err:TriceHalfBufferDepthMax =%4u of%5d (overflow!)\n", TriceHalfBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE / 2); + trice16(iD(16372), "err:TriceHalfBufferDepthMax =%4u of%5d (overflow!)\n", TriceHalfBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE / 2); } #endif // #if TRICE_BUFFER == TRICE_DOUBLE_BUFFER #if TRICE_BUFFER == TRICE_RING_BUFFER if (TriceRingBufferDepthMax <= TRICE_DEFERRED_BUFFER_SIZE) { - trice16("diag:triceRingBufferDepthMax =%4u of%5d\n", TriceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE); + trice16(iD(16371), "diag:triceRingBufferDepthMax =%4u of%5d\n", TriceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE); } else { - trice16("err:triceRingBufferDepthMax =%4u of%5d (overflow!)\n", TriceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE); + trice16(iD(16370), "err:triceRingBufferDepthMax =%4u of%5d (overflow!)\n", TriceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE); } #endif // #if TRICE_BUFFER == TRICE_RING_BUFFER } From 80e9e87b7018c52a092e975889413b8444d17226 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Tue, 11 Mar 2025 07:54:16 +0100 Subject: [PATCH 004/187] Update LICENSE.md --- LICENSE.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/LICENSE.md b/LICENSE.md index 1ee23af13..4d8b8a977 100644 --- a/LICENSE.md +++ b/LICENSE.md @@ -14,7 +14,7 @@ copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NON INFRINGEMENT. IN NO EVENT SHALL THE +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE From 8d109dfdf4bf6d66984c68bc20a8f4c2d4ba6efb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Fri, 14 Mar 2025 07:05:50 +0100 Subject: [PATCH 005/187] Update TriceUserManual.md In 4.8 corrected: letter -> message --- docs/TriceUserManual.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/TriceUserManual.md b/docs/TriceUserManual.md index 40fa5a6e2..a57eb0d7f 100644 --- a/docs/TriceUserManual.md +++ b/docs/TriceUserManual.md @@ -524,7 +524,7 @@ Trice is usable also inside interrupts and [extended format specifier possibilit ### 4.8. Tags, Color and Log Levels -You can label each Trice with a tag specifier to [colorize](#trice-tags-and-color) the output. This is free of any runtime costs because the tags are part of the Trice log format strings, which are not compiled into the target. The Trice tool will strip full lowercase tag descriptors from the format string after setting the appropriate color, making it possible to give each letter its color. +You can label each Trice with a tag specifier to [colorize](#trice-tags-and-color) the output. This is free of any runtime costs because the tags are part of the Trice log format strings, which are not compiled into the target. The Trice tool will strip full lowercase tag descriptors from the format string after setting the appropriate color, making it possible to give each message its color. Loggers use log levels and offer a setting like "log all above **INFO**" for example. The Trice tags can cover that but can do better: Inside package _emitter.ColorChannels_ in a single file [./internal/emitter/lineTransformerANSI.go](../internal/emitter/lineTransformerANSI.go) all common log levels defined as Trice tags alongside with user tags. The user can adjust this. The Trice tool has the `-pick` and `-ban` switches to control the display in detail. Also a `-logLevel` switch is usable to determine a display threshold as tag position inside ColorChannels. From 6f787eeaa1a9ed3fa2a0c5e6a46e7f122e77c707 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Wed, 26 Mar 2025 05:31:23 +0100 Subject: [PATCH 006/187] Update TriceUserManual.md --- docs/TriceUserManual.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/docs/TriceUserManual.md b/docs/TriceUserManual.md index a57eb0d7f..3ca8b8b6d 100644 --- a/docs/TriceUserManual.md +++ b/docs/TriceUserManual.md @@ -1381,6 +1381,8 @@ $ go install ./cmd/trice/ Afterwards you should find an executable `trice` inside $GOPATH/bin/ and you can modify its source code. +After installing Go, in your home folder should exist a folder ./go/bin. Please add it to your path variable. OR: Copy the Trice binary from there into a folder of your path after creating it with `go install ./cmd/trice/...` +

(back to top)

## 10. Embedded system code configuration From f18b7b5808ec4d3848f5839ed5c6b8f885ddbcb3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Wed, 26 Mar 2025 05:41:53 +0100 Subject: [PATCH 007/187] Update TriceUserManual.md --- docs/TriceUserManual.md | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/docs/TriceUserManual.md b/docs/TriceUserManual.md index 3ca8b8b6d..3dcb25d51 100644 --- a/docs/TriceUserManual.md +++ b/docs/TriceUserManual.md @@ -3001,6 +3001,11 @@ Please check the manuals and create a pull request or simply let me know. * [../_test/testdata/triceCheck.c](../_test/testdata/triceCheck.c) contains the code for this example. * The Trice tool, if knowing `wrn:` as pattern, prepends the appropriate color code. It removes the sequence `wrn:`, if it is known and completely lower case. + * The Trice tool will strip full lowercase tag descriptors from the format string after setting the appropriate color, making it possible to give even each letter in a message its color. + + `"wrn:fox"` will display colored "fox" + `"Wrn:fox"` will display colored "Wrn:fox" + * The user can define any pattern with any color code to create colored output with the Trice tool. * There is no tag enable switch inside the target code. It would need a back channel and add overhead. * An option using tag specific ID ranges with optional routing exists. From 23c1982732dbc6fb4fd7590fc0c783f0f46ad9fe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Wed, 26 Mar 2025 09:30:22 +0100 Subject: [PATCH 008/187] display server info extended --- docs/TriceUserManual.md | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/docs/TriceUserManual.md b/docs/TriceUserManual.md index 3dcb25d51..91c3f16a7 100644 --- a/docs/TriceUserManual.md +++ b/docs/TriceUserManual.md @@ -1509,7 +1509,11 @@ trice l -ds -p COM3 trice sd -r 192.168.1.23:45678 ``` -#### 13.2.4. Logfile output +The IP address and port are free selectable. Using a display server, allows to watch the logs of one or many MCUs on a local or remote machine with the same or different display servers. + +A local Trice instance sends Trice messages to a display server only, when a log line is complete (if consisting of several Trices). By using the CLI switches `-prefix` and `-suffix` you can decorate the loglines target specific to distinguish them in the output window(s). + +##13.2.4. Logfile output ```bash trice l -p COM3 -logfile auto From cf2c8066714bc33ab65918406a2704063e80a2c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Sat, 29 Mar 2025 22:45:33 +0100 Subject: [PATCH 009/187] typo corrected --- docs/TriceUserManual.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/TriceUserManual.md b/docs/TriceUserManual.md index 91c3f16a7..9c6a93992 100644 --- a/docs/TriceUserManual.md +++ b/docs/TriceUserManual.md @@ -730,7 +730,7 @@ When developing firmware, we get often different versions and variants in the de * Place the extracted Trice [binary](https://github.com/rokath/trice/releases/latest) somewhere in your [PATH](https://en.wikipedia.org/wiki/PATH_(variable)). * Copy the src folder into your project and add all files. * Copy a triceConfig.h from a subfolder in the examples or test folder and optionally adapt it. See file [*triceDefaultConfig.h*](../src/triceDefaultConfig.h) for help. - * Inside the triceConfig.h file cou can control, if Trice works in direct or deferred mode or both parallel. + * Inside the triceConfig.h file you can control, if Trice works in direct or deferred mode or both parallel. ### 6.3. Try it From 807b2be637d20d35ae3300aa28d4ac761da1f51d Mon Sep 17 00:00:00 2001 From: rokath Date: Sun, 13 Apr 2025 13:18:58 +0200 Subject: [PATCH 010/187] Issue #523 fix --- internal/id/insertIDs.go | 14 +++--- internal/id/insertIDs_test.go | 93 +++++++++++++++++++++++++++++++++++ 2 files changed, 101 insertions(+), 6 deletions(-) diff --git a/internal/id/insertIDs.go b/internal/id/insertIDs.go index 8827f05e2..de582ebf9 100644 --- a/internal/id/insertIDs.go +++ b/internal/id/insertIDs.go @@ -123,14 +123,16 @@ func (p *idData) insertTriceIDs(w io.Writer, path string, in []byte, a *ant.Admi if loc == nil { break // done } + line += strings.Count(rest[:loc[6]], "\n") // Keep line number up-to-date for location information. // issue # 523 + // QUESTION: How to correct count (escaped/non-escaped) newlines inside Trice format strings? t.Type = rest[loc[0]:loc[1]] // t.Type is the TRice8_2 or TRice part for example. Hint: TRice defaults to 32 bit if not configured differently. t.Strg = rest[loc[5]+1 : loc[6]-1] // Now we have the complete trice t (Type and Strg). We remove the double quotes wit +1 and -1. if !SkipAdditionalChecks { - linesOffset := strings.Count(rest[:loc[6]], "\n") + linesOffset := 0 //strings.Count(rest[:loc[6]], "\n") // issue # 523 err = evaluateTriceParameterCount(t, line+linesOffset, rest[loc[6]:]) if err != nil { fmt.Fprintln(w, path, err) - os.Exit(-1) + os.Exit(-1) // return here for successful TestInsertIDsForNewTrice2 (but will let fail other tests) } } if loc[3] != loc[4] { // iD(n) found @@ -140,7 +142,7 @@ func (p *idData) insertTriceIDs(w io.Writer, path string, in []byte, a *ant.Admi if Verbose { fmt.Fprintln(w, "unexpected syntax", idS) } - line += strings.Count(rest[:loc[6]], "\n") // Keep line number up-to-date for location information. + //line += strings.Count(rest[:loc[6]], "\n") // Keep line number up-to-date for location information. // issue # 523 rest = rest[loc[6]:] offset += loc[6] continue // ignore such cases @@ -154,7 +156,7 @@ func (p *idData) insertTriceIDs(w io.Writer, path string, in []byte, a *ant.Admi } } else { fmt.Fprintln(w, "unexpected ", err, nStrg) // report - line += strings.Count(rest[:loc[6]], "\n") // Keep line number up-to-date for location information. + //line += strings.Count(rest[:loc[6]], "\n") // Keep line number up-to-date for location information. // issue # 523 rest = rest[loc[6]:] offset += loc[6] continue // ignore such cases @@ -307,7 +309,7 @@ func (p *idData) insertTriceIDs(w io.Writer, path string, in []byte, a *ant.Admi } p.idToTrice[idN] = t // add ID to p.idToTrice a.Mutex.Unlock() - line += strings.Count(rest[:loc[1]], "\n") // Update line number for location information. + //line += strings.Count(rest[:loc[1]], "\n") // Update line number for location information. // issue #523 if idN != idn { if Verbose { fmt.Fprintln(w, "Need to change source.", idn, " -> ", idN, " for ", t, "in file", path) @@ -322,7 +324,7 @@ func (p *idData) insertTriceIDs(w io.Writer, path string, in []byte, a *ant.Admi } p.idToLocNew[idN] = TriceLI{path, line} a.Mutex.Unlock() - line += strings.Count(rest[loc[1]:loc[6]], "\n") // Keep line number up-to-date for location information. + line += strings.Count(rest[loc[1]:loc[6]], "\n") // Keep line number up-to-date for location information. // issue #523 rest = rest[loc[6]:] offset += loc[6] } diff --git a/internal/id/insertIDs_test.go b/internal/id/insertIDs_test.go index dd9251e69..5fc30fa2a 100644 --- a/internal/id/insertIDs_test.go +++ b/internal/id/insertIDs_test.go @@ -4,8 +4,11 @@ package id_test import ( + "bytes" "fmt" + "io" "os" + "strings" "testing" "github.com/rokath/trice/internal/args" @@ -924,3 +927,93 @@ func TestInsertIDsForNewTrice2(t *testing.T) { assert.True(t, r) } } + +// TestInsertIDsForNewTrice2 checks for correct line numer in case of an format string / parameter count error. +// This test needs a modified insertTriceIDs function: Inside if !SkipAdditionalChecks { replace os.Exit(-1) with return } +func _TestInsertIDsForNewTrice_Issue_5xx(t *testing.T) { + defer Setup(t)() // This executes Setup(t) and puts the returned function into the defer list. + + fn0 := t.Name() + "file0.c" + fn1 := t.Name() + "file1.c" + + testSet := []SrcFile{ + // fn: in: expected: + {fn0, `TRice(iD(1200), "Hi!" ); trice(iD(1201), "Lo!" );`, `TRice(iD(1200), "Hi!" ); trice(iD(1201), "Lo!" );`}, + {fn1, // in + ` break; case __LINE__: triceS("msg:With triceS:%s\n", sABCDE ); // line 1 + TRice("hi %d", 5 ); // line 2 + TRice("hi %d %d", 5, 5 ); // line 3 + // don` + "'" + `t forget + trice("lo!" ); // line 5 + TRice("hi %d", 5, 5 ); // line 6 + break; case __LINE__: triceS("msg:With triceS:%s\n", sABCDE ); + trice32("msg: message = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] );`, + + // expected + ` break; case __LINE__: triceS(iD(1202), "msg:With triceS:%s\n", sABCDE ); // line 1 + TRice(iD(1203), "hi %d", 5 ); // line 2 + TRice(iD(1204), "hi %d %d", 5, 5 ); // line 3 + // don` + "'" + `t forget + trice(iD(1205), "lo!" ); // line 5 + TRice(iD(1206), "hi %d", 5 ); // line 6 + break; case __LINE__: triceS(iD(1207), "msg:With triceS:%s\n", sABCDE ); + trice32(iD(1206), "msg: message = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] );`}, + } + + // create src files + for _, k := range testSet { + assert.Nil(t, FSys.WriteFile(k.Fn, []byte(k.Clean), 0777)) + } + + // action 0 + assert.Nil(t, args.Handler(os.Stdout, FSys, []string{"trice", "add", "-src", fn0, "-src", fn1, "-til", FnJSON, "-li", LIFnJSON})) + + // check til.json + expTil := `{ + "1200": { + "Type": "TRice", + "Strg": "Hi!" + }, + "1201": { + "Type": "trice", + "Strg": "Lo!" + } +}` + actTil, e := FSys.ReadFile(FnJSON) + assert.Nil(t, e) + result := expTil == string(actTil) + if !result { + fmt.Println("ACTUAL TIL:", string(actTil)) + fmt.Println("EXPECT TIL:", expTil) + } + assert.True(t, result) + + // check li.json + expLI := `{ + "1200": { + "File": "TestInsertIDsForNewTrice_Issue_5xxfile0.c", + "Line": 1 + }, + "1201": { + "File": "TestInsertIDsForNewTrice_Issue_5xxfile0.c", + "Line": 1 + } +}` + actLI, e := FSys.ReadFile(LIFnJSON) + assert.Nil(t, e) + result = expLI == string(actLI) + if !result { + fmt.Println("ACTUAL LI:", string(actLI)) + fmt.Println("EXPECT LI:", expLI) + } + assert.True(t, result) + + // action 1 (2nd action) + IDData.TagList = IDData.TagList[:0] // reset ID space + var o bytes.Buffer + e = args.Handler(io.Writer(&o), FSys, []string{"trice", "insert", "-src", fn0, "-src", fn1, "-IDMin=1200", "-IDMax=1299", "-IDMethod=upward", "-til", FnJSON, "-li", LIFnJSON}) + assert.Error(t, e) + expMsg := "TestInsertIDsForNewTrice_Issue_5xxfile1.c line 6 format specifier count 1 != parameter count 2 for {TRice hi %d}" + actMsg := o.String() + assert.True(t, strings.HasPrefix(actMsg, expMsg)) +} From c429e04379864bab37ece3a4c10012a74a546322 Mon Sep 17 00:00:00 2001 From: rokath Date: Sun, 13 Apr 2025 14:00:39 +0200 Subject: [PATCH 011/187] wip --- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- _test/_ringB_de_multi_cobs_ua/triceConfig.h | 2 +- .../TargetActivity.c | 8 +- .../_ringB_protect_de_tcobs_ua/triceConfig.h | 2 +- .../TargetActivity.c | 34 +- _test/_special_dblB_de_tcobs_ua/triceConfig.h | 2 +- _test/be_dblB_de_tcobs_ua/triceConfig.h | 2 +- .../triceConfig.h | 2 +- _test/dblB_de_cobs_ua/triceConfig.h | 2 +- _test/dblB_de_multi_cobs_ua/triceConfig.h | 2 +- _test/dblB_de_multi_nopf_ua/triceConfig.h | 2 +- _test/dblB_de_multi_tcobs_ua/triceConfig.h | 2 +- .../dblB_de_multi_xtea_cobs_ua/triceConfig.h | 2 +- .../dblB_de_multi_xtea_tcobs_ua/triceConfig.h | 2 +- _test/dblB_de_nopf_ua/triceConfig.h | 2 +- _test/dblB_de_tcobs_ua/triceConfig.h | 2 +- _test/dblB_de_xtea_cobs_ua/triceConfig.h | 2 +- _test/dblB_de_xtea_tcobs_ua/triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- _test/ringB_de_cobs_ua/triceConfig.h | 2 +- _test/ringB_de_multi_tcobs_ua/triceConfig.h | 2 +- .../ringB_de_multi_xtea_cobs_ua/triceConfig.h | 2 +- .../triceConfig.h | 2 +- _test/ringB_de_nopf_ua/triceConfig.h | 2 +- _test/ringB_de_tcobs_ua/triceConfig.h | 2 +- _test/ringB_de_xtea_cobs_ua/triceConfig.h | 2 +- _test/ringB_de_xtea_tcobs_ua/triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- .../triceConfig.h | 2 +- _test/special_for_debug/TargetActivity.c | 4 +- _test/special_for_debug/triceConfig.h | 2 +- .../TargetActivity.c | 8 +- .../triceConfig.h | 2 +- _test/stackB_di_nopf_aux32/triceConfig.h | 2 +- _test/stackB_di_nopf_aux8/triceConfig.h | 2 +- _test/stackB_di_nopf_rtt32/triceConfig.h | 2 +- _test/stackB_di_nopf_rtt8/triceConfig.h | 2 +- _test/stackB_di_xtea_cobs_rtt8/triceConfig.h | 2 +- _test/staticB_di_nopf_aux32/triceConfig.h | 2 +- _test/staticB_di_nopf_aux8/triceConfig.h | 2 +- _test/staticB_di_nopf_rtt32/triceConfig.h | 2 +- _test/staticB_di_nopf_rtt8/triceConfig.h | 2 +- _test/staticB_di_tcobs_rtt32/triceConfig.h | 2 +- _test/staticB_di_tcobs_rtt8/triceConfig.h | 2 +- .../staticB_di_xtea_cobs_rtt32/triceConfig.h | 2 +- _test/testdata/triceCheck.c | 4502 ++++++++--------- demoLI.json | 722 ++- demoTIL.json | 612 +-- examples/F030_inst/Core/Inc/triceConfig.h | 2 +- examples/F030_inst/Core/Src/stm32f0xx_it.c | 4 +- examples/G0B1_inst/Core/Inc/triceConfig.h | 2 +- examples/G0B1_inst/Core/Src/main.c | 4 +- examples/G0B1_inst/Core/Src/stm32g0xx_it.c | 2 +- examples/L432_inst/Core/Inc/triceConfig.h | 12 +- examples/L432_inst/Core/Src/main.c | 4 +- examples/L432_inst/Core/Src/stm32l4xx_it.c | 4 +- examples/exampleData/triceExamples.c | 88 +- examples/exampleData/triceLogDiagData.c | 28 +- internal/id/insertIDs_test.go | 4 +- 75 files changed, 2939 insertions(+), 3219 deletions(-) diff --git a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h index 7d1dbc3fd..114525dd1 100644 --- a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 // trice l -p jlink -args "-Device STM32F030R8 -if SWD -Speed 4000 -RTTChannel 0" -showID "deb:%04x" -hs off -pf cobs -d16=true #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h index 8f8e62c1f..24ff57164 100644 --- a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceConfig.h b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceConfig.h index 3f02573ca..efd75d273 100644 --- a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceConfig.h +++ b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/triceConfig.h b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/triceConfig.h index dee30b55f..0d19549bf 100644 --- a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/_ringB_de_multi_cobs_ua/triceConfig.h b/_test/_ringB_de_multi_cobs_ua/triceConfig.h index 5eb799871..2635b8f55 100644 --- a/_test/_ringB_de_multi_cobs_ua/triceConfig.h +++ b/_test/_ringB_de_multi_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE diff --git a/_test/_ringB_protect_de_tcobs_ua/TargetActivity.c b/_test/_ringB_protect_de_tcobs_ua/TargetActivity.c index 7413bad95..8b994e243 100644 --- a/_test/_ringB_protect_de_tcobs_ua/TargetActivity.c +++ b/_test/_ringB_protect_de_tcobs_ua/TargetActivity.c @@ -4,10 +4,10 @@ // Needed safety space is TRICE_DATA_OFFSET + (2*TRICE_SINGLE_MAX_SIZE)-4) = 208 // TRICE_DEFERRED_BUFFER_SIZE == 324 char* TargetActivity(void) { // -4 bytes TRICE_DATA_OFFSET = 320 bytes space - TRice(iD(15214), "Hello "); // -8 bytes = 312 bytes space - TRice(iD(15215), "World!\n"); // -8 bytes = 304 bytes space - TRice64(iD(15216), "msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12); // -104 bytes = 200 bytes space + TRice("Hello "); // -8 bytes = 312 bytes space + TRice("World!\n"); // -8 bytes = 304 bytes space + TRice64("msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12); // -104 bytes = 200 bytes space // so the next Trice does not fit - trice(iD(15217), "Hello again\n"); // -4 bytes -> no fit! + trice("Hello again\n"); // -4 bytes -> no fit! return "feed3322 Hello World!\nfeed3322 Twelve 64-bit values: -1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12"; } diff --git a/_test/_ringB_protect_de_tcobs_ua/triceConfig.h b/_test/_ringB_protect_de_tcobs_ua/triceConfig.h index 3120cb233..a21dc829c 100644 --- a/_test/_ringB_protect_de_tcobs_ua/triceConfig.h +++ b/_test/_ringB_protect_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/_special_dblB_de_tcobs_ua/TargetActivity.c b/_test/_special_dblB_de_tcobs_ua/TargetActivity.c index 454bda033..9ee6e42d4 100644 --- a/_test/_special_dblB_de_tcobs_ua/TargetActivity.c +++ b/_test/_special_dblB_de_tcobs_ua/TargetActivity.c @@ -8,22 +8,22 @@ void TriceCheckSpecial( int n ) { static int64_t b64[4] = { 0, -1, -2, 0x3344555566666666 }; switch(n){ - case __LINE__: TRice(iD(15197), "Hello World!\n"); //exp: feed3322 Hello World! - break; case __LINE__: TRICE8_F(ID(15198), "info:FunctionNameWa", b8, sizeof(b8) /sizeof(int8_t) ); //exp: feed3322 FunctionNameWa(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: TRice8F(iD(15199), "info:FunctionNameWb", b8, sizeof(b8) /sizeof(int8_t) ); //exp: feed3322 FunctionNameWb(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: Trice8F(iD(15200), "info:FunctionNameWc", b8, sizeof(b8) /sizeof(int8_t) ); //exp: be16 FunctionNameWc(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: trice8F(iD(15201), "info:FunctionNameWd", b8, sizeof(b8) /sizeof(int8_t) ); //exp: FunctionNameWd(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: TRICE16_F(ID(15202), "info:FunctionNameXa", b16, sizeof(b16)/sizeof(int16_t) ); //exp: feed3322 FunctionNameXa(0000)(ffff)(fffe)(3344) - break; case __LINE__: TRice16F(iD(15203), "info:FunctionNameXb", b16, sizeof(b16)/sizeof(int16_t) ); //exp: feed3322 FunctionNameXb(0000)(ffff)(fffe)(3344) - break; case __LINE__: Trice16F(iD(15204), "info:FunctionNameXc", b16, sizeof(b16)/sizeof(int16_t) ); //exp: be16 FunctionNameXc(0000)(ffff)(fffe)(3344) - break; case __LINE__: trice16F(iD(15205), "info:FunctionNameXd", b16, sizeof(b16)/sizeof(int16_t) ); //exp: FunctionNameXd(0000)(ffff)(fffe)(3344) - break; case __LINE__: TRICE32_F(ID(15206), "info:FunctionNameYa", b32, sizeof(b32)/sizeof(int32_t) ); //exp: feed3322 FunctionNameYa(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: TRice32F(iD(15207), "rpc:FunctionNameYb", b32, sizeof(b32)/sizeof(int32_t) ); //exp: feed3322 FunctionNameYb(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: Trice32F(iD(15208), "rpc:FunctionNameYc", b32, sizeof(b32)/sizeof(int32_t) ); //exp: be16 FunctionNameYc(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: trice32F(iD(15209), "call:FunctionNameYd", b32, sizeof(b32)/sizeof(int32_t) ); //exp: call:FunctionNameYd(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: TRICE64_F(ID(15210), "info:FunctionNameZa", b64, sizeof(b64)/sizeof(int64_t) ); //exp: feed3322 FunctionNameZa(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: TRice64F(iD(15211), "call:FunctionNameZb", b64, sizeof(b64)/sizeof(int64_t) ); //exp: feed3322 call FunctionNameZb(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: Trice64F(iD(15212), "RPC:FunctionNameZc", b64, sizeof(b64)/sizeof(int64_t) ); //exp: be16 RPC:FunctionNameZc(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: trice64F(iD(15213), "Rpc:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: Rpc:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + case __LINE__: TRice("Hello World!\n"); //exp: feed3322 Hello World! + break; case __LINE__: TRICE8_F(ID(0), "info:FunctionNameWa", b8, sizeof(b8) /sizeof(int8_t) ); //exp: feed3322 FunctionNameWa(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: TRice8F("info:FunctionNameWb", b8, sizeof(b8) /sizeof(int8_t) ); //exp: feed3322 FunctionNameWb(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: Trice8F("info:FunctionNameWc", b8, sizeof(b8) /sizeof(int8_t) ); //exp: be16 FunctionNameWc(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: trice8F("info:FunctionNameWd", b8, sizeof(b8) /sizeof(int8_t) ); //exp: FunctionNameWd(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: TRICE16_F(ID(0), "info:FunctionNameXa", b16, sizeof(b16)/sizeof(int16_t) ); //exp: feed3322 FunctionNameXa(0000)(ffff)(fffe)(3344) + break; case __LINE__: TRice16F("info:FunctionNameXb", b16, sizeof(b16)/sizeof(int16_t) ); //exp: feed3322 FunctionNameXb(0000)(ffff)(fffe)(3344) + break; case __LINE__: Trice16F("info:FunctionNameXc", b16, sizeof(b16)/sizeof(int16_t) ); //exp: be16 FunctionNameXc(0000)(ffff)(fffe)(3344) + break; case __LINE__: trice16F("info:FunctionNameXd", b16, sizeof(b16)/sizeof(int16_t) ); //exp: FunctionNameXd(0000)(ffff)(fffe)(3344) + break; case __LINE__: TRICE32_F(ID(0), "info:FunctionNameYa", b32, sizeof(b32)/sizeof(int32_t) ); //exp: feed3322 FunctionNameYa(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: TRice32F("rpc:FunctionNameYb", b32, sizeof(b32)/sizeof(int32_t) ); //exp: feed3322 FunctionNameYb(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: Trice32F("rpc:FunctionNameYc", b32, sizeof(b32)/sizeof(int32_t) ); //exp: be16 FunctionNameYc(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: trice32F("call:FunctionNameYd", b32, sizeof(b32)/sizeof(int32_t) ); //exp: call:FunctionNameYd(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: TRICE64_F(ID(0), "info:FunctionNameZa", b64, sizeof(b64)/sizeof(int64_t) ); //exp: feed3322 FunctionNameZa(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: TRice64F("call:FunctionNameZb", b64, sizeof(b64)/sizeof(int64_t) ); //exp: feed3322 call FunctionNameZb(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: Trice64F("RPC:FunctionNameZc", b64, sizeof(b64)/sizeof(int64_t) ); //exp: be16 RPC:FunctionNameZc(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: trice64F("Rpc:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: Rpc:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) } } diff --git a/_test/_special_dblB_de_tcobs_ua/triceConfig.h b/_test/_special_dblB_de_tcobs_ua/triceConfig.h index 367991d66..06088a428 100644 --- a/_test/_special_dblB_de_tcobs_ua/triceConfig.h +++ b/_test/_special_dblB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/be_dblB_de_tcobs_ua/triceConfig.h b/_test/be_dblB_de_tcobs_ua/triceConfig.h index c9bc8b1b6..8e7ba93c6 100644 --- a/_test/be_dblB_de_tcobs_ua/triceConfig.h +++ b/_test/be_dblB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/be_staticB_di_xtea_cobs_rtt32/triceConfig.h b/_test/be_staticB_di_xtea_cobs_rtt32/triceConfig.h index d79087eda..91a0d9ccc 100644 --- a/_test/be_staticB_di_xtea_cobs_rtt32/triceConfig.h +++ b/_test/be_staticB_di_xtea_cobs_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_TRANSFER_ORDER_IS_BIG_ENDIAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER diff --git a/_test/dblB_de_cobs_ua/triceConfig.h b/_test/dblB_de_cobs_ua/triceConfig.h index 98970268b..f392b7ff9 100644 --- a/_test/dblB_de_cobs_ua/triceConfig.h +++ b/_test/dblB_de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_cobs_ua/triceConfig.h b/_test/dblB_de_multi_cobs_ua/triceConfig.h index 29b411a2c..bc859e718 100644 --- a/_test/dblB_de_multi_cobs_ua/triceConfig.h +++ b/_test/dblB_de_multi_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_nopf_ua/triceConfig.h b/_test/dblB_de_multi_nopf_ua/triceConfig.h index de08c58db..0e4314a14 100644 --- a/_test/dblB_de_multi_nopf_ua/triceConfig.h +++ b/_test/dblB_de_multi_nopf_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_tcobs_ua/triceConfig.h b/_test/dblB_de_multi_tcobs_ua/triceConfig.h index 108930ef3..9e06d481e 100644 --- a/_test/dblB_de_multi_tcobs_ua/triceConfig.h +++ b/_test/dblB_de_multi_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_xtea_cobs_ua/triceConfig.h b/_test/dblB_de_multi_xtea_cobs_ua/triceConfig.h index 8616e3788..2db48582e 100644 --- a/_test/dblB_de_multi_xtea_cobs_ua/triceConfig.h +++ b/_test/dblB_de_multi_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_multi_xtea_tcobs_ua/triceConfig.h b/_test/dblB_de_multi_xtea_tcobs_ua/triceConfig.h index 23c25479d..7a6a58ed5 100644 --- a/_test/dblB_de_multi_xtea_tcobs_ua/triceConfig.h +++ b/_test/dblB_de_multi_xtea_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_nopf_ua/triceConfig.h b/_test/dblB_de_nopf_ua/triceConfig.h index a90aba280..b04e91296 100644 --- a/_test/dblB_de_nopf_ua/triceConfig.h +++ b/_test/dblB_de_nopf_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_tcobs_ua/triceConfig.h b/_test/dblB_de_tcobs_ua/triceConfig.h index 8973561fd..04c771950 100644 --- a/_test/dblB_de_tcobs_ua/triceConfig.h +++ b/_test/dblB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_xtea_cobs_ua/triceConfig.h b/_test/dblB_de_xtea_cobs_ua/triceConfig.h index a753cc313..cf09fc362 100644 --- a/_test/dblB_de_xtea_cobs_ua/triceConfig.h +++ b/_test/dblB_de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_de_xtea_tcobs_ua/triceConfig.h b/_test/dblB_de_xtea_tcobs_ua/triceConfig.h index 91ff29ffb..3e1a0fac2 100644 --- a/_test/dblB_de_xtea_tcobs_ua/triceConfig.h +++ b/_test/dblB_de_xtea_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceConfig.h index 7d3b383c5..a6681eaf7 100644 --- a/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceConfig.h index 886f1bac5..77d589afb 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceConfig.h index 8b4839594..5984e9fa9 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h index 6ba8f55ba..603345a88 100644 --- a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h index 023fc1c97..80c1554ef 100644 --- a/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceConfig.h index 8d23b6b4b..44bedd991 100644 --- a/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceConfig.h index 0d3335e37..c58c25bd2 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceConfig.h index 3d50cb160..a3a499258 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h index da74d1662..f09a1cdba 100644 --- a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h +++ b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/ringB_de_cobs_ua/triceConfig.h b/_test/ringB_de_cobs_ua/triceConfig.h index 4b5e1b349..931e53e78 100644 --- a/_test/ringB_de_cobs_ua/triceConfig.h +++ b/_test/ringB_de_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_OUTPUT 1 diff --git a/_test/ringB_de_multi_tcobs_ua/triceConfig.h b/_test/ringB_de_multi_tcobs_ua/triceConfig.h index 5eb799871..2635b8f55 100644 --- a/_test/ringB_de_multi_tcobs_ua/triceConfig.h +++ b/_test/ringB_de_multi_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE diff --git a/_test/ringB_de_multi_xtea_cobs_ua/triceConfig.h b/_test/ringB_de_multi_xtea_cobs_ua/triceConfig.h index 5e79ed555..12cae32be 100644 --- a/_test/ringB_de_multi_xtea_cobs_ua/triceConfig.h +++ b/_test/ringB_de_multi_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_OUTPUT 1 diff --git a/_test/ringB_de_multi_xtea_tcobs_ua/triceConfig.h b/_test/ringB_de_multi_xtea_tcobs_ua/triceConfig.h index 2c82ea710..0bc64b3e3 100644 --- a/_test/ringB_de_multi_xtea_tcobs_ua/triceConfig.h +++ b/_test/ringB_de_multi_xtea_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_CONFIG_WARNINGS 0 diff --git a/_test/ringB_de_nopf_ua/triceConfig.h b/_test/ringB_de_nopf_ua/triceConfig.h index da99363e9..2c913f87f 100644 --- a/_test/ringB_de_nopf_ua/triceConfig.h +++ b/_test/ringB_de_nopf_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/ringB_de_tcobs_ua/triceConfig.h b/_test/ringB_de_tcobs_ua/triceConfig.h index 9d139a976..716ac1fc5 100644 --- a/_test/ringB_de_tcobs_ua/triceConfig.h +++ b/_test/ringB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_OUTPUT 1 diff --git a/_test/ringB_de_xtea_cobs_ua/triceConfig.h b/_test/ringB_de_xtea_cobs_ua/triceConfig.h index ee8a6db57..0d501d135 100644 --- a/_test/ringB_de_xtea_cobs_ua/triceConfig.h +++ b/_test/ringB_de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_OUTPUT 1 diff --git a/_test/ringB_de_xtea_tcobs_ua/triceConfig.h b/_test/ringB_de_xtea_tcobs_ua/triceConfig.h index d4ac33ad7..9e4943d4c 100644 --- a/_test/ringB_de_xtea_tcobs_ua/triceConfig.h +++ b/_test/ringB_de_xtea_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_CONFIG_WARNINGS 0 diff --git a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceConfig.h b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceConfig.h index 78ba3d7aa..c84fd5f4e 100644 --- a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceConfig.h b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceConfig.h index 8b6b5aa33..3f0178615 100644 --- a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h index 05a099fe4..9b3e26450 100644 --- a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h index 1f1a92202..ca0a8e840 100644 --- a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/ringB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h b/_test/ringB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h index 82f064dbe..40064c1cc 100644 --- a/_test/ringB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_nopf_rtt8__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceConfig.h b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceConfig.h index 3c3d07b4d..afcf43d1e 100644 --- a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceConfig.h +++ b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h index d7e2d0f84..0db366401 100644 --- a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h +++ b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_RING_BUFFER diff --git a/_test/special_for_debug/TargetActivity.c b/_test/special_for_debug/TargetActivity.c index 278c207f8..9d7adbc58 100644 --- a/_test/special_for_debug/TargetActivity.c +++ b/_test/special_for_debug/TargetActivity.c @@ -2,7 +2,7 @@ char* TargetActivity(void) { uint8_t buf[3] = {0xaa,0xbb,0xcc}; - TRice8B(iD(15218), "%3x\n", buf, 3); - TRice8B(iD(15219), "%3x\n", buf, 3); + TRice8B("%3x\n", buf, 3); + TRice8B("%3x\n", buf, 3); return "feed3322 aa bb cc\nfeed3322 aa bb cc"; } diff --git a/_test/special_for_debug/triceConfig.h b/_test/special_for_debug/triceConfig.h index 74d954d09..7ba6d5329 100644 --- a/_test/special_for_debug/triceConfig.h +++ b/_test/special_for_debug/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c b/_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c index 371fa44bc..73a3d4d42 100644 --- a/_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c +++ b/_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c @@ -3,10 +3,10 @@ // Needed safety space is TRICE_SINGLE_MAX_SIZE = 104 // TRICE_HALF_BUFFER_SIZE == 256 - TRICE_DATA_OFFSET == 64 = 192 bytes char* TargetActivity(void) { // -4 bytes TRICE_DATA_OFFSET = 188 bytes space - TRice(iD(15220), "Hello "); // -8 bytes = 180 bytes space - TRice(iD(15221), "World!\n"); // -8 bytes = 172 bytes space - TRice64(iD(15222), "msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12); // -104 bytes = 68 bytes space + TRice("Hello "); // -8 bytes = 180 bytes space + TRice("World!\n"); // -8 bytes = 172 bytes space + TRice64("msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12); // -104 bytes = 68 bytes space // so the next Trice does not fit - trice(iD(15223), "Hello again\n"); // -4 bytes -> no fit! + trice("Hello again\n"); // -4 bytes -> no fit! return "feed3322 Hello World!\nfeed3322 Twelve 64-bit values: -1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12"; } diff --git a/_test/special_protect_dblB_de_tcobs_ua/triceConfig.h b/_test/special_protect_dblB_de_tcobs_ua/triceConfig.h index 74d954d09..7ba6d5329 100644 --- a/_test/special_protect_dblB_de_tcobs_ua/triceConfig.h +++ b/_test/special_protect_dblB_de_tcobs_ua/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_DOUBLE_BUFFER diff --git a/_test/stackB_di_nopf_aux32/triceConfig.h b/_test/stackB_di_nopf_aux32/triceConfig.h index 367991d66..06088a428 100644 --- a/_test/stackB_di_nopf_aux32/triceConfig.h +++ b/_test/stackB_di_nopf_aux32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/stackB_di_nopf_aux8/triceConfig.h b/_test/stackB_di_nopf_aux8/triceConfig.h index 4308b9b04..67fa0a334 100644 --- a/_test/stackB_di_nopf_aux8/triceConfig.h +++ b/_test/stackB_di_nopf_aux8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/stackB_di_nopf_rtt32/triceConfig.h b/_test/stackB_di_nopf_rtt32/triceConfig.h index 47a329709..4ce8ce964 100644 --- a/_test/stackB_di_nopf_rtt32/triceConfig.h +++ b/_test/stackB_di_nopf_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/stackB_di_nopf_rtt8/triceConfig.h b/_test/stackB_di_nopf_rtt8/triceConfig.h index 370c347a5..ffeb0986f 100644 --- a/_test/stackB_di_nopf_rtt8/triceConfig.h +++ b/_test/stackB_di_nopf_rtt8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/stackB_di_xtea_cobs_rtt8/triceConfig.h b/_test/stackB_di_xtea_cobs_rtt8/triceConfig.h index dc5aa376c..fd5ee4563 100644 --- a/_test/stackB_di_xtea_cobs_rtt8/triceConfig.h +++ b/_test/stackB_di_xtea_cobs_rtt8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STACK_BUFFER diff --git a/_test/staticB_di_nopf_aux32/triceConfig.h b/_test/staticB_di_nopf_aux32/triceConfig.h index 699775a4f..2b190af44 100644 --- a/_test/staticB_di_nopf_aux32/triceConfig.h +++ b/_test/staticB_di_nopf_aux32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_nopf_aux8/triceConfig.h b/_test/staticB_di_nopf_aux8/triceConfig.h index 76b5ab9a0..1052390db 100644 --- a/_test/staticB_di_nopf_aux8/triceConfig.h +++ b/_test/staticB_di_nopf_aux8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_nopf_rtt32/triceConfig.h b/_test/staticB_di_nopf_rtt32/triceConfig.h index 7e8fbe634..2030896de 100644 --- a/_test/staticB_di_nopf_rtt32/triceConfig.h +++ b/_test/staticB_di_nopf_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_nopf_rtt8/triceConfig.h b/_test/staticB_di_nopf_rtt8/triceConfig.h index 7539a0e08..021d379ea 100644 --- a/_test/staticB_di_nopf_rtt8/triceConfig.h +++ b/_test/staticB_di_nopf_rtt8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_tcobs_rtt32/triceConfig.h b/_test/staticB_di_tcobs_rtt32/triceConfig.h index 279507fd7..55f2a6930 100644 --- a/_test/staticB_di_tcobs_rtt32/triceConfig.h +++ b/_test/staticB_di_tcobs_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_tcobs_rtt8/triceConfig.h b/_test/staticB_di_tcobs_rtt8/triceConfig.h index 001eb8b7e..852cf2ded 100644 --- a/_test/staticB_di_tcobs_rtt8/triceConfig.h +++ b/_test/staticB_di_tcobs_rtt8/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER #define TRICE_DIRECT_OUTPUT 1 diff --git a/_test/staticB_di_xtea_cobs_rtt32/triceConfig.h b/_test/staticB_di_xtea_cobs_rtt32/triceConfig.h index ace7e8f2b..d724801a3 100644 --- a/_test/staticB_di_xtea_cobs_rtt32/triceConfig.h +++ b/_test/staticB_di_xtea_cobs_rtt32/triceConfig.h @@ -9,7 +9,7 @@ extern "C" { #endif -#define TRICE_CLEAN 0 +#define TRICE_CLEAN 1 #define TRICE_BUFFER TRICE_STATIC_BUFFER diff --git a/_test/testdata/triceCheck.c b/_test/testdata/triceCheck.c index 247b5bdd3..04ce60105 100644 --- a/_test/testdata/triceCheck.c +++ b/_test/testdata/triceCheck.c @@ -31,7 +31,7 @@ static void dynString(int n); // This function is also called from Go for tests. void TriceCheck(int n) { #ifdef TRICE_CHECK_MIN - TRice(iD(13014), "\rTriceCheck %4d", n); + TRice("\rTriceCheck %4d", n); #else // #ifdef TRICE_CHECK_MIN char* sABCDE = "abcde 12345"; uint32_t lenABCDE = strlen(sABCDE); @@ -54,13 +54,13 @@ void TriceCheck(int n) { switch( n ){ default: - break; case __LINE__: trice16(iD(13015), "att: line %u\n", __LINE__ ); + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); // Lines ending with a comment starting with `//exp:` are executed during trhe automatic Go tests. - break; case __LINE__: TRice(iD(13016), "Hello World!\n" ); //exp: time:feed3322default: Hello World! + break; case __LINE__: TRice("Hello World!\n" ); //exp: time:feed3322default: Hello World! // normal use cases - break; case __LINE__: TRice(iD(13017), "info:This is a message without values and a 32-bit stamp.\n" ); //exp: time:feed3322default: info:This is a message without values and a 32-bit stamp. - break; case __LINE__: Trice(iD(13018), "info:This is a message without values and a 16-bit stamp.\n" ); //exp: time: be16default: info:This is a message without values and a 16-bit stamp. - break; case __LINE__: trice(iD(13019), "info:This is a message without values and without stamp.\n" ); //exp: time: default: info:This is a message without values and without stamp. + break; case __LINE__: TRice("info:This is a message without values and a 32-bit stamp.\n" ); //exp: time:feed3322default: info:This is a message without values and a 32-bit stamp. + break; case __LINE__: Trice("info:This is a message without values and a 16-bit stamp.\n" ); //exp: time: be16default: info:This is a message without values and a 16-bit stamp. + break; case __LINE__: trice("info:This is a message without values and without stamp.\n" ); //exp: time: default: info:This is a message without values and without stamp. break; case __LINE__: for( int i = 126; i < 130; i++ ){ dynString(i); } @@ -136,301 +136,301 @@ void TriceCheck(int n) { break; case __LINE__: dynString(__LINE__ - anchorLine); //exp: time: default: wr:0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ. break; case __LINE__: dynString(__LINE__ - anchorLine); //exp: time: default: wr:0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ., - break; case __LINE__: trice(iD(13020), "sig:trice without stamp and with 0 to 12 values (most common use cases)\n" ); - break; case __LINE__: trice(iD(13021), "rd:trice\n" ); //exp: time: default: rd:trice - break; case __LINE__: trice(iD(13022), "rd:trice %d\n", -1 ); //exp: time: default: rd:trice -1 - break; case __LINE__: trice(iD(13023), "rd:trice %d, %d\n", -1, -2 ); //exp: time: default: rd:trice -1, -2 - break; case __LINE__: trice(iD(13024), "rd:trice %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice -1, -2, -3 - break; case __LINE__: trice(iD(13025), "rd:trice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice -1, -2, -3, -4 - break; case __LINE__: trice(iD(13026), "rd:trice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5 - break; case __LINE__: trice(iD(13027), "rd:trice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice(iD(13028), "rd:trice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice(iD(13029), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice(iD(13030), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice(iD(13031), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice(iD(13032), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice(iD(13033), "rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: Trice(iD(13034), "sig:Trice with 16-bit stamp and with 0 to 12 values (common use cases)\n" ); - break; case __LINE__: Trice(iD(13035), "rd:Trice\n" ); //exp: time: be16default: rd:Trice - break; case __LINE__: Trice(iD(13036), "rd:Trice %d\n", -1 ); //exp: time: be16default: rd:Trice -1 - break; case __LINE__: Trice(iD(13037), "rd:Trice %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice -1, -2 - break; case __LINE__: Trice(iD(13038), "rd:Trice %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice -1, -2, -3 - break; case __LINE__: Trice(iD(13039), "rd:Trice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4 - break; case __LINE__: Trice(iD(13040), "rd:Trice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5 - break; case __LINE__: Trice(iD(13041), "rd:Trice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice(iD(13042), "rd:Trice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice(iD(13043), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice(iD(13044), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice(iD(13045), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice(iD(13046), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice(iD(13047), "rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice(iD(13048), "sig:TRice with 32-bit stamp and with 0 to 12 values (common use cases)\n" ); - break; case __LINE__: TRice(iD(13049), "rd:TRice\n" ); //exp: time:feed3322default: rd:TRice - break; case __LINE__: TRice(iD(13050), "rd:TRice %d\n", -1 ); //exp: time:feed3322default: rd:TRice -1 - break; case __LINE__: TRice(iD(13051), "rd:TRice %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice -1, -2 - break; case __LINE__: TRice(iD(13052), "rd:TRice %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice -1, -2, -3 - break; case __LINE__: TRice(iD(13053), "rd:TRice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4 - break; case __LINE__: TRice(iD(13054), "rd:TRice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5 - break; case __LINE__: TRice(iD(13055), "rd:TRice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice(iD(13056), "rd:TRice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice(iD(13057), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice(iD(13058), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice(iD(13059), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice(iD(13060), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice(iD(13061), "rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice (iD(13062), "sig:trice16 with 1 to 12 pointer\n" ); - break; case __LINE__: trice16(iD(13063), "rd:trice16 %p\n", -1 ); //exp: time: default: rd:trice16 ffff - break; case __LINE__: trice16(iD(13064), "rd:trice16 %p, %p\n", -1, -2 ); //exp: time: default: rd:trice16 ffff, fffe - break; case __LINE__: trice16(iD(13065), "rd:trice16 %p, %p, %p\n", -1, -2, -3 ); //exp: time: default: rd:trice16 ffff, fffe, fffd - break; case __LINE__: trice16(iD(13066), "rd:trice16 %p, %p, %p, %p\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc - break; case __LINE__: trice16(iD(13067), "rd:trice16 %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb - break; case __LINE__: trice16(iD(13068), "rd:trice16 %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa - break; case __LINE__: trice16(iD(13069), "rd:trice16 %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9 - break; case __LINE__: trice16(iD(13070), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8 - break; case __LINE__: trice16(iD(13071), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7 - break; case __LINE__: trice16(iD(13072), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6 - break; case __LINE__: trice16(iD(13073), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6, fff5 - break; case __LINE__: trice16(iD(13074), "rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6, fff5, fff4 - break; case __LINE__: trice8 (iD(13075), "rd:trice8 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 ff, fe, fd, fc, fb, fa, f9, f8, f7, f6, f5, f4 - break; case __LINE__: trice32(iD(13076), "rd:trice32 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 ffffffff, fffffffe, fffffffd, fffffffc, fffffffb, fffffffa, fffffff9, fffffff8, fffffff7, fffffff6, fffffff5, fffffff4 - - break; case __LINE__: trice (iD(13077), "sig:trice16 with 1 to 12 hex\n" ); - break; case __LINE__: trice16(iD(13078), "rd:trice16 %X\n", -1 ); //exp: time: default: rd:trice16 FFFF - break; case __LINE__: trice16(iD(13079), "rd:trice16 %X, %X\n", -1, -2 ); //exp: time: default: rd:trice16 FFFF, FFFE - break; case __LINE__: trice16(iD(13080), "rd:trice16 %X, %X, %X\n", -1, -2, -3 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD - break; case __LINE__: trice16(iD(13081), "rd:trice16 %X, %X, %X, %X\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC - break; case __LINE__: trice16(iD(13082), "rd:trice16 %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB - break; case __LINE__: trice16(iD(13083), "rd:trice16 %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA - break; case __LINE__: trice16(iD(13084), "rd:trice16 %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9 - break; case __LINE__: trice16(iD(13085), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8 - break; case __LINE__: trice16(iD(13086), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7 - break; case __LINE__: trice16(iD(13087), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6 - break; case __LINE__: trice16(iD(13088), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6, FFF5 - break; case __LINE__: trice16(iD(13089), "rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6, FFF5, FFF4 - break; case __LINE__: trice8 (iD(13090), "rd:trice8 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 FF, FE, FD, FC, FB, FA, F9, F8, F7, F6, F5, F4 - break; case __LINE__: trice32(iD(13091), "rd:trice32 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 FFFFFFFF, FFFFFFFE, FFFFFFFD, FFFFFFFC, FFFFFFFB, FFFFFFFA, FFFFFFF9, FFFFFFF8, FFFFFFF7, FFFFFFF6, FFFFFFF5, FFFFFFF4 - - break; case __LINE__: trice16(iD(13092), "att: line %u\n", __LINE__ ); + break; case __LINE__: trice("sig:trice without stamp and with 0 to 12 values (most common use cases)\n" ); + break; case __LINE__: trice("rd:trice\n" ); //exp: time: default: rd:trice + break; case __LINE__: trice("rd:trice %d\n", -1 ); //exp: time: default: rd:trice -1 + break; case __LINE__: trice("rd:trice %d, %d\n", -1, -2 ); //exp: time: default: rd:trice -1, -2 + break; case __LINE__: trice("rd:trice %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice -1, -2, -3 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice -1, -2, -3, -4 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice("rd:trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: Trice("sig:Trice with 16-bit stamp and with 0 to 12 values (common use cases)\n" ); + break; case __LINE__: Trice("rd:Trice\n" ); //exp: time: be16default: rd:Trice + break; case __LINE__: Trice("rd:Trice %d\n", -1 ); //exp: time: be16default: rd:Trice -1 + break; case __LINE__: Trice("rd:Trice %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice -1, -2 + break; case __LINE__: Trice("rd:Trice %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice -1, -2, -3 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice("rd:Trice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice("sig:TRice with 32-bit stamp and with 0 to 12 values (common use cases)\n" ); + break; case __LINE__: TRice("rd:TRice\n" ); //exp: time:feed3322default: rd:TRice + break; case __LINE__: TRice("rd:TRice %d\n", -1 ); //exp: time:feed3322default: rd:TRice -1 + break; case __LINE__: TRice("rd:TRice %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice -1, -2 + break; case __LINE__: TRice("rd:TRice %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice -1, -2, -3 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice("rd:TRice %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice ("sig:trice16 with 1 to 12 pointer\n" ); + break; case __LINE__: trice16("rd:trice16 %p\n", -1 ); //exp: time: default: rd:trice16 ffff + break; case __LINE__: trice16("rd:trice16 %p, %p\n", -1, -2 ); //exp: time: default: rd:trice16 ffff, fffe + break; case __LINE__: trice16("rd:trice16 %p, %p, %p\n", -1, -2, -3 ); //exp: time: default: rd:trice16 ffff, fffe, fffd + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9 + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8 + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7 + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6 + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6, fff5 + break; case __LINE__: trice16("rd:trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 ffff, fffe, fffd, fffc, fffb, fffa, fff9, fff8, fff7, fff6, fff5, fff4 + break; case __LINE__: trice8 ("rd:trice8 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 ff, fe, fd, fc, fb, fa, f9, f8, f7, f6, f5, f4 + break; case __LINE__: trice32("rd:trice32 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 ffffffff, fffffffe, fffffffd, fffffffc, fffffffb, fffffffa, fffffff9, fffffff8, fffffff7, fffffff6, fffffff5, fffffff4 + + break; case __LINE__: trice ("sig:trice16 with 1 to 12 hex\n" ); + break; case __LINE__: trice16("rd:trice16 %X\n", -1 ); //exp: time: default: rd:trice16 FFFF + break; case __LINE__: trice16("rd:trice16 %X, %X\n", -1, -2 ); //exp: time: default: rd:trice16 FFFF, FFFE + break; case __LINE__: trice16("rd:trice16 %X, %X, %X\n", -1, -2, -3 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9 + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8 + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7 + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6 + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6, FFF5 + break; case __LINE__: trice16("rd:trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 FFFF, FFFE, FFFD, FFFC, FFFB, FFFA, FFF9, FFF8, FFF7, FFF6, FFF5, FFF4 + break; case __LINE__: trice8 ("rd:trice8 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 FF, FE, FD, FC, FB, FA, F9, F8, F7, F6, F5, F4 + break; case __LINE__: trice32("rd:trice32 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 FFFFFFFF, FFFFFFFE, FFFFFFFD, FFFFFFFC, FFFFFFFB, FFFFFFFA, FFFFFFF9, FFFFFFF8, FFFFFFF7, FFFFFFF6, FFFFFFF5, FFFFFFF4 + + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); break; case __LINE__: #if TRICE_DEFERRED_XTEA_ENCRYPT == 1 || TRICE_DIRECT_XTEA_ENCRYPT == 1 - trice(iD(13093), "--------------------------------------------------\n" ); + trice("--------------------------------------------------\n" ); { uint32_t by[8] = {1,2,3,4,5,6}; int count = (sizeof(by) + 7) & ~7; // only multiple of 8 encryptable - trice32(iD(13094), "msg: message = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); - trice32(iD(13095), "tim: pre TriceEncryption SysTick=%d\n", SYSTICKVAL ); + trice32("msg: message = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); + trice32("tim: pre TriceEncryption SysTick=%d\n", SYSTICKVAL ); XTEAEncrypt(by, count>>2); - trice32(iD(13096), "tim: post TriceEncryption SysTick=%d\n", SYSTICKVAL ); - trice32(iD(13097), "att: TriceEncrypted = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); + trice32("tim: post TriceEncryption SysTick=%d\n", SYSTICKVAL ); + trice32("att: TriceEncrypted = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); #if XTEA_DECRYPT == 1 - trice16_1(iD(13098), "tim: pre TriceDecryption SysTick=%d\n", SYSTICKVAL ); + trice16_1("tim: pre TriceDecryption SysTick=%d\n", SYSTICKVAL ); XTEADecrypt(by, count>>2); - trice16_1(iD(13099), "tim: post TriceDecryption SysTick=%d\n", SYSTICKVAL ); + trice16_1("tim: post TriceDecryption SysTick=%d\n", SYSTICKVAL ); #endif - trice32(iD(13100), "msg: messge = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); + trice32("msg: messge = %08x %08x %08x %08x %08x %08x\n", by[0], by[1], by[2], by[3], by[4], by[5] ); } - trice(iD(13101), "--------------------------------------------------\n" ); + trice("--------------------------------------------------\n" ); #endif - break; case __LINE__: trice16(iD(13102), "att: line %u\n", __LINE__ ); - break; case __LINE__: trice(iD(13103), "dbg:Hi!\n" ); //exp: time: default: dbg:Hi! - break; case __LINE__: trice(iD(13104), "dbg: Hi!\n" ); //exp: time: default: dbg: Hi! - break; case __LINE__: trice(iD(13105), "sig:Some time measurements\n" ); - break; case __LINE__: trice(iD(13106), "isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 - break; case __LINE__: trice(iD(13107), "isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 - break; case __LINE__: trice(iD(13108), "isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 - break; case __LINE__: trice(iD(13109), "isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 - break; case __LINE__: trice_1(iD(13110), "isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 - break; case __LINE__: trice_1(iD(13111), "isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 - break; case __LINE__: trice_1(iD(13112), "isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 - break; case __LINE__: trice_1(iD(13113), "isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 - break; case __LINE__: TRICE16_1(id(13114), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 - break; case __LINE__: TRICE16_1(id(13115), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 - break; case __LINE__: TRICE16_1(id(13116), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 - break; case __LINE__: TRICE16_1(id(13117), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 - break; case __LINE__: TRICE_1(id(13118), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 - break; case __LINE__: TRICE_1(id(13119), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 - break; case __LINE__: TRICE_1(id(13120), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 - break; case __LINE__: TRICE_1(id(13121), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 - break; case __LINE__: TRICE(id(13122), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 - break; case __LINE__: TRICE(id(13123), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 - break; case __LINE__: TRICE(id(13124), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 - break; case __LINE__: TRICE(id(13125), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 - - break; case __LINE__: trice(iD(13126), "tim:trice START time message\n"); //exp: time: default: tim:trice START time message - break; case __LINE__: trice(iD(13127), "tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message - break; case __LINE__: trice(iD(13128), "tim:trice START time message\n"); //exp: time: default: tim:trice START time message - break; case __LINE__: trice(iD(13129), "tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message - break; case __LINE__: trice(iD(13130), "tim:trice START time message\n"); //exp: time: default: tim:trice START time message - break; case __LINE__: trice64(iD(13131), "rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 - break; case __LINE__: trice(iD(13132), "tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message - break; case __LINE__: TRICE(id(13133), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message - break; case __LINE__: TRICE(id(13134), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message - break; case __LINE__: TRICE(id(13135), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message - break; case __LINE__: TRICE(id(13136), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message - break; case __LINE__: TRICE(id(13137), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message - break; case __LINE__: TRICE64(id(13138), "rd:TRICE64 %d, %d\n", 1, 2 ); //exp: time: default: rd:TRICE64 1, 2 - break; case __LINE__: TRICE(id(13139), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message - break; case __LINE__: trice (iD(13140), "tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- - break; case __LINE__: trice (iD(13141), "tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- - break; case __LINE__: trice64(iD(13142), "rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 - break; case __LINE__: trice (iD(13143), "tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- - break; case __LINE__: trice (iD(13144), "tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- - break; case __LINE__: trice64(iD(13145), "rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 - break; case __LINE__: trice32_1(iD(13146), "rd:trice32_1 %d\n", -1 ); //exp: time: default: rd:trice32_1 -1 - break; case __LINE__: trice64_1(iD(13147), "rd:trice64_1 %d\n", -2 ); //exp: time: default: rd:trice64_1 -2 - break; case __LINE__: trice32_2(iD(13148), "rd:trice32_2 %d,%d\n", -1, 2 ); //exp: time: default: rd:trice32_2 -1,2 - break; case __LINE__: trice64_2(iD(13149), "rd:trice64_2 %d,%d\n", -1, 2 ); //exp: time: default: rd:trice64_2 -1,2 + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: trice("dbg:Hi!\n" ); //exp: time: default: dbg:Hi! + break; case __LINE__: trice("dbg: Hi!\n" ); //exp: time: default: dbg: Hi! + break; case __LINE__: trice("sig:Some time measurements\n" ); + break; case __LINE__: trice("isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 + break; case __LINE__: trice("isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 + break; case __LINE__: trice("isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 + break; case __LINE__: trice("isr:trice isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice isr message, SysTick is 0 + break; case __LINE__: trice_1("isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 + break; case __LINE__: trice_1("isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 + break; case __LINE__: trice_1("isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 + break; case __LINE__: trice_1("isr:trice_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:trice_1 isr message, SysTick is 0 + break; case __LINE__: TRICE16_1(id(0), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 + break; case __LINE__: TRICE16_1(id(0), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 + break; case __LINE__: TRICE16_1(id(0), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 + break; case __LINE__: TRICE16_1(id(0), "isr:TRICE16_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE16_1 isr message, SysTick is 0 + break; case __LINE__: TRICE_1(id(0), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 + break; case __LINE__: TRICE_1(id(0), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 + break; case __LINE__: TRICE_1(id(0), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 + break; case __LINE__: TRICE_1(id(0), "isr:TRICE_1 isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE_1 isr message, SysTick is 0 + break; case __LINE__: TRICE(id(0), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 + break; case __LINE__: TRICE(id(0), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 + break; case __LINE__: TRICE(id(0), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 + break; case __LINE__: TRICE(id(0), "isr:TRICE isr message, SysTick is %6d\n", SYSTICKVAL); //exp: time: default: isr:TRICE isr message, SysTick is 0 + + break; case __LINE__: trice("tim:trice START time message\n"); //exp: time: default: tim:trice START time message + break; case __LINE__: trice("tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message + break; case __LINE__: trice("tim:trice START time message\n"); //exp: time: default: tim:trice START time message + break; case __LINE__: trice("tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message + break; case __LINE__: trice("tim:trice START time message\n"); //exp: time: default: tim:trice START time message + break; case __LINE__: trice64("rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 + break; case __LINE__: trice("tim:trice STOP time message\n"); //exp: time: default: tim:trice STOP time message + break; case __LINE__: TRICE(id(0), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message + break; case __LINE__: TRICE(id(0), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message + break; case __LINE__: TRICE(id(0), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message + break; case __LINE__: TRICE(id(0), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message + break; case __LINE__: TRICE(id(0), "tim:TRICE START time message\n"); //exp: time: default: tim:TRICE START time message + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d\n", 1, 2 ); //exp: time: default: rd:TRICE64 1, 2 + break; case __LINE__: TRICE(id(0), "tim:TRICE STOP time message\n"); //exp: time: default: tim:TRICE STOP time message + break; case __LINE__: trice ("tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- + break; case __LINE__: trice ("tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- + break; case __LINE__: trice64("rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 + break; case __LINE__: trice ("tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- + break; case __LINE__: trice ("tim:trice --------------------------------------------------\n"); //exp: time: default: tim:trice -------------------------------------------------- + break; case __LINE__: trice64("rd:trice64 %d, %d\n", 1, 2 ); //exp: time: default: rd:trice64 1, 2 + break; case __LINE__: trice32_1("rd:trice32_1 %d\n", -1 ); //exp: time: default: rd:trice32_1 -1 + break; case __LINE__: trice64_1("rd:trice64_1 %d\n", -2 ); //exp: time: default: rd:trice64_1 -2 + break; case __LINE__: trice32_2("rd:trice32_2 %d,%d\n", -1, 2 ); //exp: time: default: rd:trice32_2 -1,2 + break; case __LINE__: trice64_2("rd:trice64_2 %d,%d\n", -1, 2 ); //exp: time: default: rd:trice64_2 -1,2 // special use cases - break; case __LINE__: TRice64(iD(13150), "info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time:feed3322default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: Trice64(iD(13151), "info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time: be16default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: trice64(iD(13152), "info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time: default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and without stamp. - - break; case __LINE__: TRice32(iD(13153), "info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. - break; case __LINE__: Trice32(iD(13154), "info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. - break; case __LINE__: trice32(iD(13155), "info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. - break; case __LINE__: TRice16(iD(13156), "info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. - break; case __LINE__: Trice16(iD(13157), "info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. - break; case __LINE__: trice16(iD(13158), "info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. - break; case __LINE__: TRice8 (iD(13159), "info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. - break; case __LINE__: Trice8 (iD(13160), "info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. - break; case __LINE__: trice8 (iD(13161), "info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. - - break; case __LINE__: trice16(iD(13162), "att: line %u\n", __LINE__ ); - - break; case __LINE__: TRice16(iD(13163), "att: 0x8888 == %04xh\n", 0x8888 ); //exp: time:feed3322default: att: 0x8888 == 8888h - break; case __LINE__: Trice16(iD(13164), "att: 0x8888 == %04xh\n", 0x8888 ); //exp: time: be16default: att: 0x8888 == 8888h - break; case __LINE__: trice16(iD(13165), "att: 0x8888 == %04xh\n", 0x8888 ); //exp: time: default: att: 0x8888 == 8888h - - - break; case __LINE__: trice16(iD(13166), "att: line %u\n", __LINE__ ); - break; case __LINE__: trice8 (iD(13167), "value=%x\n", 0x55 ); //exp: time: default: value=55 - break; case __LINE__: trice8 (iD(13168), "value=%x\n", 0x88 ); //exp: time: default: value=88 - - break; case __LINE__: trice(iD(13169), "att:mixed int & float & double & bits\n" ); - break; case __LINE__: TRice32(iD(13170), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", FloatToInt32(x), aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 - break; case __LINE__: TRice32(iD(13171), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", (int32_t)(x), aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 - break; case __LINE__: TRice32(iD(13172), "rd:TRice32 int %x, float %f (%%f), %08x, %032b\n", 0x44883377, aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 44883377, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 - break; case __LINE__: TRice32(iD(13173), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", x, aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 - break; case __LINE__: TRice32(iD(13174), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", FloatToInt32(-x), aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int -1089, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 - break; case __LINE__: TRice32(iD(13175), "rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", (int32_t)(-x), aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int -1089, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 - break; case __LINE__: TRice32(iD(13176), "rd:TRice32 int %X, float %f (%%f), %08x, %032b\n", -0x44883377, aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int BB77CC89, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 - break; case __LINE__: TRice64(iD(13177), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", DoubleToInt64(y), aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64(iD(13178), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", (int64_t)(y), aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64(iD(13179), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", y, aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64(iD(13180), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", DoubleToInt64(-y), aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int -518, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64(iD(13181), "rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", (int64_t)(-y), aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int -518, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 - break; case __LINE__: TRice64(iD(13182), "rd:TRice64 int %X, double %f (%%f), %016x, %064b\n", -0x4080307020601050, aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int BF7FCF8FDF9FEFB0, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 - - break; case __LINE__: trice16(iD(13183), "att: line %u\n", __LINE__ ); - break; case __LINE__: triceS(iD(13184), "msg:With triceS:%s\n", sABCDE ); //exp: time: default: msg:With triceS:abcde 12345 - break; case __LINE__: triceN(iD(13185), "sig:With triceN:%s\n", sABCDE, lenABCDE ); //exp: time: default: sig:With triceN:abcde 12345 - break; case __LINE__: TriceS(iD(13186), "msg:With TriceS:%s\n", sABCDE ); //exp: time: be16default: msg:With TriceS:abcde 12345 - break; case __LINE__: TriceN(iD(13187), "sig:With TriceN:%s\n", sABCDE, lenABCDE ); //exp: time: be16default: sig:With TriceN:abcde 12345 - break; case __LINE__: TRiceS(iD(13188), "msg:With TRiceS:%s\n", sABCDE ); //exp: time:feed3322default: msg:With TRiceS:abcde 12345 - break; case __LINE__: TRiceN(iD(13189), "sig:With TRiceN:%s\n", sABCDE, lenABCDE ); //exp: time:feed3322default: sig:With TRiceN:abcde 12345 - break; case __LINE__: TRICE_S(id(13190), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time: default: msg:With TRICE_S:abcde 12345 - break; case __LINE__: TRICE_N(id(13191), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time: default: sig:With TRICE_N:abcde 12345 - break; case __LINE__: TRICE_S(Id(13192), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time: be16default: msg:With TRICE_S:abcde 12345 - break; case __LINE__: TRICE_N(Id(13193), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time: be16default: sig:With TRICE_N:abcde 12345 - break; case __LINE__: TRICE_S(ID(13194), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time:feed3322default: msg:With TRICE_S:abcde 12345 - break; case __LINE__: TRICE_N(ID(13195), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time:feed3322default: sig:With TRICE_N:abcde 12345 - - break; case __LINE__: TRICE8_B(ID(13196), " %02x", sABCDE, lenABCDE ); //exp: time:feed3322default: 61 62 63 64 65 20 31 32 33 34 35 - break; case __LINE__: trice(iD(13197), "\n" ); - break; case __LINE__: TRICE8_B(ID(13198), "BUF: %02x\n", sABCDE, lenABCDE ); //exp: time:feed3322default: BUF: 61 62 63 64 65 20 31 32 33 34 35 - break; case __LINE__: TRICE8_B(ID(13199), "%4d", sABCDE, lenABCDE ); //exp: time:feed3322default: 97 98 99 100 101 32 49 50 51 52 53 - break; case __LINE__: trice(iD(13200), "\n" ); - break; case __LINE__: TRICE8_B(ID(13201), " %02x", b8, sizeof(b8)/sizeof(int8_t) ); //exp: time:feed3322default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice(iD(13202), "\n" ); - - break; case __LINE__: TRice8B(iD(13203), " %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice(iD(13204), "\n" ); - break; case __LINE__: Trice8B(iD(13205), " %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: be16default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice(iD(13206), "\n" ); - break; case __LINE__: trice8B(iD(13207), " %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice(iD(13208), "\n" ); - - break; case __LINE__: trice8B(iD(13209), "att: %02x\n", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: att: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice8B(iD(13210), "rd: %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: rd: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - break; case __LINE__: trice(iD(13211), "\n" ); - break; case __LINE__: trice8B(iD(13212), " %02x\n", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b - - break; case __LINE__: TRICE16_B(ID(13213), " %04x", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: 0000 ffff fffe 3344 - break; case __LINE__: trice(iD(13214), "\n" ); - break; case __LINE__: TRice16B(iD(13215), " %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time:feed3322default: 0000 ffff fffe 3344 - break; case __LINE__: trice(iD(13216), "\n" ); - break; case __LINE__: Trice16B(iD(13217), " %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: be16default: 0000 ffff fffe 3344 - break; case __LINE__: trice(iD(13218), "\n" ); - break; case __LINE__: trice16B(iD(13219), " %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: default: 0000 ffff fffe 3344 - break; case __LINE__: trice(iD(13220), "\n" ); - break; case __LINE__: trice16B(iD(13221), "msg: %04x\n", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: default: msg: 0000 ffff fffe 3344 - - break; case __LINE__: TRICE32_B(ID(13222), " %08x", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: 00000000 ffffffff fffffffe 33445555 - break; case __LINE__: trice(iD(13223), "\n" ); - break; case __LINE__: TRice32B(iD(13224), " %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time:feed3322default: 00000000 ffffffff fffffffe 33445555 - break; case __LINE__: trice(iD(13225), "\n" ); - break; case __LINE__: Trice32B(iD(13226), " %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: be16default: 00000000 ffffffff fffffffe 33445555 - break; case __LINE__: trice(iD(13227), "\n" ); - break; case __LINE__: trice32B(iD(13228), " %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: default: 00000000 ffffffff fffffffe 33445555 - break; case __LINE__: trice(iD(13229), "\n" ); - break; case __LINE__: trice32B(iD(13230), "att: %08x\n", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: default: att: 00000000 ffffffff fffffffe 33445555 - - break; case __LINE__: TRICE64_B(ID(13231), " %016x", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - break; case __LINE__: trice(iD(13232), "\n" ); - break; case __LINE__: TRice64B(iD(13233), " %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time:feed3322default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - break; case __LINE__: trice(iD(13234), "\n" ); - break; case __LINE__: Trice64B(iD(13235), " %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: be16default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - break; case __LINE__: trice(iD(13236), "\n" ); - break; case __LINE__: trice64B(iD(13237), " %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - break; case __LINE__: trice(iD(13238), "\n" ); - break; case __LINE__: trice64B(iD(13239), "SIG: %016x\n", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: default: SIG: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 - - break; case __LINE__: TRICE8_F(ID(13240), "info:FunctionNameWa", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: info:FunctionNameWa(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: TRice8F(iD(13241), "call:FunctionNameWb", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: call:FunctionNameWb(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: Trice8F(iD(13242), "call:FunctionNameWc", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: be16default: call:FunctionNameWc(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: trice8F(iD(13243), "call:FunctionNameWd", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: call:FunctionNameWd(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) - break; case __LINE__: TRICE16_F(ID(13244), "info:FunctionNameXa", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: info:FunctionNameXa(0000)(ffff)(fffe)(3344) - break; case __LINE__: TRice16F(iD(13245), "call:FunctionNameXb", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: call:FunctionNameXb(0000)(ffff)(fffe)(3344) - break; case __LINE__: Trice16F(iD(13246), "call:FunctionNameXc", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time: be16default: call:FunctionNameXc(0000)(ffff)(fffe)(3344) - break; case __LINE__: trice16F(iD(13247), "call:FunctionNameXd", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time: default: call:FunctionNameXd(0000)(ffff)(fffe)(3344) - break; case __LINE__: TRICE32_F(ID(13248), "info:FunctionNameYa", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: info:FunctionNameYa(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: TRice32F(iD(13249), "rpc:FunctionNameYb", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: rpc:FunctionNameYb(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: Trice32F(iD(13250), "rpc:FunctionNameYc", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time: be16default: rpc:FunctionNameYc(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: trice32F(iD(13251), "call:FunctionNameYd", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time: default: call:FunctionNameYd(00000000)(ffffffff)(fffffffe)(33445555) - break; case __LINE__: TRICE64_F(ID(13252), "info:FunctionNameZa", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: info:FunctionNameZa(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: TRice64F(iD(13253), "call:FunctionNameZb", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: call:FunctionNameZb(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: Trice64F(iD(13254), "RPC:FunctionNameZc", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time: be16default: RPC:FunctionNameZc(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: trice64F(iD(13255), "RPC:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time: default: RPC:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: TRice64("info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time:feed3322default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: Trice64("info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time: be16default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: trice64("info:12 64-bit values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 0, aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), aDouble(-7.123456789), -8 ); //exp: time: default: info:12 64-bit values -3, 18446744073709551612, fffffffffffffffb, FFFFFFFFFFFFFFFA, false, -7.123457e+00, -7.123457, -7.123456789, -7.123457E+00, -7.123457, -7.123456789, 0xb1111111111111111111111111111111111111111111111111111111111111000 and without stamp. + + break; case __LINE__: TRice32("info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. + break; case __LINE__: Trice32("info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. + break; case __LINE__: trice32("info:12 32-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 32-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. + break; case __LINE__: TRice16("info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. + break; case __LINE__: Trice16("info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. + break; case __LINE__: trice16("info:12 16-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 16-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. + break; case __LINE__: TRice8 ("info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 32-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 32-bit stamp. + break; case __LINE__: Trice8 ("info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and a 16-bit stamp.\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and a 16-bit stamp. + break; case __LINE__: trice8 ("info:12 8-bit values %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d and without stamp.\n" , -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: info:12 8-bit values -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 and without stamp. + + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + + break; case __LINE__: TRice16("att: 0x8888 == %04xh\n", 0x8888 ); //exp: time:feed3322default: att: 0x8888 == 8888h + break; case __LINE__: Trice16("att: 0x8888 == %04xh\n", 0x8888 ); //exp: time: be16default: att: 0x8888 == 8888h + break; case __LINE__: trice16("att: 0x8888 == %04xh\n", 0x8888 ); //exp: time: default: att: 0x8888 == 8888h + + + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: trice8 ("value=%x\n", 0x55 ); //exp: time: default: value=55 + break; case __LINE__: trice8 ("value=%x\n", 0x88 ); //exp: time: default: value=88 + + break; case __LINE__: trice("att:mixed int & float & double & bits\n" ); + break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", FloatToInt32(x), aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 + break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", (int32_t)(x), aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 + break; case __LINE__: TRice32("rd:TRice32 int %x, float %f (%%f), %08x, %032b\n", 0x44883377, aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 44883377, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 + break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", x, aFloat(x), aFloat(x), aFloat(x) ); //exp: time:feed3322default: rd:TRice32 int 1089, float 1089.608276 (%f), 44883377, 01000100100010000011001101110111 + break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", FloatToInt32(-x), aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int -1089, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 + break; case __LINE__: TRice32("rd:TRice32 int %d, float %f (%%f), %08x, %032b\n", (int32_t)(-x), aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int -1089, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 + break; case __LINE__: TRice32("rd:TRice32 int %X, float %f (%%f), %08x, %032b\n", -0x44883377, aFloat(-x), aFloat(-x), aFloat(-x) ); //exp: time:feed3322default: rd:TRice32 int BB77CC89, float -1089.608276 (%f), c4883377, 11000100100010000011001101110111 + break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", DoubleToInt64(y), aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", (int64_t)(y), aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", y, aDouble(y), aDouble(y), aDouble(y) ); //exp: time:feed3322default: rd:TRice64 int 518, double 518.054749 (%f), 4080307020601050, 0100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", DoubleToInt64(-y), aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int -518, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64("rd:TRice64 int %d, double %f (%%f), %016x, %064b\n", (int64_t)(-y), aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int -518, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 + break; case __LINE__: TRice64("rd:TRice64 int %X, double %f (%%f), %016x, %064b\n", -0x4080307020601050, aDouble(-y), aDouble(-y), aDouble(-y) ); //exp: time:feed3322default: rd:TRice64 int BF7FCF8FDF9FEFB0, double -518.054749 (%f), c080307020601050, 1100000010000000001100000111000000100000011000000001000001010000 + + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: triceS("msg:With triceS:%s\n", sABCDE ); //exp: time: default: msg:With triceS:abcde 12345 + break; case __LINE__: triceN("sig:With triceN:%s\n", sABCDE, lenABCDE ); //exp: time: default: sig:With triceN:abcde 12345 + break; case __LINE__: TriceS("msg:With TriceS:%s\n", sABCDE ); //exp: time: be16default: msg:With TriceS:abcde 12345 + break; case __LINE__: TriceN("sig:With TriceN:%s\n", sABCDE, lenABCDE ); //exp: time: be16default: sig:With TriceN:abcde 12345 + break; case __LINE__: TRiceS("msg:With TRiceS:%s\n", sABCDE ); //exp: time:feed3322default: msg:With TRiceS:abcde 12345 + break; case __LINE__: TRiceN("sig:With TRiceN:%s\n", sABCDE, lenABCDE ); //exp: time:feed3322default: sig:With TRiceN:abcde 12345 + break; case __LINE__: TRICE_S(id(0), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time: default: msg:With TRICE_S:abcde 12345 + break; case __LINE__: TRICE_N(id(0), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time: default: sig:With TRICE_N:abcde 12345 + break; case __LINE__: TRICE_S(Id(0), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time: be16default: msg:With TRICE_S:abcde 12345 + break; case __LINE__: TRICE_N(Id(0), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time: be16default: sig:With TRICE_N:abcde 12345 + break; case __LINE__: TRICE_S(ID(0), "msg:With TRICE_S:%s\n", sABCDE ); //exp: time:feed3322default: msg:With TRICE_S:abcde 12345 + break; case __LINE__: TRICE_N(ID(0), "sig:With TRICE_N:%s\n", sABCDE, lenABCDE ); //exp: time:feed3322default: sig:With TRICE_N:abcde 12345 + + break; case __LINE__: TRICE8_B(ID(0), " %02x", sABCDE, lenABCDE ); //exp: time:feed3322default: 61 62 63 64 65 20 31 32 33 34 35 + break; case __LINE__: trice("\n" ); + break; case __LINE__: TRICE8_B(ID(0), "BUF: %02x\n", sABCDE, lenABCDE ); //exp: time:feed3322default: BUF: 61 62 63 64 65 20 31 32 33 34 35 + break; case __LINE__: TRICE8_B(ID(0), "%4d", sABCDE, lenABCDE ); //exp: time:feed3322default: 97 98 99 100 101 32 49 50 51 52 53 + break; case __LINE__: trice("\n" ); + break; case __LINE__: TRICE8_B(ID(0), " %02x", b8, sizeof(b8)/sizeof(int8_t) ); //exp: time:feed3322default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice("\n" ); + + break; case __LINE__: TRice8B(" %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice("\n" ); + break; case __LINE__: Trice8B(" %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: be16default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice("\n" ); + break; case __LINE__: trice8B(" %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice("\n" ); + + break; case __LINE__: trice8B("att: %02x\n", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: att: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice8B("rd: %02x", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: rd: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + break; case __LINE__: trice("\n" ); + break; case __LINE__: trice8B(" %02x\n", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: 00 ff fe 33 04 05 06 07 08 09 0a 0b 00 ff fe 33 04 05 06 07 08 09 0a 0b + + break; case __LINE__: TRICE16_B(ID(0), " %04x", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: 0000 ffff fffe 3344 + break; case __LINE__: trice("\n" ); + break; case __LINE__: TRice16B(" %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time:feed3322default: 0000 ffff fffe 3344 + break; case __LINE__: trice("\n" ); + break; case __LINE__: Trice16B(" %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: be16default: 0000 ffff fffe 3344 + break; case __LINE__: trice("\n" ); + break; case __LINE__: trice16B(" %04x", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: default: 0000 ffff fffe 3344 + break; case __LINE__: trice("\n" ); + break; case __LINE__: trice16B("msg: %04x\n", b16, sizeof(b16) /sizeof(int16_t) ); //exp: time: default: msg: 0000 ffff fffe 3344 + + break; case __LINE__: TRICE32_B(ID(0), " %08x", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: 00000000 ffffffff fffffffe 33445555 + break; case __LINE__: trice("\n" ); + break; case __LINE__: TRice32B(" %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time:feed3322default: 00000000 ffffffff fffffffe 33445555 + break; case __LINE__: trice("\n" ); + break; case __LINE__: Trice32B(" %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: be16default: 00000000 ffffffff fffffffe 33445555 + break; case __LINE__: trice("\n" ); + break; case __LINE__: trice32B(" %08x", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: default: 00000000 ffffffff fffffffe 33445555 + break; case __LINE__: trice("\n" ); + break; case __LINE__: trice32B("att: %08x\n", b32, sizeof(b32) /sizeof(int32_t) ); //exp: time: default: att: 00000000 ffffffff fffffffe 33445555 + + break; case __LINE__: TRICE64_B(ID(0), " %016x", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + break; case __LINE__: trice("\n" ); + break; case __LINE__: TRice64B(" %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time:feed3322default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + break; case __LINE__: trice("\n" ); + break; case __LINE__: Trice64B(" %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: be16default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + break; case __LINE__: trice("\n" ); + break; case __LINE__: trice64B(" %016x", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: default: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + break; case __LINE__: trice("\n" ); + break; case __LINE__: trice64B("SIG: %016x\n", b64, sizeof(b64) /sizeof(int64_t) ); //exp: time: default: SIG: 0000000000000000 ffffffffffffffff fffffffffffffffe 3344555566666666 + + break; case __LINE__: TRICE8_F(ID(0), "info:FunctionNameWa", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: info:FunctionNameWa(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: TRice8F("call:FunctionNameWb", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time:feed3322default: call:FunctionNameWb(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: Trice8F("call:FunctionNameWc", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: be16default: call:FunctionNameWc(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: trice8F("call:FunctionNameWd", b8, sizeof(b8) /sizeof(int8_t) ); //exp: time: default: call:FunctionNameWd(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b)(00)(ff)(fe)(33)(04)(05)(06)(07)(08)(09)(0a)(0b) + break; case __LINE__: TRICE16_F(ID(0), "info:FunctionNameXa", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: info:FunctionNameXa(0000)(ffff)(fffe)(3344) + break; case __LINE__: TRice16F("call:FunctionNameXb", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time:feed3322default: call:FunctionNameXb(0000)(ffff)(fffe)(3344) + break; case __LINE__: Trice16F("call:FunctionNameXc", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time: be16default: call:FunctionNameXc(0000)(ffff)(fffe)(3344) + break; case __LINE__: trice16F("call:FunctionNameXd", b16, sizeof(b16)/sizeof(int16_t) ); //exp: time: default: call:FunctionNameXd(0000)(ffff)(fffe)(3344) + break; case __LINE__: TRICE32_F(ID(0), "info:FunctionNameYa", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: info:FunctionNameYa(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: TRice32F("rpc:FunctionNameYb", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time:feed3322default: rpc:FunctionNameYb(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: Trice32F("rpc:FunctionNameYc", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time: be16default: rpc:FunctionNameYc(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: trice32F("call:FunctionNameYd", b32, sizeof(b32)/sizeof(int32_t) ); //exp: time: default: call:FunctionNameYd(00000000)(ffffffff)(fffffffe)(33445555) + break; case __LINE__: TRICE64_F(ID(0), "info:FunctionNameZa", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: info:FunctionNameZa(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: TRice64F("call:FunctionNameZb", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time:feed3322default: call:FunctionNameZb(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: Trice64F("RPC:FunctionNameZc", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time: be16default: RPC:FunctionNameZc(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) + break; case __LINE__: trice64F("RPC:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: time: default: RPC:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) - break; case __LINE__: TRiceS(iD(13256), "msg:Hi %s!\n", five ); //exp: time:feed3322default: msg:Hi five! - break; case __LINE__: TriceS(iD(13257), "msg:Hi %s!\n", five ); //exp: time: be16default: msg:Hi five! - break; case __LINE__: triceS(iD(13258), "msg:Hi %s!\n", five ); //exp: time: default: msg:Hi five! - break; case __LINE__: TRiceN(iD(13259), "msg:Hi %s!\n", five, strlen(five) ); //exp: time:feed3322default: msg:Hi five! - break; case __LINE__: TriceN(iD(13260), "msg:Hi %s!\n", five, strlen(five) ); //exp: time: be16default: msg:Hi five! - break; case __LINE__: triceN(iD(13261), "msg:Hi %s!\n", five, strlen(five) ); //exp: time: default: msg:Hi five! - break; case __LINE__: TRICE_S(id(13262), "sig:TRICE_S=%s\n", s ); //exp: time: default: sig:TRICE_S=AAAAAAAAAAAA - break; case __LINE__: TRICE_N(id(13263), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time: default: sig:TRICE_N=AAAAAAAAAAAA - break; case __LINE__: TRICE_S(Id(13264), "sig:TRICE_S=%s\n", s ); //exp: time: be16default: sig:TRICE_S=AAAAAAAAAAAA - break; case __LINE__: TRICE_N(Id(13265), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time: be16default: sig:TRICE_N=AAAAAAAAAAAA - break; case __LINE__: TRICE_S(ID(13266), "sig:TRICE_S=%s\n", s ); //exp: time:feed3322default: sig:TRICE_S=AAAAAAAAAAAA - break; case __LINE__: TRICE_N(ID(13267), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time:feed3322default: sig:TRICE_N=AAAAAAAAAAAA - break; case __LINE__: triceS(iD(13268), "sig:triceS=%s\n", s ); //exp: time: default: sig:triceS=AAAAAAAAAAAA - break; case __LINE__: triceN(iD(13269), "sig:triceN=%s\n", s, strlen(s) ); //exp: time: default: sig:triceN=AAAAAAAAAAAA - break; case __LINE__: TriceS(iD(13270), "sig:TriceS=%s\n", s ); //exp: time: be16default: sig:TriceS=AAAAAAAAAAAA - break; case __LINE__: TriceN(iD(13271), "sig:TriceN=%s\n", s, strlen(s) ); //exp: time: be16default: sig:TriceN=AAAAAAAAAAAA - break; case __LINE__: TRiceS(iD(13272), "sig:TRiceS=%s\n", s ); //exp: time:feed3322default: sig:TRiceS=AAAAAAAAAAAA - break; case __LINE__: TRiceN(iD(13273), "sig:TRiceN=%s\n", s, strlen(s) ); //exp: time:feed3322default: sig:TRiceN=AAAAAAAAAAAA - - break; case __LINE__: trice16(iD(13274), "att: line %u\n", __LINE__ ); + break; case __LINE__: TRiceS("msg:Hi %s!\n", five ); //exp: time:feed3322default: msg:Hi five! + break; case __LINE__: TriceS("msg:Hi %s!\n", five ); //exp: time: be16default: msg:Hi five! + break; case __LINE__: triceS("msg:Hi %s!\n", five ); //exp: time: default: msg:Hi five! + break; case __LINE__: TRiceN("msg:Hi %s!\n", five, strlen(five) ); //exp: time:feed3322default: msg:Hi five! + break; case __LINE__: TriceN("msg:Hi %s!\n", five, strlen(five) ); //exp: time: be16default: msg:Hi five! + break; case __LINE__: triceN("msg:Hi %s!\n", five, strlen(five) ); //exp: time: default: msg:Hi five! + break; case __LINE__: TRICE_S(id(0), "sig:TRICE_S=%s\n", s ); //exp: time: default: sig:TRICE_S=AAAAAAAAAAAA + break; case __LINE__: TRICE_N(id(0), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time: default: sig:TRICE_N=AAAAAAAAAAAA + break; case __LINE__: TRICE_S(Id(0), "sig:TRICE_S=%s\n", s ); //exp: time: be16default: sig:TRICE_S=AAAAAAAAAAAA + break; case __LINE__: TRICE_N(Id(0), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time: be16default: sig:TRICE_N=AAAAAAAAAAAA + break; case __LINE__: TRICE_S(ID(0), "sig:TRICE_S=%s\n", s ); //exp: time:feed3322default: sig:TRICE_S=AAAAAAAAAAAA + break; case __LINE__: TRICE_N(ID(0), "sig:TRICE_N=%s\n", s, strlen(s) ); //exp: time:feed3322default: sig:TRICE_N=AAAAAAAAAAAA + break; case __LINE__: triceS("sig:triceS=%s\n", s ); //exp: time: default: sig:triceS=AAAAAAAAAAAA + break; case __LINE__: triceN("sig:triceN=%s\n", s, strlen(s) ); //exp: time: default: sig:triceN=AAAAAAAAAAAA + break; case __LINE__: TriceS("sig:TriceS=%s\n", s ); //exp: time: be16default: sig:TriceS=AAAAAAAAAAAA + break; case __LINE__: TriceN("sig:TriceN=%s\n", s, strlen(s) ); //exp: time: be16default: sig:TriceN=AAAAAAAAAAAA + break; case __LINE__: TRiceS("sig:TRiceS=%s\n", s ); //exp: time:feed3322default: sig:TRiceS=AAAAAAAAAAAA + break; case __LINE__: TRiceN("sig:TRiceN=%s\n", s, strlen(s) ); //exp: time:feed3322default: sig:TRiceN=AAAAAAAAAAAA + + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); break; case __LINE__: exampleOfManualJSONencoding(); //exp: time: be16default: att:MyStructEvaluationFunction(json:ExA{Apple:-1, Birn:2, Fisch:2.781000} - break; case __LINE__: TRICE(Id(13275), "MSG:1/11 = %g\n", aFloat( 1.0/11 ) ); //exp: time: be16default: MSG:1/11 = 0.09090909 + break; case __LINE__: TRICE(Id(0), "MSG:1/11 = %g\n", aFloat( 1.0/11 ) ); //exp: time: be16default: MSG:1/11 = 0.09090909 break; case __LINE__: { //exp: time:feed3322default: msg:x = 5.934 = 5.934, 5.934 #if !TRICE_OFF float a = (float)5.934; @@ -438,82 +438,82 @@ void TriceCheck(int n) { int c = (int)b; int d = (int)(b * 1000) % 1000; int e = (int)(1000 * (float)(a - c)); - TRice(iD(13276), "msg:x = %g = %d.%03d, %d.%03d\n", aFloat(a), c, d, c, e ); + TRice("msg:x = %g = %d.%03d, %d.%03d\n", aFloat(a), c, d, c, e ); #endif } - break; case __LINE__: trice16(iD(13277), "att: line %u\n", __LINE__ ); - - break; case __LINE__: TRice(iD(13278), "sig:Integer (indent, base, sign) - see https://yourbasic.org/golang/fmt-printf-reference-cheat-sheet/\n" ); - break; case __LINE__: TRice(iD(13279), "rd: 15 %d Base 10\n", 15 ); //exp: time:feed3322default: rd: 15 15 Base 10 - break; case __LINE__: TRice(iD(13280), "rd: +15 %+d Always show sign\n", 15 ); //exp: time:feed3322default: rd: +15 +15 Always show sign - break; case __LINE__: TRice(iD(13281), "rd: 15 %4d Pad with spaces (width 4, right justified)\n", 15 ); //exp: time:feed3322default: rd: 15 15 Pad with spaces (width 4, right justified) - break; case __LINE__: TRice(iD(13282), "rd: 15 %-4d Pad with spaces (width 4, left justified)\n", 15 ); //exp: time:feed3322default: rd: 15 15 Pad with spaces (width 4, left justified) - break; case __LINE__: TRice(iD(13283), "rd: 0015 %04d Pad with zeroes (width 4)\n", 15 ); //exp: time:feed3322default: rd: 0015 0015 Pad with zeroes (width 4) - break; case __LINE__: TRice(iD(13284), "rd: 1111 %b Base 2\n", 15 ); //exp: time:feed3322default: rd: 1111 1111 Base 2 - break; case __LINE__: TRice(iD(13285), "rd: 17 %o Base 8\n", 15 ); //exp: time:feed3322default: rd: 17 17 Base 8 - break; case __LINE__: TRice(iD(13286), "rd: f %x Base 16, lowercase\n", 15 ); //exp: time:feed3322default: rd: f f Base 16, lowercase - break; case __LINE__: TRice(iD(13287), "rd: F %X Base 16, uppercase\n", 15 ); //exp: time:feed3322default: rd: F F Base 16, uppercase - break; case __LINE__: TRice(iD(13288), "rd: 0xf %#x Base 16, with leading 0x\n", 15 ); //exp: time:feed3322default: rd: 0xf 0xf Base 16, with leading 0x - - break; case __LINE__: trice16(iD(13289), "att: line %u\n", __LINE__ ); - - break; case __LINE__: trice(iD(13290), "sig:Character (quoted, Unicode)\n" ); - break; case __LINE__: trice(iD(13291), "rd: A %c Character\n", 'A' ); //exp: time: default: rd: A A Character - break; case __LINE__: trice(iD(13292), "rd: 'A' %q Quoted character\n", 'A' ); //exp: time: default: rd: 'A' 'A' Quoted character - // break; case __LINE__: trice(iD(13293), "rd: U+0041 %U Unicode\n", 'A' ); // todo: detect %U to avoid message triceType = TRICE0 ParamSpace = 4 not matching with bitWidth 0 and paramCount 0 - ignoring package - // break; case __LINE__: trice(iD(13294), "rd: U+0041 'A' %#U Unicode with character\n", 'A' ); // todo: detect %#U to avoid message triceType = TRICE0 ParamSpace = 4 not matching with bitWidth 0 and paramCount 0 - ignoring package - - break; case __LINE__: trice(iD(13295), "sig:Boolean (true/false)\n" ); - break; case __LINE__: trice(iD(13296), "rd:Use %%t to format a boolean as true (%t) or false (%t).\n", 1, 0 ); //exp: time: default: rd:Use %t to format a boolean as true (true) or false (false). - - break; case __LINE__: trice(iD(13297), "sig:Pointer (hex)\n" ); - break; case __LINE__: trice8 (iD(13298), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x84 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (84) - break; case __LINE__: trice16(iD(13299), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x1234 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (1234) - break; case __LINE__: trice32(iD(13300), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0xaabbccdd ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (aabbccdd) - break; case __LINE__: trice64(iD(13301), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x1122334455667788 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (1122334455667788) - break; case __LINE__: trice (iD(13302), "rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0xaabbccdd); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (aabbccdd) - - break; case __LINE__: trice16(iD(13303), "att: line %u\n", __LINE__ ); - break; case __LINE__: trice(iD(13304), "sig:Float (indent, precision, scientific notation)\n" ); - break; case __LINE__: trice(iD(13305), "rd: 1.234560e+02 %e %%e Scientific notation\n", aFloat(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation - break; case __LINE__: trice(iD(13306), "rd: 123.456000 %f %%f Decimal point, no exponent\n", aFloat(123.456) ); //exp: time: default: rd: 123.456000 123.456001 %f Decimal point, no exponent - break; case __LINE__: trice(iD(13307), "rd: 123.46 %.2f %%.2f Default width, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 - break; case __LINE__: trice(iD(13308), "rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 - break; case __LINE__: trice(iD(13309), "rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aFloat(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only - break; case __LINE__: trice(iD(13310), "sig:Double (indent, precision, scientific notation)\n" ); - break; case __LINE__: trice64(iD(13311), "rd: 1.234560e+02 %e %%e Scientific notation\n", aDouble(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation - break; case __LINE__: trice64(iD(13312), "rd: 123.456000 %f %%f Decimal point, no exponent\n", aDouble(123.456) ); //exp: time: default: rd: 123.456000 123.456000 %f Decimal point, no exponent - break; case __LINE__: trice64(iD(13313), "rd: 123.46 %.2f %%.2f Default width, precision 2\n", aDouble(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 - break; case __LINE__: trice64(iD(13314), "rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aDouble(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 - break; case __LINE__: trice64(iD(13315), "rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aDouble(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only - - break; case __LINE__: trice(iD(13316), "sig:String or byte slice (quote, indent, hex)\n" ); - break; case __LINE__: s = "café"; triceS(iD(13317), "rd: café %s Plain string\n", s ); //exp: time: default: rd: café café Plain string - break; case __LINE__: s = "café"; triceS(iD(13318), "rd: ␣␣café %6s Width 6, right justify\n", s ); //exp: time: default: rd: ␣␣café café Width 6, right justify - break; case __LINE__: s = "café"; triceS(iD(13319), "rd: café␣␣ %-6s Width 6, left justify\n", s ); //exp: time: default: rd: café␣␣ café Width 6, left justify - break; case __LINE__: s = "café"; triceS(iD(13320), "rd: \"café\" %q Quoted string\n", s ); //exp: time: default: rd: \"café\" "café" Quoted string - break; case __LINE__: s = "café"; triceS(iD(13321), "rd: 636166c3a9 %x Hex dump of byte values\n", s ); //exp: time: default: rd: 636166c3a9 636166c3a9 Hex dump of byte values - break; case __LINE__: s = "café"; triceS(iD(13322), "rd: 63 61 66 c3 a9 % x Hex dump with spaces\n", s ); //exp: time: default: rd: 63 61 66 c3 a9 63 61 66 c3 a9 Hex dump with spaces - - break; case __LINE__: trice16(iD(13323), "att: line %u\n", __LINE__ ); + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + + break; case __LINE__: TRice("sig:Integer (indent, base, sign) - see https://yourbasic.org/golang/fmt-printf-reference-cheat-sheet/\n" ); + break; case __LINE__: TRice("rd: 15 %d Base 10\n", 15 ); //exp: time:feed3322default: rd: 15 15 Base 10 + break; case __LINE__: TRice("rd: +15 %+d Always show sign\n", 15 ); //exp: time:feed3322default: rd: +15 +15 Always show sign + break; case __LINE__: TRice("rd: 15 %4d Pad with spaces (width 4, right justified)\n", 15 ); //exp: time:feed3322default: rd: 15 15 Pad with spaces (width 4, right justified) + break; case __LINE__: TRice("rd: 15 %-4d Pad with spaces (width 4, left justified)\n", 15 ); //exp: time:feed3322default: rd: 15 15 Pad with spaces (width 4, left justified) + break; case __LINE__: TRice("rd: 0015 %04d Pad with zeroes (width 4)\n", 15 ); //exp: time:feed3322default: rd: 0015 0015 Pad with zeroes (width 4) + break; case __LINE__: TRice("rd: 1111 %b Base 2\n", 15 ); //exp: time:feed3322default: rd: 1111 1111 Base 2 + break; case __LINE__: TRice("rd: 17 %o Base 8\n", 15 ); //exp: time:feed3322default: rd: 17 17 Base 8 + break; case __LINE__: TRice("rd: f %x Base 16, lowercase\n", 15 ); //exp: time:feed3322default: rd: f f Base 16, lowercase + break; case __LINE__: TRice("rd: F %X Base 16, uppercase\n", 15 ); //exp: time:feed3322default: rd: F F Base 16, uppercase + break; case __LINE__: TRice("rd: 0xf %#x Base 16, with leading 0x\n", 15 ); //exp: time:feed3322default: rd: 0xf 0xf Base 16, with leading 0x + + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + + break; case __LINE__: trice("sig:Character (quoted, Unicode)\n" ); + break; case __LINE__: trice("rd: A %c Character\n", 'A' ); //exp: time: default: rd: A A Character + break; case __LINE__: trice("rd: 'A' %q Quoted character\n", 'A' ); //exp: time: default: rd: 'A' 'A' Quoted character + // break; case __LINE__: trice("rd: U+0041 %U Unicode\n", 'A' ); // todo: detect %U to avoid message triceType = TRICE0 ParamSpace = 4 not matching with bitWidth 0 and paramCount 0 - ignoring package + // break; case __LINE__: trice("rd: U+0041 'A' %#U Unicode with character\n", 'A' ); // todo: detect %#U to avoid message triceType = TRICE0 ParamSpace = 4 not matching with bitWidth 0 and paramCount 0 - ignoring package + + break; case __LINE__: trice("sig:Boolean (true/false)\n" ); + break; case __LINE__: trice("rd:Use %%t to format a boolean as true (%t) or false (%t).\n", 1, 0 ); //exp: time: default: rd:Use %t to format a boolean as true (true) or false (false). + + break; case __LINE__: trice("sig:Pointer (hex)\n" ); + break; case __LINE__: trice8 ("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x84 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (84) + break; case __LINE__: trice16("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x1234 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (1234) + break; case __LINE__: trice32("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0xaabbccdd ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (aabbccdd) + break; case __LINE__: trice64("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0x1122334455667788 ); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (1122334455667788) + break; case __LINE__: trice ("rd:Use %%p to format a pointer in base 16 notation with leading 0x. (%p)\n", 0xaabbccdd); //exp: time: default: rd:Use %p to format a pointer in base 16 notation with leading 0x. (aabbccdd) + + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); + break; case __LINE__: trice("sig:Float (indent, precision, scientific notation)\n" ); + break; case __LINE__: trice("rd: 1.234560e+02 %e %%e Scientific notation\n", aFloat(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation + break; case __LINE__: trice("rd: 123.456000 %f %%f Decimal point, no exponent\n", aFloat(123.456) ); //exp: time: default: rd: 123.456000 123.456001 %f Decimal point, no exponent + break; case __LINE__: trice("rd: 123.46 %.2f %%.2f Default width, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 + break; case __LINE__: trice("rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 + break; case __LINE__: trice("rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aFloat(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only + break; case __LINE__: trice("sig:Double (indent, precision, scientific notation)\n" ); + break; case __LINE__: trice64("rd: 1.234560e+02 %e %%e Scientific notation\n", aDouble(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation + break; case __LINE__: trice64("rd: 123.456000 %f %%f Decimal point, no exponent\n", aDouble(123.456) ); //exp: time: default: rd: 123.456000 123.456000 %f Decimal point, no exponent + break; case __LINE__: trice64("rd: 123.46 %.2f %%.2f Default width, precision 2\n", aDouble(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 + break; case __LINE__: trice64("rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aDouble(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 + break; case __LINE__: trice64("rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aDouble(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only + + break; case __LINE__: trice("sig:String or byte slice (quote, indent, hex)\n" ); + break; case __LINE__: s = "café"; triceS("rd: café %s Plain string\n", s ); //exp: time: default: rd: café café Plain string + break; case __LINE__: s = "café"; triceS("rd: ␣␣café %6s Width 6, right justify\n", s ); //exp: time: default: rd: ␣␣café café Width 6, right justify + break; case __LINE__: s = "café"; triceS("rd: café␣␣ %-6s Width 6, left justify\n", s ); //exp: time: default: rd: café␣␣ café Width 6, left justify + break; case __LINE__: s = "café"; triceS("rd: \"café\" %q Quoted string\n", s ); //exp: time: default: rd: \"café\" "café" Quoted string + break; case __LINE__: s = "café"; triceS("rd: 636166c3a9 %x Hex dump of byte values\n", s ); //exp: time: default: rd: 636166c3a9 636166c3a9 Hex dump of byte values + break; case __LINE__: s = "café"; triceS("rd: 63 61 66 c3 a9 % x Hex dump with spaces\n", s ); //exp: time: default: rd: 63 61 66 c3 a9 63 61 66 c3 a9 Hex dump with spaces + + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); break; case __LINE__: exampleOfManualSerialization(); // ATTENTION: This occupies ~1024 bytes in one half buffer when double buffer ist used! // This was a CGO compiler issue: - break; case __LINE__: TRice(iD(13324), "info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: Trice(iD(13325), "info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: trice(iD(13326), "info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + break; case __LINE__: TRice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: Trice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: trice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. - break; case __LINE__: trice16(iD(13327), "att: line %u\n", __LINE__ ); + break; case __LINE__: trice16("att: line %u\n", __LINE__ ); - break; case __LINE__: trice(iD(13328), "sig:Runtime generated strings\n" ); + break; case __LINE__: trice("sig:Runtime generated strings\n" ); break; case __LINE__: { #if !TRICE_OFF char* s0 = "AAAAAAAAAAAA"; #endif - TRICE32(ID(13329), "dbg:len=%u:", strlen(s0) ); - TRICE_S(ID(13330), "sig:%s\n", s0 ); + TRICE32(ID(0), "dbg:len=%u:", strlen(s0) ); + TRICE_S(ID(0), "sig:%s\n", s0 ); } break; case __LINE__: { @@ -522,8 +522,8 @@ void TriceCheck(int n) { AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAABBBBBBBBCCCCCCCC\ "; #endif - TRICE32(ID(13331), "dbg:len=%u:", strlen(s1) ); - TRICE_S(ID(13332), "sig:%s\n", s1 ); + TRICE32(ID(0), "dbg:len=%u:", strlen(s1) ); + TRICE_S(ID(0), "sig:%s\n", s1 ); } break; case __LINE__: { @@ -536,8 +536,8 @@ DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE\ "; #endif - TRICE32(ID(13333), "dbg:len=%u: ", strlen(s2) ); - TRICE_S(ID(13334), "sig:%s\n", s2 ); + TRICE32(ID(0), "dbg:len=%u: ", strlen(s2) ); + TRICE_S(ID(0), "sig:%s\n", s2 ); } break; case __LINE__: { @@ -553,8 +553,8 @@ BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC\ "; #endif - TRICE32(ID(13335), "dbg:len=%u: ", strlen(s3) ); - TRICE_S(ID(13336), "sig:%s\n", s3 ); + TRICE32(ID(0), "dbg:len=%u: ", strlen(s3) ); + TRICE_S(ID(0), "sig:%s\n", s3 ); } break; case __LINE__: { @@ -578,1988 +578,1988 @@ DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE\ "; #endif - TRICE32(ID(13337), "dbg:len=%u: ", strlen(s4) ); - TRICE_S(ID(13338), "sig:%s\n", s4 ); + TRICE32(ID(0), "dbg:len=%u: ", strlen(s4) ); + TRICE_S(ID(0), "sig:%s\n", s4 ); } #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice (iD(13339), "rd:%E (%%E)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) - break; case __LINE__: trice (iD(13340), "rd:%F (%%F)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%F) - break; case __LINE__: trice (iD(13341), "rd:%G (%%G)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%G) - break; case __LINE__: trice64(iD(13342), "rd:%E (%%E)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) - break; case __LINE__: trice64(iD(13343), "rd:%F (%%F)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%F) - break; case __LINE__: trice64(iD(13344), "rd:%G (%%G)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556E+08 (%G) + break; case __LINE__: trice ("rd:%E (%%E)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) + break; case __LINE__: trice ("rd:%F (%%F)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%F) + break; case __LINE__: trice ("rd:%G (%%G)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%G) + break; case __LINE__: trice64("rd:%E (%%E)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) + break; case __LINE__: trice64("rd:%F (%%F)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%F) + break; case __LINE__: trice64("rd:%G (%%G)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556E+08 (%G) - break; case __LINE__: trice (iD(13345), "rd:%e (%%e)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) - break; case __LINE__: trice (iD(13346), "rd:%f (%%f)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%f) - break; case __LINE__: trice (iD(13347), "rd:%g (%%g)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%g) - break; case __LINE__: trice64(iD(13348), "rd:%e (%%e)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) - break; case __LINE__: trice64(iD(13349), "rd:%f (%%f)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%f) - break; case __LINE__: trice64(iD(13350), "rd:%g (%%g)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556e+08 (%g) - - break; case __LINE__: trice32(iD(13351), "msg:%u (%%u)\n", -1 ); //exp: time: default: msg:4294967295 (%u) - break; case __LINE__: trice32(iD(13352), "msg:%b (%%b)\n", -1 ); //exp: time: default: msg:11111111111111111111111111111111 (%b) - break; case __LINE__: trice32(iD(13353), "msg:%o (%%o)\n", -1 ); //exp: time: default: msg:37777777777 (%o) - break; case __LINE__: trice32(iD(13354), "msg:%O (%%O)\n", -1 ); //exp: time: default: msg:0o37777777777 (%O) - break; case __LINE__: trice32(iD(13355), "msg:%X (%%X)\n", -1 ); //exp: time: default: msg:FFFFFFFF (%X) - break; case __LINE__: trice32(iD(13356), "msg:%x (%%x)\n", -1 ); //exp: time: default: msg:ffffffff (%x) - break; case __LINE__: trice32(iD(13357), "msg:%d (%%d)\n", -1 ); //exp: time: default: msg:-1 (%d) - break; case __LINE__: trice64(iD(13358), "msg:%u (%%u)\n", -1 ); //exp: time: default: msg:18446744073709551615 (%u) - break; case __LINE__: trice64(iD(13359), "msg:%b (%%b)\n", -1 ); //exp: time: default: msg:1111111111111111111111111111111111111111111111111111111111111111 (%b) - break; case __LINE__: trice64(iD(13360), "msg:%o (%%o)\n", -1 ); //exp: time: default: msg:1777777777777777777777 (%o) - break; case __LINE__: trice64(iD(13361), "msg:%O (%%O)\n", -1 ); //exp: time: default: msg:0o1777777777777777777777 (%O) - break; case __LINE__: trice64(iD(13362), "msg:%X (%%X)\n", -1 ); //exp: time: default: msg:FFFFFFFFFFFFFFFF (%X) - break; case __LINE__: trice64(iD(13363), "msg:%x (%%x)\n", -1 ); //exp: time: default: msg:ffffffffffffffff (%x) - - /**/break; case __LINE__: TRice (iD(13364), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - /**/break; case __LINE__: Trice (iD(13365), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - /**/break; case __LINE__: trice (iD(13366), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice8 (iD(13367), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice8 (iD(13368), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice8 (iD(13369), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice16 (iD(13370), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice16 (iD(13371), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice16 (iD(13372), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice32 (iD(13373), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice32 (iD(13374), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice32 (iD(13375), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice64 (iD(13376), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice64 (iD(13377), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice64 (iD(13378), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: trice ("rd:%e (%%e)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) + break; case __LINE__: trice ("rd:%f (%%f)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%f) + break; case __LINE__: trice ("rd:%g (%%g)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%g) + break; case __LINE__: trice64("rd:%e (%%e)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) + break; case __LINE__: trice64("rd:%f (%%f)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%f) + break; case __LINE__: trice64("rd:%g (%%g)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556e+08 (%g) + + break; case __LINE__: trice32("msg:%u (%%u)\n", -1 ); //exp: time: default: msg:4294967295 (%u) + break; case __LINE__: trice32("msg:%b (%%b)\n", -1 ); //exp: time: default: msg:11111111111111111111111111111111 (%b) + break; case __LINE__: trice32("msg:%o (%%o)\n", -1 ); //exp: time: default: msg:37777777777 (%o) + break; case __LINE__: trice32("msg:%O (%%O)\n", -1 ); //exp: time: default: msg:0o37777777777 (%O) + break; case __LINE__: trice32("msg:%X (%%X)\n", -1 ); //exp: time: default: msg:FFFFFFFF (%X) + break; case __LINE__: trice32("msg:%x (%%x)\n", -1 ); //exp: time: default: msg:ffffffff (%x) + break; case __LINE__: trice32("msg:%d (%%d)\n", -1 ); //exp: time: default: msg:-1 (%d) + break; case __LINE__: trice64("msg:%u (%%u)\n", -1 ); //exp: time: default: msg:18446744073709551615 (%u) + break; case __LINE__: trice64("msg:%b (%%b)\n", -1 ); //exp: time: default: msg:1111111111111111111111111111111111111111111111111111111111111111 (%b) + break; case __LINE__: trice64("msg:%o (%%o)\n", -1 ); //exp: time: default: msg:1777777777777777777777 (%o) + break; case __LINE__: trice64("msg:%O (%%O)\n", -1 ); //exp: time: default: msg:0o1777777777777777777777 (%O) + break; case __LINE__: trice64("msg:%X (%%X)\n", -1 ); //exp: time: default: msg:FFFFFFFFFFFFFFFF (%X) + break; case __LINE__: trice64("msg:%x (%%x)\n", -1 ); //exp: time: default: msg:ffffffffffffffff (%x) + + /**/break; case __LINE__: TRice ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + /**/break; case __LINE__: Trice ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + /**/break; case __LINE__: trice ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice8 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice8 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice8 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice16 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice16 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice16 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice32 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice32 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice32 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice64 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice64 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice64 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice_1 (iD(13379), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice_1 (iD(13380), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice_1 (iD(13381), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice8_1 (iD(13382), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice8_1 (iD(13383), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice8_1 (iD(13384), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice16_1 (iD(13385), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice16_1 (iD(13386), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice16_1 (iD(13387), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice32_1 (iD(13388), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice32_1 (iD(13389), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice32_1 (iD(13390), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice64_1 (iD(13391), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: Trice64_1 (iD(13392), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: trice64_1 (iD(13393), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice8_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice8_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice8_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice16_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice16_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice16_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice32_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice32_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice32_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRice64_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: Trice64_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: trice64_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRice (iD(13394), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice (iD(13395), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice (iD(13396), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice8 (iD(13397), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice8 (iD(13398), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice8 (iD(13399), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice16 (iD(13400), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice16 (iD(13401), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice16 (iD(13402), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice32 (iD(13403), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice32 (iD(13404), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice32 (iD(13405), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice64 (iD(13406), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice64 (iD(13407), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice64 (iD(13408), "no value" ); //exp: time: default: no value + break; case __LINE__: TRice ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice8 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice8 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice8 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice16 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice16 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice16 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice32 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice32 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice32 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice64 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice64 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice64 ("no value" ); //exp: time: default: no value - break; case __LINE__: TRice_0 (iD(13409), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice_0 (iD(13410), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice_0 (iD(13411), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice8_0 (iD(13412), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice8_0 (iD(13413), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice8_0 (iD(13414), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice16_0 (iD(13415), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice16_0 (iD(13416), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice16_0 (iD(13417), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice32_0 (iD(13418), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice32_0 (iD(13419), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice32_0 (iD(13420), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice64_0 (iD(13421), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice64_0 (iD(13422), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice64_0 (iD(13423), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice0 (iD(13424), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice0 (iD(13425), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice0 (iD(13426), "no value" ); //exp: time: default: no value - break; case __LINE__: TRice (iD(13427), "no value" ); //exp: time:feed3322default: no value - break; case __LINE__: Trice (iD(13428), "no value" ); //exp: time: be16default: no value - break; case __LINE__: trice (iD(13429), "no value" ); //exp: time: default: no value - - break; case __LINE__: TRice(iD(13430), "info:This is a message with one value %d and a 32-bit stamp.\n", -2 ); //exp: time:feed3322default: info:This is a message with one value -2 and a 32-bit stamp. - break; case __LINE__: Trice(iD(13431), "info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. - break; case __LINE__: trice(iD(13432), "info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. - break; case __LINE__: TRICE(ID(13433), "info:This is a message without values and a 32-bit stamp.\n" ); //exp: time:feed3322default: info:This is a message without values and a 32-bit stamp. - break; case __LINE__: TRICE(Id(13434), "info:This is a message without values and a 16-bit stamp.\n" ); //exp: time: be16default: info:This is a message without values and a 16-bit stamp. - break; case __LINE__: TRICE(id(13435), "info:This is a message without values and without stamp.\n" ); //exp: time: default: info:This is a message without values and without stamp. - break; case __LINE__: TRICE(ID(13436), "info:This is a message with one value %d and a 32-bit stamp.\n", -2 ); //exp: time:feed3322default: info:This is a message with one value -2 and a 32-bit stamp. - break; case __LINE__: TRICE(Id(13437), "info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. - break; case __LINE__: TRICE(id(13438), "info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. - - break; case __LINE__: TRICE(ID(13439), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: TRICE(Id(13440), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: TRICE(id(13441), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. - break; case __LINE__: TRICE32(ID(13442), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: TRICE32(Id(13443), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: TRICE32(id(13444), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. - - break; case __LINE__: TRICE8 (id(13445), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE8_1 (id(13446), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE8 (Id(13447), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE8_1 (Id(13448), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE8 (ID(13449), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRICE8_1 (ID(13450), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: trice8 (iD(13451), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: trice8_1 (iD(13452), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: Trice8 (iD(13453), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: Trice8_1 (iD(13454), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRice8 (iD(13455), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRice8_1 (iD(13456), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - - break; case __LINE__: TRICE16 (id(13457), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE16_1(id(13458), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE16 (Id(13459), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE16_1(Id(13460), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE16 (ID(13461), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRICE16_1(ID(13462), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: trice16 (iD(13463), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: trice16_1(iD(13464), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: Trice16 (iD(13465), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: Trice16_1(iD(13466), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRice16 (iD(13467), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRice16_1(iD(13468), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - - break; case __LINE__: TRICE32 (id(13469), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE32_1(id(13470), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE32 (Id(13471), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE32_1(Id(13472), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE32 (ID(13473), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRICE32_1(ID(13474), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: trice32 (iD(13475), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: trice32_1(iD(13476), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: Trice32 (iD(13477), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: Trice32_1(iD(13478), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRice32 (iD(13479), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRice32_1(iD(13480), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - - break; case __LINE__: TRICE64 (id(13481), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE64_1(id(13482), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: TRICE64 (Id(13483), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE64_1(Id(13484), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRICE64 (ID(13485), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRICE64_1(ID(13486), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: trice64 (iD(13487), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: trice64_1(iD(13488), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 - break; case __LINE__: Trice64 (iD(13489), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: Trice64_1(iD(13490), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 - break; case __LINE__: TRice64 (iD(13491), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 - break; case __LINE__: TRice64_1(iD(13492), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice_0 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice_0 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice_0 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice8_0 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice8_0 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice8_0 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice16_0 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice16_0 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice16_0 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice32_0 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice32_0 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice32_0 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice64_0 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice64_0 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice64_0 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice0 ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice0 ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice0 ("no value" ); //exp: time: default: no value + break; case __LINE__: TRice ("no value" ); //exp: time:feed3322default: no value + break; case __LINE__: Trice ("no value" ); //exp: time: be16default: no value + break; case __LINE__: trice ("no value" ); //exp: time: default: no value + + break; case __LINE__: TRice("info:This is a message with one value %d and a 32-bit stamp.\n", -2 ); //exp: time:feed3322default: info:This is a message with one value -2 and a 32-bit stamp. + break; case __LINE__: Trice("info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. + break; case __LINE__: trice("info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. + break; case __LINE__: TRICE(ID(0), "info:This is a message without values and a 32-bit stamp.\n" ); //exp: time:feed3322default: info:This is a message without values and a 32-bit stamp. + break; case __LINE__: TRICE(Id(0), "info:This is a message without values and a 16-bit stamp.\n" ); //exp: time: be16default: info:This is a message without values and a 16-bit stamp. + break; case __LINE__: TRICE(id(0), "info:This is a message without values and without stamp.\n" ); //exp: time: default: info:This is a message without values and without stamp. + break; case __LINE__: TRICE(ID(0), "info:This is a message with one value %d and a 32-bit stamp.\n", -2 ); //exp: time:feed3322default: info:This is a message with one value -2 and a 32-bit stamp. + break; case __LINE__: TRICE(Id(0), "info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. + break; case __LINE__: TRICE(id(0), "info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. + + break; case __LINE__: TRICE(ID(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: TRICE(Id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: TRICE(id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + break; case __LINE__: TRICE32(ID(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: TRICE32(Id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: TRICE32(id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + + break; case __LINE__: TRICE8 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE8_1 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE8 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE8_1 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE8 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRICE8_1 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: trice8 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: trice8_1 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: Trice8 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: Trice8_1 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRice8 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice8_1 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + + break; case __LINE__: TRICE16 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE16_1(id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE16 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE16_1(Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE16 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRICE16_1(ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: trice16 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: trice16_1("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: Trice16 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: Trice16_1("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRice16 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice16_1("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + + break; case __LINE__: TRICE32 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE32_1(id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE32 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE32_1(Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE32 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRICE32_1(ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: trice32 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: trice32_1("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: Trice32 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: Trice32_1("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRice32 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice32_1("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + + break; case __LINE__: TRICE64 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE64_1(id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: TRICE64 (Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE64_1(Id(0), "msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRICE64 (ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRICE64_1(ID(0), "msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: trice64 ("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: trice64_1("msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 + break; case __LINE__: Trice64 ("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: Trice64_1("msg:value=%u\n", 200 ); //exp: time: be16default: msg:value=200 + break; case __LINE__: TRice64 ("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 + break; case __LINE__: TRice64_1("msg:value=%u\n", 200 ); //exp: time:feed3322default: msg:value=200 // mixed 16-bit and 32-bit timestamp - break; case __LINE__: TRice8(iD(13493), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice8(iD(13494), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice8(iD(13495), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice8(iD(13496), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice8(iD(13497), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice8(iD(13498), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice8(iD(13499), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice8(iD(13500), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice8(iD(13501), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice8(iD(13502), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice8(iD(13503), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice8(iD(13504), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice16(iD(13505), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice16(iD(13506), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice16(iD(13507), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice16(iD(13508), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice16(iD(13509), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice16(iD(13510), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice16(iD(13511), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice16(iD(13512), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16(iD(13513), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice16(iD(13514), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice16(iD(13515), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16(iD(13516), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice32(iD(13517), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice32(iD(13518), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice32(iD(13519), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice32(iD(13520), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice32(iD(13521), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice32(iD(13522), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice32(iD(13523), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice32(iD(13524), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice32(iD(13525), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice32(iD(13526), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice32(iD(13527), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice32(iD(13528), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice64(iD(13529), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice64(iD(13530), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice64(iD(13531), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice64(iD(13532), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice64(iD(13533), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice64(iD(13534), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice64(iD(13535), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice64(iD(13536), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice64(iD(13537), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice64(iD(13538), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice64(iD(13539), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice64(iD(13540), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice8_1 (iD(13541), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice8_2 (iD(13542), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice8_3 (iD(13543), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice8_4 (iD(13544), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice8_5 (iD(13545), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice8_6 (iD(13546), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice8_7 (iD(13547), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice8_8 (iD(13548), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice8_9 (iD(13549), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice8_10(iD(13550), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice8_11(iD(13551), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice8_12(iD(13552), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice16_1 (iD(13553), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice16_2 (iD(13554), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice16_3 (iD(13555), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice16_4 (iD(13556), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice16_5 (iD(13557), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice16_6 (iD(13558), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice16_7 (iD(13559), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice16_8 (iD(13560), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16_9 (iD(13561), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice16_10(iD(13562), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice16_11(iD(13563), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16_12(iD(13564), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice32_1 (iD(13565), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice32_2 (iD(13566), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice32_3 (iD(13567), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice32_4 (iD(13568), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice32_5 (iD(13569), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice32_6 (iD(13570), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice32_7 (iD(13571), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice32_8 (iD(13572), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice32_9 (iD(13573), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice32_10(iD(13574), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice32_11(iD(13575), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice32_12(iD(13576), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRice64_1 (iD(13577), "msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 - break; case __LINE__: Trice64_2 (iD(13578), "msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 - break; case __LINE__: trice64_3 (iD(13579), "msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 - break; case __LINE__: TRice64_4 (iD(13580), "msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 - break; case __LINE__: Trice64_5 (iD(13581), "msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 - break; case __LINE__: trice64_6 (iD(13582), "msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice64_7 (iD(13583), "msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice64_8 (iD(13584), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice64_9 (iD(13585), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice64_10(iD(13586), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice64_11(iD(13587), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice64_12(iD(13588), "msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice8("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice8("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice8("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice8("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice8("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice8("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice8("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice8("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice16("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice16("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice16("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice16("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice16("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice16("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice16("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice32("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice32("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice32("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice32("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice32("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice32("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice32("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice32("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice64("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice64("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice64("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice64("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice64("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice64("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice64("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice64("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice8_1 ("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice8_2 ("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice8_3 ("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice8_4 ("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice8_5 ("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice8_6 ("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice8_7 ("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice8_8 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice8_9 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice8_10("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice8_11("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice8_12("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice16_1 ("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice16_2 ("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice16_3 ("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice16_4 ("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice16_5 ("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice16_6 ("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice16_7 ("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice16_8 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16_9 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice16_10("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice16_11("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16_12("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice32_1 ("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice32_2 ("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice32_3 ("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice32_4 ("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice32_5 ("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice32_6 ("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice32_7 ("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice32_8 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice32_9 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice32_10("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice32_11("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice32_12("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRice64_1 ("msg:value=%d\n", -1 ); //exp: time:feed3322default: msg:value=-1 + break; case __LINE__: Trice64_2 ("msg:value=%d, %d\n", -1, -2 ); //exp: time: be16default: msg:value=-1, -2 + break; case __LINE__: trice64_3 ("msg:value=%d, %d, %d\n", -1, -2, -3 ); //exp: time: default: msg:value=-1, -2, -3 + break; case __LINE__: TRice64_4 ("msg:value=%d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4 + break; case __LINE__: Trice64_5 ("msg:value=%d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5 + break; case __LINE__: trice64_6 ("msg:value=%d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice64_7 ("msg:value=%d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice64_8 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice64_9 ("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice64_10("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); //exp: time:feed3322default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice64_11("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice64_12("msg:value=%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: msg:value=-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 // use cases for 8-bit data - break; case __LINE__: trice8 (iD(13589), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice8 (iD(13590), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice8 (iD(13591), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: trice8_1 (iD(13592), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice8_1 (iD(13593), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice8_1 (iD(13594), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice8 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice8 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice8 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice8_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice8_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice8_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // use cases for 16-bit data - break; case __LINE__: trice16 (iD(13595), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice16 (iD(13596), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice16 (iD(13597), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: trice16_1 (iD(13598), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice16_1 (iD(13599), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice16_1 (iD(13600), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice16 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice16 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice16 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice16_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice16_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice16_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // use cases for 32-bit data - break; case __LINE__: trice32 (iD(13601), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice32 (iD(13602), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice32 (iD(13603), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: trice32_1 (iD(13604), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice32_1 (iD(13605), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice32_1 (iD(13606), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice32 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice32 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice32 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice32_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice32_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice32_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // use cases for 64-bit data - break; case __LINE__: trice64 (iD(13607), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice64 (iD(13608), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice64 (iD(13609), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: trice64_1 (iD(13610), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: Trice64_1 (iD(13611), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRice64_1 (iD(13612), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice64 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice64 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice64 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: trice64_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: Trice64_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRice64_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // legacy use cases - break; case __LINE__: TRICE (ID(13613), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRICE (id(13614), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRICE (Id(13615), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRICE (ID(13616), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE (id(0), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRICE (Id(0), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRICE (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // default stamp - break; case __LINE__: TRICE8 (ID(13617), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRICE8_1 (ID(13618), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE8 (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE8_1 (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 // no stamp - break; case __LINE__: trice8 (iD(13619), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: trice8_1 (iD(13620), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRICE8 (id(13621), "value=%d\n", -2 ); //exp: time: default: value=-2 - break; case __LINE__: TRICE8_1 (id(13622), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: trice8 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: trice8_1 ("value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRICE8 (id(0), "value=%d\n", -2 ); //exp: time: default: value=-2 + break; case __LINE__: TRICE8_1 (id(0), "value=%d\n", -2 ); //exp: time: default: value=-2 // 16-bit stamp: - break; case __LINE__: Trice8 (iD(13623), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: Trice8_1 (iD(13624), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRICE8 (Id(13625), "value=%d\n", -2 ); //exp: time: be16default: value=-2 - break; case __LINE__: TRICE8_1 (Id(13626), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: Trice8 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: Trice8_1 ("value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRICE8 (Id(0), "value=%d\n", -2 ); //exp: time: be16default: value=-2 + break; case __LINE__: TRICE8_1 (Id(0), "value=%d\n", -2 ); //exp: time: be16default: value=-2 // 32-bit stamp: - break; case __LINE__: TRice8 (iD(13627), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRice8_1 (iD(13628), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRICE8 (ID(13629), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 - break; case __LINE__: TRICE8_1 (ID(13630), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRice8 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRice8_1 ("value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE8 (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 + break; case __LINE__: TRICE8_1 (ID(0), "value=%d\n", -2 ); //exp: time:feed3322default: value=-2 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) // tags - break; case __LINE__: TRICE(id(13631), "FATAL:magenta+b:red\n" ); //exp: time: default: FATAL:magenta+b:red - break; case __LINE__: TRICE(id(13632), "CRITICAL:red+i:default+h\n" ); //exp: time: default: CRITICAL:red+i:default+h - break; case __LINE__: TRICE(id(13633), "EMERGENCY:red+i:blue\n" ); //exp: time: default: EMERGENCY:red+i:blue - break; case __LINE__: TRICE(id(13634), "ERROR:11:red\n" ); //exp: time: default: ERROR:11:red - break; case __LINE__: TRICE(id(13635), "WARNING:11+i:red\n" ); //exp: time: default: WARNING:11+i:red - break; case __LINE__: TRICE(id(13636), "ATTENTION:11:green\n" ); //exp: time: default: ATTENTION:11:green - break; case __LINE__: TRICE(id(13637), "INFO:cyan+b:default+h\n" ); //exp: time: default: INFO:cyan+b:default+h - break; case __LINE__: TRICE(id(13638), "DEBUG:130+i\n" ); //exp: time: default: DEBUG:130+i - break; case __LINE__: TRICE(id(13639), "TRACE:default+i:default+h\n" ); //exp: time: default: TRACE:default+i:default+h - break; case __LINE__: TRICE(id(13640), "TIME:blue+i:blue+h\n" ); //exp: time: default: TIME:blue+i:blue+h - break; case __LINE__: TRICE(id(13641), "MESSAGE:green+h:black\n" ); //exp: time: default: MESSAGE:green+h:black - break; case __LINE__: TRICE(id(13642), "READ:black+i:yellow+h\n" ); //exp: time: default: READ:black+i:yellow+h - break; case __LINE__: TRICE(id(13643), "WRITE:black+u:yellow+h\n" ); //exp: time: default: WRITE:black+u:yellow+h - break; case __LINE__: TRICE(id(13644), "RECEIVE:black+h:black\n" ); //exp: time: default: RECEIVE:black+h:black - break; case __LINE__: TRICE(id(13645), "TRANSMIT:black:black+h\n" ); //exp: time: default: TRANSMIT:black:black+h - break; case __LINE__: TRICE(id(13646), "DIAG:yellow+i:default+h\n" ); //exp: time: default: DIAG:yellow+i:default+h - break; case __LINE__: TRICE(id(13647), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: default: INTERRUPT:magenta+i:default+h - break; case __LINE__: TRICE(id(13648), "SIGNAL:118+i\n" ); //exp: time: default: SIGNAL:118+i - break; case __LINE__: TRICE(id(13649), "TEST:yellow+h:black\n" ); //exp: time: default: TEST:yellow+h:black - break; case __LINE__: TRICE(id(13650), "DEFAULT:off\n" ); //exp: time: default: DEFAULT:off - break; case __LINE__: TRICE(id(13651), "NOTICE:blue:white+h\n" ); //exp: time: default: NOTICE:blue:white+h - break; case __LINE__: TRICE(id(13652), "ALERT:magenta:magenta+h\n" ); //exp: time: default: ALERT:magenta:magenta+h - break; case __LINE__: TRICE(id(13653), "ASSERT:yellow+i:blue\n" ); //exp: time: default: ASSERT:yellow+i:blue - break; case __LINE__: TRICE(id(13654), "ALARM:red+i:white+h\n" ); //exp: time: default: ALARM:red+i:white+h - break; case __LINE__: TRICE(id(13655), "VERBOSE:blue:default\n" ); //exp: time: default: VERBOSE:blue:default - break; case __LINE__: TRICE(id(13656), "fatal:magenta+b:red\n" ); //exp: time: default: fatal:magenta+b:red - break; case __LINE__: TRICE(id(13657), "critical:red+i:default+h\n" ); //exp: time: default: critical:red+i:default+h - break; case __LINE__: TRICE(id(13658), "emergency:red+i:blue\n" ); //exp: time: default: emergency:red+i:blue - break; case __LINE__: TRICE(id(13659), "error:11:red\n" ); //exp: time: default: error:11:red - break; case __LINE__: TRICE(id(13660), "warning:11+i:red\n" ); //exp: time: default: warning:11+i:red - break; case __LINE__: TRICE(id(13661), "attention:11:green\n" ); //exp: time: default: attention:11:green - break; case __LINE__: TRICE(id(13662), "info:cyan+b:default+h\n" ); //exp: time: default: info:cyan+b:default+h - break; case __LINE__: TRICE(id(13663), "debug:130+i\n" ); //exp: time: default: debug:130+i - break; case __LINE__: TRICE(id(13664), "trace:default+i:default+h\n" ); //exp: time: default: trace:default+i:default+h - break; case __LINE__: TRICE(id(13665), "time:blue+i:blue+h\n" ); //exp: time: default: time:blue+i:blue+h - break; case __LINE__: TRICE(id(13666), "message:green+h:black\n" ); //exp: time: default: message:green+h:black - break; case __LINE__: TRICE(id(13667), "read:black+i:yellow+h\n" ); //exp: time: default: read:black+i:yellow+h - break; case __LINE__: TRICE(id(13668), "write:black+u:yellow+h\n" ); //exp: time: default: write:black+u:yellow+h - break; case __LINE__: TRICE(id(13669), "receive:black+h:black\n" ); //exp: time: default: receive:black+h:black - break; case __LINE__: TRICE(id(13670), "transmit:black:black+h\n" ); //exp: time: default: transmit:black:black+h - break; case __LINE__: TRICE(id(13671), "diag:yellow+i:default+h\n" ); //exp: time: default: diag:yellow+i:default+h - break; case __LINE__: TRICE(id(13672), "interrupt:magenta+i:default+h\n" ); //exp: time: default: interrupt:magenta+i:default+h - break; case __LINE__: TRICE(id(13673), "signal:118+i\n" ); //exp: time: default: signal:118+i - break; case __LINE__: TRICE(id(13674), "test:yellow+h:black\n" ); //exp: time: default: test:yellow+h:black - break; case __LINE__: TRICE(id(13675), "default:off\n" ); //exp: time: default: default:off - break; case __LINE__: TRICE(id(13676), "notice:blue:white+h\n" ); //exp: time: default: notice:blue:white+h - break; case __LINE__: TRICE(id(13677), "alert:magenta:magenta+h\n" ); //exp: time: default: alert:magenta:magenta+h - break; case __LINE__: TRICE(id(13678), "assert:yellow+i:blue\n" ); //exp: time: default: assert:yellow+i:blue - break; case __LINE__: TRICE(id(13679), "alarm:red+i:white+h\n" ); //exp: time: default: alarm:red+i:white+h - break; case __LINE__: TRICE(id(13680), "verbose:blue:default\n" ); //exp: time: default: verbose:blue:default + break; case __LINE__: TRICE(id(0), "FATAL:magenta+b:red\n" ); //exp: time: default: FATAL:magenta+b:red + break; case __LINE__: TRICE(id(0), "CRITICAL:red+i:default+h\n" ); //exp: time: default: CRITICAL:red+i:default+h + break; case __LINE__: TRICE(id(0), "EMERGENCY:red+i:blue\n" ); //exp: time: default: EMERGENCY:red+i:blue + break; case __LINE__: TRICE(id(0), "ERROR:11:red\n" ); //exp: time: default: ERROR:11:red + break; case __LINE__: TRICE(id(0), "WARNING:11+i:red\n" ); //exp: time: default: WARNING:11+i:red + break; case __LINE__: TRICE(id(0), "ATTENTION:11:green\n" ); //exp: time: default: ATTENTION:11:green + break; case __LINE__: TRICE(id(0), "INFO:cyan+b:default+h\n" ); //exp: time: default: INFO:cyan+b:default+h + break; case __LINE__: TRICE(id(0), "DEBUG:130+i\n" ); //exp: time: default: DEBUG:130+i + break; case __LINE__: TRICE(id(0), "TRACE:default+i:default+h\n" ); //exp: time: default: TRACE:default+i:default+h + break; case __LINE__: TRICE(id(0), "TIME:blue+i:blue+h\n" ); //exp: time: default: TIME:blue+i:blue+h + break; case __LINE__: TRICE(id(0), "MESSAGE:green+h:black\n" ); //exp: time: default: MESSAGE:green+h:black + break; case __LINE__: TRICE(id(0), "READ:black+i:yellow+h\n" ); //exp: time: default: READ:black+i:yellow+h + break; case __LINE__: TRICE(id(0), "WRITE:black+u:yellow+h\n" ); //exp: time: default: WRITE:black+u:yellow+h + break; case __LINE__: TRICE(id(0), "RECEIVE:black+h:black\n" ); //exp: time: default: RECEIVE:black+h:black + break; case __LINE__: TRICE(id(0), "TRANSMIT:black:black+h\n" ); //exp: time: default: TRANSMIT:black:black+h + break; case __LINE__: TRICE(id(0), "DIAG:yellow+i:default+h\n" ); //exp: time: default: DIAG:yellow+i:default+h + break; case __LINE__: TRICE(id(0), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: default: INTERRUPT:magenta+i:default+h + break; case __LINE__: TRICE(id(0), "SIGNAL:118+i\n" ); //exp: time: default: SIGNAL:118+i + break; case __LINE__: TRICE(id(0), "TEST:yellow+h:black\n" ); //exp: time: default: TEST:yellow+h:black + break; case __LINE__: TRICE(id(0), "DEFAULT:off\n" ); //exp: time: default: DEFAULT:off + break; case __LINE__: TRICE(id(0), "NOTICE:blue:white+h\n" ); //exp: time: default: NOTICE:blue:white+h + break; case __LINE__: TRICE(id(0), "ALERT:magenta:magenta+h\n" ); //exp: time: default: ALERT:magenta:magenta+h + break; case __LINE__: TRICE(id(0), "ASSERT:yellow+i:blue\n" ); //exp: time: default: ASSERT:yellow+i:blue + break; case __LINE__: TRICE(id(0), "ALARM:red+i:white+h\n" ); //exp: time: default: ALARM:red+i:white+h + break; case __LINE__: TRICE(id(0), "VERBOSE:blue:default\n" ); //exp: time: default: VERBOSE:blue:default + break; case __LINE__: TRICE(id(0), "fatal:magenta+b:red\n" ); //exp: time: default: fatal:magenta+b:red + break; case __LINE__: TRICE(id(0), "critical:red+i:default+h\n" ); //exp: time: default: critical:red+i:default+h + break; case __LINE__: TRICE(id(0), "emergency:red+i:blue\n" ); //exp: time: default: emergency:red+i:blue + break; case __LINE__: TRICE(id(0), "error:11:red\n" ); //exp: time: default: error:11:red + break; case __LINE__: TRICE(id(0), "warning:11+i:red\n" ); //exp: time: default: warning:11+i:red + break; case __LINE__: TRICE(id(0), "attention:11:green\n" ); //exp: time: default: attention:11:green + break; case __LINE__: TRICE(id(0), "info:cyan+b:default+h\n" ); //exp: time: default: info:cyan+b:default+h + break; case __LINE__: TRICE(id(0), "debug:130+i\n" ); //exp: time: default: debug:130+i + break; case __LINE__: TRICE(id(0), "trace:default+i:default+h\n" ); //exp: time: default: trace:default+i:default+h + break; case __LINE__: TRICE(id(0), "time:blue+i:blue+h\n" ); //exp: time: default: time:blue+i:blue+h + break; case __LINE__: TRICE(id(0), "message:green+h:black\n" ); //exp: time: default: message:green+h:black + break; case __LINE__: TRICE(id(0), "read:black+i:yellow+h\n" ); //exp: time: default: read:black+i:yellow+h + break; case __LINE__: TRICE(id(0), "write:black+u:yellow+h\n" ); //exp: time: default: write:black+u:yellow+h + break; case __LINE__: TRICE(id(0), "receive:black+h:black\n" ); //exp: time: default: receive:black+h:black + break; case __LINE__: TRICE(id(0), "transmit:black:black+h\n" ); //exp: time: default: transmit:black:black+h + break; case __LINE__: TRICE(id(0), "diag:yellow+i:default+h\n" ); //exp: time: default: diag:yellow+i:default+h + break; case __LINE__: TRICE(id(0), "interrupt:magenta+i:default+h\n" ); //exp: time: default: interrupt:magenta+i:default+h + break; case __LINE__: TRICE(id(0), "signal:118+i\n" ); //exp: time: default: signal:118+i + break; case __LINE__: TRICE(id(0), "test:yellow+h:black\n" ); //exp: time: default: test:yellow+h:black + break; case __LINE__: TRICE(id(0), "default:off\n" ); //exp: time: default: default:off + break; case __LINE__: TRICE(id(0), "notice:blue:white+h\n" ); //exp: time: default: notice:blue:white+h + break; case __LINE__: TRICE(id(0), "alert:magenta:magenta+h\n" ); //exp: time: default: alert:magenta:magenta+h + break; case __LINE__: TRICE(id(0), "assert:yellow+i:blue\n" ); //exp: time: default: assert:yellow+i:blue + break; case __LINE__: TRICE(id(0), "alarm:red+i:white+h\n" ); //exp: time: default: alarm:red+i:white+h + break; case __LINE__: TRICE(id(0), "verbose:blue:default\n" ); //exp: time: default: verbose:blue:default #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(13681), "FATAL:magenta+b:red\n" ); //exp: time: default: FATAL:magenta+b:red - break; case __LINE__: trice(iD(13682), "CRITICAL:red+i:default+h\n" ); //exp: time: default: CRITICAL:red+i:default+h - break; case __LINE__: trice(iD(13683), "EMERGENCY:red+i:blue\n" ); //exp: time: default: EMERGENCY:red+i:blue - break; case __LINE__: trice(iD(13684), "ERROR:11:red\n" ); //exp: time: default: ERROR:11:red - break; case __LINE__: trice(iD(13685), "WARNING:11+i:red\n" ); //exp: time: default: WARNING:11+i:red - break; case __LINE__: trice(iD(13686), "ATTENTION:11:green\n" ); //exp: time: default: ATTENTION:11:green - break; case __LINE__: trice(iD(13687), "INFO:cyan+b:default+h\n" ); //exp: time: default: INFO:cyan+b:default+h - break; case __LINE__: trice(iD(13688), "DEBUG:130+i\n" ); //exp: time: default: DEBUG:130+i - break; case __LINE__: trice(iD(13689), "TRACE:default+i:default+h\n" ); //exp: time: default: TRACE:default+i:default+h - break; case __LINE__: trice(iD(13690), "TIME:blue+i:blue+h\n" ); //exp: time: default: TIME:blue+i:blue+h - break; case __LINE__: trice(iD(13691), "MESSAGE:green+h:black\n" ); //exp: time: default: MESSAGE:green+h:black - break; case __LINE__: trice(iD(13692), "READ:black+i:yellow+h\n" ); //exp: time: default: READ:black+i:yellow+h - break; case __LINE__: trice(iD(13693), "WRITE:black+u:yellow+h\n" ); //exp: time: default: WRITE:black+u:yellow+h - break; case __LINE__: trice(iD(13694), "RECEIVE:black+h:black\n" ); //exp: time: default: RECEIVE:black+h:black - break; case __LINE__: trice(iD(13695), "TRANSMIT:black:black+h\n" ); //exp: time: default: TRANSMIT:black:black+h - break; case __LINE__: trice(iD(13696), "DIAG:yellow+i:default+h\n" ); //exp: time: default: DIAG:yellow+i:default+h - break; case __LINE__: trice(iD(13697), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: default: INTERRUPT:magenta+i:default+h - break; case __LINE__: trice(iD(13698), "SIGNAL:118+i\n" ); //exp: time: default: SIGNAL:118+i - break; case __LINE__: trice(iD(13699), "TEST:yellow+h:black\n" ); //exp: time: default: TEST:yellow+h:black - break; case __LINE__: trice(iD(13700), "DEFAULT:off\n" ); //exp: time: default: DEFAULT:off - break; case __LINE__: trice(iD(13701), "NOTICE:blue:white+h\n" ); //exp: time: default: NOTICE:blue:white+h - break; case __LINE__: trice(iD(13702), "ALERT:magenta:magenta+h\n" ); //exp: time: default: ALERT:magenta:magenta+h - break; case __LINE__: trice(iD(13703), "ASSERT:yellow+i:blue\n" ); //exp: time: default: ASSERT:yellow+i:blue - break; case __LINE__: trice(iD(13704), "ALARM:red+i:white+h\n" ); //exp: time: default: ALARM:red+i:white+h - break; case __LINE__: trice(iD(13705), "VERBOSE:blue:default\n" ); //exp: time: default: VERBOSE:blue:default - break; case __LINE__: trice(iD(13706), "fatal:magenta+b:red\n" ); //exp: time: default: fatal:magenta+b:red - break; case __LINE__: trice(iD(13707), "critical:red+i:default+h\n" ); //exp: time: default: critical:red+i:default+h - break; case __LINE__: trice(iD(13708), "emergency:red+i:blue\n" ); //exp: time: default: emergency:red+i:blue - break; case __LINE__: trice(iD(13709), "error:11:red\n" ); //exp: time: default: error:11:red - break; case __LINE__: trice(iD(13710), "warning:11+i:red\n" ); //exp: time: default: warning:11+i:red - break; case __LINE__: trice(iD(13711), "attention:11:green\n" ); //exp: time: default: attention:11:green - break; case __LINE__: trice(iD(13712), "info:cyan+b:default+h\n" ); //exp: time: default: info:cyan+b:default+h - break; case __LINE__: trice(iD(13713), "debug:130+i\n" ); //exp: time: default: debug:130+i - break; case __LINE__: trice(iD(13714), "trace:default+i:default+h\n" ); //exp: time: default: trace:default+i:default+h - break; case __LINE__: trice(iD(13715), "time:blue+i:blue+h\n" ); //exp: time: default: time:blue+i:blue+h - break; case __LINE__: trice(iD(13716), "message:green+h:black\n" ); //exp: time: default: message:green+h:black - break; case __LINE__: trice(iD(13717), "read:black+i:yellow+h\n" ); //exp: time: default: read:black+i:yellow+h - break; case __LINE__: trice(iD(13718), "write:black+u:yellow+h\n" ); //exp: time: default: write:black+u:yellow+h - break; case __LINE__: trice(iD(13719), "receive:black+h:black\n" ); //exp: time: default: receive:black+h:black - break; case __LINE__: trice(iD(13720), "transmit:black:black+h\n" ); //exp: time: default: transmit:black:black+h - break; case __LINE__: trice(iD(13721), "diag:yellow+i:default+h\n" ); //exp: time: default: diag:yellow+i:default+h - break; case __LINE__: trice(iD(13722), "interrupt:magenta+i:default+h\n" ); //exp: time: default: interrupt:magenta+i:default+h - break; case __LINE__: trice(iD(13723), "signal:118+i\n" ); //exp: time: default: signal:118+i - break; case __LINE__: trice(iD(13724), "test:yellow+h:black\n" ); //exp: time: default: test:yellow+h:black - break; case __LINE__: trice(iD(13725), "default:off\n" ); //exp: time: default: default:off - break; case __LINE__: trice(iD(13726), "notice:blue:white+h\n" ); //exp: time: default: notice:blue:white+h - break; case __LINE__: trice(iD(13727), "alert:magenta:magenta+h\n" ); //exp: time: default: alert:magenta:magenta+h - break; case __LINE__: trice(iD(13728), "assert:yellow+i:blue\n" ); //exp: time: default: assert:yellow+i:blue - break; case __LINE__: trice(iD(13729), "alarm:red+i:white+h\n" ); //exp: time: default: alarm:red+i:white+h - break; case __LINE__: trice(iD(13730), "verbose:blue:default\n" ); //exp: time: default: verbose:blue:default + break; case __LINE__: trice("FATAL:magenta+b:red\n" ); //exp: time: default: FATAL:magenta+b:red + break; case __LINE__: trice("CRITICAL:red+i:default+h\n" ); //exp: time: default: CRITICAL:red+i:default+h + break; case __LINE__: trice("EMERGENCY:red+i:blue\n" ); //exp: time: default: EMERGENCY:red+i:blue + break; case __LINE__: trice("ERROR:11:red\n" ); //exp: time: default: ERROR:11:red + break; case __LINE__: trice("WARNING:11+i:red\n" ); //exp: time: default: WARNING:11+i:red + break; case __LINE__: trice("ATTENTION:11:green\n" ); //exp: time: default: ATTENTION:11:green + break; case __LINE__: trice("INFO:cyan+b:default+h\n" ); //exp: time: default: INFO:cyan+b:default+h + break; case __LINE__: trice("DEBUG:130+i\n" ); //exp: time: default: DEBUG:130+i + break; case __LINE__: trice("TRACE:default+i:default+h\n" ); //exp: time: default: TRACE:default+i:default+h + break; case __LINE__: trice("TIME:blue+i:blue+h\n" ); //exp: time: default: TIME:blue+i:blue+h + break; case __LINE__: trice("MESSAGE:green+h:black\n" ); //exp: time: default: MESSAGE:green+h:black + break; case __LINE__: trice("READ:black+i:yellow+h\n" ); //exp: time: default: READ:black+i:yellow+h + break; case __LINE__: trice("WRITE:black+u:yellow+h\n" ); //exp: time: default: WRITE:black+u:yellow+h + break; case __LINE__: trice("RECEIVE:black+h:black\n" ); //exp: time: default: RECEIVE:black+h:black + break; case __LINE__: trice("TRANSMIT:black:black+h\n" ); //exp: time: default: TRANSMIT:black:black+h + break; case __LINE__: trice("DIAG:yellow+i:default+h\n" ); //exp: time: default: DIAG:yellow+i:default+h + break; case __LINE__: trice("INTERRUPT:magenta+i:default+h\n" ); //exp: time: default: INTERRUPT:magenta+i:default+h + break; case __LINE__: trice("SIGNAL:118+i\n" ); //exp: time: default: SIGNAL:118+i + break; case __LINE__: trice("TEST:yellow+h:black\n" ); //exp: time: default: TEST:yellow+h:black + break; case __LINE__: trice("DEFAULT:off\n" ); //exp: time: default: DEFAULT:off + break; case __LINE__: trice("NOTICE:blue:white+h\n" ); //exp: time: default: NOTICE:blue:white+h + break; case __LINE__: trice("ALERT:magenta:magenta+h\n" ); //exp: time: default: ALERT:magenta:magenta+h + break; case __LINE__: trice("ASSERT:yellow+i:blue\n" ); //exp: time: default: ASSERT:yellow+i:blue + break; case __LINE__: trice("ALARM:red+i:white+h\n" ); //exp: time: default: ALARM:red+i:white+h + break; case __LINE__: trice("VERBOSE:blue:default\n" ); //exp: time: default: VERBOSE:blue:default + break; case __LINE__: trice("fatal:magenta+b:red\n" ); //exp: time: default: fatal:magenta+b:red + break; case __LINE__: trice("critical:red+i:default+h\n" ); //exp: time: default: critical:red+i:default+h + break; case __LINE__: trice("emergency:red+i:blue\n" ); //exp: time: default: emergency:red+i:blue + break; case __LINE__: trice("error:11:red\n" ); //exp: time: default: error:11:red + break; case __LINE__: trice("warning:11+i:red\n" ); //exp: time: default: warning:11+i:red + break; case __LINE__: trice("attention:11:green\n" ); //exp: time: default: attention:11:green + break; case __LINE__: trice("info:cyan+b:default+h\n" ); //exp: time: default: info:cyan+b:default+h + break; case __LINE__: trice("debug:130+i\n" ); //exp: time: default: debug:130+i + break; case __LINE__: trice("trace:default+i:default+h\n" ); //exp: time: default: trace:default+i:default+h + break; case __LINE__: trice("time:blue+i:blue+h\n" ); //exp: time: default: time:blue+i:blue+h + break; case __LINE__: trice("message:green+h:black\n" ); //exp: time: default: message:green+h:black + break; case __LINE__: trice("read:black+i:yellow+h\n" ); //exp: time: default: read:black+i:yellow+h + break; case __LINE__: trice("write:black+u:yellow+h\n" ); //exp: time: default: write:black+u:yellow+h + break; case __LINE__: trice("receive:black+h:black\n" ); //exp: time: default: receive:black+h:black + break; case __LINE__: trice("transmit:black:black+h\n" ); //exp: time: default: transmit:black:black+h + break; case __LINE__: trice("diag:yellow+i:default+h\n" ); //exp: time: default: diag:yellow+i:default+h + break; case __LINE__: trice("interrupt:magenta+i:default+h\n" ); //exp: time: default: interrupt:magenta+i:default+h + break; case __LINE__: trice("signal:118+i\n" ); //exp: time: default: signal:118+i + break; case __LINE__: trice("test:yellow+h:black\n" ); //exp: time: default: test:yellow+h:black + break; case __LINE__: trice("default:off\n" ); //exp: time: default: default:off + break; case __LINE__: trice("notice:blue:white+h\n" ); //exp: time: default: notice:blue:white+h + break; case __LINE__: trice("alert:magenta:magenta+h\n" ); //exp: time: default: alert:magenta:magenta+h + break; case __LINE__: trice("assert:yellow+i:blue\n" ); //exp: time: default: assert:yellow+i:blue + break; case __LINE__: trice("alarm:red+i:white+h\n" ); //exp: time: default: alarm:red+i:white+h + break; case __LINE__: trice("verbose:blue:default\n" ); //exp: time: default: verbose:blue:default #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE(Id(13731), "FATAL:magenta+b:red\n" ); //exp: time: be16default: FATAL:magenta+b:red - break; case __LINE__: TRICE(Id(13732), "CRITICAL:red+i:default+h\n" ); //exp: time: be16default: CRITICAL:red+i:default+h - break; case __LINE__: TRICE(Id(13733), "EMERGENCY:red+i:blue\n" ); //exp: time: be16default: EMERGENCY:red+i:blue - break; case __LINE__: TRICE(Id(13734), "ERROR:11:red\n" ); //exp: time: be16default: ERROR:11:red - break; case __LINE__: TRICE(Id(13735), "WARNING:11+i:red\n" ); //exp: time: be16default: WARNING:11+i:red - break; case __LINE__: TRICE(Id(13736), "ATTENTION:11:green\n" ); //exp: time: be16default: ATTENTION:11:green - break; case __LINE__: TRICE(Id(13737), "INFO:cyan+b:default+h\n" ); //exp: time: be16default: INFO:cyan+b:default+h - break; case __LINE__: TRICE(Id(13738), "DEBUG:130+i\n" ); //exp: time: be16default: DEBUG:130+i - break; case __LINE__: TRICE(Id(13739), "TRACE:default+i:default+h\n" ); //exp: time: be16default: TRACE:default+i:default+h - break; case __LINE__: TRICE(Id(13740), "TIME:blue+i:blue+h\n" ); //exp: time: be16default: TIME:blue+i:blue+h - break; case __LINE__: TRICE(Id(13741), "MESSAGE:green+h:black\n" ); //exp: time: be16default: MESSAGE:green+h:black - break; case __LINE__: TRICE(Id(13742), "READ:black+i:yellow+h\n" ); //exp: time: be16default: READ:black+i:yellow+h - break; case __LINE__: TRICE(Id(13743), "WRITE:black+u:yellow+h\n" ); //exp: time: be16default: WRITE:black+u:yellow+h - break; case __LINE__: TRICE(Id(13744), "RECEIVE:black+h:black\n" ); //exp: time: be16default: RECEIVE:black+h:black - break; case __LINE__: TRICE(Id(13745), "TRANSMIT:black:black+h\n" ); //exp: time: be16default: TRANSMIT:black:black+h - break; case __LINE__: TRICE(Id(13746), "DIAG:yellow+i:default+h\n" ); //exp: time: be16default: DIAG:yellow+i:default+h - break; case __LINE__: TRICE(Id(13747), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: be16default: INTERRUPT:magenta+i:default+h - break; case __LINE__: TRICE(Id(13748), "SIGNAL:118+i\n" ); //exp: time: be16default: SIGNAL:118+i - break; case __LINE__: TRICE(Id(13749), "TEST:yellow+h:black\n" ); //exp: time: be16default: TEST:yellow+h:black - break; case __LINE__: TRICE(Id(13750), "DEFAULT:off\n" ); //exp: time: be16default: DEFAULT:off - break; case __LINE__: TRICE(Id(13751), "NOTICE:blue:white+h\n" ); //exp: time: be16default: NOTICE:blue:white+h - break; case __LINE__: TRICE(Id(13752), "ALERT:magenta:magenta+h\n" ); //exp: time: be16default: ALERT:magenta:magenta+h - break; case __LINE__: TRICE(Id(13753), "ASSERT:yellow+i:blue\n" ); //exp: time: be16default: ASSERT:yellow+i:blue - break; case __LINE__: TRICE(Id(13754), "ALARM:red+i:white+h\n" ); //exp: time: be16default: ALARM:red+i:white+h - break; case __LINE__: TRICE(Id(13755), "VERBOSE:blue:default\n" ); //exp: time: be16default: VERBOSE:blue:default - break; case __LINE__: TRICE(Id(13756), "fatal:magenta+b:red\n" ); //exp: time: be16default: fatal:magenta+b:red - break; case __LINE__: TRICE(Id(13757), "critical:red+i:default+h\n" ); //exp: time: be16default: critical:red+i:default+h - break; case __LINE__: TRICE(Id(13758), "emergency:red+i:blue\n" ); //exp: time: be16default: emergency:red+i:blue - break; case __LINE__: TRICE(Id(13759), "error:11:red\n" ); //exp: time: be16default: error:11:red - break; case __LINE__: TRICE(Id(13760), "warning:11+i:red\n" ); //exp: time: be16default: warning:11+i:red - break; case __LINE__: TRICE(Id(13761), "attention:11:green\n" ); //exp: time: be16default: attention:11:green - break; case __LINE__: TRICE(Id(13762), "info:cyan+b:default+h\n" ); //exp: time: be16default: info:cyan+b:default+h - break; case __LINE__: TRICE(Id(13763), "debug:130+i\n" ); //exp: time: be16default: debug:130+i - break; case __LINE__: TRICE(Id(13764), "trace:default+i:default+h\n" ); //exp: time: be16default: trace:default+i:default+h - break; case __LINE__: TRICE(Id(13765), "time:blue+i:blue+h\n" ); //exp: time: be16default: time:blue+i:blue+h - break; case __LINE__: TRICE(Id(13766), "message:green+h:black\n" ); //exp: time: be16default: message:green+h:black - break; case __LINE__: TRICE(Id(13767), "read:black+i:yellow+h\n" ); //exp: time: be16default: read:black+i:yellow+h - break; case __LINE__: TRICE(Id(13768), "write:black+u:yellow+h\n" ); //exp: time: be16default: write:black+u:yellow+h - break; case __LINE__: TRICE(Id(13769), "receive:black+h:black\n" ); //exp: time: be16default: receive:black+h:black - break; case __LINE__: TRICE(Id(13770), "transmit:black:black+h\n" ); //exp: time: be16default: transmit:black:black+h - break; case __LINE__: TRICE(Id(13771), "diag:yellow+i:default+h\n" ); //exp: time: be16default: diag:yellow+i:default+h - break; case __LINE__: TRICE(Id(13772), "interrupt:magenta+i:default+h\n" ); //exp: time: be16default: interrupt:magenta+i:default+h - break; case __LINE__: TRICE(Id(13773), "signal:118+i\n" ); //exp: time: be16default: signal:118+i - break; case __LINE__: TRICE(Id(13774), "test:yellow+h:black\n" ); //exp: time: be16default: test:yellow+h:black - break; case __LINE__: TRICE(Id(13775), "default:off\n" ); //exp: time: be16default: default:off - break; case __LINE__: TRICE(Id(13776), "notice:blue:white+h\n" ); //exp: time: be16default: notice:blue:white+h - break; case __LINE__: TRICE(Id(13777), "alert:magenta:magenta+h\n" ); //exp: time: be16default: alert:magenta:magenta+h - break; case __LINE__: TRICE(Id(13778), "assert:yellow+i:blue\n" ); //exp: time: be16default: assert:yellow+i:blue - break; case __LINE__: TRICE(Id(13779), "alarm:red+i:white+h\n" ); //exp: time: be16default: alarm:red+i:white+h - break; case __LINE__: TRICE(Id(13780), "verbose:blue:default\n" ); //exp: time: be16default: verbose:blue:default - - break; case __LINE__: Trice(iD(13781), "FATAL:magenta+b:red\n" ); //exp: time: be16default: FATAL:magenta+b:red - break; case __LINE__: Trice(iD(13782), "CRITICAL:red+i:default+h\n" ); //exp: time: be16default: CRITICAL:red+i:default+h - break; case __LINE__: Trice(iD(13783), "EMERGENCY:red+i:blue\n" ); //exp: time: be16default: EMERGENCY:red+i:blue - break; case __LINE__: Trice(iD(13784), "ERROR:11:red\n" ); //exp: time: be16default: ERROR:11:red - break; case __LINE__: Trice(iD(13785), "WARNING:11+i:red\n" ); //exp: time: be16default: WARNING:11+i:red - break; case __LINE__: Trice(iD(13786), "ATTENTION:11:green\n" ); //exp: time: be16default: ATTENTION:11:green - break; case __LINE__: Trice(iD(13787), "INFO:cyan+b:default+h\n" ); //exp: time: be16default: INFO:cyan+b:default+h - break; case __LINE__: Trice(iD(13788), "DEBUG:130+i\n" ); //exp: time: be16default: DEBUG:130+i - break; case __LINE__: Trice(iD(13789), "TRACE:default+i:default+h\n" ); //exp: time: be16default: TRACE:default+i:default+h - break; case __LINE__: Trice(iD(13790), "TIME:blue+i:blue+h\n" ); //exp: time: be16default: TIME:blue+i:blue+h - break; case __LINE__: Trice(iD(13791), "MESSAGE:green+h:black\n" ); //exp: time: be16default: MESSAGE:green+h:black - break; case __LINE__: Trice(iD(13792), "READ:black+i:yellow+h\n" ); //exp: time: be16default: READ:black+i:yellow+h - break; case __LINE__: Trice(iD(13793), "WRITE:black+u:yellow+h\n" ); //exp: time: be16default: WRITE:black+u:yellow+h - break; case __LINE__: Trice(iD(13794), "RECEIVE:black+h:black\n" ); //exp: time: be16default: RECEIVE:black+h:black - break; case __LINE__: Trice(iD(13795), "TRANSMIT:black:black+h\n" ); //exp: time: be16default: TRANSMIT:black:black+h - break; case __LINE__: Trice(iD(13796), "DIAG:yellow+i:default+h\n" ); //exp: time: be16default: DIAG:yellow+i:default+h - break; case __LINE__: Trice(iD(13797), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: be16default: INTERRUPT:magenta+i:default+h - break; case __LINE__: Trice(iD(13798), "SIGNAL:118+i\n" ); //exp: time: be16default: SIGNAL:118+i - break; case __LINE__: Trice(iD(13799), "TEST:yellow+h:black\n" ); //exp: time: be16default: TEST:yellow+h:black - break; case __LINE__: Trice(iD(13800), "DEFAULT:off\n" ); //exp: time: be16default: DEFAULT:off - break; case __LINE__: Trice(iD(13801), "NOTICE:blue:white+h\n" ); //exp: time: be16default: NOTICE:blue:white+h - break; case __LINE__: Trice(iD(13802), "ALERT:magenta:magenta+h\n" ); //exp: time: be16default: ALERT:magenta:magenta+h - break; case __LINE__: Trice(iD(13803), "ASSERT:yellow+i:blue\n" ); //exp: time: be16default: ASSERT:yellow+i:blue - break; case __LINE__: Trice(iD(13804), "ALARM:red+i:white+h\n" ); //exp: time: be16default: ALARM:red+i:white+h - break; case __LINE__: Trice(iD(13805), "VERBOSE:blue:default\n" ); //exp: time: be16default: VERBOSE:blue:default - break; case __LINE__: Trice(iD(13806), "fatal:magenta+b:red\n" ); //exp: time: be16default: fatal:magenta+b:red - break; case __LINE__: Trice(iD(13807), "critical:red+i:default+h\n" ); //exp: time: be16default: critical:red+i:default+h - break; case __LINE__: Trice(iD(13808), "emergency:red+i:blue\n" ); //exp: time: be16default: emergency:red+i:blue - break; case __LINE__: Trice(iD(13809), "error:11:red\n" ); //exp: time: be16default: error:11:red - break; case __LINE__: Trice(iD(13810), "warning:11+i:red\n" ); //exp: time: be16default: warning:11+i:red - break; case __LINE__: Trice(iD(13811), "attention:11:green\n" ); //exp: time: be16default: attention:11:green - break; case __LINE__: Trice(iD(13812), "info:cyan+b:default+h\n" ); //exp: time: be16default: info:cyan+b:default+h - break; case __LINE__: Trice(iD(13813), "debug:130+i\n" ); //exp: time: be16default: debug:130+i - break; case __LINE__: Trice(iD(13814), "trace:default+i:default+h\n" ); //exp: time: be16default: trace:default+i:default+h - break; case __LINE__: Trice(iD(13815), "time:blue+i:blue+h\n" ); //exp: time: be16default: time:blue+i:blue+h - break; case __LINE__: Trice(iD(13816), "message:green+h:black\n" ); //exp: time: be16default: message:green+h:black - break; case __LINE__: Trice(iD(13817), "read:black+i:yellow+h\n" ); //exp: time: be16default: read:black+i:yellow+h - break; case __LINE__: Trice(iD(13818), "write:black+u:yellow+h\n" ); //exp: time: be16default: write:black+u:yellow+h - break; case __LINE__: Trice(iD(13819), "receive:black+h:black\n" ); //exp: time: be16default: receive:black+h:black - break; case __LINE__: Trice(iD(13820), "transmit:black:black+h\n" ); //exp: time: be16default: transmit:black:black+h - break; case __LINE__: Trice(iD(13821), "diag:yellow+i:default+h\n" ); //exp: time: be16default: diag:yellow+i:default+h - break; case __LINE__: Trice(iD(13822), "interrupt:magenta+i:default+h\n" ); //exp: time: be16default: interrupt:magenta+i:default+h - break; case __LINE__: Trice(iD(13823), "signal:118+i\n" ); //exp: time: be16default: signal:118+i - break; case __LINE__: Trice(iD(13824), "test:yellow+h:black\n" ); //exp: time: be16default: test:yellow+h:black - break; case __LINE__: Trice(iD(13825), "default:off\n" ); //exp: time: be16default: default:off - break; case __LINE__: Trice(iD(13826), "notice:blue:white+h\n" ); //exp: time: be16default: notice:blue:white+h - break; case __LINE__: Trice(iD(13827), "alert:magenta:magenta+h\n" ); //exp: time: be16default: alert:magenta:magenta+h - break; case __LINE__: Trice(iD(13828), "assert:yellow+i:blue\n" ); //exp: time: be16default: assert:yellow+i:blue - break; case __LINE__: Trice(iD(13829), "alarm:red+i:white+h\n" ); //exp: time: be16default: alarm:red+i:white+h - break; case __LINE__: Trice(iD(13830), "verbose:blue:default\n" ); //exp: time: be16default: verbose:blue:default - - break; case __LINE__: TRICE(ID(13831), "FATAL:magenta+b:red\n" ); //exp: time:feed3322default: FATAL:magenta+b:red - break; case __LINE__: TRICE(ID(13832), "CRITICAL:red+i:default+h\n" ); //exp: time:feed3322default: CRITICAL:red+i:default+h - break; case __LINE__: TRICE(ID(13833), "EMERGENCY:red+i:blue\n" ); //exp: time:feed3322default: EMERGENCY:red+i:blue - break; case __LINE__: TRICE(ID(13834), "ERROR:11:red\n" ); //exp: time:feed3322default: ERROR:11:red - break; case __LINE__: TRICE(ID(13835), "WARNING:11+i:red\n" ); //exp: time:feed3322default: WARNING:11+i:red - break; case __LINE__: TRICE(ID(13836), "ATTENTION:11:green\n" ); //exp: time:feed3322default: ATTENTION:11:green - break; case __LINE__: TRICE(ID(13837), "INFO:cyan+b:default+h\n" ); //exp: time:feed3322default: INFO:cyan+b:default+h - break; case __LINE__: TRICE(ID(13838), "DEBUG:130+i\n" ); //exp: time:feed3322default: DEBUG:130+i - break; case __LINE__: TRICE(ID(13839), "TRACE:default+i:default+h\n" ); //exp: time:feed3322default: TRACE:default+i:default+h - break; case __LINE__: TRICE(ID(13840), "TIME:blue+i:blue+h\n" ); //exp: time:feed3322default: TIME:blue+i:blue+h - break; case __LINE__: TRICE(ID(13841), "MESSAGE:green+h:black\n" ); //exp: time:feed3322default: MESSAGE:green+h:black - break; case __LINE__: TRICE(ID(13842), "READ:black+i:yellow+h\n" ); //exp: time:feed3322default: READ:black+i:yellow+h - break; case __LINE__: TRICE(ID(13843), "WRITE:black+u:yellow+h\n" ); //exp: time:feed3322default: WRITE:black+u:yellow+h - break; case __LINE__: TRICE(ID(13844), "RECEIVE:black+h:black\n" ); //exp: time:feed3322default: RECEIVE:black+h:black - break; case __LINE__: TRICE(ID(13845), "TRANSMIT:black:black+h\n" ); //exp: time:feed3322default: TRANSMIT:black:black+h - break; case __LINE__: TRICE(ID(13846), "DIAG:yellow+i:default+h\n" ); //exp: time:feed3322default: DIAG:yellow+i:default+h - break; case __LINE__: TRICE(ID(13847), "INTERRUPT:magenta+i:default+h\n" ); //exp: time:feed3322default: INTERRUPT:magenta+i:default+h - break; case __LINE__: TRICE(ID(13848), "SIGNAL:118+i\n" ); //exp: time:feed3322default: SIGNAL:118+i - break; case __LINE__: TRICE(ID(13849), "TEST:yellow+h:black\n" ); //exp: time:feed3322default: TEST:yellow+h:black - break; case __LINE__: TRICE(ID(13850), "DEFAULT:off\n" ); //exp: time:feed3322default: DEFAULT:off - break; case __LINE__: TRICE(ID(13851), "NOTICE:blue:white+h\n" ); //exp: time:feed3322default: NOTICE:blue:white+h - break; case __LINE__: TRICE(ID(13852), "ALERT:magenta:magenta+h\n" ); //exp: time:feed3322default: ALERT:magenta:magenta+h - break; case __LINE__: TRICE(ID(13853), "ASSERT:yellow+i:blue\n" ); //exp: time:feed3322default: ASSERT:yellow+i:blue - break; case __LINE__: TRICE(ID(13854), "ALARM:red+i:white+h\n" ); //exp: time:feed3322default: ALARM:red+i:white+h - break; case __LINE__: TRICE(ID(13855), "VERBOSE:blue:default\n" ); //exp: time:feed3322default: VERBOSE:blue:default - break; case __LINE__: TRICE(ID(13856), "fatal:magenta+b:red\n" ); //exp: time:feed3322default: fatal:magenta+b:red - break; case __LINE__: TRICE(ID(13857), "critical:red+i:default+h\n" ); //exp: time:feed3322default: critical:red+i:default+h - break; case __LINE__: TRICE(ID(13858), "emergency:red+i:blue\n" ); //exp: time:feed3322default: emergency:red+i:blue - break; case __LINE__: TRICE(ID(13859), "error:11:red\n" ); //exp: time:feed3322default: error:11:red - break; case __LINE__: TRICE(ID(13860), "warning:11+i:red\n" ); //exp: time:feed3322default: warning:11+i:red - break; case __LINE__: TRICE(ID(13861), "attention:11:green\n" ); //exp: time:feed3322default: attention:11:green - break; case __LINE__: TRICE(ID(13862), "info:cyan+b:default+h\n" ); //exp: time:feed3322default: info:cyan+b:default+h - break; case __LINE__: TRICE(ID(13863), "debug:130+i\n" ); //exp: time:feed3322default: debug:130+i - break; case __LINE__: TRICE(ID(13864), "trace:default+i:default+h\n" ); //exp: time:feed3322default: trace:default+i:default+h - break; case __LINE__: TRICE(ID(13865), "time:blue+i:blue+h\n" ); //exp: time:feed3322default: time:blue+i:blue+h - break; case __LINE__: TRICE(ID(13866), "message:green+h:black\n" ); //exp: time:feed3322default: message:green+h:black - break; case __LINE__: TRICE(ID(13867), "read:black+i:yellow+h\n" ); //exp: time:feed3322default: read:black+i:yellow+h - break; case __LINE__: TRICE(ID(13868), "write:black+u:yellow+h\n" ); //exp: time:feed3322default: write:black+u:yellow+h - break; case __LINE__: TRICE(ID(13869), "receive:black+h:black\n" ); //exp: time:feed3322default: receive:black+h:black - break; case __LINE__: TRICE(ID(13870), "transmit:black:black+h\n" ); //exp: time:feed3322default: transmit:black:black+h - break; case __LINE__: TRICE(ID(13871), "diag:yellow+i:default+h\n" ); //exp: time:feed3322default: diag:yellow+i:default+h - break; case __LINE__: TRICE(ID(13872), "interrupt:magenta+i:default+h\n" ); //exp: time:feed3322default: interrupt:magenta+i:default+h - break; case __LINE__: TRICE(ID(13873), "signal:118+i\n" ); //exp: time:feed3322default: signal:118+i - break; case __LINE__: TRICE(ID(13874), "test:yellow+h:black\n" ); //exp: time:feed3322default: test:yellow+h:black - break; case __LINE__: TRICE(ID(13875), "default:off\n" ); //exp: time:feed3322default: default:off - break; case __LINE__: TRICE(ID(13876), "notice:blue:white+h\n" ); //exp: time:feed3322default: notice:blue:white+h - break; case __LINE__: TRICE(ID(13877), "alert:magenta:magenta+h\n" ); //exp: time:feed3322default: alert:magenta:magenta+h - break; case __LINE__: TRICE(ID(13878), "assert:yellow+i:blue\n" ); //exp: time:feed3322default: assert:yellow+i:blue - break; case __LINE__: TRICE(ID(13879), "alarm:red+i:white+h\n" ); //exp: time:feed3322default: alarm:red+i:white+h - break; case __LINE__: TRICE(ID(13880), "verbose:blue:default\n" ); //exp: time:feed3322default: verbose:blue:default + break; case __LINE__: TRICE(Id(0), "FATAL:magenta+b:red\n" ); //exp: time: be16default: FATAL:magenta+b:red + break; case __LINE__: TRICE(Id(0), "CRITICAL:red+i:default+h\n" ); //exp: time: be16default: CRITICAL:red+i:default+h + break; case __LINE__: TRICE(Id(0), "EMERGENCY:red+i:blue\n" ); //exp: time: be16default: EMERGENCY:red+i:blue + break; case __LINE__: TRICE(Id(0), "ERROR:11:red\n" ); //exp: time: be16default: ERROR:11:red + break; case __LINE__: TRICE(Id(0), "WARNING:11+i:red\n" ); //exp: time: be16default: WARNING:11+i:red + break; case __LINE__: TRICE(Id(0), "ATTENTION:11:green\n" ); //exp: time: be16default: ATTENTION:11:green + break; case __LINE__: TRICE(Id(0), "INFO:cyan+b:default+h\n" ); //exp: time: be16default: INFO:cyan+b:default+h + break; case __LINE__: TRICE(Id(0), "DEBUG:130+i\n" ); //exp: time: be16default: DEBUG:130+i + break; case __LINE__: TRICE(Id(0), "TRACE:default+i:default+h\n" ); //exp: time: be16default: TRACE:default+i:default+h + break; case __LINE__: TRICE(Id(0), "TIME:blue+i:blue+h\n" ); //exp: time: be16default: TIME:blue+i:blue+h + break; case __LINE__: TRICE(Id(0), "MESSAGE:green+h:black\n" ); //exp: time: be16default: MESSAGE:green+h:black + break; case __LINE__: TRICE(Id(0), "READ:black+i:yellow+h\n" ); //exp: time: be16default: READ:black+i:yellow+h + break; case __LINE__: TRICE(Id(0), "WRITE:black+u:yellow+h\n" ); //exp: time: be16default: WRITE:black+u:yellow+h + break; case __LINE__: TRICE(Id(0), "RECEIVE:black+h:black\n" ); //exp: time: be16default: RECEIVE:black+h:black + break; case __LINE__: TRICE(Id(0), "TRANSMIT:black:black+h\n" ); //exp: time: be16default: TRANSMIT:black:black+h + break; case __LINE__: TRICE(Id(0), "DIAG:yellow+i:default+h\n" ); //exp: time: be16default: DIAG:yellow+i:default+h + break; case __LINE__: TRICE(Id(0), "INTERRUPT:magenta+i:default+h\n" ); //exp: time: be16default: INTERRUPT:magenta+i:default+h + break; case __LINE__: TRICE(Id(0), "SIGNAL:118+i\n" ); //exp: time: be16default: SIGNAL:118+i + break; case __LINE__: TRICE(Id(0), "TEST:yellow+h:black\n" ); //exp: time: be16default: TEST:yellow+h:black + break; case __LINE__: TRICE(Id(0), "DEFAULT:off\n" ); //exp: time: be16default: DEFAULT:off + break; case __LINE__: TRICE(Id(0), "NOTICE:blue:white+h\n" ); //exp: time: be16default: NOTICE:blue:white+h + break; case __LINE__: TRICE(Id(0), "ALERT:magenta:magenta+h\n" ); //exp: time: be16default: ALERT:magenta:magenta+h + break; case __LINE__: TRICE(Id(0), "ASSERT:yellow+i:blue\n" ); //exp: time: be16default: ASSERT:yellow+i:blue + break; case __LINE__: TRICE(Id(0), "ALARM:red+i:white+h\n" ); //exp: time: be16default: ALARM:red+i:white+h + break; case __LINE__: TRICE(Id(0), "VERBOSE:blue:default\n" ); //exp: time: be16default: VERBOSE:blue:default + break; case __LINE__: TRICE(Id(0), "fatal:magenta+b:red\n" ); //exp: time: be16default: fatal:magenta+b:red + break; case __LINE__: TRICE(Id(0), "critical:red+i:default+h\n" ); //exp: time: be16default: critical:red+i:default+h + break; case __LINE__: TRICE(Id(0), "emergency:red+i:blue\n" ); //exp: time: be16default: emergency:red+i:blue + break; case __LINE__: TRICE(Id(0), "error:11:red\n" ); //exp: time: be16default: error:11:red + break; case __LINE__: TRICE(Id(0), "warning:11+i:red\n" ); //exp: time: be16default: warning:11+i:red + break; case __LINE__: TRICE(Id(0), "attention:11:green\n" ); //exp: time: be16default: attention:11:green + break; case __LINE__: TRICE(Id(0), "info:cyan+b:default+h\n" ); //exp: time: be16default: info:cyan+b:default+h + break; case __LINE__: TRICE(Id(0), "debug:130+i\n" ); //exp: time: be16default: debug:130+i + break; case __LINE__: TRICE(Id(0), "trace:default+i:default+h\n" ); //exp: time: be16default: trace:default+i:default+h + break; case __LINE__: TRICE(Id(0), "time:blue+i:blue+h\n" ); //exp: time: be16default: time:blue+i:blue+h + break; case __LINE__: TRICE(Id(0), "message:green+h:black\n" ); //exp: time: be16default: message:green+h:black + break; case __LINE__: TRICE(Id(0), "read:black+i:yellow+h\n" ); //exp: time: be16default: read:black+i:yellow+h + break; case __LINE__: TRICE(Id(0), "write:black+u:yellow+h\n" ); //exp: time: be16default: write:black+u:yellow+h + break; case __LINE__: TRICE(Id(0), "receive:black+h:black\n" ); //exp: time: be16default: receive:black+h:black + break; case __LINE__: TRICE(Id(0), "transmit:black:black+h\n" ); //exp: time: be16default: transmit:black:black+h + break; case __LINE__: TRICE(Id(0), "diag:yellow+i:default+h\n" ); //exp: time: be16default: diag:yellow+i:default+h + break; case __LINE__: TRICE(Id(0), "interrupt:magenta+i:default+h\n" ); //exp: time: be16default: interrupt:magenta+i:default+h + break; case __LINE__: TRICE(Id(0), "signal:118+i\n" ); //exp: time: be16default: signal:118+i + break; case __LINE__: TRICE(Id(0), "test:yellow+h:black\n" ); //exp: time: be16default: test:yellow+h:black + break; case __LINE__: TRICE(Id(0), "default:off\n" ); //exp: time: be16default: default:off + break; case __LINE__: TRICE(Id(0), "notice:blue:white+h\n" ); //exp: time: be16default: notice:blue:white+h + break; case __LINE__: TRICE(Id(0), "alert:magenta:magenta+h\n" ); //exp: time: be16default: alert:magenta:magenta+h + break; case __LINE__: TRICE(Id(0), "assert:yellow+i:blue\n" ); //exp: time: be16default: assert:yellow+i:blue + break; case __LINE__: TRICE(Id(0), "alarm:red+i:white+h\n" ); //exp: time: be16default: alarm:red+i:white+h + break; case __LINE__: TRICE(Id(0), "verbose:blue:default\n" ); //exp: time: be16default: verbose:blue:default + + break; case __LINE__: Trice("FATAL:magenta+b:red\n" ); //exp: time: be16default: FATAL:magenta+b:red + break; case __LINE__: Trice("CRITICAL:red+i:default+h\n" ); //exp: time: be16default: CRITICAL:red+i:default+h + break; case __LINE__: Trice("EMERGENCY:red+i:blue\n" ); //exp: time: be16default: EMERGENCY:red+i:blue + break; case __LINE__: Trice("ERROR:11:red\n" ); //exp: time: be16default: ERROR:11:red + break; case __LINE__: Trice("WARNING:11+i:red\n" ); //exp: time: be16default: WARNING:11+i:red + break; case __LINE__: Trice("ATTENTION:11:green\n" ); //exp: time: be16default: ATTENTION:11:green + break; case __LINE__: Trice("INFO:cyan+b:default+h\n" ); //exp: time: be16default: INFO:cyan+b:default+h + break; case __LINE__: Trice("DEBUG:130+i\n" ); //exp: time: be16default: DEBUG:130+i + break; case __LINE__: Trice("TRACE:default+i:default+h\n" ); //exp: time: be16default: TRACE:default+i:default+h + break; case __LINE__: Trice("TIME:blue+i:blue+h\n" ); //exp: time: be16default: TIME:blue+i:blue+h + break; case __LINE__: Trice("MESSAGE:green+h:black\n" ); //exp: time: be16default: MESSAGE:green+h:black + break; case __LINE__: Trice("READ:black+i:yellow+h\n" ); //exp: time: be16default: READ:black+i:yellow+h + break; case __LINE__: Trice("WRITE:black+u:yellow+h\n" ); //exp: time: be16default: WRITE:black+u:yellow+h + break; case __LINE__: Trice("RECEIVE:black+h:black\n" ); //exp: time: be16default: RECEIVE:black+h:black + break; case __LINE__: Trice("TRANSMIT:black:black+h\n" ); //exp: time: be16default: TRANSMIT:black:black+h + break; case __LINE__: Trice("DIAG:yellow+i:default+h\n" ); //exp: time: be16default: DIAG:yellow+i:default+h + break; case __LINE__: Trice("INTERRUPT:magenta+i:default+h\n" ); //exp: time: be16default: INTERRUPT:magenta+i:default+h + break; case __LINE__: Trice("SIGNAL:118+i\n" ); //exp: time: be16default: SIGNAL:118+i + break; case __LINE__: Trice("TEST:yellow+h:black\n" ); //exp: time: be16default: TEST:yellow+h:black + break; case __LINE__: Trice("DEFAULT:off\n" ); //exp: time: be16default: DEFAULT:off + break; case __LINE__: Trice("NOTICE:blue:white+h\n" ); //exp: time: be16default: NOTICE:blue:white+h + break; case __LINE__: Trice("ALERT:magenta:magenta+h\n" ); //exp: time: be16default: ALERT:magenta:magenta+h + break; case __LINE__: Trice("ASSERT:yellow+i:blue\n" ); //exp: time: be16default: ASSERT:yellow+i:blue + break; case __LINE__: Trice("ALARM:red+i:white+h\n" ); //exp: time: be16default: ALARM:red+i:white+h + break; case __LINE__: Trice("VERBOSE:blue:default\n" ); //exp: time: be16default: VERBOSE:blue:default + break; case __LINE__: Trice("fatal:magenta+b:red\n" ); //exp: time: be16default: fatal:magenta+b:red + break; case __LINE__: Trice("critical:red+i:default+h\n" ); //exp: time: be16default: critical:red+i:default+h + break; case __LINE__: Trice("emergency:red+i:blue\n" ); //exp: time: be16default: emergency:red+i:blue + break; case __LINE__: Trice("error:11:red\n" ); //exp: time: be16default: error:11:red + break; case __LINE__: Trice("warning:11+i:red\n" ); //exp: time: be16default: warning:11+i:red + break; case __LINE__: Trice("attention:11:green\n" ); //exp: time: be16default: attention:11:green + break; case __LINE__: Trice("info:cyan+b:default+h\n" ); //exp: time: be16default: info:cyan+b:default+h + break; case __LINE__: Trice("debug:130+i\n" ); //exp: time: be16default: debug:130+i + break; case __LINE__: Trice("trace:default+i:default+h\n" ); //exp: time: be16default: trace:default+i:default+h + break; case __LINE__: Trice("time:blue+i:blue+h\n" ); //exp: time: be16default: time:blue+i:blue+h + break; case __LINE__: Trice("message:green+h:black\n" ); //exp: time: be16default: message:green+h:black + break; case __LINE__: Trice("read:black+i:yellow+h\n" ); //exp: time: be16default: read:black+i:yellow+h + break; case __LINE__: Trice("write:black+u:yellow+h\n" ); //exp: time: be16default: write:black+u:yellow+h + break; case __LINE__: Trice("receive:black+h:black\n" ); //exp: time: be16default: receive:black+h:black + break; case __LINE__: Trice("transmit:black:black+h\n" ); //exp: time: be16default: transmit:black:black+h + break; case __LINE__: Trice("diag:yellow+i:default+h\n" ); //exp: time: be16default: diag:yellow+i:default+h + break; case __LINE__: Trice("interrupt:magenta+i:default+h\n" ); //exp: time: be16default: interrupt:magenta+i:default+h + break; case __LINE__: Trice("signal:118+i\n" ); //exp: time: be16default: signal:118+i + break; case __LINE__: Trice("test:yellow+h:black\n" ); //exp: time: be16default: test:yellow+h:black + break; case __LINE__: Trice("default:off\n" ); //exp: time: be16default: default:off + break; case __LINE__: Trice("notice:blue:white+h\n" ); //exp: time: be16default: notice:blue:white+h + break; case __LINE__: Trice("alert:magenta:magenta+h\n" ); //exp: time: be16default: alert:magenta:magenta+h + break; case __LINE__: Trice("assert:yellow+i:blue\n" ); //exp: time: be16default: assert:yellow+i:blue + break; case __LINE__: Trice("alarm:red+i:white+h\n" ); //exp: time: be16default: alarm:red+i:white+h + break; case __LINE__: Trice("verbose:blue:default\n" ); //exp: time: be16default: verbose:blue:default + + break; case __LINE__: TRICE(ID(0), "FATAL:magenta+b:red\n" ); //exp: time:feed3322default: FATAL:magenta+b:red + break; case __LINE__: TRICE(ID(0), "CRITICAL:red+i:default+h\n" ); //exp: time:feed3322default: CRITICAL:red+i:default+h + break; case __LINE__: TRICE(ID(0), "EMERGENCY:red+i:blue\n" ); //exp: time:feed3322default: EMERGENCY:red+i:blue + break; case __LINE__: TRICE(ID(0), "ERROR:11:red\n" ); //exp: time:feed3322default: ERROR:11:red + break; case __LINE__: TRICE(ID(0), "WARNING:11+i:red\n" ); //exp: time:feed3322default: WARNING:11+i:red + break; case __LINE__: TRICE(ID(0), "ATTENTION:11:green\n" ); //exp: time:feed3322default: ATTENTION:11:green + break; case __LINE__: TRICE(ID(0), "INFO:cyan+b:default+h\n" ); //exp: time:feed3322default: INFO:cyan+b:default+h + break; case __LINE__: TRICE(ID(0), "DEBUG:130+i\n" ); //exp: time:feed3322default: DEBUG:130+i + break; case __LINE__: TRICE(ID(0), "TRACE:default+i:default+h\n" ); //exp: time:feed3322default: TRACE:default+i:default+h + break; case __LINE__: TRICE(ID(0), "TIME:blue+i:blue+h\n" ); //exp: time:feed3322default: TIME:blue+i:blue+h + break; case __LINE__: TRICE(ID(0), "MESSAGE:green+h:black\n" ); //exp: time:feed3322default: MESSAGE:green+h:black + break; case __LINE__: TRICE(ID(0), "READ:black+i:yellow+h\n" ); //exp: time:feed3322default: READ:black+i:yellow+h + break; case __LINE__: TRICE(ID(0), "WRITE:black+u:yellow+h\n" ); //exp: time:feed3322default: WRITE:black+u:yellow+h + break; case __LINE__: TRICE(ID(0), "RECEIVE:black+h:black\n" ); //exp: time:feed3322default: RECEIVE:black+h:black + break; case __LINE__: TRICE(ID(0), "TRANSMIT:black:black+h\n" ); //exp: time:feed3322default: TRANSMIT:black:black+h + break; case __LINE__: TRICE(ID(0), "DIAG:yellow+i:default+h\n" ); //exp: time:feed3322default: DIAG:yellow+i:default+h + break; case __LINE__: TRICE(ID(0), "INTERRUPT:magenta+i:default+h\n" ); //exp: time:feed3322default: INTERRUPT:magenta+i:default+h + break; case __LINE__: TRICE(ID(0), "SIGNAL:118+i\n" ); //exp: time:feed3322default: SIGNAL:118+i + break; case __LINE__: TRICE(ID(0), "TEST:yellow+h:black\n" ); //exp: time:feed3322default: TEST:yellow+h:black + break; case __LINE__: TRICE(ID(0), "DEFAULT:off\n" ); //exp: time:feed3322default: DEFAULT:off + break; case __LINE__: TRICE(ID(0), "NOTICE:blue:white+h\n" ); //exp: time:feed3322default: NOTICE:blue:white+h + break; case __LINE__: TRICE(ID(0), "ALERT:magenta:magenta+h\n" ); //exp: time:feed3322default: ALERT:magenta:magenta+h + break; case __LINE__: TRICE(ID(0), "ASSERT:yellow+i:blue\n" ); //exp: time:feed3322default: ASSERT:yellow+i:blue + break; case __LINE__: TRICE(ID(0), "ALARM:red+i:white+h\n" ); //exp: time:feed3322default: ALARM:red+i:white+h + break; case __LINE__: TRICE(ID(0), "VERBOSE:blue:default\n" ); //exp: time:feed3322default: VERBOSE:blue:default + break; case __LINE__: TRICE(ID(0), "fatal:magenta+b:red\n" ); //exp: time:feed3322default: fatal:magenta+b:red + break; case __LINE__: TRICE(ID(0), "critical:red+i:default+h\n" ); //exp: time:feed3322default: critical:red+i:default+h + break; case __LINE__: TRICE(ID(0), "emergency:red+i:blue\n" ); //exp: time:feed3322default: emergency:red+i:blue + break; case __LINE__: TRICE(ID(0), "error:11:red\n" ); //exp: time:feed3322default: error:11:red + break; case __LINE__: TRICE(ID(0), "warning:11+i:red\n" ); //exp: time:feed3322default: warning:11+i:red + break; case __LINE__: TRICE(ID(0), "attention:11:green\n" ); //exp: time:feed3322default: attention:11:green + break; case __LINE__: TRICE(ID(0), "info:cyan+b:default+h\n" ); //exp: time:feed3322default: info:cyan+b:default+h + break; case __LINE__: TRICE(ID(0), "debug:130+i\n" ); //exp: time:feed3322default: debug:130+i + break; case __LINE__: TRICE(ID(0), "trace:default+i:default+h\n" ); //exp: time:feed3322default: trace:default+i:default+h + break; case __LINE__: TRICE(ID(0), "time:blue+i:blue+h\n" ); //exp: time:feed3322default: time:blue+i:blue+h + break; case __LINE__: TRICE(ID(0), "message:green+h:black\n" ); //exp: time:feed3322default: message:green+h:black + break; case __LINE__: TRICE(ID(0), "read:black+i:yellow+h\n" ); //exp: time:feed3322default: read:black+i:yellow+h + break; case __LINE__: TRICE(ID(0), "write:black+u:yellow+h\n" ); //exp: time:feed3322default: write:black+u:yellow+h + break; case __LINE__: TRICE(ID(0), "receive:black+h:black\n" ); //exp: time:feed3322default: receive:black+h:black + break; case __LINE__: TRICE(ID(0), "transmit:black:black+h\n" ); //exp: time:feed3322default: transmit:black:black+h + break; case __LINE__: TRICE(ID(0), "diag:yellow+i:default+h\n" ); //exp: time:feed3322default: diag:yellow+i:default+h + break; case __LINE__: TRICE(ID(0), "interrupt:magenta+i:default+h\n" ); //exp: time:feed3322default: interrupt:magenta+i:default+h + break; case __LINE__: TRICE(ID(0), "signal:118+i\n" ); //exp: time:feed3322default: signal:118+i + break; case __LINE__: TRICE(ID(0), "test:yellow+h:black\n" ); //exp: time:feed3322default: test:yellow+h:black + break; case __LINE__: TRICE(ID(0), "default:off\n" ); //exp: time:feed3322default: default:off + break; case __LINE__: TRICE(ID(0), "notice:blue:white+h\n" ); //exp: time:feed3322default: notice:blue:white+h + break; case __LINE__: TRICE(ID(0), "alert:magenta:magenta+h\n" ); //exp: time:feed3322default: alert:magenta:magenta+h + break; case __LINE__: TRICE(ID(0), "assert:yellow+i:blue\n" ); //exp: time:feed3322default: assert:yellow+i:blue + break; case __LINE__: TRICE(ID(0), "alarm:red+i:white+h\n" ); //exp: time:feed3322default: alarm:red+i:white+h + break; case __LINE__: TRICE(ID(0), "verbose:blue:default\n" ); //exp: time:feed3322default: verbose:blue:default - break; case __LINE__: TRice(iD(13881), "FATAL:magenta+b:red\n" ); //exp: time:feed3322default: FATAL:magenta+b:red - break; case __LINE__: TRice(iD(13882), "CRITICAL:red+i:default+h\n" ); //exp: time:feed3322default: CRITICAL:red+i:default+h - break; case __LINE__: TRice(iD(13883), "EMERGENCY:red+i:blue\n" ); //exp: time:feed3322default: EMERGENCY:red+i:blue - break; case __LINE__: TRice(iD(13884), "ERROR:11:red\n" ); //exp: time:feed3322default: ERROR:11:red - break; case __LINE__: TRice(iD(13885), "WARNING:11+i:red\n" ); //exp: time:feed3322default: WARNING:11+i:red - break; case __LINE__: TRice(iD(13886), "ATTENTION:11:green\n" ); //exp: time:feed3322default: ATTENTION:11:green - break; case __LINE__: TRice(iD(13887), "INFO:cyan+b:default+h\n" ); //exp: time:feed3322default: INFO:cyan+b:default+h - break; case __LINE__: TRice(iD(13888), "DEBUG:130+i\n" ); //exp: time:feed3322default: DEBUG:130+i - break; case __LINE__: TRice(iD(13889), "TRACE:default+i:default+h\n" ); //exp: time:feed3322default: TRACE:default+i:default+h - break; case __LINE__: TRice(iD(13890), "TIME:blue+i:blue+h\n" ); //exp: time:feed3322default: TIME:blue+i:blue+h - break; case __LINE__: TRice(iD(13891), "MESSAGE:green+h:black\n" ); //exp: time:feed3322default: MESSAGE:green+h:black - break; case __LINE__: TRice(iD(13892), "READ:black+i:yellow+h\n" ); //exp: time:feed3322default: READ:black+i:yellow+h - break; case __LINE__: TRice(iD(13893), "WRITE:black+u:yellow+h\n" ); //exp: time:feed3322default: WRITE:black+u:yellow+h - break; case __LINE__: TRice(iD(13894), "RECEIVE:black+h:black\n" ); //exp: time:feed3322default: RECEIVE:black+h:black - break; case __LINE__: TRice(iD(13895), "TRANSMIT:black:black+h\n" ); //exp: time:feed3322default: TRANSMIT:black:black+h - break; case __LINE__: TRice(iD(13896), "DIAG:yellow+i:default+h\n" ); //exp: time:feed3322default: DIAG:yellow+i:default+h - break; case __LINE__: TRice(iD(13897), "INTERRUPT:magenta+i:default+h\n" ); //exp: time:feed3322default: INTERRUPT:magenta+i:default+h - break; case __LINE__: TRice(iD(13898), "SIGNAL:118+i\n" ); //exp: time:feed3322default: SIGNAL:118+i - break; case __LINE__: TRice(iD(13899), "TEST:yellow+h:black\n" ); //exp: time:feed3322default: TEST:yellow+h:black - break; case __LINE__: TRice(iD(13900), "DEFAULT:off\n" ); //exp: time:feed3322default: DEFAULT:off - break; case __LINE__: TRice(iD(13901), "NOTICE:blue:white+h\n" ); //exp: time:feed3322default: NOTICE:blue:white+h - break; case __LINE__: TRice(iD(13902), "ALERT:magenta:magenta+h\n" ); //exp: time:feed3322default: ALERT:magenta:magenta+h - break; case __LINE__: TRice(iD(13903), "ASSERT:yellow+i:blue\n" ); //exp: time:feed3322default: ASSERT:yellow+i:blue - break; case __LINE__: TRice(iD(13904), "ALARM:red+i:white+h\n" ); //exp: time:feed3322default: ALARM:red+i:white+h - break; case __LINE__: TRice(iD(13905), "VERBOSE:blue:default\n" ); //exp: time:feed3322default: VERBOSE:blue:default - break; case __LINE__: TRice(iD(13906), "fatal:magenta+b:red\n" ); //exp: time:feed3322default: fatal:magenta+b:red - break; case __LINE__: TRice(iD(13907), "critical:red+i:default+h\n" ); //exp: time:feed3322default: critical:red+i:default+h - break; case __LINE__: TRice(iD(13908), "emergency:red+i:blue\n" ); //exp: time:feed3322default: emergency:red+i:blue - break; case __LINE__: TRice(iD(13909), "error:11:red\n" ); //exp: time:feed3322default: error:11:red - break; case __LINE__: TRice(iD(13910), "warning:11+i:red\n" ); //exp: time:feed3322default: warning:11+i:red - break; case __LINE__: TRice(iD(13911), "attention:11:green\n" ); //exp: time:feed3322default: attention:11:green - break; case __LINE__: TRice(iD(13912), "info:cyan+b:default+h\n" ); //exp: time:feed3322default: info:cyan+b:default+h - break; case __LINE__: TRice(iD(13913), "debug:130+i\n" ); //exp: time:feed3322default: debug:130+i - break; case __LINE__: TRice(iD(13914), "trace:default+i:default+h\n" ); //exp: time:feed3322default: trace:default+i:default+h - break; case __LINE__: TRice(iD(13915), "time:blue+i:blue+h\n" ); //exp: time:feed3322default: time:blue+i:blue+h - break; case __LINE__: TRice(iD(13916), "message:green+h:black\n" ); //exp: time:feed3322default: message:green+h:black - break; case __LINE__: TRice(iD(13917), "read:black+i:yellow+h\n" ); //exp: time:feed3322default: read:black+i:yellow+h - break; case __LINE__: TRice(iD(13918), "write:black+u:yellow+h\n" ); //exp: time:feed3322default: write:black+u:yellow+h - break; case __LINE__: TRice(iD(13919), "receive:black+h:black\n" ); //exp: time:feed3322default: receive:black+h:black - break; case __LINE__: TRice(iD(13920), "transmit:black:black+h\n" ); //exp: time:feed3322default: transmit:black:black+h - break; case __LINE__: TRice(iD(13921), "diag:yellow+i:default+h\n" ); //exp: time:feed3322default: diag:yellow+i:default+h - break; case __LINE__: TRice(iD(13922), "interrupt:magenta+i:default+h\n" ); //exp: time:feed3322default: interrupt:magenta+i:default+h - break; case __LINE__: TRice(iD(13923), "signal:118+i\n" ); //exp: time:feed3322default: signal:118+i - break; case __LINE__: TRice(iD(13924), "test:yellow+h:black\n" ); //exp: time:feed3322default: test:yellow+h:black - break; case __LINE__: TRice(iD(13925), "default:off\n" ); //exp: time:feed3322default: default:off - break; case __LINE__: TRice(iD(13926), "notice:blue:white+h\n" ); //exp: time:feed3322default: notice:blue:white+h - break; case __LINE__: TRice(iD(13927), "alert:magenta:magenta+h\n" ); //exp: time:feed3322default: alert:magenta:magenta+h - break; case __LINE__: TRice(iD(13928), "assert:yellow+i:blue\n" ); //exp: time:feed3322default: assert:yellow+i:blue - break; case __LINE__: TRice(iD(13929), "alarm:red+i:white+h\n" ); //exp: time:feed3322default: alarm:red+i:white+h - break; case __LINE__: TRice(iD(13930), "verbose:blue:default\n" ); //exp: time:feed3322default: verbose:blue:default + break; case __LINE__: TRice("FATAL:magenta+b:red\n" ); //exp: time:feed3322default: FATAL:magenta+b:red + break; case __LINE__: TRice("CRITICAL:red+i:default+h\n" ); //exp: time:feed3322default: CRITICAL:red+i:default+h + break; case __LINE__: TRice("EMERGENCY:red+i:blue\n" ); //exp: time:feed3322default: EMERGENCY:red+i:blue + break; case __LINE__: TRice("ERROR:11:red\n" ); //exp: time:feed3322default: ERROR:11:red + break; case __LINE__: TRice("WARNING:11+i:red\n" ); //exp: time:feed3322default: WARNING:11+i:red + break; case __LINE__: TRice("ATTENTION:11:green\n" ); //exp: time:feed3322default: ATTENTION:11:green + break; case __LINE__: TRice("INFO:cyan+b:default+h\n" ); //exp: time:feed3322default: INFO:cyan+b:default+h + break; case __LINE__: TRice("DEBUG:130+i\n" ); //exp: time:feed3322default: DEBUG:130+i + break; case __LINE__: TRice("TRACE:default+i:default+h\n" ); //exp: time:feed3322default: TRACE:default+i:default+h + break; case __LINE__: TRice("TIME:blue+i:blue+h\n" ); //exp: time:feed3322default: TIME:blue+i:blue+h + break; case __LINE__: TRice("MESSAGE:green+h:black\n" ); //exp: time:feed3322default: MESSAGE:green+h:black + break; case __LINE__: TRice("READ:black+i:yellow+h\n" ); //exp: time:feed3322default: READ:black+i:yellow+h + break; case __LINE__: TRice("WRITE:black+u:yellow+h\n" ); //exp: time:feed3322default: WRITE:black+u:yellow+h + break; case __LINE__: TRice("RECEIVE:black+h:black\n" ); //exp: time:feed3322default: RECEIVE:black+h:black + break; case __LINE__: TRice("TRANSMIT:black:black+h\n" ); //exp: time:feed3322default: TRANSMIT:black:black+h + break; case __LINE__: TRice("DIAG:yellow+i:default+h\n" ); //exp: time:feed3322default: DIAG:yellow+i:default+h + break; case __LINE__: TRice("INTERRUPT:magenta+i:default+h\n" ); //exp: time:feed3322default: INTERRUPT:magenta+i:default+h + break; case __LINE__: TRice("SIGNAL:118+i\n" ); //exp: time:feed3322default: SIGNAL:118+i + break; case __LINE__: TRice("TEST:yellow+h:black\n" ); //exp: time:feed3322default: TEST:yellow+h:black + break; case __LINE__: TRice("DEFAULT:off\n" ); //exp: time:feed3322default: DEFAULT:off + break; case __LINE__: TRice("NOTICE:blue:white+h\n" ); //exp: time:feed3322default: NOTICE:blue:white+h + break; case __LINE__: TRice("ALERT:magenta:magenta+h\n" ); //exp: time:feed3322default: ALERT:magenta:magenta+h + break; case __LINE__: TRice("ASSERT:yellow+i:blue\n" ); //exp: time:feed3322default: ASSERT:yellow+i:blue + break; case __LINE__: TRice("ALARM:red+i:white+h\n" ); //exp: time:feed3322default: ALARM:red+i:white+h + break; case __LINE__: TRice("VERBOSE:blue:default\n" ); //exp: time:feed3322default: VERBOSE:blue:default + break; case __LINE__: TRice("fatal:magenta+b:red\n" ); //exp: time:feed3322default: fatal:magenta+b:red + break; case __LINE__: TRice("critical:red+i:default+h\n" ); //exp: time:feed3322default: critical:red+i:default+h + break; case __LINE__: TRice("emergency:red+i:blue\n" ); //exp: time:feed3322default: emergency:red+i:blue + break; case __LINE__: TRice("error:11:red\n" ); //exp: time:feed3322default: error:11:red + break; case __LINE__: TRice("warning:11+i:red\n" ); //exp: time:feed3322default: warning:11+i:red + break; case __LINE__: TRice("attention:11:green\n" ); //exp: time:feed3322default: attention:11:green + break; case __LINE__: TRice("info:cyan+b:default+h\n" ); //exp: time:feed3322default: info:cyan+b:default+h + break; case __LINE__: TRice("debug:130+i\n" ); //exp: time:feed3322default: debug:130+i + break; case __LINE__: TRice("trace:default+i:default+h\n" ); //exp: time:feed3322default: trace:default+i:default+h + break; case __LINE__: TRice("time:blue+i:blue+h\n" ); //exp: time:feed3322default: time:blue+i:blue+h + break; case __LINE__: TRice("message:green+h:black\n" ); //exp: time:feed3322default: message:green+h:black + break; case __LINE__: TRice("read:black+i:yellow+h\n" ); //exp: time:feed3322default: read:black+i:yellow+h + break; case __LINE__: TRice("write:black+u:yellow+h\n" ); //exp: time:feed3322default: write:black+u:yellow+h + break; case __LINE__: TRice("receive:black+h:black\n" ); //exp: time:feed3322default: receive:black+h:black + break; case __LINE__: TRice("transmit:black:black+h\n" ); //exp: time:feed3322default: transmit:black:black+h + break; case __LINE__: TRice("diag:yellow+i:default+h\n" ); //exp: time:feed3322default: diag:yellow+i:default+h + break; case __LINE__: TRice("interrupt:magenta+i:default+h\n" ); //exp: time:feed3322default: interrupt:magenta+i:default+h + break; case __LINE__: TRice("signal:118+i\n" ); //exp: time:feed3322default: signal:118+i + break; case __LINE__: TRice("test:yellow+h:black\n" ); //exp: time:feed3322default: test:yellow+h:black + break; case __LINE__: TRice("default:off\n" ); //exp: time:feed3322default: default:off + break; case __LINE__: TRice("notice:blue:white+h\n" ); //exp: time:feed3322default: notice:blue:white+h + break; case __LINE__: TRice("alert:magenta:magenta+h\n" ); //exp: time:feed3322default: alert:magenta:magenta+h + break; case __LINE__: TRice("assert:yellow+i:blue\n" ); //exp: time:feed3322default: assert:yellow+i:blue + break; case __LINE__: TRice("alarm:red+i:white+h\n" ); //exp: time:feed3322default: alarm:red+i:white+h + break; case __LINE__: TRice("verbose:blue:default\n" ); //exp: time:feed3322default: verbose:blue:default #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE64(id(13931), "msg:%d (%%d)\n", -1 ); //exp: time: default: msg:-1 (%d) - - break; case __LINE__: trice(iD(13932), "sig:TRICE8 with 1 to 12 values\n" ); - break; case __LINE__: trice(iD(13933), "rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 - break; case __LINE__: trice(iD(13934), "rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 - break; case __LINE__: trice(iD(13935), "rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 - break; case __LINE__: trice(iD(13936), "rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 - break; case __LINE__: trice(iD(13937), "rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 - break; case __LINE__: trice(iD(13938), "rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice(iD(13939), "rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice(iD(13940), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice(iD(13941), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice(iD(13942), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice(iD(13943), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice(iD(13944), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: trice(iD(13945), "rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 - break; case __LINE__: trice(iD(13946), "rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 - break; case __LINE__: trice(iD(13947), "rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 - break; case __LINE__: trice(iD(13948), "rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 - break; case __LINE__: trice(iD(13949), "rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 - break; case __LINE__: trice(iD(13950), "rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice(iD(13951), "rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice(iD(13952), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice(iD(13953), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice(iD(13954), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice(iD(13955), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice(iD(13956), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: trice(iD(13957), "rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 - break; case __LINE__: trice(iD(13958), "rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 - break; case __LINE__: trice(iD(13959), "rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 - break; case __LINE__: trice(iD(13960), "rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 - break; case __LINE__: trice(iD(13961), "rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 - break; case __LINE__: trice(iD(13962), "rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice(iD(13963), "rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice(iD(13964), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice(iD(13965), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice(iD(13966), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice(iD(13967), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice(iD(13968), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64(id(0), "msg:%d (%%d)\n", -1 ); //exp: time: default: msg:-1 (%d) + + break; case __LINE__: trice("sig:TRICE8 with 1 to 12 values\n" ); + break; case __LINE__: trice("rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 + break; case __LINE__: trice("rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 + break; case __LINE__: trice("rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice("rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 + break; case __LINE__: trice("rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 + break; case __LINE__: trice("rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice("rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 + break; case __LINE__: trice("rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 + break; case __LINE__: trice("rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(13969), "sig:TRICE_n with 1 to 12 values\n" ); - break; case __LINE__: TRICE_1 (id(13970), "rd:TRICE_1 %d\n", -1 ); //exp: time: default: rd:TRICE_1 -1 - break; case __LINE__: TRICE_2 (id(13971), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE_2 -1, -2 - break; case __LINE__: TRICE_3 (id(13972), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE_3 -1, -2, -3 - break; case __LINE__: TRICE_4 (id(13973), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE_4 -1, -2, -3, -4 - break; case __LINE__: TRICE_5 (id(13974), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE_6 (id(13975), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE_7 (id(13976), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE_8 (id(13977), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE_9 (id(13978), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE_10(id(13979), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE_11(id(13980), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE_12(id(13981), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE_1 (Id(13982), "rd:TRICE_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE_1 -1 - break; case __LINE__: TRICE_2 (Id(13983), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE_2 -1, -2 - break; case __LINE__: TRICE_3 (Id(13984), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE_3 -1, -2, -3 - break; case __LINE__: TRICE_4 (Id(13985), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE_4 -1, -2, -3, -4 - break; case __LINE__: TRICE_5 (Id(13986), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE_6 (Id(13987), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE_7 (Id(13988), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE_8 (Id(13989), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE_9 (Id(13990), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE_10(Id(13991), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE_11(Id(13992), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE_12(Id(13993), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE_1 (ID(13994), "rd:TRICE_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE_1 -1 - break; case __LINE__: TRICE_2 (ID(13995), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE_2 -1, -2 - break; case __LINE__: TRICE_3 (ID(13996), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE_3 -1, -2, -3 - break; case __LINE__: TRICE_4 (ID(13997), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE_4 -1, -2, -3, -4 - break; case __LINE__: TRICE_5 (ID(13998), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE_6 (ID(13999), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE_7 (ID(14000), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE_8 (ID(14001), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE_9 (ID(14002), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE_10(ID(14003), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE_11(ID(14004), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE_12(ID(14005), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice("sig:TRICE_n with 1 to 12 values\n" ); + break; case __LINE__: TRICE_1 (id(0), "rd:TRICE_1 %d\n", -1 ); //exp: time: default: rd:TRICE_1 -1 + break; case __LINE__: TRICE_2 (id(0), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE_2 -1, -2 + break; case __LINE__: TRICE_3 (id(0), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE_3 -1, -2, -3 + break; case __LINE__: TRICE_4 (id(0), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE_4 -1, -2, -3, -4 + break; case __LINE__: TRICE_5 (id(0), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE_6 (id(0), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE_7 (id(0), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE_8 (id(0), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE_9 (id(0), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE_10(id(0), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE_11(id(0), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE_12(id(0), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE_1 (Id(0), "rd:TRICE_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE_1 -1 + break; case __LINE__: TRICE_2 (Id(0), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE_2 -1, -2 + break; case __LINE__: TRICE_3 (Id(0), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE_3 -1, -2, -3 + break; case __LINE__: TRICE_4 (Id(0), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE_4 -1, -2, -3, -4 + break; case __LINE__: TRICE_5 (Id(0), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE_6 (Id(0), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE_7 (Id(0), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE_8 (Id(0), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE_9 (Id(0), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE_10(Id(0), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE_11(Id(0), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE_12(Id(0), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE_1 (ID(0), "rd:TRICE_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE_1 -1 + break; case __LINE__: TRICE_2 (ID(0), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE_2 -1, -2 + break; case __LINE__: TRICE_3 (ID(0), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE_3 -1, -2, -3 + break; case __LINE__: TRICE_4 (ID(0), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE_4 -1, -2, -3, -4 + break; case __LINE__: TRICE_5 (ID(0), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE_6 (ID(0), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE_7 (ID(0), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE_8 (ID(0), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE_9 (ID(0), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE_10(ID(0), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE_11(ID(0), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE_12(ID(0), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE(ID(14006), "sig:trice_n with 1 to 12 values\n" ); - break; case __LINE__: trice_1 (iD(14007), "rd:trice_1 %d\n", -1 ); //exp: time: default: rd:trice_1 -1 - break; case __LINE__: trice_2 (iD(14008), "rd:trice_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice_2 -1, -2 - break; case __LINE__: trice_3 (iD(14009), "rd:trice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice_3 -1, -2, -3 - break; case __LINE__: trice_4 (iD(14010), "rd:trice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice_4 -1, -2, -3, -4 - break; case __LINE__: trice_5 (iD(14011), "rd:trice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice_6 (iD(14012), "rd:trice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice_7 (iD(14013), "rd:trice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice_8 (iD(14014), "rd:trice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice_9 (iD(14015), "rd:trice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice_10(iD(14016), "rd:trice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice_11(iD(14017), "rd:trice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice_12(iD(14018), "rd:trice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice_1 (iD(14019), "rd:Trice_1 %d\n", -1 ); //exp: time: be16default: rd:Trice_1 -1 - break; case __LINE__: Trice_2 (iD(14020), "rd:Trice_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice_2 -1, -2 - break; case __LINE__: Trice_3 (iD(14021), "rd:Trice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice_3 -1, -2, -3 - break; case __LINE__: Trice_4 (iD(14022), "rd:Trice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice_4 -1, -2, -3, -4 - break; case __LINE__: Trice_5 (iD(14023), "rd:Trice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice_6 (iD(14024), "rd:Trice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice_7 (iD(14025), "rd:Trice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice_8 (iD(14026), "rd:Trice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice_9 (iD(14027), "rd:Trice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice_10(iD(14028), "rd:Trice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice_11(iD(14029), "rd:Trice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice_12(iD(14030), "rd:Trice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice_1 (iD(14031), "rd:TRice_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice_1 -1 - break; case __LINE__: TRice_2 (iD(14032), "rd:TRice_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice_2 -1, -2 - break; case __LINE__: TRice_3 (iD(14033), "rd:TRice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice_3 -1, -2, -3 - break; case __LINE__: TRice_4 (iD(14034), "rd:TRice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice_4 -1, -2, -3, -4 - break; case __LINE__: TRice_5 (iD(14035), "rd:TRice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice_6 (iD(14036), "rd:TRice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice_7 (iD(14037), "rd:TRice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice_8 (iD(14038), "rd:TRice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice_9 (iD(14039), "rd:TRice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice_10(iD(14040), "rd:TRice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice_11(iD(14041), "rd:TRice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice_12(iD(14042), "rd:TRice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE(ID(0), "sig:trice_n with 1 to 12 values\n" ); + break; case __LINE__: trice_1 ("rd:trice_1 %d\n", -1 ); //exp: time: default: rd:trice_1 -1 + break; case __LINE__: trice_2 ("rd:trice_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice_2 -1, -2 + break; case __LINE__: trice_3 ("rd:trice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice_3 -1, -2, -3 + break; case __LINE__: trice_4 ("rd:trice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice_4 -1, -2, -3, -4 + break; case __LINE__: trice_5 ("rd:trice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice_6 ("rd:trice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice_7 ("rd:trice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice_8 ("rd:trice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice_9 ("rd:trice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice_10("rd:trice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice_11("rd:trice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice_12("rd:trice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice_1 ("rd:Trice_1 %d\n", -1 ); //exp: time: be16default: rd:Trice_1 -1 + break; case __LINE__: Trice_2 ("rd:Trice_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice_2 -1, -2 + break; case __LINE__: Trice_3 ("rd:Trice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice_3 -1, -2, -3 + break; case __LINE__: Trice_4 ("rd:Trice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice_4 -1, -2, -3, -4 + break; case __LINE__: Trice_5 ("rd:Trice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice_6 ("rd:Trice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice_7 ("rd:Trice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice_8 ("rd:Trice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice_9 ("rd:Trice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice_10("rd:Trice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice_11("rd:Trice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice_12("rd:Trice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice_1 ("rd:TRice_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice_1 -1 + break; case __LINE__: TRice_2 ("rd:TRice_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice_2 -1, -2 + break; case __LINE__: TRice_3 ("rd:TRice_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice_3 -1, -2, -3 + break; case __LINE__: TRice_4 ("rd:TRice_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice_4 -1, -2, -3, -4 + break; case __LINE__: TRice_5 ("rd:TRice_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice_6 ("rd:TRice_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice_7 ("rd:TRice_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice_8 ("rd:TRice_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice_9 ("rd:TRice_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice_10("rd:TRice_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice_11("rd:TRice_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice_12("rd:TRice_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(14043), "sig:TRICE8 with 1 to 12 values\n" ); - break; case __LINE__: TRICE8(id(14044), "rd:TRICE8 %d\n", -1 ); //exp: time: default: rd:TRICE8 -1 - break; case __LINE__: TRICE8(id(14045), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE8 -1, -2 - break; case __LINE__: TRICE8(id(14046), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE8 -1, -2, -3 - break; case __LINE__: TRICE8(id(14047), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4 - break; case __LINE__: TRICE8(id(14048), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8(id(14049), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8(id(14050), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8(id(14051), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8(id(14052), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8(id(14053), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8(id(14054), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8(id(14055), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE8(Id(14056), "rd:TRICE8 %d\n", -1 ); //exp: time: be16default: rd:TRICE8 -1 - break; case __LINE__: TRICE8(Id(14057), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE8 -1, -2 - break; case __LINE__: TRICE8(Id(14058), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3 - break; case __LINE__: TRICE8(Id(14059), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4 - break; case __LINE__: TRICE8(Id(14060), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8(Id(14061), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8(Id(14062), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8(Id(14063), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8(Id(14064), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8(Id(14065), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8(Id(14066), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8(Id(14067), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE8(ID(14068), "rd:TRICE8 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE8 -1 - break; case __LINE__: TRICE8(ID(14069), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE8 -1, -2 - break; case __LINE__: TRICE8(ID(14070), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3 - break; case __LINE__: TRICE8(ID(14071), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4 - break; case __LINE__: TRICE8(ID(14072), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8(ID(14073), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8(ID(14074), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8(ID(14075), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8(ID(14076), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8(ID(14077), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8(ID(14078), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8(ID(14079), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice(iD(14080), "sig:TRICE8_n with 1 to 12 values\n" ); - break; case __LINE__: TRICE8_1 (id(14081), "rd:TRICE8_1 %d\n", -1 ); //exp: time: default: rd:TRICE8_1 -1 - break; case __LINE__: TRICE8_2 (id(14082), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE8_2 -1, -2 - break; case __LINE__: TRICE8_3 (id(14083), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE8_3 -1, -2, -3 - break; case __LINE__: TRICE8_4 (id(14084), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE8_4 -1, -2, -3, -4 - break; case __LINE__: TRICE8_5 (id(14085), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE8_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8_6 (id(14086), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8_7 (id(14087), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8_8 (id(14088), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8_9 (id(14089), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8_10(id(14090), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8_11(id(14091), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8_12(id(14092), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE8_1 (Id(14093), "rd:TRICE8_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE8_1 -1 - break; case __LINE__: TRICE8_2 (Id(14094), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE8_2 -1, -2 - break; case __LINE__: TRICE8_3 (Id(14095), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE8_3 -1, -2, -3 - break; case __LINE__: TRICE8_4 (Id(14096), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE8_4 -1, -2, -3, -4 - break; case __LINE__: TRICE8_5 (Id(14097), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE8_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8_6 (Id(14098), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8_7 (Id(14099), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8_8 (Id(14100), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8_9 (Id(14101), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8_10(Id(14102), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8_11(Id(14103), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8_12(Id(14104), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE8_1 (ID(14105), "rd:TRICE8_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE8_1 -1 - break; case __LINE__: TRICE8_2 (ID(14106), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE8_2 -1, -2 - break; case __LINE__: TRICE8_3 (ID(14107), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE8_3 -1, -2, -3 - break; case __LINE__: TRICE8_4 (ID(14108), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE8_4 -1, -2, -3, -4 - break; case __LINE__: TRICE8_5 (ID(14109), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE8_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE8_6 (ID(14110), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE8_7 (ID(14111), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE8_8 (ID(14112), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE8_9 (ID(14113), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE8_10(ID(14114), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE8_11(ID(14115), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE8_12(ID(14116), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice("sig:TRICE8 with 1 to 12 values\n" ); + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d\n", -1 ); //exp: time: default: rd:TRICE8 -1 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE8 -1, -2 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE8 -1, -2, -3 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8(id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d\n", -1 ); //exp: time: be16default: rd:TRICE8 -1 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE8 -1, -2 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8(Id(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE8 -1 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE8 -1, -2 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8(ID(0), "rd:TRICE8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice("sig:TRICE8_n with 1 to 12 values\n" ); + break; case __LINE__: TRICE8_1 (id(0), "rd:TRICE8_1 %d\n", -1 ); //exp: time: default: rd:TRICE8_1 -1 + break; case __LINE__: TRICE8_2 (id(0), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE8_2 -1, -2 + break; case __LINE__: TRICE8_3 (id(0), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE8_3 -1, -2, -3 + break; case __LINE__: TRICE8_4 (id(0), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE8_4 -1, -2, -3, -4 + break; case __LINE__: TRICE8_5 (id(0), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE8_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8_6 (id(0), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8_7 (id(0), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8_8 (id(0), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8_9 (id(0), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8_10(id(0), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8_11(id(0), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8_12(id(0), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE8_1 (Id(0), "rd:TRICE8_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE8_1 -1 + break; case __LINE__: TRICE8_2 (Id(0), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE8_2 -1, -2 + break; case __LINE__: TRICE8_3 (Id(0), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE8_3 -1, -2, -3 + break; case __LINE__: TRICE8_4 (Id(0), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE8_4 -1, -2, -3, -4 + break; case __LINE__: TRICE8_5 (Id(0), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE8_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8_6 (Id(0), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8_7 (Id(0), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8_8 (Id(0), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8_9 (Id(0), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8_10(Id(0), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8_11(Id(0), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8_12(Id(0), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE8_1 (ID(0), "rd:TRICE8_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE8_1 -1 + break; case __LINE__: TRICE8_2 (ID(0), "rd:TRICE8_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE8_2 -1, -2 + break; case __LINE__: TRICE8_3 (ID(0), "rd:TRICE8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE8_3 -1, -2, -3 + break; case __LINE__: TRICE8_4 (ID(0), "rd:TRICE8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE8_4 -1, -2, -3, -4 + break; case __LINE__: TRICE8_5 (ID(0), "rd:TRICE8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE8_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE8_6 (ID(0), "rd:TRICE8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE8_7 (ID(0), "rd:TRICE8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE8_8 (ID(0), "rd:TRICE8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE8_9 (ID(0), "rd:TRICE8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE8_10(ID(0), "rd:TRICE8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE8_11(ID(0), "rd:TRICE8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE8_12(ID(0), "rd:TRICE8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(14117), "sig:trice8 with 1 to 12 values\n" ); - break; case __LINE__: trice8(iD(14118), "rd:trice8 %d\n", -1 ); //exp: time: default: rd:trice8 -1 - break; case __LINE__: trice8(iD(14119), "rd:trice8 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice8 -1, -2 - break; case __LINE__: trice8(iD(14120), "rd:trice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice8 -1, -2, -3 - break; case __LINE__: trice8(iD(14121), "rd:trice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice8 -1, -2, -3, -4 - break; case __LINE__: trice8(iD(14122), "rd:trice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5 - break; case __LINE__: trice8(iD(14123), "rd:trice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice8(iD(14124), "rd:trice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice8(iD(14125), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice8(iD(14126), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice8(iD(14127), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice8(iD(14128), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice8(iD(14129), "rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice8(iD(14130), "rd:Trice8 %d\n", -1 ); //exp: time: be16default: rd:Trice8 -1 - break; case __LINE__: Trice8(iD(14131), "rd:Trice8 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice8 -1, -2 - break; case __LINE__: Trice8(iD(14132), "rd:Trice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice8 -1, -2, -3 - break; case __LINE__: Trice8(iD(14133), "rd:Trice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4 - break; case __LINE__: Trice8(iD(14134), "rd:Trice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5 - break; case __LINE__: Trice8(iD(14135), "rd:Trice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice8(iD(14136), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice8(iD(14137), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice8(iD(14138), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice8(iD(14139), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice8(iD(14140), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice8(iD(14141), "rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice8(iD(14142), "rd:TRice8 %d\n", -1 ); //exp: time:feed3322default: rd:TRice8 -1 - break; case __LINE__: TRice8(iD(14143), "rd:TRice8 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice8 -1, -2 - break; case __LINE__: TRice8(iD(14144), "rd:TRice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3 - break; case __LINE__: TRice8(iD(14145), "rd:TRice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4 - break; case __LINE__: TRice8(iD(14146), "rd:TRice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5 - break; case __LINE__: TRice8(iD(14147), "rd:TRice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice8(iD(14148), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice8(iD(14149), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice8(iD(14150), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice8(iD(14151), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice8(iD(14152), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice8(iD(14153), "rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: TRICE(ID(14154), "sig:trice8_n with 1 to 12 values\n" ); - break; case __LINE__: trice8_1 (iD(14155), "rd:trice8_1 %d\n", -1 ); //exp: time: default: rd:trice8_1 -1 - break; case __LINE__: trice8_2 (iD(14156), "rd:trice8_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice8_2 -1, -2 - break; case __LINE__: trice8_3 (iD(14157), "rd:trice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice8_3 -1, -2, -3 - break; case __LINE__: trice8_4 (iD(14158), "rd:trice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice8_4 -1, -2, -3, -4 - break; case __LINE__: trice8_5 (iD(14159), "rd:trice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice8_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice8_6 (iD(14160), "rd:trice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice8_7 (iD(14161), "rd:trice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice8_8 (iD(14162), "rd:trice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice8_9 (iD(14163), "rd:trice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice8_10(iD(14164), "rd:trice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice8_11(iD(14165), "rd:trice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice8_12(iD(14166), "rd:trice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice8_1 (iD(14167), "rd:Trice8_1 %d\n", -1 ); //exp: time: be16default: rd:Trice8_1 -1 - break; case __LINE__: Trice8_2 (iD(14168), "rd:Trice8_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice8_2 -1, -2 - break; case __LINE__: Trice8_3 (iD(14169), "rd:Trice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice8_3 -1, -2, -3 - break; case __LINE__: Trice8_4 (iD(14170), "rd:Trice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice8_4 -1, -2, -3, -4 - break; case __LINE__: Trice8_5 (iD(14171), "rd:Trice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice8_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice8_6 (iD(14172), "rd:Trice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice8_7 (iD(14173), "rd:Trice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice8_8 (iD(14174), "rd:Trice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice8_9 (iD(14175), "rd:Trice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice8_10(iD(14176), "rd:Trice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice8_11(iD(14177), "rd:Trice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice8_12(iD(14178), "rd:Trice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice8_1 (iD(14179), "rd:TRice8_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice8_1 -1 - break; case __LINE__: TRice8_2 (iD(14180), "rd:TRice8_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice8_2 -1, -2 - break; case __LINE__: TRice8_3 (iD(14181), "rd:TRice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice8_3 -1, -2, -3 - break; case __LINE__: TRice8_4 (iD(14182), "rd:TRice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice8_4 -1, -2, -3, -4 - break; case __LINE__: TRice8_5 (iD(14183), "rd:TRice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice8_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice8_6 (iD(14184), "rd:TRice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice8_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice8_7 (iD(14185), "rd:TRice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice8_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice8_8 (iD(14186), "rd:TRice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice8_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice8_9 (iD(14187), "rd:TRice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice8_10(iD(14188), "rd:TRice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice8_11(iD(14189), "rd:TRice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice8_12(iD(14190), "rd:TRice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice(iD(14191), "sig:TRICE16 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice16(iD(14192), "rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 - break; case __LINE__: trice16(iD(14193), "rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 - break; case __LINE__: trice16(iD(14194), "rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 - break; case __LINE__: trice16(iD(14195), "rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 - break; case __LINE__: trice16(iD(14196), "rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 - break; case __LINE__: trice16(iD(14197), "rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16(iD(14198), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16(iD(14199), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16(iD(14200), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16(iD(14201), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16(iD(14202), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16(iD(14203), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: trice16(iD(14204), "rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 - break; case __LINE__: trice16(iD(14205), "rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 - break; case __LINE__: trice16(iD(14206), "rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 - break; case __LINE__: trice16(iD(14207), "rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 - break; case __LINE__: trice16(iD(14208), "rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 - break; case __LINE__: trice16(iD(14209), "rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16(iD(14210), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16(iD(14211), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16(iD(14212), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16(iD(14213), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16(iD(14214), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16(iD(14215), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: trice16(iD(14216), "rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 - break; case __LINE__: trice16(iD(14217), "rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 - break; case __LINE__: trice16(iD(14218), "rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 - break; case __LINE__: trice16(iD(14219), "rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 - break; case __LINE__: trice16(iD(14220), "rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 - break; case __LINE__: trice16(iD(14221), "rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16(iD(14222), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16(iD(14223), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16(iD(14224), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16(iD(14225), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16(iD(14226), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16(iD(14227), "rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice("sig:trice8 with 1 to 12 values\n" ); + break; case __LINE__: trice8("rd:trice8 %d\n", -1 ); //exp: time: default: rd:trice8 -1 + break; case __LINE__: trice8("rd:trice8 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice8 -1, -2 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice8 -1, -2, -3 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice8 -1, -2, -3, -4 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice8("rd:trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice8("rd:Trice8 %d\n", -1 ); //exp: time: be16default: rd:Trice8 -1 + break; case __LINE__: Trice8("rd:Trice8 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice8 -1, -2 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice8 -1, -2, -3 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice8("rd:Trice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice8("rd:TRice8 %d\n", -1 ); //exp: time:feed3322default: rd:TRice8 -1 + break; case __LINE__: TRice8("rd:TRice8 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice8 -1, -2 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice8("rd:TRice8 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice8 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: TRICE(ID(0), "sig:trice8_n with 1 to 12 values\n" ); + break; case __LINE__: trice8_1 ("rd:trice8_1 %d\n", -1 ); //exp: time: default: rd:trice8_1 -1 + break; case __LINE__: trice8_2 ("rd:trice8_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice8_2 -1, -2 + break; case __LINE__: trice8_3 ("rd:trice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice8_3 -1, -2, -3 + break; case __LINE__: trice8_4 ("rd:trice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice8_4 -1, -2, -3, -4 + break; case __LINE__: trice8_5 ("rd:trice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice8_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice8_6 ("rd:trice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice8_7 ("rd:trice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice8_8 ("rd:trice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice8_9 ("rd:trice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice8_10("rd:trice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice8_11("rd:trice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice8_12("rd:trice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice8_1 ("rd:Trice8_1 %d\n", -1 ); //exp: time: be16default: rd:Trice8_1 -1 + break; case __LINE__: Trice8_2 ("rd:Trice8_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice8_2 -1, -2 + break; case __LINE__: Trice8_3 ("rd:Trice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice8_3 -1, -2, -3 + break; case __LINE__: Trice8_4 ("rd:Trice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice8_4 -1, -2, -3, -4 + break; case __LINE__: Trice8_5 ("rd:Trice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice8_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice8_6 ("rd:Trice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice8_7 ("rd:Trice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice8_8 ("rd:Trice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice8_9 ("rd:Trice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice8_10("rd:Trice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice8_11("rd:Trice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice8_12("rd:Trice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice8_1 ("rd:TRice8_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice8_1 -1 + break; case __LINE__: TRice8_2 ("rd:TRice8_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice8_2 -1, -2 + break; case __LINE__: TRice8_3 ("rd:TRice8_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice8_3 -1, -2, -3 + break; case __LINE__: TRice8_4 ("rd:TRice8_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice8_4 -1, -2, -3, -4 + break; case __LINE__: TRice8_5 ("rd:TRice8_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice8_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice8_6 ("rd:TRice8_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice8_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice8_7 ("rd:TRice8_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice8_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice8_8 ("rd:TRice8_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice8_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice8_9 ("rd:TRice8_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice8_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice8_10("rd:TRice8_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice8_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice8_11("rd:TRice8_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice8_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice8_12("rd:TRice8_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice8_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice("sig:TRICE16 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice16("rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 + break; case __LINE__: trice16("rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice16("rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 + break; case __LINE__: trice16("rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice16("rd:TRICE16 %d\n", -1 ); //exp: time: default: rd:TRICE16 -1 + break; case __LINE__: trice16("rd:TRICE16 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16 -1, -2 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16 -1, -2, -3 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16("rd:TRICE16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice (iD(14228), "sig:TRICE16_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE16_1 (id(14229), "rd:TRICE16_1 %d\n", -1 ); //exp: time: default: rd:TRICE16_1 -1 - break; case __LINE__: TRICE16_2 (id(14230), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16_2 -1, -2 - break; case __LINE__: TRICE16_3 (id(14231), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16_3 -1, -2, -3 - break; case __LINE__: TRICE16_4 (id(14232), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16_4 -1, -2, -3, -4 - break; case __LINE__: TRICE16_5 (id(14233), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE16_6 (id(14234), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE16_7 (id(14235), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE16_8 (id(14236), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE16_9 (id(14237), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE16_10(id(14238), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE16_11(id(14239), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE16_12(id(14240), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE16_1 (Id(14241), "rd:TRICE16_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE16_1 -1 - break; case __LINE__: TRICE16_2 (Id(14242), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE16_2 -1, -2 - break; case __LINE__: TRICE16_3 (Id(14243), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE16_3 -1, -2, -3 - break; case __LINE__: TRICE16_4 (Id(14244), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE16_4 -1, -2, -3, -4 - break; case __LINE__: TRICE16_5 (Id(14245), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE16_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE16_6 (Id(14246), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE16_7 (Id(14247), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE16_8 (Id(14248), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE16_9 (Id(14249), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE16_10(Id(14250), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE16_11(Id(14251), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE16_12(Id(14252), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE16_1 (ID(14253), "rd:TRICE16_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE16_1 -1 - break; case __LINE__: TRICE16_2 (ID(14254), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE16_2 -1, -2 - break; case __LINE__: TRICE16_3 (ID(14255), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE16_3 -1, -2, -3 - break; case __LINE__: TRICE16_4 (ID(14256), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE16_4 -1, -2, -3, -4 - break; case __LINE__: TRICE16_5 (ID(14257), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE16_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE16_6 (ID(14258), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE16_7 (ID(14259), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE16_8 (ID(14260), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE16_9 (ID(14261), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE16_10(ID(14262), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE16_11(ID(14263), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE16_12(ID(14264), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice ("sig:TRICE16_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE16_1 (id(0), "rd:TRICE16_1 %d\n", -1 ); //exp: time: default: rd:TRICE16_1 -1 + break; case __LINE__: TRICE16_2 (id(0), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE16_2 -1, -2 + break; case __LINE__: TRICE16_3 (id(0), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE16_3 -1, -2, -3 + break; case __LINE__: TRICE16_4 (id(0), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE16_4 -1, -2, -3, -4 + break; case __LINE__: TRICE16_5 (id(0), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE16_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE16_6 (id(0), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE16_7 (id(0), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE16_8 (id(0), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE16_9 (id(0), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE16_10(id(0), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE16_11(id(0), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE16_12(id(0), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE16_1 (Id(0), "rd:TRICE16_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE16_1 -1 + break; case __LINE__: TRICE16_2 (Id(0), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE16_2 -1, -2 + break; case __LINE__: TRICE16_3 (Id(0), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE16_3 -1, -2, -3 + break; case __LINE__: TRICE16_4 (Id(0), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE16_4 -1, -2, -3, -4 + break; case __LINE__: TRICE16_5 (Id(0), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE16_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE16_6 (Id(0), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE16_7 (Id(0), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE16_8 (Id(0), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE16_9 (Id(0), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE16_10(Id(0), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE16_11(Id(0), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE16_12(Id(0), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE16_1 (ID(0), "rd:TRICE16_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE16_1 -1 + break; case __LINE__: TRICE16_2 (ID(0), "rd:TRICE16_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE16_2 -1, -2 + break; case __LINE__: TRICE16_3 (ID(0), "rd:TRICE16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE16_3 -1, -2, -3 + break; case __LINE__: TRICE16_4 (ID(0), "rd:TRICE16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE16_4 -1, -2, -3, -4 + break; case __LINE__: TRICE16_5 (ID(0), "rd:TRICE16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE16_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE16_6 (ID(0), "rd:TRICE16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE16_7 (ID(0), "rd:TRICE16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE16_8 (ID(0), "rd:TRICE16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE16_9 (ID(0), "rd:TRICE16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE16_10(ID(0), "rd:TRICE16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE16_11(ID(0), "rd:TRICE16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE16_12(ID(0), "rd:TRICE16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(14265), "sig:trice16 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice16(iD(14266), "rd:trice16 %d\n", -1 ); //exp: time: default: rd:trice16 -1 - break; case __LINE__: trice16(iD(14267), "rd:trice16 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice16 -1, -2 - break; case __LINE__: trice16(iD(14268), "rd:trice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice16 -1, -2, -3 - break; case __LINE__: trice16(iD(14269), "rd:trice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 -1, -2, -3, -4 - break; case __LINE__: trice16(iD(14270), "rd:trice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5 - break; case __LINE__: trice16(iD(14271), "rd:trice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16(iD(14272), "rd:trice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16(iD(14273), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16(iD(14274), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16(iD(14275), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16(iD(14276), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16(iD(14277), "rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice16(iD(14278), "rd:Trice16 %d\n", -1 ); //exp: time: be16default: rd:Trice16 -1 - break; case __LINE__: Trice16(iD(14279), "rd:Trice16 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice16 -1, -2 - break; case __LINE__: Trice16(iD(14280), "rd:Trice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice16 -1, -2, -3 - break; case __LINE__: Trice16(iD(14281), "rd:Trice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4 - break; case __LINE__: Trice16(iD(14282), "rd:Trice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5 - break; case __LINE__: Trice16(iD(14283), "rd:Trice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice16(iD(14284), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice16(iD(14285), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice16(iD(14286), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice16(iD(14287), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice16(iD(14288), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice16(iD(14289), "rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice16(iD(14290), "rd:TRice16 %d\n", -1 ); //exp: time:feed3322default: rd:TRice16 -1 - break; case __LINE__: TRice16(iD(14291), "rd:TRice16 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice16 -1, -2 - break; case __LINE__: TRice16(iD(14292), "rd:TRice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3 - break; case __LINE__: TRice16(iD(14293), "rd:TRice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4 - break; case __LINE__: TRice16(iD(14294), "rd:TRice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5 - break; case __LINE__: TRice16(iD(14295), "rd:TRice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice16(iD(14296), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice16(iD(14297), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice16(iD(14298), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice16(iD(14299), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice16(iD(14300), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice16(iD(14301), "rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice (iD(14302), "sig:trice16_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice16_1 (iD(14303), "rd:trice16_1 %d\n", -1 ); //exp: time: default: rd:trice16_1 -1 - break; case __LINE__: trice16_2 (iD(14304), "rd:trice16_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice16_2 -1, -2 - break; case __LINE__: trice16_3 (iD(14305), "rd:trice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice16_3 -1, -2, -3 - break; case __LINE__: trice16_4 (iD(14306), "rd:trice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16_4 -1, -2, -3, -4 - break; case __LINE__: trice16_5 (iD(14307), "rd:trice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice16_6 (iD(14308), "rd:trice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice16_7 (iD(14309), "rd:trice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice16_8 (iD(14310), "rd:trice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice16_9 (iD(14311), "rd:trice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice16_10(iD(14312), "rd:trice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice16_11(iD(14313), "rd:trice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice16_12(iD(14314), "rd:trice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice16_1 (iD(14315), "rd:Trice16_1 %d\n", -1 ); //exp: time: be16default: rd:Trice16_1 -1 - break; case __LINE__: Trice16_2 (iD(14316), "rd:Trice16_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice16_2 -1, -2 - break; case __LINE__: Trice16_3 (iD(14317), "rd:Trice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice16_3 -1, -2, -3 - break; case __LINE__: Trice16_4 (iD(14318), "rd:Trice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice16_4 -1, -2, -3, -4 - break; case __LINE__: Trice16_5 (iD(14319), "rd:Trice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice16_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice16_6 (iD(14320), "rd:Trice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice16_7 (iD(14321), "rd:Trice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice16_8 (iD(14322), "rd:Trice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice16_9 (iD(14323), "rd:Trice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice16_10(iD(14324), "rd:Trice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice16_11(iD(14325), "rd:Trice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice16_12(iD(14326), "rd:Trice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice16_1 (iD(14327), "rd:TRice16_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice16_1 -1 - break; case __LINE__: TRice16_2 (iD(14328), "rd:TRice16_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice16_2 -1, -2 - break; case __LINE__: TRice16_3 (iD(14329), "rd:TRice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice16_3 -1, -2, -3 - break; case __LINE__: TRice16_4 (iD(14330), "rd:TRice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice16_4 -1, -2, -3, -4 - break; case __LINE__: TRice16_5 (iD(14331), "rd:TRice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice16_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice16_6 (iD(14332), "rd:TRice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice16_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice16_7 (iD(14333), "rd:TRice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice16_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice16_8 (iD(14334), "rd:TRice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice16_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice16_9 (iD(14335), "rd:TRice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice16_10(iD(14336), "rd:TRice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice16_11(iD(14337), "rd:TRice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice16_12(iD(14338), "rd:TRice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice("sig:trice16 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice16("rd:trice16 %d\n", -1 ); //exp: time: default: rd:trice16 -1 + break; case __LINE__: trice16("rd:trice16 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice16 -1, -2 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice16 -1, -2, -3 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16 -1, -2, -3, -4 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16("rd:trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice16("rd:Trice16 %d\n", -1 ); //exp: time: be16default: rd:Trice16 -1 + break; case __LINE__: Trice16("rd:Trice16 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice16 -1, -2 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice16 -1, -2, -3 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice16("rd:Trice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice16("rd:TRice16 %d\n", -1 ); //exp: time:feed3322default: rd:TRice16 -1 + break; case __LINE__: TRice16("rd:TRice16 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice16 -1, -2 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice16("rd:TRice16 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice16 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice ("sig:trice16_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice16_1 ("rd:trice16_1 %d\n", -1 ); //exp: time: default: rd:trice16_1 -1 + break; case __LINE__: trice16_2 ("rd:trice16_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice16_2 -1, -2 + break; case __LINE__: trice16_3 ("rd:trice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice16_3 -1, -2, -3 + break; case __LINE__: trice16_4 ("rd:trice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice16_4 -1, -2, -3, -4 + break; case __LINE__: trice16_5 ("rd:trice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice16_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice16_6 ("rd:trice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice16_7 ("rd:trice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice16_8 ("rd:trice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice16_9 ("rd:trice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice16_10("rd:trice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice16_11("rd:trice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice16_12("rd:trice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice16_1 ("rd:Trice16_1 %d\n", -1 ); //exp: time: be16default: rd:Trice16_1 -1 + break; case __LINE__: Trice16_2 ("rd:Trice16_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice16_2 -1, -2 + break; case __LINE__: Trice16_3 ("rd:Trice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice16_3 -1, -2, -3 + break; case __LINE__: Trice16_4 ("rd:Trice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice16_4 -1, -2, -3, -4 + break; case __LINE__: Trice16_5 ("rd:Trice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice16_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice16_6 ("rd:Trice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice16_7 ("rd:Trice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice16_8 ("rd:Trice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice16_9 ("rd:Trice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice16_10("rd:Trice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice16_11("rd:Trice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice16_12("rd:Trice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice16_1 ("rd:TRice16_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice16_1 -1 + break; case __LINE__: TRice16_2 ("rd:TRice16_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice16_2 -1, -2 + break; case __LINE__: TRice16_3 ("rd:TRice16_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice16_3 -1, -2, -3 + break; case __LINE__: TRice16_4 ("rd:TRice16_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice16_4 -1, -2, -3, -4 + break; case __LINE__: TRice16_5 ("rd:TRice16_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice16_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice16_6 ("rd:TRice16_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice16_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice16_7 ("rd:TRice16_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice16_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice16_8 ("rd:TRice16_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice16_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice16_9 ("rd:TRice16_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice16_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice16_10("rd:TRice16_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice16_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice16_11("rd:TRice16_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice16_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice16_12("rd:TRice16_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice16_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice (iD(14339), "sig:TRICE32 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE32(id(14340), "rd:TRICE32 %d\n", -1 ); //exp: time: default: rd:TRICE32 -1 - break; case __LINE__: TRICE32(id(14341), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE32 -1, -2 - break; case __LINE__: TRICE32(id(14342), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE32 -1, -2, -3 - break; case __LINE__: TRICE32(id(14343), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4 - break; case __LINE__: TRICE32(id(14344), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32(id(14345), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32(id(14346), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32(id(14347), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32(id(14348), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32(id(14349), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32(id(14350), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32(id(14351), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE32(Id(14352), "rd:TRICE32 %d\n", -1 ); //exp: time: be16default: rd:TRICE32 -1 - break; case __LINE__: TRICE32(Id(14353), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE32 -1, -2 - break; case __LINE__: TRICE32(Id(14354), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3 - break; case __LINE__: TRICE32(Id(14355), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4 - break; case __LINE__: TRICE32(Id(14356), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32(Id(14357), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32(Id(14358), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32(Id(14359), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32(Id(14360), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32(Id(14361), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32(Id(14362), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32(Id(14363), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE32(ID(14364), "rd:TRICE32 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE32 -1 - break; case __LINE__: TRICE32(ID(14365), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE32 -1, -2 - break; case __LINE__: TRICE32(ID(14366), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3 - break; case __LINE__: TRICE32(ID(14367), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4 - break; case __LINE__: TRICE32(ID(14368), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32(ID(14369), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32(ID(14370), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32(ID(14371), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32(ID(14372), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32(ID(14373), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32(ID(14374), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32(ID(14375), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice (iD(14376), "signal:TRICE32_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE32_1 (id(14377), "rd:TRICE32_1 %d\n", -1 ); //exp: time: default: rd:TRICE32_1 -1 - break; case __LINE__: TRICE32_2 (id(14378), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE32_2 -1, -2 - break; case __LINE__: TRICE32_3 (id(14379), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE32_3 -1, -2, -3 - break; case __LINE__: TRICE32_4 (id(14380), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE32_4 -1, -2, -3, -4 - break; case __LINE__: TRICE32_5 (id(14381), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE32_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32_6 (id(14382), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32_7 (id(14383), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32_8 (id(14384), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32_9 (id(14385), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32_10(id(14386), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32_11(id(14387), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32_12(id(14388), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE32_1 (Id(14389), "rd:TRICE32_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE32_1 -1 - break; case __LINE__: TRICE32_2 (Id(14390), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE32_2 -1, -2 - break; case __LINE__: TRICE32_3 (Id(14391), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE32_3 -1, -2, -3 - break; case __LINE__: TRICE32_4 (Id(14392), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE32_4 -1, -2, -3, -4 - break; case __LINE__: TRICE32_5 (Id(14393), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE32_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32_6 (Id(14394), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32_7 (Id(14395), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32_8 (Id(14396), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32_9 (Id(14397), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32_10(Id(14398), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32_11(Id(14399), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32_12(Id(14400), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE32_1 (ID(14401), "rd:TRICE32_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE32_1 -1 - break; case __LINE__: TRICE32_2 (ID(14402), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE32_2 -1, -2 - break; case __LINE__: TRICE32_3 (ID(14403), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE32_3 -1, -2, -3 - break; case __LINE__: TRICE32_4 (ID(14404), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE32_4 -1, -2, -3, -4 - break; case __LINE__: TRICE32_5 (ID(14405), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE32_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE32_6 (ID(14406), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE32_7 (ID(14407), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE32_8 (ID(14408), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE32_9 (ID(14409), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE32_10(ID(14410), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE32_11(ID(14411), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE32_12(ID(14412), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice ("sig:TRICE32 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d\n", -1 ); //exp: time: default: rd:TRICE32 -1 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE32 -1, -2 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE32 -1, -2, -3 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32(id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d\n", -1 ); //exp: time: be16default: rd:TRICE32 -1 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE32 -1, -2 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32(Id(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE32 -1 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE32 -1, -2 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32(ID(0), "rd:TRICE32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice ("signal:TRICE32_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE32_1 (id(0), "rd:TRICE32_1 %d\n", -1 ); //exp: time: default: rd:TRICE32_1 -1 + break; case __LINE__: TRICE32_2 (id(0), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE32_2 -1, -2 + break; case __LINE__: TRICE32_3 (id(0), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE32_3 -1, -2, -3 + break; case __LINE__: TRICE32_4 (id(0), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE32_4 -1, -2, -3, -4 + break; case __LINE__: TRICE32_5 (id(0), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE32_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32_6 (id(0), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32_7 (id(0), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32_8 (id(0), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32_9 (id(0), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32_10(id(0), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32_11(id(0), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32_12(id(0), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE32_1 (Id(0), "rd:TRICE32_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE32_1 -1 + break; case __LINE__: TRICE32_2 (Id(0), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE32_2 -1, -2 + break; case __LINE__: TRICE32_3 (Id(0), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE32_3 -1, -2, -3 + break; case __LINE__: TRICE32_4 (Id(0), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE32_4 -1, -2, -3, -4 + break; case __LINE__: TRICE32_5 (Id(0), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE32_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32_6 (Id(0), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32_7 (Id(0), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32_8 (Id(0), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32_9 (Id(0), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32_10(Id(0), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32_11(Id(0), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32_12(Id(0), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE32_1 (ID(0), "rd:TRICE32_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE32_1 -1 + break; case __LINE__: TRICE32_2 (ID(0), "rd:TRICE32_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE32_2 -1, -2 + break; case __LINE__: TRICE32_3 (ID(0), "rd:TRICE32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE32_3 -1, -2, -3 + break; case __LINE__: TRICE32_4 (ID(0), "rd:TRICE32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE32_4 -1, -2, -3, -4 + break; case __LINE__: TRICE32_5 (ID(0), "rd:TRICE32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE32_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE32_6 (ID(0), "rd:TRICE32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE32_7 (ID(0), "rd:TRICE32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE32_8 (ID(0), "rd:TRICE32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE32_9 (ID(0), "rd:TRICE32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE32_10(ID(0), "rd:TRICE32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE32_11(ID(0), "rd:TRICE32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE32_12(ID(0), "rd:TRICE32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice (iD(14413), "sig:trice32 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice32(iD(14414), "rd:trice32 %d\n", -1 ); //exp: time: default: rd:trice32 -1 - break; case __LINE__: trice32(iD(14415), "rd:trice32 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice32 -1, -2 - break; case __LINE__: trice32(iD(14416), "rd:trice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice32 -1, -2, -3 - break; case __LINE__: trice32(iD(14417), "rd:trice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice32 -1, -2, -3, -4 - break; case __LINE__: trice32(iD(14418), "rd:trice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5 - break; case __LINE__: trice32(iD(14419), "rd:trice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice32(iD(14420), "rd:trice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice32(iD(14421), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice32(iD(14422), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice32(iD(14423), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice32(iD(14424), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice32(iD(14425), "rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice32(iD(14426), "rd:Trice32 %d\n", -1 ); //exp: time: be16default: rd:Trice32 -1 - break; case __LINE__: Trice32(iD(14427), "rd:Trice32 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice32 -1, -2 - break; case __LINE__: Trice32(iD(14428), "rd:Trice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice32 -1, -2, -3 - break; case __LINE__: Trice32(iD(14429), "rd:Trice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4 - break; case __LINE__: Trice32(iD(14430), "rd:Trice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5 - break; case __LINE__: Trice32(iD(14431), "rd:Trice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice32(iD(14432), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice32(iD(14433), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice32(iD(14434), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice32(iD(14435), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice32(iD(14436), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice32(iD(14437), "rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice32(iD(14438), "rd:TRice32 %d\n", -1 ); //exp: time:feed3322default: rd:TRice32 -1 - break; case __LINE__: TRice32(iD(14439), "rd:TRice32 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice32 -1, -2 - break; case __LINE__: TRice32(iD(14440), "rd:TRice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3 - break; case __LINE__: TRice32(iD(14441), "rd:TRice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4 - break; case __LINE__: TRice32(iD(14442), "rd:TRice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5 - break; case __LINE__: TRice32(iD(14443), "rd:TRice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice32(iD(14444), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice32(iD(14445), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice32(iD(14446), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice32(iD(14447), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice32(iD(14448), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice32(iD(14449), "rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice (iD(14450), "signal:trice32_n with 1 to 12 values (line %d)\n", __LINE__ ); - - break; case __LINE__: trice32_1 (iD(14451), "rd:trice32_1 %d\n", -1 ); //exp: time: default: rd:trice32_1 -1 - break; case __LINE__: trice32_2 (iD(14452), "rd:trice32_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice32_2 -1, -2 - break; case __LINE__: trice32_3 (iD(14453), "rd:trice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice32_3 -1, -2, -3 - break; case __LINE__: trice32_4 (iD(14454), "rd:trice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice32_4 -1, -2, -3, -4 - break; case __LINE__: trice32_5 (iD(14455), "rd:trice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice32_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice32_6 (iD(14456), "rd:trice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice32_7 (iD(14457), "rd:trice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice32_8 (iD(14458), "rd:trice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice32_9 (iD(14459), "rd:trice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice32_10(iD(14460), "rd:trice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice32_11(iD(14461), "rd:trice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice32_12(iD(14462), "rd:trice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice32_1 (iD(14463), "rd:Trice32_1 %d\n", -1 ); //exp: time: be16default: rd:Trice32_1 -1 - break; case __LINE__: Trice32_2 (iD(14464), "rd:Trice32_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice32_2 -1, -2 - break; case __LINE__: Trice32_3 (iD(14465), "rd:Trice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice32_3 -1, -2, -3 - break; case __LINE__: Trice32_4 (iD(14466), "rd:Trice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice32_4 -1, -2, -3, -4 - break; case __LINE__: Trice32_5 (iD(14467), "rd:Trice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice32_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice32_6 (iD(14468), "rd:Trice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice32_7 (iD(14469), "rd:Trice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice32_8 (iD(14470), "rd:Trice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice32_9 (iD(14471), "rd:Trice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice32_10(iD(14472), "rd:Trice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice32_11(iD(14473), "rd:Trice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice32_12(iD(14474), "rd:Trice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice32_1 (iD(14475), "rd:TRice32_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice32_1 -1 - break; case __LINE__: TRice32_2 (iD(14476), "rd:TRice32_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice32_2 -1, -2 - break; case __LINE__: TRice32_3 (iD(14477), "rd:TRice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice32_3 -1, -2, -3 - break; case __LINE__: TRice32_4 (iD(14478), "rd:TRice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice32_4 -1, -2, -3, -4 - break; case __LINE__: TRice32_5 (iD(14479), "rd:TRice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice32_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice32_6 (iD(14480), "rd:TRice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice32_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice32_7 (iD(14481), "rd:TRice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice32_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice32_8 (iD(14482), "rd:TRice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice32_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice32_9 (iD(14483), "rd:TRice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice32_10(iD(14484), "rd:TRice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice32_11(iD(14485), "rd:TRice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice32_12(iD(14486), "rd:TRice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice ("sig:trice32 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice32("rd:trice32 %d\n", -1 ); //exp: time: default: rd:trice32 -1 + break; case __LINE__: trice32("rd:trice32 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice32 -1, -2 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice32 -1, -2, -3 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice32 -1, -2, -3, -4 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice32("rd:trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice32("rd:Trice32 %d\n", -1 ); //exp: time: be16default: rd:Trice32 -1 + break; case __LINE__: Trice32("rd:Trice32 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice32 -1, -2 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice32 -1, -2, -3 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice32("rd:Trice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice32("rd:TRice32 %d\n", -1 ); //exp: time:feed3322default: rd:TRice32 -1 + break; case __LINE__: TRice32("rd:TRice32 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice32 -1, -2 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice32("rd:TRice32 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice ("signal:trice32_n with 1 to 12 values (line %d)\n", __LINE__ ); + + break; case __LINE__: trice32_1 ("rd:trice32_1 %d\n", -1 ); //exp: time: default: rd:trice32_1 -1 + break; case __LINE__: trice32_2 ("rd:trice32_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice32_2 -1, -2 + break; case __LINE__: trice32_3 ("rd:trice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice32_3 -1, -2, -3 + break; case __LINE__: trice32_4 ("rd:trice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice32_4 -1, -2, -3, -4 + break; case __LINE__: trice32_5 ("rd:trice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice32_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice32_6 ("rd:trice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice32_7 ("rd:trice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice32_8 ("rd:trice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice32_9 ("rd:trice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice32_10("rd:trice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice32_11("rd:trice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice32_12("rd:trice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice32_1 ("rd:Trice32_1 %d\n", -1 ); //exp: time: be16default: rd:Trice32_1 -1 + break; case __LINE__: Trice32_2 ("rd:Trice32_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice32_2 -1, -2 + break; case __LINE__: Trice32_3 ("rd:Trice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice32_3 -1, -2, -3 + break; case __LINE__: Trice32_4 ("rd:Trice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice32_4 -1, -2, -3, -4 + break; case __LINE__: Trice32_5 ("rd:Trice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice32_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice32_6 ("rd:Trice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice32_7 ("rd:Trice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice32_8 ("rd:Trice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice32_9 ("rd:Trice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice32_10("rd:Trice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice32_11("rd:Trice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice32_12("rd:Trice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice32_1 ("rd:TRice32_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice32_1 -1 + break; case __LINE__: TRice32_2 ("rd:TRice32_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice32_2 -1, -2 + break; case __LINE__: TRice32_3 ("rd:TRice32_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice32_3 -1, -2, -3 + break; case __LINE__: TRice32_4 ("rd:TRice32_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice32_4 -1, -2, -3, -4 + break; case __LINE__: TRice32_5 ("rd:TRice32_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice32_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice32_6 ("rd:TRice32_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice32_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice32_7 ("rd:TRice32_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice32_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice32_8 ("rd:TRice32_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice32_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice32_9 ("rd:TRice32_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice32_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice32_10("rd:TRice32_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice32_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice32_11("rd:TRice32_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice32_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice32_12("rd:TRice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice (iD(14487), "sig:TRICE64 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE64(id(14488), "rd:TRICE64 %d\n", -1 ); //exp: time: default: rd:TRICE64 -1 - break; case __LINE__: TRICE64(id(14489), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE64 -1, -2 - break; case __LINE__: TRICE64(id(14490), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE64 -1, -2, -3 - break; case __LINE__: TRICE64(id(14491), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4 - break; case __LINE__: TRICE64(id(14492), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64(id(14493), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64(id(14494), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64(id(14495), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64(id(14496), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64(id(14497), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64(id(14498), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64(id(14499), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE64(Id(14500), "rd:TRICE64 %d\n", -1 ); //exp: time: be16default: rd:TRICE64 -1 - break; case __LINE__: TRICE64(Id(14501), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE64 -1, -2 - break; case __LINE__: TRICE64(Id(14502), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3 - break; case __LINE__: TRICE64(Id(14503), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4 - break; case __LINE__: TRICE64(Id(14504), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64(Id(14505), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64(Id(14506), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64(Id(14507), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64(Id(14508), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64(Id(14509), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64(Id(14510), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64(Id(14511), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE64(ID(14512), "rd:TRICE64 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE64 -1 - break; case __LINE__: TRICE64(ID(14513), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE64 -1, -2 - break; case __LINE__: TRICE64(ID(14514), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3 - break; case __LINE__: TRICE64(ID(14515), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4 - break; case __LINE__: TRICE64(ID(14516), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64(ID(14517), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64(ID(14518), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64(ID(14519), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64(ID(14520), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64(ID(14521), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64(ID(14522), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64(ID(14523), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice (iD(14524), "signal:TRICE64_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: TRICE64_1 (id(14525), "rd:TRICE64_1 %d\n", -1 ); //exp: time: default: rd:TRICE64_1 -1 - break; case __LINE__: TRICE64_2 (id(14526), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE64_2 -1, -2 - break; case __LINE__: TRICE64_3 (id(14527), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE64_3 -1, -2, -3 - break; case __LINE__: TRICE64_4 (id(14528), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE64_4 -1, -2, -3, -4 - break; case __LINE__: TRICE64_5 (id(14529), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE64_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64_6 (id(14530), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64_7 (id(14531), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64_8 (id(14532), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64_9 (id(14533), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64_10(id(14534), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64_11(id(14535), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64_12(id(14536), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE64_1 (Id(14537), "rd:TRICE64_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE64_1 -1 - break; case __LINE__: TRICE64_2 (Id(14538), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE64_2 -1, -2 - break; case __LINE__: TRICE64_3 (Id(14539), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE64_3 -1, -2, -3 - break; case __LINE__: TRICE64_4 (Id(14540), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE64_4 -1, -2, -3, -4 - break; case __LINE__: TRICE64_5 (Id(14541), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE64_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64_6 (Id(14542), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64_7 (Id(14543), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64_8 (Id(14544), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64_9 (Id(14545), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64_10(Id(14546), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64_11(Id(14547), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64_12(Id(14548), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRICE64_1 (ID(14549), "rd:TRICE64_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE64_1 -1 - break; case __LINE__: TRICE64_2 (ID(14550), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE64_2 -1, -2 - break; case __LINE__: TRICE64_3 (ID(14551), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE64_3 -1, -2, -3 - break; case __LINE__: TRICE64_4 (ID(14552), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE64_4 -1, -2, -3, -4 - break; case __LINE__: TRICE64_5 (ID(14553), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE64_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRICE64_6 (ID(14554), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRICE64_7 (ID(14555), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRICE64_8 (ID(14556), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRICE64_9 (ID(14557), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRICE64_10(ID(14558), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRICE64_11(ID(14559), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRICE64_12(ID(14560), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice ("sig:TRICE64 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d\n", -1 ); //exp: time: default: rd:TRICE64 -1 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE64 -1, -2 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE64 -1, -2, -3 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64(id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d\n", -1 ); //exp: time: be16default: rd:TRICE64 -1 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE64 -1, -2 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64(Id(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE64 -1 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE64 -1, -2 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice ("signal:TRICE64_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: TRICE64_1 (id(0), "rd:TRICE64_1 %d\n", -1 ); //exp: time: default: rd:TRICE64_1 -1 + break; case __LINE__: TRICE64_2 (id(0), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE64_2 -1, -2 + break; case __LINE__: TRICE64_3 (id(0), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE64_3 -1, -2, -3 + break; case __LINE__: TRICE64_4 (id(0), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE64_4 -1, -2, -3, -4 + break; case __LINE__: TRICE64_5 (id(0), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE64_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64_6 (id(0), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64_7 (id(0), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64_8 (id(0), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64_9 (id(0), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64_10(id(0), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64_11(id(0), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64_12(id(0), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64_1 (Id(0), "rd:TRICE64_1 %d\n", -1 ); //exp: time: be16default: rd:TRICE64_1 -1 + break; case __LINE__: TRICE64_2 (Id(0), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:TRICE64_2 -1, -2 + break; case __LINE__: TRICE64_3 (Id(0), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:TRICE64_3 -1, -2, -3 + break; case __LINE__: TRICE64_4 (Id(0), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:TRICE64_4 -1, -2, -3, -4 + break; case __LINE__: TRICE64_5 (Id(0), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:TRICE64_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64_6 (Id(0), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64_7 (Id(0), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64_8 (Id(0), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64_9 (Id(0), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64_10(Id(0), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64_11(Id(0), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64_12(Id(0), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRICE64_1 (ID(0), "rd:TRICE64_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRICE64_1 -1 + break; case __LINE__: TRICE64_2 (ID(0), "rd:TRICE64_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRICE64_2 -1, -2 + break; case __LINE__: TRICE64_3 (ID(0), "rd:TRICE64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRICE64_3 -1, -2, -3 + break; case __LINE__: TRICE64_4 (ID(0), "rd:TRICE64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRICE64_4 -1, -2, -3, -4 + break; case __LINE__: TRICE64_5 (ID(0), "rd:TRICE64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRICE64_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRICE64_6 (ID(0), "rd:TRICE64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRICE64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRICE64_7 (ID(0), "rd:TRICE64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRICE64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRICE64_8 (ID(0), "rd:TRICE64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRICE64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRICE64_9 (ID(0), "rd:TRICE64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRICE64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRICE64_10(ID(0), "rd:TRICE64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRICE64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRICE64_11(ID(0), "rd:TRICE64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRICE64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRICE64_12(ID(0), "rd:TRICE64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRICE64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice (iD(14561), "sig:trice64 with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice64(iD(14562), "rd:trice64 %d\n", -1 ); //exp: time: default: rd:trice64 -1 - break; case __LINE__: trice64(iD(14563), "rd:trice64 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice64 -1, -2 - break; case __LINE__: trice64(iD(14564), "rd:trice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice64 -1, -2, -3 - break; case __LINE__: trice64(iD(14565), "rd:trice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice64 -1, -2, -3, -4 - break; case __LINE__: trice64(iD(14566), "rd:trice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5 - break; case __LINE__: trice64(iD(14567), "rd:trice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice64(iD(14568), "rd:trice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice64(iD(14569), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice64(iD(14570), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice64(iD(14571), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice64(iD(14572), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice64(iD(14573), "rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice64(iD(14574), "rd:Trice64 %d\n", -1 ); //exp: time: be16default: rd:Trice64 -1 - break; case __LINE__: Trice64(iD(14575), "rd:Trice64 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice64 -1, -2 - break; case __LINE__: Trice64(iD(14576), "rd:Trice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice64 -1, -2, -3 - break; case __LINE__: Trice64(iD(14577), "rd:Trice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4 - break; case __LINE__: Trice64(iD(14578), "rd:Trice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5 - break; case __LINE__: Trice64(iD(14579), "rd:Trice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice64(iD(14580), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice64(iD(14581), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice64(iD(14582), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice64(iD(14583), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice64(iD(14584), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice64(iD(14585), "rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice64(iD(14586), "rd:TRice64 %d\n", -1 ); //exp: time:feed3322default: rd:TRice64 -1 - break; case __LINE__: TRice64(iD(14587), "rd:TRice64 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice64 -1, -2 - break; case __LINE__: TRice64(iD(14588), "rd:TRice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3 - break; case __LINE__: TRice64(iD(14589), "rd:TRice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4 - break; case __LINE__: TRice64(iD(14590), "rd:TRice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5 - break; case __LINE__: TRice64(iD(14591), "rd:TRice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice64(iD(14592), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice64(iD(14593), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice64(iD(14594), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice64(iD(14595), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice64(iD(14596), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice64(iD(14597), "rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice (iD(14598), "signal:trice64_n with 1 to 12 values (line %d)\n", __LINE__ ); - break; case __LINE__: trice64_1 (iD(14599), "rd:trice64_1 %d\n", -1 ); //exp: time: default: rd:trice64_1 -1 - break; case __LINE__: trice64_2 (iD(14600), "rd:trice64_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice64_2 -1, -2 - break; case __LINE__: trice64_3 (iD(14601), "rd:trice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice64_3 -1, -2, -3 - break; case __LINE__: trice64_4 (iD(14602), "rd:trice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice64_4 -1, -2, -3, -4 - break; case __LINE__: trice64_5 (iD(14603), "rd:trice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice64_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice64_6 (iD(14604), "rd:trice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice64_7 (iD(14605), "rd:trice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice64_8 (iD(14606), "rd:trice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice64_9 (iD(14607), "rd:trice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice64_10(iD(14608), "rd:trice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice64_11(iD(14609), "rd:trice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice64_12(iD(14610), "rd:trice64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: Trice64_1 (iD(14611), "rd:Trice64_1 %d\n", -1 ); //exp: time: be16default: rd:Trice64_1 -1 - break; case __LINE__: Trice64_2 (iD(14612), "rd:Trice64_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice64_2 -1, -2 - break; case __LINE__: Trice64_3 (iD(14613), "rd:Trice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice64_3 -1, -2, -3 - break; case __LINE__: Trice64_4 (iD(14614), "rd:Trice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice64_4 -1, -2, -3, -4 - break; case __LINE__: Trice64_5 (iD(14615), "rd:Trice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice64_5 -1, -2, -3, -4, -5 - break; case __LINE__: Trice64_6 (iD(14616), "rd:Trice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: Trice64_7 (iD(14617), "rd:Trice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: Trice64_8 (iD(14618), "rd:Trice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: Trice64_9 (iD(14619), "rd:Trice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: Trice64_10(iD(14620), "rd:Trice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: Trice64_11(iD(14621), "rd:Trice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: Trice64_12(iD(14622), "rd:Trice64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - break; case __LINE__: TRice64_1 (iD(14623), "rd:TRice64_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice64_1 -1 - break; case __LINE__: TRice64_2 (iD(14624), "rd:TRice64_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice64_2 -1, -2 - break; case __LINE__: TRice64_3 (iD(14625), "rd:TRice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice64_3 -1, -2, -3 - break; case __LINE__: TRice64_4 (iD(14626), "rd:TRice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice64_4 -1, -2, -3, -4 - break; case __LINE__: TRice64_5 (iD(14627), "rd:TRice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice64_5 -1, -2, -3, -4, -5 - break; case __LINE__: TRice64_6 (iD(14628), "rd:TRice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice64_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: TRice64_7 (iD(14629), "rd:TRice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice64_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: TRice64_8 (iD(14630), "rd:TRice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice64_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: TRice64_9 (iD(14631), "rd:TRice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: TRice64_10(iD(14632), "rd:TRice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: TRice64_11(iD(14633), "rd:TRice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: TRice32_12(iD(14634), "rd:TRice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: trice ("sig:trice64 with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice64("rd:trice64 %d\n", -1 ); //exp: time: default: rd:trice64 -1 + break; case __LINE__: trice64("rd:trice64 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice64 -1, -2 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice64 -1, -2, -3 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice64 -1, -2, -3, -4 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice64("rd:trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice64("rd:Trice64 %d\n", -1 ); //exp: time: be16default: rd:Trice64 -1 + break; case __LINE__: Trice64("rd:Trice64 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice64 -1, -2 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice64 -1, -2, -3 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice64("rd:Trice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice64("rd:TRice64 %d\n", -1 ); //exp: time:feed3322default: rd:TRice64 -1 + break; case __LINE__: TRice64("rd:TRice64 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice64 -1, -2 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice64("rd:TRice64 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice64 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice ("signal:trice64_n with 1 to 12 values (line %d)\n", __LINE__ ); + break; case __LINE__: trice64_1 ("rd:trice64_1 %d\n", -1 ); //exp: time: default: rd:trice64_1 -1 + break; case __LINE__: trice64_2 ("rd:trice64_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:trice64_2 -1, -2 + break; case __LINE__: trice64_3 ("rd:trice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:trice64_3 -1, -2, -3 + break; case __LINE__: trice64_4 ("rd:trice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:trice64_4 -1, -2, -3, -4 + break; case __LINE__: trice64_5 ("rd:trice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:trice64_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice64_6 ("rd:trice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:trice64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice64_7 ("rd:trice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:trice64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice64_8 ("rd:trice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:trice64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice64_9 ("rd:trice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:trice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice64_10("rd:trice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:trice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice64_11("rd:trice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:trice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice64_12("rd:trice64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:trice64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: Trice64_1 ("rd:Trice64_1 %d\n", -1 ); //exp: time: be16default: rd:Trice64_1 -1 + break; case __LINE__: Trice64_2 ("rd:Trice64_2 %d, %d\n", -1, -2 ); //exp: time: be16default: rd:Trice64_2 -1, -2 + break; case __LINE__: Trice64_3 ("rd:Trice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: be16default: rd:Trice64_3 -1, -2, -3 + break; case __LINE__: Trice64_4 ("rd:Trice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: be16default: rd:Trice64_4 -1, -2, -3, -4 + break; case __LINE__: Trice64_5 ("rd:Trice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: be16default: rd:Trice64_5 -1, -2, -3, -4, -5 + break; case __LINE__: Trice64_6 ("rd:Trice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: be16default: rd:Trice64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: Trice64_7 ("rd:Trice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: be16default: rd:Trice64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: Trice64_8 ("rd:Trice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: be16default: rd:Trice64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: Trice64_9 ("rd:Trice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: be16default: rd:Trice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: Trice64_10("rd:Trice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: be16default: rd:Trice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: Trice64_11("rd:Trice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: be16default: rd:Trice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: Trice64_12("rd:Trice64_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: be16default: rd:Trice64_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: TRice64_1 ("rd:TRice64_1 %d\n", -1 ); //exp: time:feed3322default: rd:TRice64_1 -1 + break; case __LINE__: TRice64_2 ("rd:TRice64_2 %d, %d\n", -1, -2 ); //exp: time:feed3322default: rd:TRice64_2 -1, -2 + break; case __LINE__: TRice64_3 ("rd:TRice64_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time:feed3322default: rd:TRice64_3 -1, -2, -3 + break; case __LINE__: TRice64_4 ("rd:TRice64_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time:feed3322default: rd:TRice64_4 -1, -2, -3, -4 + break; case __LINE__: TRice64_5 ("rd:TRice64_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time:feed3322default: rd:TRice64_5 -1, -2, -3, -4, -5 + break; case __LINE__: TRice64_6 ("rd:TRice64_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time:feed3322default: rd:TRice64_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: TRice64_7 ("rd:TRice64_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time:feed3322default: rd:TRice64_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: TRice64_8 ("rd:TRice64_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time:feed3322default: rd:TRice64_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: TRice64_9 ("rd:TRice64_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time:feed3322default: rd:TRice64_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: TRice64_10("rd:TRice64_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time:feed3322default: rd:TRice64_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: TRice64_11("rd:TRice64_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time:feed3322default: rd:TRice64_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: TRice32_12("rd:TRice32_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time:feed3322default: rd:TRice32_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 break; case __LINE__:{ - TRICE(Id(14635), "sig:Colors and ticks\n" ); - TRICE(Id(14636), "--------------------------------------------------\n"); - TRICE(Id(14637), "--------------------------------------------------\n"); - TRICE(Id(14638), "dbg:12345 as 16bit is %016b\n", 12345); - TRICE(Id(14639), "--------------------------------------------------\n"); - TRICE(Id(14640), "sig:This ASSERT error is just a demo and no real error:\n"); - TRICE(Id(14641), "--------------------------------------------------\n"); - TRICE(Id(14642), "ERR:error message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14643), "WRN:warning message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14644), "ATT:attention message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14645), "DIA:diagnostics message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14646), "TIM:timing message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14647), "DBG:debug message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14648), "SIG:signal message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14649), "RD:read message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14650), "WR:write message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14651), "ISR:interrupt message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14652), "MSG:normal message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14653), "INFO:informal message, SysTick is %6u\n", SYSTICKVAL); - TRICE(Id(14654), "time:TRICE32_1 message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "sig:Colors and ticks\n" ); + TRICE(Id(0), "--------------------------------------------------\n"); + TRICE(Id(0), "--------------------------------------------------\n"); + TRICE(Id(0), "dbg:12345 as 16bit is %016b\n", 12345); + TRICE(Id(0), "--------------------------------------------------\n"); + TRICE(Id(0), "sig:This ASSERT error is just a demo and no real error:\n"); + TRICE(Id(0), "--------------------------------------------------\n"); + TRICE(Id(0), "ERR:error message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "WRN:warning message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "ATT:attention message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "DIA:diagnostics message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "TIM:timing message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "DBG:debug message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "SIG:signal message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "RD:read message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "WR:write message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "ISR:interrupt message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "MSG:normal message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "INFO:informal message, SysTick is %6u\n", SYSTICKVAL); + TRICE(Id(0), "time:TRICE32_1 message, SysTick is %6u\n", SYSTICKVAL); } #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE(ID(14655), "sig:Various ranges and formats\n" ); - break; case __LINE__: TRICE8 (ID(14656), "tst:TRICE8 %%03x -> %03x %03x %03x %03x\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(14657), "tst:TRICE8 %%4d -> %4d %4d %4d %4d\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(14658), "tst:TRICE8 %%4u -> %4u %4u %4u %4u\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(14659), "tst:TRICE8 %%4o -> %4o %4o %4o %4o\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(14660), "tst:TRICE8 %%4O -> %4O %4O %4O %4O\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(14661), "tst:TRICE8 %%4X -> %4X %4X %4X %4X\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(14662), "tst:TRICE8 %%4x -> %4x %4x %4x %4x\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(14663), "tst:TRICE8 %%8b -> %8b %8b %8b %8b\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE8 (ID(14664), "tst:TRICE8 %%08b -> %08b %08b %08b %08b\n", 1, 0x7f, 0x80, 0xff); - break; case __LINE__: TRICE16(ID(14665), "tst:TRICE16 %%05x -> %05x %05x %05x %05x\n", 1, 0x7fff, 0x8000, 0xffff); - break; case __LINE__: TRICE16(ID(14666), "tst:TRICE16 %%6d -> %6d %6d %6d %6d\n", 1, 0x7fff, 0x8000, 0xffff); - break; case __LINE__: TRICE16(ID(14667), "tst:TRICE16 %%7o -> %7o %7o %7o %7o\n", 1, 0x7fff, 0x8000, 0xffff); - break; case __LINE__: TRICE32(ID(14668), "tst:TRICE32 %%09x -> %09x %09x %09x %09x\n", 1, 0x7fffffff, 0x80000000, 0xffffffff); - break; case __LINE__: TRICE32(ID(14669), "tst:TRICE32 %%10d -> %10d %10d %10d %10x\n", 1, 0x7fffffff, 0x80000000, 0xffffffff); - break; case __LINE__: TRICE32(ID(14670), "att:TRICE32 %40b\n", 0xAAAAAAAA); - break; case __LINE__: TRICE64(ID(14671), "tst:TRICE64 %%09x -> %09x %09x %09x %09x\n", 1, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff); - break; case __LINE__: TRICE64(ID(14672), "tst:TRICE64 %%10d -> %10d %10d %10d %10x\n", 1, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff); - break; case __LINE__: TRICE64(ID(14673), "att:TRICE64 %70b\n", 0xAAAAAAAAAAAAAAAA); - break; case __LINE__: TRICE(ID(14674), "sig:Legacy TRICE8\n" ); - break; case __LINE__: TRICE8_1(ID(14675), "tst:TRICE8_1 %02x\n", 0xA1); - break; case __LINE__: TRICE8_2(ID(14676), "tst:TRICE8_2 %02x %02x\n", 0xA1, 0xA2); - break; case __LINE__: TRICE8_3(ID(14677), "tst:TRICE8_3 %02x %02x %02x\n", 0xA1, 0xA2, 0xA3); - break; case __LINE__: TRICE8_4(ID(14678), "tst:TRICE8_4 %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4); - break; case __LINE__: TRICE8_5(ID(14679), "tst:TRICE8_5 %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5 ); - break; case __LINE__: TRICE8_6(ID(14680), "tst:TRICE8_6 %02x %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6); - break; case __LINE__: TRICE8_7(ID(14681), "tst:TRICE8_7 %02x %02x %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7); - break; case __LINE__: TRICE8_8(ID(14682), "tst:TRICE8_8 %02X %02X %02X %02X %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8); //exp: time:feed3322default: tst:TRICE8_8 A1 A2 A3 A4 a5 a6 a7 a8 + break; case __LINE__: TRICE(ID(0), "sig:Various ranges and formats\n" ); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%03x -> %03x %03x %03x %03x\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4d -> %4d %4d %4d %4d\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4u -> %4u %4u %4u %4u\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4o -> %4o %4o %4o %4o\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4O -> %4O %4O %4O %4O\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4X -> %4X %4X %4X %4X\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%4x -> %4x %4x %4x %4x\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%8b -> %8b %8b %8b %8b\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE8 (ID(0), "tst:TRICE8 %%08b -> %08b %08b %08b %08b\n", 1, 0x7f, 0x80, 0xff); + break; case __LINE__: TRICE16(ID(0), "tst:TRICE16 %%05x -> %05x %05x %05x %05x\n", 1, 0x7fff, 0x8000, 0xffff); + break; case __LINE__: TRICE16(ID(0), "tst:TRICE16 %%6d -> %6d %6d %6d %6d\n", 1, 0x7fff, 0x8000, 0xffff); + break; case __LINE__: TRICE16(ID(0), "tst:TRICE16 %%7o -> %7o %7o %7o %7o\n", 1, 0x7fff, 0x8000, 0xffff); + break; case __LINE__: TRICE32(ID(0), "tst:TRICE32 %%09x -> %09x %09x %09x %09x\n", 1, 0x7fffffff, 0x80000000, 0xffffffff); + break; case __LINE__: TRICE32(ID(0), "tst:TRICE32 %%10d -> %10d %10d %10d %10x\n", 1, 0x7fffffff, 0x80000000, 0xffffffff); + break; case __LINE__: TRICE32(ID(0), "att:TRICE32 %40b\n", 0xAAAAAAAA); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %%09x -> %09x %09x %09x %09x\n", 1, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %%10d -> %10d %10d %10d %10x\n", 1, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff); + break; case __LINE__: TRICE64(ID(0), "att:TRICE64 %70b\n", 0xAAAAAAAAAAAAAAAA); + break; case __LINE__: TRICE(ID(0), "sig:Legacy TRICE8\n" ); + break; case __LINE__: TRICE8_1(ID(0), "tst:TRICE8_1 %02x\n", 0xA1); + break; case __LINE__: TRICE8_2(ID(0), "tst:TRICE8_2 %02x %02x\n", 0xA1, 0xA2); + break; case __LINE__: TRICE8_3(ID(0), "tst:TRICE8_3 %02x %02x %02x\n", 0xA1, 0xA2, 0xA3); + break; case __LINE__: TRICE8_4(ID(0), "tst:TRICE8_4 %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4); + break; case __LINE__: TRICE8_5(ID(0), "tst:TRICE8_5 %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5 ); + break; case __LINE__: TRICE8_6(ID(0), "tst:TRICE8_6 %02x %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6); + break; case __LINE__: TRICE8_7(ID(0), "tst:TRICE8_7 %02x %02x %02x %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7); + break; case __LINE__: TRICE8_8(ID(0), "tst:TRICE8_8 %02X %02X %02X %02X %02x %02x %02x %02x\n", 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8); //exp: time:feed3322default: tst:TRICE8_8 A1 A2 A3 A4 a5 a6 a7 a8 break; case __LINE__: { - TRICE8_1(Id(14683), "tst:TRICE8_1 %d\n", -1); - TRICE8_2(Id(14684), "tst:TRICE8_2 %d %d\n", -1, -2); - TRICE8_3(Id(14685), "tst:TRICE8_3 %d %d %d\n", -1, -2, -3); - TRICE8_4(Id(14686), "tst:TRICE8_4 %d %d %d %d\n", -1, -2, -3, -4); - TRICE8_5(Id(14687), "tst:TRICE8_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5); - TRICE8_6(Id(14688), "tst:TRICE8_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6); - TRICE8_7(Id(14689), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7); - TRICE8_8(Id(14690), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8); + TRICE8_1(Id(0), "tst:TRICE8_1 %d\n", -1); + TRICE8_2(Id(0), "tst:TRICE8_2 %d %d\n", -1, -2); + TRICE8_3(Id(0), "tst:TRICE8_3 %d %d %d\n", -1, -2, -3); + TRICE8_4(Id(0), "tst:TRICE8_4 %d %d %d %d\n", -1, -2, -3, -4); + TRICE8_5(Id(0), "tst:TRICE8_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5); + TRICE8_6(Id(0), "tst:TRICE8_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6); + TRICE8_7(Id(0), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7); + TRICE8_8(Id(0), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8); } - break; case __LINE__: TRICE8_1(ID(14691), "tst:TRICE8_1 %d\n", 1); - break; case __LINE__: TRICE8_2(ID(14692), "tst:TRICE8_2 %d %d\n", 1, 2); - break; case __LINE__: TRICE8_3(ID(14693), "tst:TRICE8_3 %d %d %d\n", 1, 2, 3); - break; case __LINE__: TRICE8_4(ID(14694), "tst:TRICE8_4 %d %d %d %d\n", 1, 2, 3, 4); - break; case __LINE__: TRICE8_5(ID(14695), "tst:TRICE8_5 %d %d %d %d %d\n", 1, 2, 3, 4, 5); - break; case __LINE__: TRICE8_6(ID(14696), "tst:TRICE8_6 %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6); - break; case __LINE__: TRICE8_7(ID(14697), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7); - break; case __LINE__: TRICE8_8(ID(14698), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7, 8); - break; case __LINE__: TRICE8_1(ID(14699), "tst:TRICE8_1 %u\n", 201); - break; case __LINE__: TRICE8_2(ID(14700), "tst:TRICE8_2 %u %u\n", 201, 202); - break; case __LINE__: TRICE8_3(ID(14701), "tst:TRICE8_3 %u %u %u\n", 201, 202, 203); - break; case __LINE__: TRICE8_4(ID(14702), "tst:TRICE8_4 %u %u %u %u\n", 201, 202, 203, 204); - break; case __LINE__: TRICE8_5(ID(14703), "tst:TRICE8_5 %u %u %u %u %u\n", 201, 202, 203, 204, 205); - break; case __LINE__: TRICE8_6(ID(14704), "tst:TRICE8_6 %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206); - break; case __LINE__: TRICE8_7(ID(14705), "tst:TRICE8_7 %u %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206, 207); - break; case __LINE__: TRICE8_8(ID(14706), "tst:TRICE8_8 %u %u %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206, 207, 208); - break; case __LINE__: TRICE8_8(ID(14707), "tst:TRICE8_1 %%d=%d, %%u=%u, 0x%%x=0x%x, 0x%%2x=0x%2x, 0x%%02x=0x%02x, 0x%%3x=0x%3x, 0x%%03x=0x%03x, %%b=%b\n", 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81); - - break; case __LINE__: TRICE (ID(14708), "sig:Legacy TRICE16-64\n" ); + break; case __LINE__: TRICE8_1(ID(0), "tst:TRICE8_1 %d\n", 1); + break; case __LINE__: TRICE8_2(ID(0), "tst:TRICE8_2 %d %d\n", 1, 2); + break; case __LINE__: TRICE8_3(ID(0), "tst:TRICE8_3 %d %d %d\n", 1, 2, 3); + break; case __LINE__: TRICE8_4(ID(0), "tst:TRICE8_4 %d %d %d %d\n", 1, 2, 3, 4); + break; case __LINE__: TRICE8_5(ID(0), "tst:TRICE8_5 %d %d %d %d %d\n", 1, 2, 3, 4, 5); + break; case __LINE__: TRICE8_6(ID(0), "tst:TRICE8_6 %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6); + break; case __LINE__: TRICE8_7(ID(0), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7); + break; case __LINE__: TRICE8_8(ID(0), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", 1, 2, 3, 4, 5, 6, 7, 8); + break; case __LINE__: TRICE8_1(ID(0), "tst:TRICE8_1 %u\n", 201); + break; case __LINE__: TRICE8_2(ID(0), "tst:TRICE8_2 %u %u\n", 201, 202); + break; case __LINE__: TRICE8_3(ID(0), "tst:TRICE8_3 %u %u %u\n", 201, 202, 203); + break; case __LINE__: TRICE8_4(ID(0), "tst:TRICE8_4 %u %u %u %u\n", 201, 202, 203, 204); + break; case __LINE__: TRICE8_5(ID(0), "tst:TRICE8_5 %u %u %u %u %u\n", 201, 202, 203, 204, 205); + break; case __LINE__: TRICE8_6(ID(0), "tst:TRICE8_6 %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206); + break; case __LINE__: TRICE8_7(ID(0), "tst:TRICE8_7 %u %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206, 207); + break; case __LINE__: TRICE8_8(ID(0), "tst:TRICE8_8 %u %u %u %u %u %u %u %u\n", 201, 202, 203, 204, 205, 206, 207, 208); + break; case __LINE__: TRICE8_8(ID(0), "tst:TRICE8_1 %%d=%d, %%u=%u, 0x%%x=0x%x, 0x%%2x=0x%2x, 0x%%02x=0x%02x, 0x%%3x=0x%3x, 0x%%03x=0x%03x, %%b=%b\n", 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81); + + break; case __LINE__: TRICE (ID(0), "sig:Legacy TRICE16-64\n" ); break; case __LINE__: { - TRICE16_1(Id(14709), "tst:TRICE16_1 %d\n", -111); - TRICE16_2(Id(14710), "tst:TRICE16_2 %d %d\n", -111, -222); - TRICE16_3(Id(14711), "tst:TRICE16_3 %d %d %d\n", -111, -222, -333); - TRICE16_4(Id(14712), "tst:TRICE16_4 %d %d %d %d\n", -111, -222, -333, -444); + TRICE16_1(Id(0), "tst:TRICE16_1 %d\n", -111); + TRICE16_2(Id(0), "tst:TRICE16_2 %d %d\n", -111, -222); + TRICE16_3(Id(0), "tst:TRICE16_3 %d %d %d\n", -111, -222, -333); + TRICE16_4(Id(0), "tst:TRICE16_4 %d %d %d %d\n", -111, -222, -333, -444); } break; case __LINE__: { - TRICE32_1(Id(14713), "tst:TRICE32_1 %08x\n", 0x0123cafe); - TRICE32_1(Id(14714), "tst:TRICE32_1 %d\n", -111); - TRICE32_2(Id(14715), "tst:TRICE32_2 %x %x\n", -111, -222); - TRICE32_2(Id(14716), "tst:TRICE32_2 %d %d\n", -111, -222); - TRICE32_3(Id(14717), "tst:TRICE32_3 %x %x %x\n", -111, -222, -333); - TRICE32_3(Id(14718), "tst:TRICE32_3 %d %d %d\n", -111, -222, -333); - TRICE32_4(Id(14719), "tst:TRICE32_4 %x %x %x %x\n", -111, -222, -333, -444); - TRICE32_4(Id(14720), "tst:TRICE32_4 %d %d %d %d\n", -111, -222, -333, -444); + TRICE32_1(Id(0), "tst:TRICE32_1 %08x\n", 0x0123cafe); + TRICE32_1(Id(0), "tst:TRICE32_1 %d\n", -111); + TRICE32_2(Id(0), "tst:TRICE32_2 %x %x\n", -111, -222); + TRICE32_2(Id(0), "tst:TRICE32_2 %d %d\n", -111, -222); + TRICE32_3(Id(0), "tst:TRICE32_3 %x %x %x\n", -111, -222, -333); + TRICE32_3(Id(0), "tst:TRICE32_3 %d %d %d\n", -111, -222, -333); + TRICE32_4(Id(0), "tst:TRICE32_4 %x %x %x %x\n", -111, -222, -333, -444); + TRICE32_4(Id(0), "tst:TRICE32_4 %d %d %d %d\n", -111, -222, -333, -444); } break; case __LINE__: { - TRICE64_1(Id(14721), "tst:TRICE64_1 %d\n", -111); - TRICE64_2(Id(14722), "tst:TRICE64_2 %d %d\n", -111, -222); - TRICE16_1(Id(14723), "tst:TRICE16_1 %u\n", 60001); - TRICE16_2(Id(14724), "tst:TRICE16_2 %u %u\n", 60001, 60002); - TRICE16_3(Id(14725), "tst:TRICE16_3 %u %u %u\n", 60001, 60002, 60003); - TRICE16_4(Id(14726), "tst:TRICE16_4 %u %u %u %u\n", 60001, 60002, 60003, 60004); + TRICE64_1(Id(0), "tst:TRICE64_1 %d\n", -111); + TRICE64_2(Id(0), "tst:TRICE64_2 %d %d\n", -111, -222); + TRICE16_1(Id(0), "tst:TRICE16_1 %u\n", 60001); + TRICE16_2(Id(0), "tst:TRICE16_2 %u %u\n", 60001, 60002); + TRICE16_3(Id(0), "tst:TRICE16_3 %u %u %u\n", 60001, 60002, 60003); + TRICE16_4(Id(0), "tst:TRICE16_4 %u %u %u %u\n", 60001, 60002, 60003, 60004); } break; case __LINE__: { - TRICE32_1(Id(14727), "tst:TRICE32_1 %u\n", 4000000001); - TRICE32_2(Id(14728), "tst:TRICE32_2 %u %u\n", 4000000001, 4000000002); - TRICE32_3(Id(14729), "tst:TRICE32_3 %u %u %u\n", 4000000001, 4000000002, 4000000003); - TRICE32_4(Id(14730), "tst:TRICE32_4 %u %u %u %u\n", 4000000001, 4000000002, 4000000003, 4000000004); + TRICE32_1(Id(0), "tst:TRICE32_1 %u\n", 4000000001); + TRICE32_2(Id(0), "tst:TRICE32_2 %u %u\n", 4000000001, 4000000002); + TRICE32_3(Id(0), "tst:TRICE32_3 %u %u %u\n", 4000000001, 4000000002, 4000000003); + TRICE32_4(Id(0), "tst:TRICE32_4 %u %u %u %u\n", 4000000001, 4000000002, 4000000003, 4000000004); } break; case __LINE__: { - TRICE64_1(Id(14731), "tst:TRICE64_1 %x\n", -1); - TRICE64_2(Id(14732), "tst:TRICE64_2 %x %x\n", -1, -2); - TRICE64_1(Id(14733), "tst:TRICE64_1 %u\n", -1); - TRICE64_2(Id(14734), "tst:TRICE64_2 %u %u\n", -1, -2); + TRICE64_1(Id(0), "tst:TRICE64_1 %x\n", -1); + TRICE64_2(Id(0), "tst:TRICE64_2 %x %x\n", -1, -2); + TRICE64_1(Id(0), "tst:TRICE64_1 %u\n", -1); + TRICE64_2(Id(0), "tst:TRICE64_2 %u %u\n", -1, -2); } #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(14735), "sig:colored single letters and several TRICE macros in one line\n" ); + break; case __LINE__: trice("sig:colored single letters and several TRICE macros in one line\n" ); break; case __LINE__: { - trice(iD(14736), "e:A"); - trice(iD(14737), "w:B"); - trice(iD(14738), "a:c"); - trice(iD(14739), "wr:d"); - trice(iD(14740), "rd:e\n"); - trice(iD(14741), "diag:f"); - trice(iD(14742), "d:G"); - trice(iD(14743), "t:H"); - trice(iD(14744), "time:i"); - trice(iD(14745), "message:J"); - trice(iD(14746), "dbg:k\n"); - trice(iD(14747), "1"); - trice(iD(14748), "2"); - trice(iD(14749), "3"); - trice(iD(14750), "4"); - trice(iD(14751), "e:7"); - trice(iD(14752), "m:12"); - trice(iD(14753), "m:123\n"); - trice(iD(14754), "e:A"); trice(iD(14755), "w:B"); trice(iD(14756), "a:c"); - trice(iD(14757), "wr:d"); trice(iD(14758), "rd:e\n"); trice(iD(14759), "diag:f"); + trice("e:A"); + trice("w:B"); + trice("a:c"); + trice("wr:d"); + trice("rd:e\n"); + trice("diag:f"); + trice("d:G"); + trice("t:H"); + trice("time:i"); + trice("message:J"); + trice("dbg:k\n"); + trice("1"); + trice("2"); + trice("3"); + trice("4"); + trice("e:7"); + trice("m:12"); + trice("m:123\n"); + trice("e:A"); trice("w:B"); trice("a:c"); + trice("wr:d"); trice("rd:e\n"); trice("diag:f"); } #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(14760), "sig:TRICE8 with variable param count 1 to 12\n" ); + break; case __LINE__: trice("sig:TRICE8 with variable param count 1 to 12\n" ); break; case __LINE__: { - TRICE8(Id(14761), "tst:TRICE8 %d\n", -1 ); - TRICE8(Id(14762), "tst:TRICE8 %d %d\n", -1, -2 ); - TRICE8(Id(14763), "tst:TRICE8 %d %d %d\n", -1, -2, -3 ); - TRICE8(Id(14764), "tst:TRICE8 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE8(Id(14765), "tst:TRICE8 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE8(Id(14766), "tst:TRICE8 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE8(Id(14767), "tst:TRICE8 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE8(Id(14768), "tst:TRICE8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE8(Id(14769), "tst:TRICE8 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE8(Id(14770), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE8(Id(14771), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE8(Id(14772), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE8(Id(14773), "tst:TRICE8 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); + TRICE8(Id(0), "tst:TRICE8 %d\n", -1 ); + TRICE8(Id(0), "tst:TRICE8 %d %d\n", -1, -2 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d\n", -1, -2, -3 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE8(Id(0), "tst:TRICE8 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE8(Id(0), "tst:TRICE8 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); } break; case __LINE__: { - TRICE8_1 (Id(14774), "tst:TRICE8_1 %d\n", -1 ); - TRICE8_2 (Id(14775), "tst:TRICE8_2 %d %d\n", -1, -2 ); - TRICE8_3 (Id(14776), "tst:TRICE8_3 %d %d %d\n", -1, -2, -3 ); - TRICE8_4 (Id(14777), "tst:TRICE8_4 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE8_5 (Id(14778), "tst:TRICE8_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE8_6 (Id(14779), "tst:TRICE8_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE8_7 (Id(14780), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE8_8 (Id(14781), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE8_9 (Id(14782), "tst:TRICE8_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE8_10(Id(14783), "tst:TRICE8_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE8_11(Id(14784), "tst:TRICE8_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE8_12(Id(14785), "tst:TRICE8_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE8 (Id(14786), "tst:TRICE8 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); - TRICE8_9 (Id(14787), "tst:TRICE8_9 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); + TRICE8_1 (Id(0), "tst:TRICE8_1 %d\n", -1 ); + TRICE8_2 (Id(0), "tst:TRICE8_2 %d %d\n", -1, -2 ); + TRICE8_3 (Id(0), "tst:TRICE8_3 %d %d %d\n", -1, -2, -3 ); + TRICE8_4 (Id(0), "tst:TRICE8_4 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE8_5 (Id(0), "tst:TRICE8_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE8_6 (Id(0), "tst:TRICE8_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE8_7 (Id(0), "tst:TRICE8_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE8_8 (Id(0), "tst:TRICE8_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE8_9 (Id(0), "tst:TRICE8_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE8_10(Id(0), "tst:TRICE8_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE8_11(Id(0), "tst:TRICE8_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE8_12(Id(0), "tst:TRICE8_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE8 (Id(0), "tst:TRICE8 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); + TRICE8_9 (Id(0), "tst:TRICE8_9 %t %b %x %X %d %u %o %O %p\n", -3, -3, -3, -3, -3, -3, -3, -3, -3 ); } - break; case __LINE__: trice(iD(14788), "sig:TRICE16 with variable param count 1 to 12\n" ); + break; case __LINE__: trice("sig:TRICE16 with variable param count 1 to 12\n" ); break; case __LINE__: { - TRICE16(Id(14789), "tst:TRICE16 %d\n", -1 ); - TRICE16(Id(14790), "tst:TRICE16 %d %d\n", -1, -2 ); - TRICE16(Id(14791), "tst:TRICE16 %d %d %d\n", -1, -2, -3 ); - TRICE16(Id(14792), "tst:TRICE16 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE16(Id(14793), "tst:TRICE16 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE16(Id(14794), "tst:TRICE16 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE16(Id(14795), "tst:TRICE16 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE16(Id(14796), "tst:TRICE16 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE16(Id(14797), "tst:TRICE16 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE16(Id(14798), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE16(Id(14799), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE16(Id(14800), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE16(Id(14801), "tst:TRICE16 %t %b %x %X %d %u %o %O %p\n", 3, 3, 3, 3, 3, 3, 3, 3, 3 ); + TRICE16(Id(0), "tst:TRICE16 %d\n", -1 ); + TRICE16(Id(0), "tst:TRICE16 %d %d\n", -1, -2 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d\n", -1, -2, -3 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE16(Id(0), "tst:TRICE16 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE16(Id(0), "tst:TRICE16 %t %b %x %X %d %u %o %O %p\n", 3, 3, 3, 3, 3, 3, 3, 3, 3 ); } break; case __LINE__: { - TRICE16_1 (ID(14802), "tst:TRICE16_1 %d\n", -1 ); - TRICE16_2 (ID(14803), "tst:TRICE16_2 %d %d\n", -1, -2 ); - TRICE16_3 (ID(14804), "tst:TRICE16_3 %d %d %d\n", -1, -2, -3 ); - TRICE16_4 (ID(14805), "tst:TRICE16_4 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE16_5 (ID(14806), "tst:TRICE16_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE16_6 (ID(14807), "tst:TRICE16_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE16_7 (ID(14808), "tst:TRICE16_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE16_8 (ID(14809), "tst:TRICE16_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE16_9 (ID(14810), "tst:TRICE16_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE16_10(ID(14811), "tst:TRICE16_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE16_11(ID(14812), "tst:TRICE16_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE16_12(ID(14813), "tst:TRICE16_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE16_9 (ID(14814), "tst:TRICE16 %t %b %x %X %d %u %o %O %p\n", 3, 3, 3, 3, 3, 3, 3, 3, 3 ); + TRICE16_1 (ID(0), "tst:TRICE16_1 %d\n", -1 ); + TRICE16_2 (ID(0), "tst:TRICE16_2 %d %d\n", -1, -2 ); + TRICE16_3 (ID(0), "tst:TRICE16_3 %d %d %d\n", -1, -2, -3 ); + TRICE16_4 (ID(0), "tst:TRICE16_4 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE16_5 (ID(0), "tst:TRICE16_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE16_6 (ID(0), "tst:TRICE16_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE16_7 (ID(0), "tst:TRICE16_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE16_8 (ID(0), "tst:TRICE16_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE16_9 (ID(0), "tst:TRICE16_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE16_10(ID(0), "tst:TRICE16_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE16_11(ID(0), "tst:TRICE16_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE16_12(ID(0), "tst:TRICE16_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE16_9 (ID(0), "tst:TRICE16 %t %b %x %X %d %u %o %O %p\n", 3, 3, 3, 3, 3, 3, 3, 3, 3 ); } - break; case __LINE__: trice(iD(14815), "sig:TRICE32 with variable param count 1 to 12\n" ); + break; case __LINE__: trice("sig:TRICE32 with variable param count 1 to 12\n" ); break; case __LINE__: { - TRICE32(Id(14816), "tst:TRICE32 %d\n", -1 ); - TRICE32(Id(14817), "tst:TRICE32 %d %d\n", -1, -2 ); - TRICE32(Id(14818), "tst:TRICE32 %d %d %d\n", -1, -2, -3 ); - TRICE32(Id(14819), "tst:TRICE32 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE32(Id(14820), "tst:TRICE32 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE32(Id(14821), "tst:TRICE32 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE32(Id(14822), "tst:TRICE32 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE32(Id(14823), "tst:TRICE32 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE32(Id(14824), "tst:TRICE32 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE32(Id(14825), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE32(Id(14826), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE32(Id(14827), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE32(Id(14828), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); + TRICE32(Id(0), "tst:TRICE32 %d\n", -1 ); + TRICE32(Id(0), "tst:TRICE32 %d %d\n", -1, -2 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d\n", -1, -2, -3 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE32(Id(0), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); } break; case __LINE__: { - TRICE32_1 (Id(14829), "tst:TRICE32_1 %d\n", -1 ); - TRICE32_2 (Id(14830), "tst:TRICE32_2 %d %d\n", -1, -2 ); - TRICE32_3 (Id(14831), "tst:TRICE32_3 %d %d %d\n", -1, -2, -3 ); - TRICE32_4 (Id(14832), "tst:TRICE32_4 %d %d %d %d\n", -1, -2, -3, -4 ); - TRICE32_5 (Id(14833), "tst:TRICE32_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - TRICE32_6 (Id(14834), "tst:TRICE32_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - TRICE32_7 (Id(14835), "tst:TRICE32_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - TRICE32_8 (Id(14836), "tst:TRICE32_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - TRICE32_9 (Id(14837), "tst:TRICE32_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - TRICE32_10(Id(14838), "tst:TRICE32_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - TRICE32_11(Id(14839), "tst:TRICE32_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - TRICE32_12(Id(14840), "tst:TRICE32_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE32 (Id(14841), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); - TRICE32_12(Id(14842), "tst:TRICE32_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); + TRICE32_1 (Id(0), "tst:TRICE32_1 %d\n", -1 ); + TRICE32_2 (Id(0), "tst:TRICE32_2 %d %d\n", -1, -2 ); + TRICE32_3 (Id(0), "tst:TRICE32_3 %d %d %d\n", -1, -2, -3 ); + TRICE32_4 (Id(0), "tst:TRICE32_4 %d %d %d %d\n", -1, -2, -3, -4 ); + TRICE32_5 (Id(0), "tst:TRICE32_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + TRICE32_6 (Id(0), "tst:TRICE32_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + TRICE32_7 (Id(0), "tst:TRICE32_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + TRICE32_8 (Id(0), "tst:TRICE32_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + TRICE32_9 (Id(0), "tst:TRICE32_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + TRICE32_10(Id(0), "tst:TRICE32_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + TRICE32_11(Id(0), "tst:TRICE32_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + TRICE32_12(Id(0), "tst:TRICE32_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + TRICE32 (Id(0), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); + TRICE32_12(Id(0), "tst:TRICE32_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); } - break; case __LINE__: trice(iD(14843), "sig:TRICE64 with variable param count 1 to 12\n" ); - break; case __LINE__: TRICE64(ID(14844), "tst:TRICE64 %d\n", -1 ); - break; case __LINE__: TRICE64(ID(14845), "tst:TRICE64 %d %d\n", -1, -2 ); - break; case __LINE__: TRICE64(ID(14846), "tst:TRICE64 %d %d %d\n", -1, -2, -3 ); - break; case __LINE__: TRICE64(ID(14847), "tst:TRICE64 %d %d %d %d\n", -1, -2, -3, -4 ); - break; case __LINE__: TRICE64(ID(14848), "tst:TRICE64 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - break; case __LINE__: TRICE64(ID(14849), "tst:TRICE64 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - break; case __LINE__: TRICE64(ID(14850), "tst:TRICE64 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - break; case __LINE__: TRICE64(ID(14851), "tst:TRICE64 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - break; case __LINE__: TRICE64(ID(14852), "tst:TRICE64 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - break; case __LINE__: TRICE64(ID(14853), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - break; case __LINE__: TRICE64(ID(14854), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - break; case __LINE__: TRICE64(ID(14855), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - break; case __LINE__: TRICE64(ID(14856), "tst:TRICE64 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aDouble(3.14159), aDouble(3.14159), aDouble(3.14159)); - break; case __LINE__: TRICE64_1 (ID(14857), "tst:TRICE64_1 %d\n", -1 ); - break; case __LINE__: TRICE64_2 (ID(14858), "tst:TRICE64_2 %d %d\n", -1, -2 ); - break; case __LINE__: TRICE64_3 (ID(14859), "tst:TRICE64_3 %d %d %d\n", -1, -2, -3 ); - break; case __LINE__: TRICE64_4 (ID(14860), "tst:TRICE64_4 %d %d %d %d\n", -1, -2, -3, -4 ); - break; case __LINE__: TRICE64_5 (ID(14861), "tst:TRICE64_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); - break; case __LINE__: TRICE64_6 (ID(14862), "tst:TRICE64_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); - break; case __LINE__: TRICE64_7 (ID(14863), "tst:TRICE64_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); - break; case __LINE__: TRICE64_8 (ID(14864), "tst:TRICE64_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - break; case __LINE__: TRICE64_9 (ID(14865), "tst:TRICE64_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - break; case __LINE__: TRICE64_10(ID(14866), "tst:TRICE64_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); - break; case __LINE__: TRICE64_11(ID(14867), "tst:TRICE64_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - break; case __LINE__: TRICE64_12(ID(14868), "tst:TRICE64_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - break; case __LINE__: TRICE64_12(ID(14869), "tst:TRICE64_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aDouble(3.14159), aDouble(3.14159), aDouble(3.14159)); + break; case __LINE__: trice("sig:TRICE64 with variable param count 1 to 12\n" ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d\n", -1 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d\n", -1, -2 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d\n", -1, -2, -3 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d\n", -1, -2, -3, -4 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aDouble(3.14159), aDouble(3.14159), aDouble(3.14159)); + break; case __LINE__: TRICE64_1 (ID(0), "tst:TRICE64_1 %d\n", -1 ); + break; case __LINE__: TRICE64_2 (ID(0), "tst:TRICE64_2 %d %d\n", -1, -2 ); + break; case __LINE__: TRICE64_3 (ID(0), "tst:TRICE64_3 %d %d %d\n", -1, -2, -3 ); + break; case __LINE__: TRICE64_4 (ID(0), "tst:TRICE64_4 %d %d %d %d\n", -1, -2, -3, -4 ); + break; case __LINE__: TRICE64_5 (ID(0), "tst:TRICE64_5 %d %d %d %d %d\n", -1, -2, -3, -4, -5 ); + break; case __LINE__: TRICE64_6 (ID(0), "tst:TRICE64_6 %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6 ); + break; case __LINE__: TRICE64_7 (ID(0), "tst:TRICE64_7 %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7 ); + break; case __LINE__: TRICE64_8 (ID(0), "tst:TRICE64_8 %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + break; case __LINE__: TRICE64_9 (ID(0), "tst:TRICE64_9 %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + break; case __LINE__: TRICE64_10(ID(0), "tst:TRICE64_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); + break; case __LINE__: TRICE64_11(ID(0), "tst:TRICE64_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + break; case __LINE__: TRICE64_12(ID(0), "tst:TRICE64_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + break; case __LINE__: TRICE64_12(ID(0), "tst:TRICE64_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aDouble(3.14159), aDouble(3.14159), aDouble(3.14159)); #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(14870), "att:positive and negative float in format variants\n"); + break; case __LINE__: trice("att:positive and negative float in format variants\n"); break; case __LINE__: { - trice(iD(14871), "rd:TRICE float %f (%%f)\n", aFloat(x) ); - trice(iD(14872), "rd:TRICE float %9f (%%9f)\n", aFloat(x) ); - trice(iD(14873), "rd:TRICE float %.9f (%%.9f)\n", aFloat(x) ); - trice(iD(14874), "rd:TRICE float %9.f (%%9.f)\n", aFloat(x) ); - trice(iD(14875), "rd:TRICE float %9.6f (%%9.6f)\n", aFloat(x) ); - trice(iD(14876), "rd:TRICE float %f (%%f)\n", aFloat(-x) ); - trice(iD(14877), "rd:TRICE float %9f (%%9f)\n", aFloat(-x) ); - trice(iD(14878), "rd:TRICE float %.9f (%%.9f)\n", aFloat(-x) ); - trice(iD(14879), "rd:TRICE float %9.f (%%9.f)\n", aFloat(-x) ); - trice(iD(14880), "rd:TRICE float %9.6f (%%9.6f)\n", aFloat(-x) ); - trice(iD(14881), "rd:TRICE float %+f (%%f)\n", aFloat(x) ); - trice(iD(14882), "rd:TRICE float %+9f (%%9f)\n", aFloat(x) ); - trice(iD(14883), "rd:TRICE float %+.9f (%%.9f)\n", aFloat(x) ); - trice(iD(14884), "rd:TRICE float %+9.f (%%9.f)\n", aFloat(x) ); - trice(iD(14885), "rd:TRICE float %+9.6f (%%9.6f)\n", aFloat(x) ); - trice(iD(14886), "rd:TRICE float %+f (%%f)\n", aFloat(-x) ); - trice(iD(14887), "rd:TRICE float %+9f (%%9f)\n", aFloat(-x) ); - trice(iD(14888), "rd:TRICE float %+.9f (%%.9f)\n", aFloat(-x) ); - trice(iD(14889), "rd:TRICE float %+9.f (%%9.f)\n", aFloat(-x) ); - trice(iD(14890), "rd:TRICE float %+9.6f (%%9.6f)\n", aFloat(-x) ); - trice(iD(14891), "rd:TRICE float %-f (%%f)\n", aFloat(x) ); - trice(iD(14892), "rd:TRICE float %-9f (%%9f)\n", aFloat(x) ); - trice(iD(14893), "rd:TRICE float %-.9f (%%.9f)\n", aFloat(x) ); - trice(iD(14894), "rd:TRICE float %-9.f (%%9.f)\n", aFloat(x) ); - trice(iD(14895), "rd:TRICE float %-9.6f (%%9.6f)\n", aFloat(x) ); - trice(iD(14896), "rd:TRICE float %-f (%%f)\n", aFloat(-x) ); - trice(iD(14897), "rd:TRICE float %-9f (%%9f)\n", aFloat(-x) ); - trice(iD(14898), "rd:TRICE float %-.9f (%%.9f)\n", aFloat(-x) ); - trice(iD(14899), "rd:TRICE float %-9.f (%%9.f)\n", aFloat(-x) ); - trice(iD(14900), "rd:TRICE float %-9.6f (%%9.6f)\n", aFloat(-x) ); + trice("rd:TRICE float %f (%%f)\n", aFloat(x) ); + trice("rd:TRICE float %9f (%%9f)\n", aFloat(x) ); + trice("rd:TRICE float %.9f (%%.9f)\n", aFloat(x) ); + trice("rd:TRICE float %9.f (%%9.f)\n", aFloat(x) ); + trice("rd:TRICE float %9.6f (%%9.6f)\n", aFloat(x) ); + trice("rd:TRICE float %f (%%f)\n", aFloat(-x) ); + trice("rd:TRICE float %9f (%%9f)\n", aFloat(-x) ); + trice("rd:TRICE float %.9f (%%.9f)\n", aFloat(-x) ); + trice("rd:TRICE float %9.f (%%9.f)\n", aFloat(-x) ); + trice("rd:TRICE float %9.6f (%%9.6f)\n", aFloat(-x) ); + trice("rd:TRICE float %+f (%%f)\n", aFloat(x) ); + trice("rd:TRICE float %+9f (%%9f)\n", aFloat(x) ); + trice("rd:TRICE float %+.9f (%%.9f)\n", aFloat(x) ); + trice("rd:TRICE float %+9.f (%%9.f)\n", aFloat(x) ); + trice("rd:TRICE float %+9.6f (%%9.6f)\n", aFloat(x) ); + trice("rd:TRICE float %+f (%%f)\n", aFloat(-x) ); + trice("rd:TRICE float %+9f (%%9f)\n", aFloat(-x) ); + trice("rd:TRICE float %+.9f (%%.9f)\n", aFloat(-x) ); + trice("rd:TRICE float %+9.f (%%9.f)\n", aFloat(-x) ); + trice("rd:TRICE float %+9.6f (%%9.6f)\n", aFloat(-x) ); + trice("rd:TRICE float %-f (%%f)\n", aFloat(x) ); + trice("rd:TRICE float %-9f (%%9f)\n", aFloat(x) ); + trice("rd:TRICE float %-.9f (%%.9f)\n", aFloat(x) ); + trice("rd:TRICE float %-9.f (%%9.f)\n", aFloat(x) ); + trice("rd:TRICE float %-9.6f (%%9.6f)\n", aFloat(x) ); + trice("rd:TRICE float %-f (%%f)\n", aFloat(-x) ); + trice("rd:TRICE float %-9f (%%9f)\n", aFloat(-x) ); + trice("rd:TRICE float %-.9f (%%.9f)\n", aFloat(-x) ); + trice("rd:TRICE float %-9.f (%%9.f)\n", aFloat(-x) ); + trice("rd:TRICE float %-9.6f (%%9.6f)\n", aFloat(-x) ); } #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice(iD(14901), "att:positive float & double in variants\n"); - break; case __LINE__: TRICE32_1(ID(14902), "rd:TRICE32_1 float %e (%%e)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(14903), "rd:TRICE32_1 float %f (%%f)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(14904), "rd:TRICE32_1 float %g (%%g)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(14905), "rd:TRICE32_1 float %E (%%E)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(14906), "rd:TRICE32_1 float %F (%%F)\n", aFloat(x) ); - break; case __LINE__: TRICE32_1(ID(14907), "rd:TRICE32_1 float %G (%%G)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(14908), "rd:TRICE32 float %e (%%e)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(14909), "rd:TRICE32 float %f (%%f)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(14910), "rd:TRICE32 float %g (%%g)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(14911), "rd:TRICE32 float %E (%%E)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(14912), "rd:TRICE32 float %F (%%F)\n", aFloat(x) ); - break; case __LINE__: TRICE32 (ID(14913), "rd:TRICE32 float %G (%%G)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(14914), "rd:TRICE float %e (%%e)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(14915), "rd:TRICE float %f (%%f)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(14916), "rd:TRICE float %g (%%g)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(14917), "rd:TRICE float %E (%%E)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(14918), "rd:TRICE float %F (%%F)\n", aFloat(x) ); - break; case __LINE__: TRICE (ID(14919), "rd:TRICE float %G (%%G)\n", aFloat(x) ); - break; case __LINE__: TRICE64 (ID(14920), "rd:TRICE64 double %e (%%e), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(14921), "rd:TRICE64 double %f (%%f), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(14922), "rd:TRICE64 double %g (%%g), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(14923), "rd:TRICE64 double %E (%%E), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(14924), "rd:TRICE64 double %F (%%F), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64 (ID(14925), "rd:TRICE64 double %G (%%G), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(14926), "rd:TRICE64_1 double %e (%%e), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(14927), "rd:TRICE64_1 double %f (%%f), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(14928), "rd:TRICE64_1 double %g (%%g), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(14929), "rd:TRICE64_1 double %E (%%E), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(14930), "rd:TRICE64_1 double %F (%%F), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: TRICE64_1(ID(14931), "rd:TRICE64_1 double %G (%%G), aDouble(y)\n", aDouble(y) ); - break; case __LINE__: trice(iD(14932), "att:negative float & double\n" ); - break; case __LINE__: trice(iD(14933), "rd:TRICE float %e (%%e)\n", aFloat(-x) ); - break; case __LINE__: trice(iD(14934), "rd:TRICE float %f (%%f)\n", aFloat(-x) ); - break; case __LINE__: trice(iD(14935), "rd:TRICE float %g (%%g)\n", aFloat(-x) ); - break; case __LINE__: trice(iD(14936), "rd:TRICE float %E (%%E)\n", aFloat(-x) ); - break; case __LINE__: trice(iD(14937), "rd:TRICE float %F (%%F)\n", aFloat(-x) ); - break; case __LINE__: trice(iD(14938), "rd:TRICE float %G (%%G)\n", aFloat(-x) ); - break; case __LINE__: TRICE64(ID(14939), "rd:TRICE64 double %e (%%e), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(14940), "rd:TRICE64 double %f (%%f), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(14941), "rd:TRICE64 double %g (%%g), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(14942), "rd:TRICE64 double %E (%%E), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(14943), "rd:TRICE64 double %F (%%F), aDouble(y)\n", aDouble(-y) ); - break; case __LINE__: TRICE64(ID(14944), "rd:TRICE64 double %G (%%G), aDouble(y)\n", aDouble(-y) ); - - break; case __LINE__: TRICE (ID(15511), "att:formatted float\n" ); + break; case __LINE__: trice("att:positive float & double in variants\n"); + break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %e (%%e)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %f (%%f)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %g (%%g)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %E (%%E)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %F (%%F)\n", aFloat(x) ); + break; case __LINE__: TRICE32_1(ID(0), "rd:TRICE32_1 float %G (%%G)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %e (%%e)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %f (%%f)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %g (%%g)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %E (%%E)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %F (%%F)\n", aFloat(x) ); + break; case __LINE__: TRICE32 (ID(0), "rd:TRICE32 float %G (%%G)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(0), "rd:TRICE float %e (%%e)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(0), "rd:TRICE float %f (%%f)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(0), "rd:TRICE float %g (%%g)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(0), "rd:TRICE float %E (%%E)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(0), "rd:TRICE float %F (%%F)\n", aFloat(x) ); + break; case __LINE__: TRICE (ID(0), "rd:TRICE float %G (%%G)\n", aFloat(x) ); + break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %e (%%e), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %f (%%f), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %g (%%g), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %E (%%E), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %F (%%F), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64 (ID(0), "rd:TRICE64 double %G (%%G), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %e (%%e), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %f (%%f), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %g (%%g), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %E (%%E), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %F (%%F), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: TRICE64_1(ID(0), "rd:TRICE64_1 double %G (%%G), aDouble(y)\n", aDouble(y) ); + break; case __LINE__: trice("att:negative float & double\n" ); + break; case __LINE__: trice("rd:TRICE float %e (%%e)\n", aFloat(-x) ); + break; case __LINE__: trice("rd:TRICE float %f (%%f)\n", aFloat(-x) ); + break; case __LINE__: trice("rd:TRICE float %g (%%g)\n", aFloat(-x) ); + break; case __LINE__: trice("rd:TRICE float %E (%%E)\n", aFloat(-x) ); + break; case __LINE__: trice("rd:TRICE float %F (%%F)\n", aFloat(-x) ); + break; case __LINE__: trice("rd:TRICE float %G (%%G)\n", aFloat(-x) ); + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %e (%%e), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %f (%%f), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %g (%%g), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %E (%%E), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %F (%%F), aDouble(y)\n", aDouble(-y) ); + break; case __LINE__: TRICE64(ID(0), "rd:TRICE64 double %G (%%G), aDouble(y)\n", aDouble(-y) ); + + break; case __LINE__: TRICE (ID(0), "att:formatted float\n" ); break; case __LINE__: { - TRICE32(Id(14946), "rd:TRICE32 float %12.6e (%%12.6e)\n", aFloat(x) ); - TRICE32(Id(14947), "rd:TRICE32 float %12.6f (%%12.6f)\n", aFloat(x) ); - TRICE32(Id(14948), "rd:TRICE32 float %12.6g (%%12.6g)\n", aFloat(x) ); - TRICE32(Id(14949), "rd:TRICE32 float %12.6E (%%12.6E)\n", aFloat(x) ); - TRICE32(Id(14950), "rd:TRICE32 float %12.6F (%%12.6F)\n", aFloat(x) ); - TRICE32(Id(14951), "rd:TRICE32 float %12.6G (%%12.6G)\n", aFloat(x) ); + TRICE32(Id(0), "rd:TRICE32 float %12.6e (%%12.6e)\n", aFloat(x) ); + TRICE32(Id(0), "rd:TRICE32 float %12.6f (%%12.6f)\n", aFloat(x) ); + TRICE32(Id(0), "rd:TRICE32 float %12.6g (%%12.6g)\n", aFloat(x) ); + TRICE32(Id(0), "rd:TRICE32 float %12.6E (%%12.6E)\n", aFloat(x) ); + TRICE32(Id(0), "rd:TRICE32 float %12.6F (%%12.6F)\n", aFloat(x) ); + TRICE32(Id(0), "rd:TRICE32 float %12.6G (%%12.6G)\n", aFloat(x) ); } - break; case __LINE__: TRICE (ID(16161), "att:formatted double\n" ); + break; case __LINE__: TRICE (ID(0), "att:formatted double\n" ); break; case __LINE__: { - TRICE64(Id(14952), "rd:TRICE64 double %12.6e (%%12.6e), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(14953), "rd:TRICE64 double %12.6f (%%12.6f), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(14954), "rd:TRICE64 double %12.6g (%%12.6g), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(14955), "rd:TRICE64 double %12.6E (%%12.6E), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(14956), "rd:TRICE64 double %12.6F (%%12.6F), aDouble(y)\n", aDouble(y) ); - TRICE64(Id(14957), "rd:TRICE64 double %12.6G (%%12.6G), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(0), "rd:TRICE64 double %12.6e (%%12.6e), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(0), "rd:TRICE64 double %12.6f (%%12.6f), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(0), "rd:TRICE64 double %12.6g (%%12.6g), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(0), "rd:TRICE64 double %12.6E (%%12.6E), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(0), "rd:TRICE64 double %12.6F (%%12.6F), aDouble(y)\n", aDouble(y) ); + TRICE64(Id(0), "rd:TRICE64 double %12.6G (%%12.6G), aDouble(y)\n", aDouble(y) ); } - break; case __LINE__: TRICE (ID(14958), "att:Various single arguments\n" ); + break; case __LINE__: TRICE (ID(0), "att:Various single arguments\n" ); break; case __LINE__: { - TRICE8(Id(14959), "rd:TRICE8 line %t (%%t ,0)\n", 0 ); - TRICE8(Id(14960), "rd:TRICE8 line %t (%%t ,2)\n", 2 ); - TRICE8(Id(14961), "rd:TRICE8 line %u (%%u ,-1)\n", -1 ); - TRICE8(Id(14962), "rd:TRICE8 line %b (%%b ,-1)\n", -1 ); - TRICE8(Id(14963), "rd:TRICE8 line %o (%%o ,-1)\n", -1 ); - TRICE8(Id(14964), "rd:TRICE8 line %O (%%O ,-1)\n", -1 ); - TRICE8(Id(14965), "rd:TRICE8 line %X (%%X ,-1)\n", -1 ); - TRICE8(Id(14966), "rd:TRICE8 line %x (%%x ,-1)\n", -1 ); - TRICE8(Id(14967), "rd:TRICE8 line %d (%%d ,-1)\n", -1 ); + TRICE8(Id(0), "rd:TRICE8 line %t (%%t ,0)\n", 0 ); + TRICE8(Id(0), "rd:TRICE8 line %t (%%t ,2)\n", 2 ); + TRICE8(Id(0), "rd:TRICE8 line %u (%%u ,-1)\n", -1 ); + TRICE8(Id(0), "rd:TRICE8 line %b (%%b ,-1)\n", -1 ); + TRICE8(Id(0), "rd:TRICE8 line %o (%%o ,-1)\n", -1 ); + TRICE8(Id(0), "rd:TRICE8 line %O (%%O ,-1)\n", -1 ); + TRICE8(Id(0), "rd:TRICE8 line %X (%%X ,-1)\n", -1 ); + TRICE8(Id(0), "rd:TRICE8 line %x (%%x ,-1)\n", -1 ); + TRICE8(Id(0), "rd:TRICE8 line %d (%%d ,-1)\n", -1 ); } break; case __LINE__: { - TRICE16_1(Id(14968), "rd:TRICE16_1 line %t (%%t ,0)\n", 0 ); - TRICE16_1(Id(14969), "rd:TRICE16_1 line %t (%%t ,2)\n", 2 ); - TRICE16_1(Id(14970), "rd:TRICE16_1 line %u (%%u -1)\n", -1 ); - TRICE16_1(Id(14971), "rd:TRICE16_1 line %b (%%b -1)\n", -1 ); - TRICE16_1(Id(14972), "rd:TRICE16_1 line %o (%%o -1)\n", -1 ); - TRICE16_1(Id(14973), "rd:TRICE16_1 line %x (%%x -1)\n", -1 ); - TRICE16_1(Id(14974), "rd:TRICE16_1 line %d (%%d -1)\n", -1 ); - Trice(iD(15805), "rd:Trice line %t (%%t -1)\n", 0 ); - Trice(iD(15491), "rd:Trice line %t (%%t -1)\n", 2 ); - Trice(iD(15971), "rd:Trice line %u (%%u)\n", -1 ); - Trice(iD(16018), "rd:Trice line %b (%%b)\n", -2 ); - Trice(iD(15858), "rd:Trice line %o (%%o)\n", -3 ); - Trice(iD(15700), "rd:Trice line %x (%%x)\n", -4 ); - Trice(iD(16322), "rd:Trice line %d (%%d)\n", -5 ); + TRICE16_1(Id(0), "rd:TRICE16_1 line %t (%%t ,0)\n", 0 ); + TRICE16_1(Id(0), "rd:TRICE16_1 line %t (%%t ,2)\n", 2 ); + TRICE16_1(Id(0), "rd:TRICE16_1 line %u (%%u -1)\n", -1 ); + TRICE16_1(Id(0), "rd:TRICE16_1 line %b (%%b -1)\n", -1 ); + TRICE16_1(Id(0), "rd:TRICE16_1 line %o (%%o -1)\n", -1 ); + TRICE16_1(Id(0), "rd:TRICE16_1 line %x (%%x -1)\n", -1 ); + TRICE16_1(Id(0), "rd:TRICE16_1 line %d (%%d -1)\n", -1 ); + Trice("rd:Trice line %t (%%t -1)\n", 0 ); + Trice("rd:Trice line %t (%%t -1)\n", 2 ); + Trice("rd:Trice line %u (%%u)\n", -1 ); + Trice("rd:Trice line %b (%%b)\n", -2 ); + Trice("rd:Trice line %o (%%o)\n", -3 ); + Trice("rd:Trice line %x (%%x)\n", -4 ); + Trice("rd:Trice line %d (%%d)\n", -5 ); } - break; case __LINE__: TRICE_N(id(14982), "msg:%s\n", A, 0 ); - break; case __LINE__: TRICE_N(id(14983), "msg:%s\n", A, 1 ); - break; case __LINE__: TRICE_N(id(14984), "msg:%s\n", A, 2 ); - break; case __LINE__: TRICE_N(id(14985), "msg:%s\n", A, 3 ); - break; case __LINE__: TRICE_N(id(14986), "msg:%s\n", A, 4 ); - break; case __LINE__: TRICE_N(id(14987), "msg:%s\n", A, 5 ); - break; case __LINE__: TRICE_N(id(14988), "msg:%s\n", A, 6 ); - break; case __LINE__: TRICE_N(id(14989), "msg:%s\n", A, 7 ); - break; case __LINE__: TRICE_N(id(14990), "msg:%s\n", A, 8 ); - break; case __LINE__: TRICE_N(id(14991), "msg:%s\n", A, 9 ); - break; case __LINE__: TRICE_N(id(14992), "msg:%s\n", A, 10 ); - break; case __LINE__: TRICE_N(id(14993), "msg:%s\n", A, 11 ); - break; case __LINE__: TRICE_N(id(14994), "msg:%s\n", A, 12 ); - break; case __LINE__: TRICE_N(id(14995), "msg:%s\n", A, 13 ); - break; case __LINE__: TRICE_N(id(14996), "msg:%s\n", A, 14 ); - break; case __LINE__: TRICE_N(id(14997), "msg:%s\n", A, 15 ); - break; case __LINE__: TRICE_N(id(14998), "msg:%s\n", A, 16 ); - break; case __LINE__: TRICE_N(id(14999), "msg:%s\n", A, 17 ); - break; case __LINE__: TRICE_N(id(15000), "msg:%s\n", A, 18 ); - break; case __LINE__: TRICE_N(id(15001), "msg:%s\n", A, 19 ); - break; case __LINE__: TRICE_N(id(15002), "msg:%s\n", A, 120 ); - break; case __LINE__: TRICE_N(id(15003), "msg:%s\n", A, 121 ); - break; case __LINE__: TRICE_N(id(15004), "msg:%s\n", A, 122 ); - break; case __LINE__: TRICE_N(id(15005), "msg:%s\n", A, 123 ); - break; case __LINE__: TRICE_N(id(15006), "msg:%s\n", A, 124 ); - break; case __LINE__: TRICE_N(id(15007), "msg:%s\n", A, 125 ); - break; case __LINE__: TRICE_N(id(15008), "msg:%s\n", A, 126 ); - break; case __LINE__: TRICE_N(id(15009), "msg:%s\n", A, 127 ); - break; case __LINE__: TRICE_N(id(15010), "msg:%s\n", A, 128 ); - break; case __LINE__: TRICE_N(id(15011), "msg:%s\n", A, 129 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 0 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 1 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 2 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 3 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 4 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 5 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 6 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 7 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 8 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 9 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 10 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 11 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 12 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 13 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 14 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 15 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 16 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 17 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 18 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 19 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 120 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 121 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 122 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 123 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 124 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 125 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 126 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 127 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 128 ); + break; case __LINE__: TRICE_N(id(0), "msg:%s\n", A, 129 ); #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: triceN(iD(15012), "msg:%s\n", A, 0 ); - break; case __LINE__: triceN(iD(15013), "msg:%s\n", A, 1 ); - break; case __LINE__: triceN(iD(15014), "msg:%s\n", A, 2 ); - break; case __LINE__: triceN(iD(15015), "msg:%s\n", A, 3 ); - break; case __LINE__: triceN(iD(15016), "msg:%s\n", A, 4 ); - break; case __LINE__: triceN(iD(15017), "msg:%s\n", A, 5 ); - break; case __LINE__: triceN(iD(15018), "msg:%s\n", A, 6 ); - break; case __LINE__: triceN(iD(15019), "msg:%s\n", A, 7 ); - break; case __LINE__: triceN(iD(15020), "msg:%s\n", A, 8 ); - break; case __LINE__: triceN(iD(15021), "msg:%s\n", A, 9 ); - break; case __LINE__: triceN(iD(15022), "msg:%s\n", A, 10 ); - break; case __LINE__: triceN(iD(15023), "msg:%s\n", A, 11 ); - break; case __LINE__: triceN(iD(15024), "msg:%s\n", A, 12 ); - break; case __LINE__: triceN(iD(15025), "msg:%s\n", A, 13 ); - break; case __LINE__: triceN(iD(15026), "msg:%s\n", A, 14 ); - break; case __LINE__: triceN(iD(15027), "msg:%s\n", A, 15 ); - break; case __LINE__: triceN(iD(15028), "msg:%s\n", A, 16 ); - break; case __LINE__: triceN(iD(15029), "msg:%s\n", A, 17 ); - break; case __LINE__: triceN(iD(15030), "msg:%s\n", A, 18 ); - break; case __LINE__: triceN(iD(15031), "msg:%s\n", A, 19 ); - break; case __LINE__: triceN(iD(15032), "msg:%s\n", A, 120 ); - break; case __LINE__: triceN(iD(15033), "msg:%s\n", A, 121 ); - break; case __LINE__: triceN(iD(15034), "msg:%s\n", A, 122 ); - break; case __LINE__: triceN(iD(15035), "msg:%s\n", A, 123 ); - break; case __LINE__: triceN(iD(15036), "msg:%s\n", A, 124 ); - break; case __LINE__: triceN(iD(15037), "msg:%s\n", A, 125 ); - break; case __LINE__: triceN(iD(15038), "msg:%s\n", A, 126 ); - break; case __LINE__: triceN(iD(15039), "msg:%s\n", A, 127 ); - break; case __LINE__: triceN(iD(15040), "msg:%s\n", A, 128 ); - break; case __LINE__: triceN(iD(15041), "msg:%s\n", A, 129 ); - - break; case __LINE__: trice(iD(15042), "sig:TRICE with 1 to 12 values\n" ); - break; case __LINE__: trice(iD(15043), "rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 - break; case __LINE__: trice(iD(15044), "rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 - break; case __LINE__: trice(iD(15045), "rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 - break; case __LINE__: trice(iD(15046), "rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 - break; case __LINE__: trice(iD(15047), "rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 - break; case __LINE__: trice(iD(15048), "rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice(iD(15049), "rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice(iD(15050), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice(iD(15051), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice(iD(15052), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice(iD(15053), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice(iD(15054), "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 - - break; case __LINE__: trice(iD(15055), "sig:TRICE_n with 1 to 12 values\n" ); - break; case __LINE__: trice(iD(15056), "rd:TRICE_1 %d\n", -1 ); //exp: time: default: rd:TRICE_1 -1 - break; case __LINE__: trice(iD(15057), "rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE_2 -1, -2 - break; case __LINE__: trice(iD(15058), "rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE_3 -1, -2, -3 - break; case __LINE__: trice(iD(15059), "rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE_4 -1, -2, -3, -4 - break; case __LINE__: trice(iD(15060), "rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE_5 -1, -2, -3, -4, -5 - break; case __LINE__: trice(iD(15061), "rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 - break; case __LINE__: trice(iD(15062), "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 - break; case __LINE__: trice(iD(15063), "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 - break; case __LINE__: trice(iD(15064), "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 - break; case __LINE__: trice(iD(15065), "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 - break; case __LINE__: trice(iD(15066), "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 - break; case __LINE__: trice(iD(15067), "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + break; case __LINE__: triceN("msg:%s\n", A, 0 ); + break; case __LINE__: triceN("msg:%s\n", A, 1 ); + break; case __LINE__: triceN("msg:%s\n", A, 2 ); + break; case __LINE__: triceN("msg:%s\n", A, 3 ); + break; case __LINE__: triceN("msg:%s\n", A, 4 ); + break; case __LINE__: triceN("msg:%s\n", A, 5 ); + break; case __LINE__: triceN("msg:%s\n", A, 6 ); + break; case __LINE__: triceN("msg:%s\n", A, 7 ); + break; case __LINE__: triceN("msg:%s\n", A, 8 ); + break; case __LINE__: triceN("msg:%s\n", A, 9 ); + break; case __LINE__: triceN("msg:%s\n", A, 10 ); + break; case __LINE__: triceN("msg:%s\n", A, 11 ); + break; case __LINE__: triceN("msg:%s\n", A, 12 ); + break; case __LINE__: triceN("msg:%s\n", A, 13 ); + break; case __LINE__: triceN("msg:%s\n", A, 14 ); + break; case __LINE__: triceN("msg:%s\n", A, 15 ); + break; case __LINE__: triceN("msg:%s\n", A, 16 ); + break; case __LINE__: triceN("msg:%s\n", A, 17 ); + break; case __LINE__: triceN("msg:%s\n", A, 18 ); + break; case __LINE__: triceN("msg:%s\n", A, 19 ); + break; case __LINE__: triceN("msg:%s\n", A, 120 ); + break; case __LINE__: triceN("msg:%s\n", A, 121 ); + break; case __LINE__: triceN("msg:%s\n", A, 122 ); + break; case __LINE__: triceN("msg:%s\n", A, 123 ); + break; case __LINE__: triceN("msg:%s\n", A, 124 ); + break; case __LINE__: triceN("msg:%s\n", A, 125 ); + break; case __LINE__: triceN("msg:%s\n", A, 126 ); + break; case __LINE__: triceN("msg:%s\n", A, 127 ); + break; case __LINE__: triceN("msg:%s\n", A, 128 ); + break; case __LINE__: triceN("msg:%s\n", A, 129 ); + + break; case __LINE__: trice("sig:TRICE with 1 to 12 values\n" ); + break; case __LINE__: trice("rd:TRICE %d\n", -1 ); //exp: time: default: rd:TRICE -1 + break; case __LINE__: trice("rd:TRICE %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE -1, -2 + break; case __LINE__: trice("rd:TRICE %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE -1, -2, -3 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE -1, -2, -3, -4 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice("rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 + + break; case __LINE__: trice("sig:TRICE_n with 1 to 12 values\n" ); + break; case __LINE__: trice("rd:TRICE_1 %d\n", -1 ); //exp: time: default: rd:TRICE_1 -1 + break; case __LINE__: trice("rd:TRICE_2 %d, %d\n", -1, -2 ); //exp: time: default: rd:TRICE_2 -1, -2 + break; case __LINE__: trice("rd:TRICE_3 %d, %d, %d\n", -1, -2, -3 ); //exp: time: default: rd:TRICE_3 -1, -2, -3 + break; case __LINE__: trice("rd:TRICE_4 %d, %d, %d, %d\n", -1, -2, -3, -4 ); //exp: time: default: rd:TRICE_4 -1, -2, -3, -4 + break; case __LINE__: trice("rd:TRICE_5 %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5 ); //exp: time: default: rd:TRICE_5 -1, -2, -3, -4, -5 + break; case __LINE__: trice("rd:TRICE_6 %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6 ); //exp: time: default: rd:TRICE_6 -1, -2, -3, -4, -5, -6 + break; case __LINE__: trice("rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7); //exp: time: default: rd:TRICE_7 -1, -2, -3, -4, -5, -6, -7 + break; case __LINE__: trice("rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8 ); //exp: time: default: rd:TRICE_8 -1, -2, -3, -4, -5, -6, -7, -8 + break; case __LINE__: trice("rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); //exp: time: default: rd:TRICE_9 -1, -2, -3, -4, -5, -6, -7, -8, -9 + break; case __LINE__: trice("rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); //exp: time: default: rd:TRICE_10 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 + break; case __LINE__: trice("rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); //exp: time: default: rd:TRICE_11 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 + break; case __LINE__: trice("rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); //exp: time: default: rd:TRICE_12 -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRice(iD(15522), "sig:Trice16 with 1 to 12 pointer\n" ); + break; case __LINE__: TRice("sig:Trice16 with 1 to 12 pointer\n" ); break; case __LINE__: { - Trice16(iD(16271), "rd:Trice16 %p\n", -1 ); - Trice16(iD(15724), "rd:Trice16 %p, %p\n", -1, -2 ); - Trice16(iD(16307), "rd:Trice16 %p, %p, %p\n", -1, -2, -3 ); - Trice16(iD(15475), "rd:Trice16 %p, %p, %p, %p\n", -1, -2, -3, -4 ); - Trice16(iD(15583), "rd:Trice16 %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5 ); - Trice16(iD(16204), "rd:Trice16 %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6 ); - Trice16(iD(16292), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7); - Trice16(iD(16219), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - Trice16(iD(16004), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - Trice16(iD(16135), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); - Trice16(iD(15360), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - Trice16(iD(15608), "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + Trice16("rd:Trice16 %p\n", -1 ); + Trice16("rd:Trice16 %p, %p\n", -1, -2 ); + Trice16("rd:Trice16 %p, %p, %p\n", -1, -2, -3 ); + Trice16("rd:Trice16 %p, %p, %p, %p\n", -1, -2, -3, -4 ); + Trice16("rd:Trice16 %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5 ); + Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6 ); + Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7); + Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); + Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + Trice16("rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); } - break; case __LINE__: TRice(iD(15260), "sig:TRICE16 with 1 to 12 hex\n" ); + break; case __LINE__: TRice("sig:TRICE16 with 1 to 12 hex\n" ); break; case __LINE__: { - Trice16(iD(15242), "rd:Trice16 %X\n", -1 ); - Trice16(iD(15340), "rd:Trice16 %X, %X\n", -1, -2 ); - Trice16(iD(16267), "rd:Trice16 %X, %X, %X\n", -1, -2, -3 ); - Trice16(iD(15545), "rd:Trice16 %X, %X, %X, %X\n", -1, -2, -3, -4 ); - Trice16(iD(15696), "rd:Trice16 %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5 ); - Trice16(iD(15525), "rd:Trice16 %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6 ); - Trice16(iD(15588), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7); - Trice16(iD(15749), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8 ); - Trice16(iD(15632), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); - Trice16(iD(15881), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); - Trice16(iD(15785), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); - Trice16(iD(15329), "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); + Trice16("rd:Trice16 %X\n", -1 ); + Trice16("rd:Trice16 %X, %X\n", -1, -2 ); + Trice16("rd:Trice16 %X, %X, %X\n", -1, -2, -3 ); + Trice16("rd:Trice16 %X, %X, %X, %X\n", -1, -2, -3, -4 ); + Trice16("rd:Trice16 %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5 ); + Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6 ); + Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7); + Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8 ); + Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9 ); + Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10); + Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); + Trice16("rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); } #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: TRICE(ID(15094), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE(id(15095), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE(Id(15096), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE(ID(15097), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice(iD(15098), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice(iD(15099), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice(iD(15100), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE_0(ID(15101), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(id(15102), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(Id(15103), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(ID(15104), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice_0(iD(15105), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice_0(iD(15106), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice_0(iD(15107), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE0(ID(15108), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE0(id(15109), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE0(Id(15110), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE0(ID(15111), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice0(iD(15112), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice0(iD(15113), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice0(iD(15114), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE_0(ID(15115), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(id(15116), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(Id(15117), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE_0(ID(15118), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice_0(iD(15119), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice_0(iD(15120), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice_0(iD(15121), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE8(ID(15122), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8(id(15123), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8(Id(15124), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8(ID(15125), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice8(iD(15126), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice8(iD(15127), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice8(iD(15128), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE8_0(ID(15129), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8_0(id(15130), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8_0(Id(15131), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE8_0(ID(15132), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice8_0(iD(15133), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice8_0(iD(15134), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice8_0(iD(15135), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: trice16(iD(15136), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16(iD(15137), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16(iD(15138), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16(iD(15139), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16(iD(15140), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice16(iD(15141), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice16(iD(15142), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE16_0(ID(15143), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE16_0(id(15144), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE16_0(Id(15145), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE16_0(ID(15146), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice16_0(iD(15147), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice16_0(iD(15148), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice16_0(iD(15149), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE32(ID(15150), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32(id(15151), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32(Id(15152), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32(ID(15153), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice32(iD(15154), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice32(iD(15155), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice32(iD(15156), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE32_0(ID(15157), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32_0(id(15158), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32_0(Id(15159), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE32_0(ID(15160), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice32_0(iD(15161), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice32_0(iD(15162), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice32_0(iD(15163), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE64(ID(15164), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64(id(15165), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64(Id(15166), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64(ID(15167), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice64(iD(15168), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice64(iD(15169), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice64(iD(15170), "w: Hello! 👋🙂 \a\n" ); // with sound! - - break; case __LINE__: TRICE64_0(ID(15171), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64_0(id(15172), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64_0(Id(15173), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRICE64_0(ID(15174), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: trice64_0(iD(15175), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: Trice64_0(iD(15176), "w: Hello! 👋🙂 \a\n" ); // with sound! - break; case __LINE__: TRice64_0(iD(15177), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice_0("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice0("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice_0("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE8(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice8("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice8("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice8("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE8_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE8_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice8_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice8_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice8_0("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice16("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice16("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE16_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE16_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE16_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE16_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice16_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice16_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice16_0("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE32(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice32("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice32("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice32("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE32_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE32_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice32_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice32_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice32_0("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE64(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice64("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice64("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice64("w: Hello! 👋🙂 \a\n" ); // with sound! + + break; case __LINE__: TRICE64_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64_0(id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64_0(Id(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRICE64_0(ID(0), "w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: trice64_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: Trice64_0("w: Hello! 👋🙂 \a\n" ); // with sound! + break; case __LINE__: TRice64_0("w: Hello! 👋🙂 \a\n" ); // with sound! #endif // #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) } @@ -2595,8 +2595,8 @@ static int64_t DoubleToInt64(double f) { int size = sizeof(src->element); \ memcpy(p, &(src->element), size); \ p += size; \ - TRICE_S(ID(15178), "rd:sizeof(%8s)", n); \ - TRICE(ID(15179), " = %d\n", size); \ + TRICE_S(ID(0), "rd:sizeof(%8s)", n); \ + TRICE(ID(0), " = %d\n", size); \ } while (0); //! DCOPY is a helper macro for struct deserialization. @@ -2606,8 +2606,8 @@ static int64_t DoubleToInt64(double f) { int size = sizeof(dst->element); \ memcpy(&(dst->element), p, size); \ p += size; \ - TRICE_S(ID(15180), "rd:sizeof(%8s)", n); \ - TRICE(ID(15181), " = %d\n", size); \ + TRICE_S(ID(0), "rd:sizeof(%8s)", n); \ + TRICE(ID(0), " = %d\n", size); \ } while (0); typedef struct { @@ -2727,25 +2727,25 @@ static void exampleOfManualSerialization(void) { #else int len = 0; #endif - TRICE(Id(15182), "inf: Tryout tx struct:"); - TRICE8_B(Id(15183), " %02x ", &tx, sizeof(tx)); - TRICE(Id(15184), "\n"); + TRICE(Id(0), "inf: Tryout tx struct:"); + TRICE8_B(Id(0), " %02x ", &tx, sizeof(tx)); + TRICE(Id(0), "\n"); - TRICE(Id(15185), "inf: Tryout buffer:"); - TRICE8_B(Id(15186), " %02x ", dst, len); // lint !e670 - TRICE(Id(15187), "\n"); + TRICE(Id(0), "inf: Tryout buffer:"); + TRICE8_B(Id(0), " %02x ", dst, len); // lint !e670 + TRICE(Id(0), "\n"); #if !TRICE_OFF char* src = dst; // "copy" - assume, data transferred now ("data transfer") len = deserializeTryout(&rx, src); #endif - TRICE(Id(15188), "inf: Tryout rx struct:"); - TRICE8_B(Id(15189), " %02x ", &rx, sizeof(rx)); - TRICE(Id(15190), "\n"); + TRICE(Id(0), "inf: Tryout rx struct:"); + TRICE8_B(Id(0), " %02x ", &rx, sizeof(rx)); + TRICE(Id(0), "\n"); - TRICE(Id(15191), "inf:sizeOf(Trypout) = %d, buffer length = %d\n", sizeof(tx), len); - TRICE8_F(Id(15192), "info:TryoutStructFunction", &tx, sizeof(tx)); - TRICE8_F(Id(15193), "info:TryoutBufferFunction", dst, len); // lint !e670 + TRICE(Id(0), "inf:sizeOf(Trypout) = %d, buffer length = %d\n", sizeof(tx), len); + TRICE8_F(Id(0), "info:TryoutStructFunction", &tx, sizeof(tx)); + TRICE8_F(Id(0), "info:TryoutBufferFunction", dst, len); // lint !e670 } static void exampleOfManualJSONencoding(void) { @@ -2756,15 +2756,15 @@ static void exampleOfManualJSONencoding(void) { } Ex_t; Ex_t Ex = {-1, 2, (float)2.781}; #endif - Trice(iD(15194), "att:MyStructEvaluationFunction(json:ExA{Apple:%d, Birn:%u, Fisch:%f}\n", Ex.Apple, Ex.Birn, aFloat(Ex.Fish)); + Trice("att:MyStructEvaluationFunction(json:ExA{Apple:%d, Birn:%u, Fisch:%f}\n", Ex.Apple, Ex.Birn, aFloat(Ex.Fish)); } static void dynString(int n) { char* s = "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,"; const size_t l = strlen(s); n = n < l ? n : l; - // trice(iD(15195), "sig:%3d:", n ); - this gets overwritten in CGO_Test case, so we avoid it to keep testing simple. - TRICE_N(id(15196), "wr:%s\n", s, n); + // trice("sig:%3d:", n ); - this gets overwritten in CGO_Test case, so we avoid it to keep testing simple. + TRICE_N(id(0), "wr:%s\n", s, n); } #endif // #ifndef TRICE_CHECK_MIN diff --git a/demoLI.json b/demoLI.json index e439aacb5..ec8a6ce4f 100644 --- a/demoLI.json +++ b/demoLI.json @@ -20,20 +20,20 @@ "Line": 341 }, "13005": { - "File": "examples/L432_inst/Core/Src/main.c", - "Line": 338 + "File": "examples/L432_inst/Core/Src/stm32l4xx_it.c", + "Line": 191 }, "13006": { - "File": "examples/L432_inst/Core/Src/main.c", - "Line": 365 + "File": "examples/L432_inst/Core/Src/stm32l4xx_it.c", + "Line": 197 }, "13007": { - "File": "examples/L432_inst/Core/Src/stm32l4xx_it.c", - "Line": 191 + "File": "examples/L432_inst/Core/Src/main.c", + "Line": 338 }, "13008": { - "File": "examples/L432_inst/Core/Src/stm32l4xx_it.c", - "Line": 197 + "File": "examples/L432_inst/Core/Src/main.c", + "Line": 365 }, "13009": { "File": "examples/L432_inst/Core/Inc/triceConfig.h", @@ -7781,7 +7781,7 @@ }, "14945": { "File": "_test/testdata/triceCheck.c", - "Line": 2293 + "Line": 2301 }, "14946": { "File": "_test/testdata/triceCheck.c", @@ -7809,1235 +7809,1095 @@ }, "14952": { "File": "_test/testdata/triceCheck.c", - "Line": 2312 + "Line": 2310 }, "14953": { "File": "_test/testdata/triceCheck.c", - "Line": 2313 + "Line": 2312 }, "14954": { "File": "_test/testdata/triceCheck.c", - "Line": 2314 + "Line": 2313 }, "14955": { "File": "_test/testdata/triceCheck.c", - "Line": 2315 + "Line": 2314 }, "14956": { "File": "_test/testdata/triceCheck.c", - "Line": 2316 + "Line": 2315 }, "14957": { "File": "_test/testdata/triceCheck.c", - "Line": 2317 + "Line": 2316 }, "14958": { "File": "_test/testdata/triceCheck.c", - "Line": 2319 + "Line": 2317 }, "14959": { "File": "_test/testdata/triceCheck.c", - "Line": 2321 + "Line": 2319 }, "14960": { "File": "_test/testdata/triceCheck.c", - "Line": 2322 + "Line": 2321 }, "14961": { "File": "_test/testdata/triceCheck.c", - "Line": 2323 + "Line": 2322 }, "14962": { "File": "_test/testdata/triceCheck.c", - "Line": 2324 + "Line": 2323 }, "14963": { "File": "_test/testdata/triceCheck.c", - "Line": 2325 + "Line": 2324 }, "14964": { "File": "_test/testdata/triceCheck.c", - "Line": 2326 + "Line": 2325 }, "14965": { "File": "_test/testdata/triceCheck.c", - "Line": 2327 + "Line": 2326 }, "14966": { "File": "_test/testdata/triceCheck.c", - "Line": 2328 + "Line": 2327 }, "14967": { "File": "_test/testdata/triceCheck.c", - "Line": 2329 + "Line": 2328 }, "14968": { "File": "_test/testdata/triceCheck.c", - "Line": 2332 + "Line": 2329 }, "14969": { "File": "_test/testdata/triceCheck.c", - "Line": 2333 + "Line": 2332 }, "14970": { "File": "_test/testdata/triceCheck.c", - "Line": 2334 + "Line": 2333 }, "14971": { "File": "_test/testdata/triceCheck.c", - "Line": 2335 + "Line": 2334 }, "14972": { "File": "_test/testdata/triceCheck.c", - "Line": 2336 + "Line": 2335 }, "14973": { "File": "_test/testdata/triceCheck.c", - "Line": 2337 + "Line": 2336 }, "14974": { "File": "_test/testdata/triceCheck.c", - "Line": 2338 + "Line": 2337 }, "14975": { "File": "_test/testdata/triceCheck.c", - "Line": 2324 + "Line": 2338 }, "14976": { "File": "_test/testdata/triceCheck.c", - "Line": 2325 + "Line": 2339 }, "14977": { "File": "_test/testdata/triceCheck.c", - "Line": 2326 + "Line": 2340 }, "14978": { "File": "_test/testdata/triceCheck.c", - "Line": 2327 + "Line": 2341 }, "14979": { "File": "_test/testdata/triceCheck.c", - "Line": 2328 + "Line": 2342 }, "14980": { "File": "_test/testdata/triceCheck.c", - "Line": 2329 + "Line": 2343 }, "14981": { "File": "_test/testdata/triceCheck.c", - "Line": 2330 + "Line": 2344 }, "14982": { "File": "_test/testdata/triceCheck.c", - "Line": 2347 + "Line": 2345 }, "14983": { "File": "_test/testdata/triceCheck.c", - "Line": 2348 + "Line": 2347 }, "14984": { "File": "_test/testdata/triceCheck.c", - "Line": 2349 + "Line": 2348 }, "14985": { "File": "_test/testdata/triceCheck.c", - "Line": 2350 + "Line": 2349 }, "14986": { "File": "_test/testdata/triceCheck.c", - "Line": 2351 + "Line": 2350 }, "14987": { "File": "_test/testdata/triceCheck.c", - "Line": 2352 + "Line": 2351 }, "14988": { "File": "_test/testdata/triceCheck.c", - "Line": 2353 + "Line": 2352 }, "14989": { "File": "_test/testdata/triceCheck.c", - "Line": 2354 + "Line": 2353 }, "14990": { "File": "_test/testdata/triceCheck.c", - "Line": 2355 + "Line": 2354 }, "14991": { "File": "_test/testdata/triceCheck.c", - "Line": 2356 + "Line": 2355 }, "14992": { "File": "_test/testdata/triceCheck.c", - "Line": 2357 + "Line": 2356 }, "14993": { "File": "_test/testdata/triceCheck.c", - "Line": 2358 + "Line": 2357 }, "14994": { "File": "_test/testdata/triceCheck.c", - "Line": 2359 + "Line": 2358 }, "14995": { "File": "_test/testdata/triceCheck.c", - "Line": 2360 + "Line": 2359 }, "14996": { "File": "_test/testdata/triceCheck.c", - "Line": 2361 + "Line": 2360 }, "14997": { "File": "_test/testdata/triceCheck.c", - "Line": 2362 + "Line": 2361 }, "14998": { "File": "_test/testdata/triceCheck.c", - "Line": 2363 + "Line": 2362 }, "14999": { "File": "_test/testdata/triceCheck.c", - "Line": 2364 + "Line": 2363 }, "15000": { "File": "_test/testdata/triceCheck.c", - "Line": 2365 + "Line": 2364 }, "15001": { "File": "_test/testdata/triceCheck.c", - "Line": 2366 + "Line": 2365 }, "15002": { "File": "_test/testdata/triceCheck.c", - "Line": 2367 + "Line": 2366 }, "15003": { "File": "_test/testdata/triceCheck.c", - "Line": 2368 + "Line": 2367 }, "15004": { "File": "_test/testdata/triceCheck.c", - "Line": 2369 + "Line": 2368 }, "15005": { "File": "_test/testdata/triceCheck.c", - "Line": 2370 + "Line": 2369 }, "15006": { "File": "_test/testdata/triceCheck.c", - "Line": 2371 + "Line": 2370 }, "15007": { "File": "_test/testdata/triceCheck.c", - "Line": 2372 + "Line": 2371 }, "15008": { "File": "_test/testdata/triceCheck.c", - "Line": 2373 + "Line": 2372 }, "15009": { "File": "_test/testdata/triceCheck.c", - "Line": 2374 + "Line": 2373 }, "15010": { "File": "_test/testdata/triceCheck.c", - "Line": 2375 + "Line": 2374 }, "15011": { "File": "_test/testdata/triceCheck.c", - "Line": 2376 + "Line": 2375 }, "15012": { "File": "_test/testdata/triceCheck.c", - "Line": 2378 + "Line": 2376 }, "15013": { "File": "_test/testdata/triceCheck.c", - "Line": 2379 + "Line": 2378 }, "15014": { "File": "_test/testdata/triceCheck.c", - "Line": 2380 + "Line": 2379 }, "15015": { "File": "_test/testdata/triceCheck.c", - "Line": 2381 + "Line": 2380 }, "15016": { "File": "_test/testdata/triceCheck.c", - "Line": 2382 + "Line": 2381 }, "15017": { "File": "_test/testdata/triceCheck.c", - "Line": 2383 + "Line": 2382 }, "15018": { "File": "_test/testdata/triceCheck.c", - "Line": 2384 + "Line": 2383 }, "15019": { "File": "_test/testdata/triceCheck.c", - "Line": 2385 + "Line": 2384 }, "15020": { "File": "_test/testdata/triceCheck.c", - "Line": 2386 + "Line": 2385 }, "15021": { "File": "_test/testdata/triceCheck.c", - "Line": 2387 + "Line": 2386 }, "15022": { "File": "_test/testdata/triceCheck.c", - "Line": 2388 + "Line": 2387 }, "15023": { "File": "_test/testdata/triceCheck.c", - "Line": 2389 + "Line": 2388 }, "15024": { "File": "_test/testdata/triceCheck.c", - "Line": 2390 + "Line": 2389 }, "15025": { "File": "_test/testdata/triceCheck.c", - "Line": 2391 + "Line": 2390 }, "15026": { "File": "_test/testdata/triceCheck.c", - "Line": 2392 + "Line": 2391 }, "15027": { "File": "_test/testdata/triceCheck.c", - "Line": 2393 + "Line": 2392 }, "15028": { "File": "_test/testdata/triceCheck.c", - "Line": 2394 + "Line": 2393 }, "15029": { "File": "_test/testdata/triceCheck.c", - "Line": 2395 + "Line": 2394 }, "15030": { "File": "_test/testdata/triceCheck.c", - "Line": 2396 + "Line": 2395 }, "15031": { "File": "_test/testdata/triceCheck.c", - "Line": 2397 + "Line": 2396 }, "15032": { "File": "_test/testdata/triceCheck.c", - "Line": 2398 + "Line": 2397 }, "15033": { "File": "_test/testdata/triceCheck.c", - "Line": 2399 + "Line": 2398 }, "15034": { "File": "_test/testdata/triceCheck.c", - "Line": 2400 + "Line": 2399 }, "15035": { "File": "_test/testdata/triceCheck.c", - "Line": 2401 + "Line": 2400 }, "15036": { "File": "_test/testdata/triceCheck.c", - "Line": 2402 + "Line": 2401 }, "15037": { "File": "_test/testdata/triceCheck.c", - "Line": 2403 + "Line": 2402 }, "15038": { "File": "_test/testdata/triceCheck.c", - "Line": 2404 + "Line": 2403 }, "15039": { "File": "_test/testdata/triceCheck.c", - "Line": 2405 + "Line": 2404 }, "15040": { "File": "_test/testdata/triceCheck.c", - "Line": 2406 + "Line": 2405 }, "15041": { "File": "_test/testdata/triceCheck.c", - "Line": 2407 + "Line": 2406 }, "15042": { "File": "_test/testdata/triceCheck.c", - "Line": 2409 + "Line": 2407 }, "15043": { "File": "_test/testdata/triceCheck.c", - "Line": 2410 + "Line": 2409 }, "15044": { "File": "_test/testdata/triceCheck.c", - "Line": 2411 + "Line": 2410 }, "15045": { "File": "_test/testdata/triceCheck.c", - "Line": 2412 + "Line": 2411 }, "15046": { "File": "_test/testdata/triceCheck.c", - "Line": 2413 + "Line": 2412 }, "15047": { "File": "_test/testdata/triceCheck.c", - "Line": 2414 + "Line": 2413 }, "15048": { "File": "_test/testdata/triceCheck.c", - "Line": 2415 + "Line": 2414 }, "15049": { "File": "_test/testdata/triceCheck.c", - "Line": 2416 + "Line": 2415 }, "15050": { "File": "_test/testdata/triceCheck.c", - "Line": 2417 + "Line": 2416 }, "15051": { "File": "_test/testdata/triceCheck.c", - "Line": 2418 + "Line": 2417 }, "15052": { "File": "_test/testdata/triceCheck.c", - "Line": 2419 + "Line": 2418 }, "15053": { "File": "_test/testdata/triceCheck.c", - "Line": 2420 + "Line": 2419 }, "15054": { "File": "_test/testdata/triceCheck.c", - "Line": 2421 + "Line": 2420 }, "15055": { "File": "_test/testdata/triceCheck.c", - "Line": 2423 + "Line": 2421 }, "15056": { "File": "_test/testdata/triceCheck.c", - "Line": 2424 + "Line": 2423 }, "15057": { "File": "_test/testdata/triceCheck.c", - "Line": 2425 + "Line": 2424 }, "15058": { "File": "_test/testdata/triceCheck.c", - "Line": 2426 + "Line": 2425 }, "15059": { "File": "_test/testdata/triceCheck.c", - "Line": 2427 + "Line": 2426 }, "15060": { "File": "_test/testdata/triceCheck.c", - "Line": 2428 + "Line": 2427 }, "15061": { "File": "_test/testdata/triceCheck.c", - "Line": 2429 + "Line": 2428 }, "15062": { "File": "_test/testdata/triceCheck.c", - "Line": 2430 + "Line": 2429 }, "15063": { "File": "_test/testdata/triceCheck.c", - "Line": 2431 + "Line": 2430 }, "15064": { "File": "_test/testdata/triceCheck.c", - "Line": 2432 + "Line": 2431 }, "15065": { "File": "_test/testdata/triceCheck.c", - "Line": 2433 + "Line": 2432 }, "15066": { "File": "_test/testdata/triceCheck.c", - "Line": 2434 + "Line": 2433 }, "15067": { "File": "_test/testdata/triceCheck.c", - "Line": 2435 + "Line": 2434 }, "15068": { "File": "_test/testdata/triceCheck.c", - "Line": 2422 + "Line": 2435 }, "15069": { "File": "_test/testdata/triceCheck.c", - "Line": 2423 + "Line": 2437 }, "15070": { "File": "_test/testdata/triceCheck.c", - "Line": 2424 + "Line": 2439 }, "15071": { "File": "_test/testdata/triceCheck.c", - "Line": 2425 + "Line": 2440 }, "15072": { "File": "_test/testdata/triceCheck.c", - "Line": 2426 + "Line": 2441 }, "15073": { "File": "_test/testdata/triceCheck.c", - "Line": 2427 + "Line": 2442 }, "15074": { "File": "_test/testdata/triceCheck.c", - "Line": 2428 + "Line": 2443 }, "15075": { "File": "_test/testdata/triceCheck.c", - "Line": 2429 + "Line": 2444 }, "15076": { "File": "_test/testdata/triceCheck.c", - "Line": 2430 + "Line": 2445 }, "15077": { "File": "_test/testdata/triceCheck.c", - "Line": 2431 + "Line": 2446 }, "15078": { "File": "_test/testdata/triceCheck.c", - "Line": 2432 + "Line": 2447 }, "15079": { "File": "_test/testdata/triceCheck.c", - "Line": 2433 + "Line": 2448 }, "15080": { "File": "_test/testdata/triceCheck.c", - "Line": 2434 + "Line": 2449 }, "15081": { "File": "_test/testdata/triceCheck.c", - "Line": 2436 + "Line": 2450 }, "15082": { "File": "_test/testdata/triceCheck.c", - "Line": 2437 + "Line": 2452 }, "15083": { "File": "_test/testdata/triceCheck.c", - "Line": 2438 + "Line": 2454 }, "15084": { "File": "_test/testdata/triceCheck.c", - "Line": 2439 + "Line": 2455 }, "15085": { "File": "_test/testdata/triceCheck.c", - "Line": 2440 + "Line": 2456 }, "15086": { "File": "_test/testdata/triceCheck.c", - "Line": 2441 + "Line": 2457 }, "15087": { "File": "_test/testdata/triceCheck.c", - "Line": 2442 + "Line": 2458 }, "15088": { "File": "_test/testdata/triceCheck.c", - "Line": 2443 + "Line": 2459 }, "15089": { "File": "_test/testdata/triceCheck.c", - "Line": 2444 + "Line": 2460 }, "15090": { "File": "_test/testdata/triceCheck.c", - "Line": 2445 + "Line": 2461 }, "15091": { "File": "_test/testdata/triceCheck.c", - "Line": 2446 + "Line": 2462 }, "15092": { "File": "_test/testdata/triceCheck.c", - "Line": 2447 + "Line": 2463 }, "15093": { "File": "_test/testdata/triceCheck.c", - "Line": 2448 + "Line": 2464 }, "15094": { "File": "_test/testdata/triceCheck.c", - "Line": 2468 + "Line": 2465 }, "15095": { "File": "_test/testdata/triceCheck.c", - "Line": 2469 + "Line": 2468 }, "15096": { "File": "_test/testdata/triceCheck.c", - "Line": 2470 + "Line": 2469 }, "15097": { "File": "_test/testdata/triceCheck.c", - "Line": 2471 + "Line": 2470 }, "15098": { "File": "_test/testdata/triceCheck.c", - "Line": 2472 + "Line": 2471 }, "15099": { "File": "_test/testdata/triceCheck.c", - "Line": 2473 + "Line": 2472 }, "15100": { "File": "_test/testdata/triceCheck.c", - "Line": 2474 + "Line": 2473 }, "15101": { "File": "_test/testdata/triceCheck.c", - "Line": 2476 + "Line": 2474 }, "15102": { "File": "_test/testdata/triceCheck.c", - "Line": 2477 + "Line": 2476 }, "15103": { "File": "_test/testdata/triceCheck.c", - "Line": 2478 + "Line": 2477 }, "15104": { "File": "_test/testdata/triceCheck.c", - "Line": 2479 + "Line": 2478 }, "15105": { "File": "_test/testdata/triceCheck.c", - "Line": 2480 + "Line": 2479 }, "15106": { "File": "_test/testdata/triceCheck.c", - "Line": 2481 + "Line": 2480 }, "15107": { "File": "_test/testdata/triceCheck.c", - "Line": 2482 + "Line": 2481 }, "15108": { "File": "_test/testdata/triceCheck.c", - "Line": 2484 + "Line": 2482 }, "15109": { "File": "_test/testdata/triceCheck.c", - "Line": 2485 + "Line": 2484 }, "15110": { "File": "_test/testdata/triceCheck.c", - "Line": 2486 + "Line": 2485 }, "15111": { "File": "_test/testdata/triceCheck.c", - "Line": 2487 + "Line": 2486 }, "15112": { "File": "_test/testdata/triceCheck.c", - "Line": 2488 + "Line": 2487 }, "15113": { "File": "_test/testdata/triceCheck.c", - "Line": 2489 + "Line": 2488 }, "15114": { "File": "_test/testdata/triceCheck.c", - "Line": 2490 + "Line": 2489 }, "15115": { "File": "_test/testdata/triceCheck.c", - "Line": 2492 + "Line": 2490 }, "15116": { "File": "_test/testdata/triceCheck.c", - "Line": 2493 + "Line": 2492 }, "15117": { "File": "_test/testdata/triceCheck.c", - "Line": 2494 + "Line": 2493 }, "15118": { "File": "_test/testdata/triceCheck.c", - "Line": 2495 + "Line": 2494 }, "15119": { "File": "_test/testdata/triceCheck.c", - "Line": 2496 + "Line": 2495 }, "15120": { "File": "_test/testdata/triceCheck.c", - "Line": 2497 + "Line": 2496 }, "15121": { "File": "_test/testdata/triceCheck.c", - "Line": 2498 + "Line": 2497 }, "15122": { "File": "_test/testdata/triceCheck.c", - "Line": 2500 + "Line": 2498 }, "15123": { "File": "_test/testdata/triceCheck.c", - "Line": 2501 + "Line": 2500 }, "15124": { "File": "_test/testdata/triceCheck.c", - "Line": 2502 + "Line": 2501 }, "15125": { "File": "_test/testdata/triceCheck.c", - "Line": 2503 + "Line": 2502 }, "15126": { "File": "_test/testdata/triceCheck.c", - "Line": 2504 + "Line": 2503 }, "15127": { "File": "_test/testdata/triceCheck.c", - "Line": 2505 + "Line": 2504 }, "15128": { "File": "_test/testdata/triceCheck.c", - "Line": 2506 + "Line": 2505 }, "15129": { "File": "_test/testdata/triceCheck.c", - "Line": 2508 + "Line": 2506 }, "15130": { "File": "_test/testdata/triceCheck.c", - "Line": 2509 + "Line": 2508 }, "15131": { "File": "_test/testdata/triceCheck.c", - "Line": 2510 + "Line": 2509 }, "15132": { "File": "_test/testdata/triceCheck.c", - "Line": 2511 + "Line": 2510 }, "15133": { "File": "_test/testdata/triceCheck.c", - "Line": 2512 + "Line": 2511 }, "15134": { "File": "_test/testdata/triceCheck.c", - "Line": 2513 + "Line": 2512 }, "15135": { "File": "_test/testdata/triceCheck.c", - "Line": 2514 + "Line": 2513 }, "15136": { "File": "_test/testdata/triceCheck.c", - "Line": 2516 + "Line": 2514 }, "15137": { "File": "_test/testdata/triceCheck.c", - "Line": 2517 + "Line": 2516 }, "15138": { "File": "_test/testdata/triceCheck.c", - "Line": 2518 + "Line": 2517 }, "15139": { "File": "_test/testdata/triceCheck.c", - "Line": 2519 + "Line": 2518 }, "15140": { "File": "_test/testdata/triceCheck.c", - "Line": 2520 + "Line": 2519 }, "15141": { "File": "_test/testdata/triceCheck.c", - "Line": 2521 + "Line": 2520 }, "15142": { "File": "_test/testdata/triceCheck.c", - "Line": 2522 + "Line": 2521 }, "15143": { "File": "_test/testdata/triceCheck.c", - "Line": 2524 + "Line": 2522 }, "15144": { "File": "_test/testdata/triceCheck.c", - "Line": 2525 + "Line": 2524 }, "15145": { "File": "_test/testdata/triceCheck.c", - "Line": 2526 + "Line": 2525 }, "15146": { "File": "_test/testdata/triceCheck.c", - "Line": 2527 + "Line": 2526 }, "15147": { "File": "_test/testdata/triceCheck.c", - "Line": 2528 + "Line": 2527 }, "15148": { "File": "_test/testdata/triceCheck.c", - "Line": 2529 + "Line": 2528 }, "15149": { "File": "_test/testdata/triceCheck.c", - "Line": 2530 + "Line": 2529 }, "15150": { "File": "_test/testdata/triceCheck.c", - "Line": 2532 + "Line": 2530 }, "15151": { "File": "_test/testdata/triceCheck.c", - "Line": 2533 + "Line": 2532 }, "15152": { "File": "_test/testdata/triceCheck.c", - "Line": 2534 + "Line": 2533 }, "15153": { "File": "_test/testdata/triceCheck.c", - "Line": 2535 + "Line": 2534 }, "15154": { "File": "_test/testdata/triceCheck.c", - "Line": 2536 + "Line": 2535 }, "15155": { "File": "_test/testdata/triceCheck.c", - "Line": 2537 + "Line": 2536 }, "15156": { "File": "_test/testdata/triceCheck.c", - "Line": 2538 + "Line": 2537 }, "15157": { "File": "_test/testdata/triceCheck.c", - "Line": 2540 + "Line": 2538 }, "15158": { "File": "_test/testdata/triceCheck.c", - "Line": 2541 + "Line": 2540 }, "15159": { "File": "_test/testdata/triceCheck.c", - "Line": 2542 + "Line": 2541 }, "15160": { "File": "_test/testdata/triceCheck.c", - "Line": 2543 + "Line": 2542 }, "15161": { "File": "_test/testdata/triceCheck.c", - "Line": 2544 + "Line": 2543 }, "15162": { "File": "_test/testdata/triceCheck.c", - "Line": 2545 + "Line": 2544 }, "15163": { "File": "_test/testdata/triceCheck.c", - "Line": 2546 + "Line": 2545 }, "15164": { "File": "_test/testdata/triceCheck.c", - "Line": 2548 + "Line": 2546 }, "15165": { "File": "_test/testdata/triceCheck.c", - "Line": 2549 + "Line": 2548 }, "15166": { "File": "_test/testdata/triceCheck.c", - "Line": 2550 + "Line": 2549 }, "15167": { "File": "_test/testdata/triceCheck.c", - "Line": 2551 + "Line": 2550 }, "15168": { "File": "_test/testdata/triceCheck.c", - "Line": 2552 + "Line": 2551 }, "15169": { "File": "_test/testdata/triceCheck.c", - "Line": 2553 + "Line": 2552 }, "15170": { "File": "_test/testdata/triceCheck.c", - "Line": 2554 + "Line": 2553 }, "15171": { "File": "_test/testdata/triceCheck.c", - "Line": 2556 + "Line": 2554 }, "15172": { "File": "_test/testdata/triceCheck.c", - "Line": 2557 + "Line": 2556 }, "15173": { "File": "_test/testdata/triceCheck.c", - "Line": 2558 + "Line": 2557 }, "15174": { "File": "_test/testdata/triceCheck.c", - "Line": 2559 + "Line": 2558 }, "15175": { "File": "_test/testdata/triceCheck.c", - "Line": 2560 + "Line": 2559 }, "15176": { "File": "_test/testdata/triceCheck.c", - "Line": 2561 + "Line": 2560 }, "15177": { "File": "_test/testdata/triceCheck.c", - "Line": 2562 + "Line": 2561 }, "15178": { "File": "_test/testdata/triceCheck.c", - "Line": 2598 + "Line": 2562 }, "15179": { "File": "_test/testdata/triceCheck.c", - "Line": 2599 + "Line": 2598 }, "15180": { "File": "_test/testdata/triceCheck.c", - "Line": 2609 + "Line": 2599 }, "15181": { "File": "_test/testdata/triceCheck.c", - "Line": 2610 + "Line": 2609 }, "15182": { "File": "_test/testdata/triceCheck.c", - "Line": 2730 + "Line": 2610 }, "15183": { "File": "_test/testdata/triceCheck.c", - "Line": 2731 + "Line": 2730 }, "15184": { "File": "_test/testdata/triceCheck.c", - "Line": 2732 + "Line": 2731 }, "15185": { "File": "_test/testdata/triceCheck.c", - "Line": 2734 + "Line": 2732 }, "15186": { "File": "_test/testdata/triceCheck.c", - "Line": 2735 + "Line": 2734 }, "15187": { "File": "_test/testdata/triceCheck.c", - "Line": 2736 + "Line": 2735 }, "15188": { "File": "_test/testdata/triceCheck.c", - "Line": 2742 + "Line": 2736 }, "15189": { "File": "_test/testdata/triceCheck.c", - "Line": 2743 + "Line": 2742 }, "15190": { "File": "_test/testdata/triceCheck.c", - "Line": 2744 + "Line": 2743 }, "15191": { "File": "_test/testdata/triceCheck.c", - "Line": 2746 + "Line": 2744 }, "15192": { "File": "_test/testdata/triceCheck.c", - "Line": 2747 + "Line": 2746 }, "15193": { "File": "_test/testdata/triceCheck.c", - "Line": 2748 + "Line": 2747 }, "15194": { "File": "_test/testdata/triceCheck.c", - "Line": 2759 + "Line": 2748 }, "15195": { "File": "_test/testdata/triceCheck.c", - "Line": 2766 + "Line": 2759 }, "15196": { "File": "_test/testdata/triceCheck.c", - "Line": 2767 + "Line": 2766 }, "15197": { - "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 11 + "File": "_test/testdata/triceCheck.c", + "Line": 2767 }, "15198": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 12 + "Line": 11 }, "15199": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 13 + "Line": 12 }, "15200": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 14 + "Line": 13 }, "15201": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 15 + "Line": 14 }, "15202": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 16 + "Line": 15 }, "15203": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 17 + "Line": 16 }, "15204": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 18 + "Line": 17 }, "15205": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 19 + "Line": 18 }, "15206": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 20 + "Line": 19 }, "15207": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 21 + "Line": 20 }, "15208": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 22 + "Line": 21 }, "15209": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 23 + "Line": 22 }, "15210": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 24 + "Line": 23 }, "15211": { - "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 25 + "File": "_test/_ringB_protect_de_tcobs_ua/TargetActivity.c", + "Line": 7 }, "15212": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 26 + "Line": 24 }, "15213": { - "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 27 + "File": "_test/_ringB_protect_de_tcobs_ua/TargetActivity.c", + "Line": 8 }, "15214": { "File": "_test/_ringB_protect_de_tcobs_ua/TargetActivity.c", - "Line": 7 + "Line": 9 }, "15215": { "File": "_test/_ringB_protect_de_tcobs_ua/TargetActivity.c", - "Line": 8 + "Line": 11 }, "15216": { - "File": "_test/_ringB_protect_de_tcobs_ua/TargetActivity.c", - "Line": 9 + "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", + "Line": 25 }, "15217": { - "File": "_test/_ringB_protect_de_tcobs_ua/TargetActivity.c", - "Line": 11 + "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", + "Line": 26 }, "15218": { - "File": "_test/special_for_debug/TargetActivity.c", - "Line": 5 + "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", + "Line": 27 }, "15219": { - "File": "_test/special_for_debug/TargetActivity.c", - "Line": 6 - }, - "15220": { "File": "_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c", "Line": 6 }, - "15221": { + "15220": { "File": "_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c", "Line": 7 }, - "15222": { + "15221": { "File": "_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c", "Line": 8 }, - "15223": { + "15222": { "File": "_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c", "Line": 10 }, - "15242": { - "File": "_test/testdata/triceCheck.c", - "Line": 2454 - }, - "15260": { - "File": "_test/testdata/triceCheck.c", - "Line": 2452 - }, - "15329": { - "File": "_test/testdata/triceCheck.c", - "Line": 2465 - }, - "15340": { - "File": "_test/testdata/triceCheck.c", - "Line": 2455 - }, - "15360": { - "File": "_test/testdata/triceCheck.c", - "Line": 2449 - }, - "15475": { - "File": "_test/testdata/triceCheck.c", - "Line": 2442 - }, - "15491": { - "File": "_test/testdata/triceCheck.c", - "Line": 2340 - }, - "15511": { - "File": "_test/testdata/triceCheck.c", - "Line": 2301 - }, - "15522": { - "File": "_test/testdata/triceCheck.c", - "Line": 2437 - }, - "15525": { - "File": "_test/testdata/triceCheck.c", - "Line": 2459 - }, - "15545": { - "File": "_test/testdata/triceCheck.c", - "Line": 2457 - }, - "15556": { - "File": "examples/exampleData/triceLogDiagData.c", - "Line": 56 - }, - "15583": { - "File": "_test/testdata/triceCheck.c", - "Line": 2443 - }, - "15588": { - "File": "_test/testdata/triceCheck.c", - "Line": 2460 - }, - "15608": { - "File": "_test/testdata/triceCheck.c", - "Line": 2450 - }, - "15632": { - "File": "_test/testdata/triceCheck.c", - "Line": 2462 - }, - "15696": { - "File": "_test/testdata/triceCheck.c", - "Line": 2458 - }, - "15700": { - "File": "_test/testdata/triceCheck.c", - "Line": 2344 - }, - "15724": { - "File": "_test/testdata/triceCheck.c", - "Line": 2440 - }, - "15749": { - "File": "_test/testdata/triceCheck.c", - "Line": 2461 - }, - "15785": { - "File": "_test/testdata/triceCheck.c", - "Line": 2464 - }, - "15805": { - "File": "_test/testdata/triceCheck.c", - "Line": 2339 - }, - "15858": { - "File": "_test/testdata/triceCheck.c", - "Line": 2343 - }, - "15881": { - "File": "_test/testdata/triceCheck.c", - "Line": 2463 - }, - "15971": { - "File": "_test/testdata/triceCheck.c", - "Line": 2341 - }, - "16004": { - "File": "_test/testdata/triceCheck.c", - "Line": 2447 - }, - "16018": { - "File": "_test/testdata/triceCheck.c", - "Line": 2342 - }, - "16135": { - "File": "_test/testdata/triceCheck.c", - "Line": 2448 - }, - "16161": { - "File": "_test/testdata/triceCheck.c", - "Line": 2310 - }, - "16204": { - "File": "_test/testdata/triceCheck.c", - "Line": 2444 - }, - "16219": { - "File": "_test/testdata/triceCheck.c", - "Line": 2446 - }, - "16267": { - "File": "_test/testdata/triceCheck.c", - "Line": 2456 - }, - "16271": { - "File": "_test/testdata/triceCheck.c", - "Line": 2439 - }, - "16292": { - "File": "_test/testdata/triceCheck.c", - "Line": 2445 - }, - "16307": { - "File": "_test/testdata/triceCheck.c", - "Line": 2441 + "15223": { + "File": "_test/special_for_debug/TargetActivity.c", + "Line": 5 }, - "16322": { - "File": "_test/testdata/triceCheck.c", - "Line": 2345 + "15224": { + "File": "_test/special_for_debug/TargetActivity.c", + "Line": 6 }, "16326": { "File": "examples/exampleData/triceExamples.c", diff --git a/demoTIL.json b/demoTIL.json index d74c32cfc..5ea17d740 100644 --- a/demoTIL.json +++ b/demoTIL.json @@ -21,19 +21,19 @@ }, "13005": { "Type": "TRice", - "Strg": "msg:StartDefaultTask\\n" + "Strg": "WARNING:USARTq OverRun Error Flag is set!\\n" }, "13006": { - "Type": "TRice", - "Strg": "msg:StartTask02:Diagnostics and TriceTransfer\\n" + "Type": "TRICE_S", + "Strg": "rx:received command:%s\\n" }, "13007": { "Type": "TRice", - "Strg": "WARNING:USARTq OverRun Error Flag is set!\\n" + "Strg": "msg:StartDefaultTask\\n" }, "13008": { - "Type": "TRICE_S", - "Strg": "rx:received command:%s\\n" + "Type": "TRice", + "Strg": "msg:StartTask02:Diagnostics and TriceTransfer\\n" }, "13009": { "Type": "trice8", @@ -7781,7 +7781,7 @@ }, "14945": { "Type": "TRICE", - "Strg": "att:formatted float \u0026 double\\n" + "Strg": "att:formatted float\\n" }, "14946": { "Type": "TRICE32", @@ -7808,128 +7808,128 @@ "Strg": "rd:TRICE32 float %12.6G (%%12.6G)\\n" }, "14952": { + "Type": "TRICE", + "Strg": "att:formatted double\\n" + }, + "14953": { "Type": "TRICE64", "Strg": "rd:TRICE64 double %12.6e (%%12.6e), aDouble(y)\\n" }, - "14953": { + "14954": { "Type": "TRICE64", "Strg": "rd:TRICE64 double %12.6f (%%12.6f), aDouble(y)\\n" }, - "14954": { + "14955": { "Type": "TRICE64", "Strg": "rd:TRICE64 double %12.6g (%%12.6g), aDouble(y)\\n" }, - "14955": { + "14956": { "Type": "TRICE64", "Strg": "rd:TRICE64 double %12.6E (%%12.6E), aDouble(y)\\n" }, - "14956": { + "14957": { "Type": "TRICE64", "Strg": "rd:TRICE64 double %12.6F (%%12.6F), aDouble(y)\\n" }, - "14957": { + "14958": { "Type": "TRICE64", "Strg": "rd:TRICE64 double %12.6G (%%12.6G), aDouble(y)\\n" }, - "14958": { + "14959": { "Type": "TRICE", "Strg": "att:Various single arguments\\n" }, - "14959": { + "14960": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %t (%%t ,0)\\n" }, - "14960": { + "14961": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %t (%%t ,2)\\n" }, - "14961": { + "14962": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %u (%%u ,-1)\\n" }, - "14962": { + "14963": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %b (%%b ,-1)\\n" }, - "14963": { + "14964": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %o (%%o ,-1)\\n" }, - "14964": { + "14965": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %O (%%O ,-1)\\n" }, - "14965": { + "14966": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %X (%%X ,-1)\\n" }, - "14966": { + "14967": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %x (%%x ,-1)\\n" }, - "14967": { + "14968": { "Type": "TRICE8", "Strg": "rd:TRICE8 line %d (%%d ,-1)\\n" }, - "14968": { + "14969": { "Type": "TRICE16_1", "Strg": "rd:TRICE16_1 line %t (%%t ,0)\\n" }, - "14969": { + "14970": { "Type": "TRICE16_1", "Strg": "rd:TRICE16_1 line %t (%%t ,2)\\n" }, - "14970": { + "14971": { "Type": "TRICE16_1", "Strg": "rd:TRICE16_1 line %u (%%u -1)\\n" }, - "14971": { + "14972": { "Type": "TRICE16_1", "Strg": "rd:TRICE16_1 line %b (%%b -1)\\n" }, - "14972": { + "14973": { "Type": "TRICE16_1", "Strg": "rd:TRICE16_1 line %o (%%o -1)\\n" }, - "14973": { + "14974": { "Type": "TRICE16_1", "Strg": "rd:TRICE16_1 line %x (%%x -1)\\n" }, - "14974": { + "14975": { "Type": "TRICE16_1", "Strg": "rd:TRICE16_1 line %d (%%d -1)\\n" }, - "14975": { - "Type": "trice", - "Strg": "rd:TRICE line %t (%%t -1)\\n" - }, "14976": { - "Type": "trice", - "Strg": "rd:TRICE line %t (%%t -1)\\n" + "Type": "Trice", + "Strg": "rd:Trice line %t (%%t -1)\\n" }, "14977": { - "Type": "trice", - "Strg": "rd:TRICE line %u (%%u)\\n" + "Type": "Trice", + "Strg": "rd:Trice line %t (%%t -1)\\n" }, "14978": { - "Type": "trice", - "Strg": "rd:TRICE line %b (%%b)\\n" + "Type": "Trice", + "Strg": "rd:Trice line %u (%%u)\\n" }, "14979": { - "Type": "trice", - "Strg": "rd:TRICE line %o (%%o)\\n" + "Type": "Trice", + "Strg": "rd:Trice line %b (%%b)\\n" }, "14980": { - "Type": "trice", - "Strg": "rd:TRICE line %x (%%x)\\n" + "Type": "Trice", + "Strg": "rd:Trice line %o (%%o)\\n" }, "14981": { - "Type": "trice", - "Strg": "rd:TRICE line %d (%%d)\\n" + "Type": "Trice", + "Strg": "rd:Trice line %x (%%x)\\n" }, "14982": { - "Type": "TRICE_N", - "Strg": "msg:%s\\n" + "Type": "Trice", + "Strg": "rd:Trice line %d (%%d)\\n" }, "14983": { "Type": "TRICE_N", @@ -8048,7 +8048,7 @@ "Strg": "msg:%s\\n" }, "15012": { - "Type": "triceN", + "Type": "TRICE_N", "Strg": "msg:%s\\n" }, "15013": { @@ -8168,216 +8168,216 @@ "Strg": "msg:%s\\n" }, "15042": { - "Type": "trice", - "Strg": "sig:TRICE with 1 to 12 values\\n" + "Type": "triceN", + "Strg": "msg:%s\\n" }, "15043": { "Type": "trice", - "Strg": "rd:TRICE %d\\n" + "Strg": "sig:TRICE with 1 to 12 values\\n" }, "15044": { "Type": "trice", - "Strg": "rd:TRICE %d, %d\\n" + "Strg": "rd:TRICE %d\\n" }, "15045": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d\\n" }, "15046": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d\\n" }, "15047": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d, %d\\n" }, "15048": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d, %d, %d\\n" }, "15049": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d\\n" }, "15050": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d\\n" }, "15051": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15052": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15053": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15054": { "Type": "trice", - "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15055": { "Type": "trice", - "Strg": "sig:TRICE_n with 1 to 12 values\\n" + "Strg": "rd:TRICE %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15056": { "Type": "trice", - "Strg": "rd:TRICE_1 %d\\n" + "Strg": "sig:TRICE_n with 1 to 12 values\\n" }, "15057": { "Type": "trice", - "Strg": "rd:TRICE_2 %d, %d\\n" + "Strg": "rd:TRICE_1 %d\\n" }, "15058": { "Type": "trice", - "Strg": "rd:TRICE_3 %d, %d, %d\\n" + "Strg": "rd:TRICE_2 %d, %d\\n" }, "15059": { "Type": "trice", - "Strg": "rd:TRICE_4 %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_3 %d, %d, %d\\n" }, "15060": { "Type": "trice", - "Strg": "rd:TRICE_5 %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_4 %d, %d, %d, %d\\n" }, "15061": { "Type": "trice", - "Strg": "rd:TRICE_6 %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_5 %d, %d, %d, %d, %d\\n" }, "15062": { "Type": "trice", - "Strg": "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_6 %d, %d, %d, %d, %d, %d\\n" }, "15063": { "Type": "trice", - "Strg": "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_7 %d, %d, %d, %d, %d, %d, %d\\n" }, "15064": { "Type": "trice", - "Strg": "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_8 %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15065": { "Type": "trice", - "Strg": "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_9 %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15066": { "Type": "trice", - "Strg": "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_10 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15067": { "Type": "trice", - "Strg": "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" + "Strg": "rd:TRICE_11 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15068": { - "Type": "TRICE", - "Strg": "sig:TRICE16 with 1 to 12 pointer\\n" + "Type": "trice", + "Strg": "rd:TRICE_12 %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\\n" }, "15069": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p\\n" + "Type": "TRice", + "Strg": "sig:Trice16 with 1 to 12 pointer\\n" }, "15070": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p\\n" }, "15071": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p\\n" }, "15072": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p\\n" }, "15073": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p\\n" }, "15074": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p, %p\\n" }, "15075": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p\\n" }, "15076": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p, %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p\\n" }, "15077": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p\\n" }, "15078": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" }, "15079": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" }, "15080": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" }, "15081": { - "Type": "TRICE", - "Strg": "sig:TRICE16 with 1 to 12 hex\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" }, "15082": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X\\n" + "Type": "TRice", + "Strg": "sig:TRICE16 with 1 to 12 hex\\n" }, "15083": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X\\n" }, "15084": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X\\n" }, "15085": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X\\n" }, "15086": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X\\n" }, "15087": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X, %X\\n" }, "15088": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X\\n" }, "15089": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X, %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X\\n" }, "15090": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X\\n" }, "15091": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" }, "15092": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" }, "15093": { - "Type": "TRICE16", - "Strg": "rd:TRICE16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" }, "15094": { - "Type": "TRICE", - "Strg": "w: Hello! 👋🙂 \\a\\n" + "Type": "Trice16", + "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" }, "15095": { "Type": "TRICE", @@ -8392,19 +8392,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15098": { - "Type": "trice", + "Type": "TRICE", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15099": { - "Type": "Trice", + "Type": "trice", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15100": { - "Type": "TRice", + "Type": "Trice", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15101": { - "Type": "TRICE_0", + "Type": "TRice", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15102": { @@ -8420,19 +8420,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15105": { - "Type": "trice_0", + "Type": "TRICE_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15106": { - "Type": "Trice_0", + "Type": "trice_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15107": { - "Type": "TRice_0", + "Type": "Trice_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15108": { - "Type": "TRICE0", + "Type": "TRice_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15109": { @@ -8448,19 +8448,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15112": { - "Type": "trice0", + "Type": "TRICE0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15113": { - "Type": "Trice0", + "Type": "trice0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15114": { - "Type": "TRice0", + "Type": "Trice0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15115": { - "Type": "TRICE_0", + "Type": "TRice0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15116": { @@ -8476,19 +8476,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15119": { - "Type": "trice_0", + "Type": "TRICE_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15120": { - "Type": "Trice_0", + "Type": "trice_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15121": { - "Type": "TRice_0", + "Type": "Trice_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15122": { - "Type": "TRICE8", + "Type": "TRice_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15123": { @@ -8504,19 +8504,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15126": { - "Type": "trice8", + "Type": "TRICE8", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15127": { - "Type": "Trice8", + "Type": "trice8", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15128": { - "Type": "TRice8", + "Type": "Trice8", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15129": { - "Type": "TRICE8_0", + "Type": "TRice8", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15130": { @@ -8532,19 +8532,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15133": { - "Type": "trice8_0", + "Type": "TRICE8_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15134": { - "Type": "Trice8_0", + "Type": "trice8_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15135": { - "Type": "TRice8_0", + "Type": "Trice8_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15136": { - "Type": "trice16", + "Type": "TRice8_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15137": { @@ -8564,15 +8564,15 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15141": { - "Type": "Trice16", + "Type": "trice16", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15142": { - "Type": "TRice16", + "Type": "Trice16", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15143": { - "Type": "TRICE16_0", + "Type": "TRice16", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15144": { @@ -8588,19 +8588,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15147": { - "Type": "trice16_0", + "Type": "TRICE16_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15148": { - "Type": "Trice16_0", + "Type": "trice16_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15149": { - "Type": "TRice16_0", + "Type": "Trice16_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15150": { - "Type": "TRICE32", + "Type": "TRice16_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15151": { @@ -8616,19 +8616,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15154": { - "Type": "trice32", + "Type": "TRICE32", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15155": { - "Type": "Trice32", + "Type": "trice32", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15156": { - "Type": "TRice32", + "Type": "Trice32", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15157": { - "Type": "TRICE32_0", + "Type": "TRice32", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15158": { @@ -8644,19 +8644,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15161": { - "Type": "trice32_0", + "Type": "TRICE32_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15162": { - "Type": "Trice32_0", + "Type": "trice32_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15163": { - "Type": "TRice32_0", + "Type": "Trice32_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15164": { - "Type": "TRICE64", + "Type": "TRice32_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15165": { @@ -8672,19 +8672,19 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15168": { - "Type": "trice64", + "Type": "TRICE64", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15169": { - "Type": "Trice64", + "Type": "trice64", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15170": { - "Type": "TRice64", + "Type": "Trice64", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15171": { - "Type": "TRICE64_0", + "Type": "TRice64", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15172": { @@ -8700,344 +8700,204 @@ "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15175": { - "Type": "trice64_0", + "Type": "TRICE64_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15176": { - "Type": "Trice64_0", + "Type": "trice64_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15177": { - "Type": "TRice64_0", + "Type": "Trice64_0", "Strg": "w: Hello! 👋🙂 \\a\\n" }, "15178": { + "Type": "TRice64_0", + "Strg": "w: Hello! 👋🙂 \\a\\n" + }, + "15179": { "Type": "TRICE_S", "Strg": "rd:sizeof(%8s)" }, - "15179": { + "15180": { "Type": "TRICE", "Strg": " = %d\\n" }, - "15180": { + "15181": { "Type": "TRICE_S", "Strg": "rd:sizeof(%8s)" }, - "15181": { + "15182": { "Type": "TRICE", "Strg": " = %d\\n" }, - "15182": { + "15183": { "Type": "TRICE", "Strg": "inf: Tryout tx struct:" }, - "15183": { + "15184": { "Type": "TRICE8_B", "Strg": " %02x " }, - "15184": { + "15185": { "Type": "TRICE", "Strg": "\\n" }, - "15185": { + "15186": { "Type": "TRICE", "Strg": "inf: Tryout buffer:" }, - "15186": { + "15187": { "Type": "TRICE8_B", "Strg": " %02x " }, - "15187": { + "15188": { "Type": "TRICE", "Strg": "\\n" }, - "15188": { + "15189": { "Type": "TRICE", "Strg": "inf: Tryout rx struct:" }, - "15189": { + "15190": { "Type": "TRICE8_B", "Strg": " %02x " }, - "15190": { + "15191": { "Type": "TRICE", "Strg": "\\n" }, - "15191": { + "15192": { "Type": "TRICE", "Strg": "inf:sizeOf(Trypout) = %d, buffer length = %d\\n" }, - "15192": { + "15193": { "Type": "TRICE8_F", "Strg": "info:TryoutStructFunction" }, - "15193": { + "15194": { "Type": "TRICE8_F", "Strg": "info:TryoutBufferFunction" }, - "15194": { + "15195": { "Type": "Trice", "Strg": "att:MyStructEvaluationFunction(json:ExA{Apple:%d, Birn:%u, Fisch:%f}\\n" }, - "15195": { + "15196": { "Type": "trice", "Strg": "sig:%3d:" }, - "15196": { + "15197": { "Type": "TRICE_N", "Strg": "wr:%s\\n" }, - "15197": { + "15198": { "Type": "TRice", "Strg": "Hello World!\\n" }, - "15198": { + "15199": { "Type": "TRICE8_F", "Strg": "info:FunctionNameWa" }, - "15199": { + "15200": { "Type": "TRice8F", "Strg": "info:FunctionNameWb" }, - "15200": { + "15201": { "Type": "Trice8F", "Strg": "info:FunctionNameWc" }, - "15201": { + "15202": { "Type": "trice8F", "Strg": "info:FunctionNameWd" }, - "15202": { + "15203": { "Type": "TRICE16_F", "Strg": "info:FunctionNameXa" }, - "15203": { + "15204": { "Type": "TRice16F", "Strg": "info:FunctionNameXb" }, - "15204": { + "15205": { "Type": "Trice16F", "Strg": "info:FunctionNameXc" }, - "15205": { + "15206": { "Type": "trice16F", "Strg": "info:FunctionNameXd" }, - "15206": { + "15207": { "Type": "TRICE32_F", "Strg": "info:FunctionNameYa" }, - "15207": { + "15208": { "Type": "TRice32F", "Strg": "rpc:FunctionNameYb" }, - "15208": { + "15209": { "Type": "Trice32F", "Strg": "rpc:FunctionNameYc" }, - "15209": { + "15210": { "Type": "trice32F", "Strg": "call:FunctionNameYd" }, - "15210": { - "Type": "TRICE64_F", - "Strg": "info:FunctionNameZa" - }, "15211": { - "Type": "TRice64F", - "Strg": "call:FunctionNameZb" + "Type": "TRice", + "Strg": "Hello " }, "15212": { - "Type": "Trice64F", - "Strg": "RPC:FunctionNameZc" + "Type": "TRICE64_F", + "Strg": "info:FunctionNameZa" }, "15213": { - "Type": "trice64F", - "Strg": "Rpc:FunctionNameZd" - }, - "15214": { - "Type": "TRice", - "Strg": "Hello " - }, - "15215": { "Type": "TRice", "Strg": "World!\\n" }, - "15216": { + "15214": { "Type": "TRice64", "Strg": "msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\\n" }, - "15217": { + "15215": { "Type": "trice", "Strg": "Hello again\\n" }, + "15216": { + "Type": "TRice64F", + "Strg": "call:FunctionNameZb" + }, + "15217": { + "Type": "Trice64F", + "Strg": "RPC:FunctionNameZc" + }, "15218": { - "Type": "TRice8B", - "Strg": "%3x\\n" + "Type": "trice64F", + "Strg": "Rpc:FunctionNameZd" }, "15219": { - "Type": "TRice8B", - "Strg": "%3x\\n" - }, - "15220": { "Type": "TRice", "Strg": "Hello " }, - "15221": { + "15220": { "Type": "TRice", "Strg": "World!\\n" }, - "15222": { + "15221": { "Type": "TRice64", "Strg": "msg:Twelve 64-bit values: %d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\\n" }, - "15223": { + "15222": { "Type": "trice", "Strg": "Hello again\\n" }, - "15242": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X\\n" - }, - "15260": { - "Type": "TRice", - "Strg": "sig:TRICE16 with 1 to 12 hex\\n" - }, - "15329": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" - }, - "15340": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X\\n" - }, - "15360": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" - }, - "15475": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p\\n" - }, - "15491": { - "Type": "Trice", - "Strg": "rd:Trice line %t (%%t -1)\\n" - }, - "15511": { - "Type": "TRICE", - "Strg": "att:formatted float\\n" - }, - "15522": { - "Type": "TRice", - "Strg": "sig:Trice16 with 1 to 12 pointer\\n" - }, - "15525": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X\\n" - }, - "15545": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X\\n" - }, - "15556": { - "Type": "trice16", - "Strg": "wrn:TriceDynStringBufTruncateCount = %u\\n" - }, - "15583": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p, %p\\n" - }, - "15588": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X\\n" - }, - "15608": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" - }, - "15632": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" - }, - "15696": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X, %X\\n" - }, - "15700": { - "Type": "Trice", - "Strg": "rd:Trice line %x (%%x)\\n" - }, - "15724": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p\\n" - }, - "15749": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X\\n" - }, - "15785": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" - }, - "15805": { - "Type": "Trice", - "Strg": "rd:Trice line %t (%%t -1)\\n" - }, - "15858": { - "Type": "Trice", - "Strg": "rd:Trice line %o (%%o)\\n" - }, - "15881": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X, %X, %X, %X, %X, %X, %X, %X\\n" - }, - "15971": { - "Type": "Trice", - "Strg": "rd:Trice line %u (%%u)\\n" - }, - "16004": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" - }, - "16018": { - "Type": "Trice", - "Strg": "rd:Trice line %b (%%b)\\n" - }, - "16135": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p, %p, %p\\n" - }, - "16161": { - "Type": "TRICE", - "Strg": "att:formatted double\\n" - }, - "16204": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p\\n" - }, - "16219": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p, %p\\n" - }, - "16267": { - "Type": "Trice16", - "Strg": "rd:Trice16 %X, %X, %X\\n" - }, - "16271": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p\\n" - }, - "16292": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p, %p, %p, %p, %p\\n" - }, - "16307": { - "Type": "Trice16", - "Strg": "rd:Trice16 %p, %p, %p\\n" + "15223": { + "Type": "TRice8B", + "Strg": "%3x\\n" }, - "16322": { - "Type": "Trice", - "Strg": "rd:Trice line %d (%%d)\\n" + "15224": { + "Type": "TRice8B", + "Strg": "%3x\\n" }, "16326": { "Type": "trice", @@ -9233,7 +9093,7 @@ }, "16374": { "Type": "trice16", - "Strg": "wrn:TriceDynBufTruncateCount = %u\\n" + "Strg": "wrn:TriceDynStringBufTruncateCount = %u\\n" }, "16375": { "Type": "trice16", diff --git a/examples/F030_inst/Core/Inc/triceConfig.h b/examples/F030_inst/Core/Inc/triceConfig.h index 1bfd1f135..4aaa4f5ad 100644 --- a/examples/F030_inst/Core/Inc/triceConfig.h +++ b/examples/F030_inst/Core/Inc/triceConfig.h @@ -10,7 +10,7 @@ extern "C" { #endif //! TRICE_CLEAN, if found inside triceConfig.h, is modified by the Trice tool to silent editor warnings in the cleaned state. -#define TRICE_CLEAN 0 // Do not define this at an other place! But you can delete this here. +#define TRICE_CLEAN 1 // Do not define this at an other place! But you can delete this here. extern uint32_t ms32; //! ms32 is a 32-bit millisecond counter, counting circular in steps of 1 every ms. #include "stm32f0xx_ll_system.h" diff --git a/examples/F030_inst/Core/Src/stm32f0xx_it.c b/examples/F030_inst/Core/Src/stm32f0xx_it.c index 72bb04f21..b6c6ad5b0 100644 --- a/examples/F030_inst/Core/Src/stm32f0xx_it.c +++ b/examples/F030_inst/Core/Src/stm32f0xx_it.c @@ -159,13 +159,13 @@ void USART2_IRQHandler(void) static int index = 0; uint8_t v; if( LL_USART_IsActiveFlag_ORE(TRICE_UARTA) ){ - TRice(iD(13000), "WARNING:USARTq OverRun Error Flag is set!\n" ); + TRice("WARNING:USARTq OverRun Error Flag is set!\n" ); } v = LL_USART_ReceiveData8(TRICE_UARTA); // implicit clears the flag rxBuf[index] = (char)v; index += index < TRICE_COMMAND_SIZE_MAX ? 1 : 0; if( v == 0 ){ // command end - TRICE_S(Id(13001), "rx:received command:%s\n", rxBuf ); + TRICE_S(Id(0), "rx:received command:%s\n", rxBuf ); strcpy(triceCommandBuffer, rxBuf ); triceCommandFlag = 1; index = 0; diff --git a/examples/G0B1_inst/Core/Inc/triceConfig.h b/examples/G0B1_inst/Core/Inc/triceConfig.h index b272e5611..59a380be4 100644 --- a/examples/G0B1_inst/Core/Inc/triceConfig.h +++ b/examples/G0B1_inst/Core/Inc/triceConfig.h @@ -10,7 +10,7 @@ extern "C" { #endif //! TRICE_CLEAN, if found inside triceConfig.h, is modified by the Trice tool to silent editor warnings in the cleaned state. -#define TRICE_CLEAN 0 // Do not define this at an other place! But you can delete this here. +#define TRICE_CLEAN 1 // Do not define this at an other place! But you can delete this here. // hardware specific trice lib settings #include "main.h" diff --git a/examples/G0B1_inst/Core/Src/main.c b/examples/G0B1_inst/Core/Src/main.c index 3949fec23..770cc5713 100644 --- a/examples/G0B1_inst/Core/Src/main.c +++ b/examples/G0B1_inst/Core/Src/main.c @@ -311,7 +311,7 @@ void StartDefaultTask(void const * argument) { /* USER CODE BEGIN 5 */ TRICE_UNUSED(argument) - TRice(iD(13003), "msg:StartDefaultTask\n"); + TRice("msg:StartDefaultTask\n"); /* Infinite loop */ for(;;) { @@ -338,7 +338,7 @@ void StartTask02(void const * argument) { /* USER CODE BEGIN StartTask02 */ TRICE_UNUSED(argument) - TRice(iD(13004), "msg:StartTask02:Diagnostics and TriceTransfer\n" ); + TRice("msg:StartTask02:Diagnostics and TriceTransfer\n" ); /* Infinite loop */ for(;;) { diff --git a/examples/G0B1_inst/Core/Src/stm32g0xx_it.c b/examples/G0B1_inst/Core/Src/stm32g0xx_it.c index 1a611abf2..83716381d 100644 --- a/examples/G0B1_inst/Core/Src/stm32g0xx_it.c +++ b/examples/G0B1_inst/Core/Src/stm32g0xx_it.c @@ -116,7 +116,7 @@ void TIM17_FDCAN_IT1_IRQHandler(void) #if !TRICE_OFF static int i = 0; if( i++>25000 ){ - trice(iD(13002), "isr:TIM17_FDCAN_IT1_IRQHandler! (%u ms)\n", i ); + trice("isr:TIM17_FDCAN_IT1_IRQHandler! (%u ms)\n", i ); i = 0; } #endif diff --git a/examples/L432_inst/Core/Inc/triceConfig.h b/examples/L432_inst/Core/Inc/triceConfig.h index 7ee9230b3..fbda044ca 100644 --- a/examples/L432_inst/Core/Inc/triceConfig.h +++ b/examples/L432_inst/Core/Inc/triceConfig.h @@ -11,7 +11,7 @@ extern "C" { #endif //! TRICE_CLEAN, if found inside triceConfig.h, is modified by the Trice tool to silent editor warnings in the cleaned state. -#define TRICE_CLEAN 0 // Do not define this at an other place! But you can delete this here. +#define TRICE_CLEAN 1 // Do not define this at an other place! But you can delete this here. #include @@ -1064,7 +1064,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS #elif CONFIGURATION == 97 ///////////////////////////////////////////////////////////// -#define LogConfigInfo() trice8(iD(13009), "dbg:CONFIGURATION == %d - An example configuration with direct RTT output only and optimized for speed\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration with direct RTT output only and optimized for speed\n", CONFIGURATION ); #define TRICE_DIRECT_OUTPUT 1 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_PROTECT 0 @@ -1074,7 +1074,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 #elif CONFIGURATION == 98 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8(iD(13010), "dbg:CONFIGURATION == %d - UART, no cycle counter, no critical sections.\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - UART, no cycle counter, no critical sections.\n", CONFIGURATION ); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 @@ -1093,14 +1093,14 @@ void SomeExampleTrices(int burstCount); #define TRICE_LEAVE_CRITICAL_SECTION } #elif CONFIGURATION == 99 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8(iD(13011), "dbg:CONFIGURATION == %d - An minimum configuration example.\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An minimum configuration example.\n", CONFIGURATION ); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 #define TRICE_BUFFER TRICE_RING_BUFFER #elif CONFIGURATION == 100 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8(iD(13012), "dbg:CONFIGURATION == %d - An example configuration with direct RTT output and parallel deferred UART output.\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration with direct RTT output and parallel deferred UART output.\n", CONFIGURATION ); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 @@ -1119,7 +1119,7 @@ void SomeExampleTrices(int burstCount); #endif #ifndef LogConfigInfo -#define LogConfigInfo() trice8(iD(13013), "dbg:CONFIGURATION == %d - An example configuration\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration\n", CONFIGURATION ); #endif #ifdef __cplusplus diff --git a/examples/L432_inst/Core/Src/main.c b/examples/L432_inst/Core/Src/main.c index 0210fa084..e57beda32 100644 --- a/examples/L432_inst/Core/Src/main.c +++ b/examples/L432_inst/Core/Src/main.c @@ -335,7 +335,7 @@ void StartDefaultTask(void const * argument) { /* USER CODE BEGIN 5 */ TRICE_UNUSED(argument) - TRice(iD(13005), "msg:StartDefaultTask\n"); + TRice("msg:StartDefaultTask\n"); /* Infinite loop */ for(;;) { @@ -362,7 +362,7 @@ void StartTask02(void const * argument) { /* USER CODE BEGIN StartTask02 */ TRICE_UNUSED(argument) - TRice(iD(13006), "msg:StartTask02:Diagnostics and TriceTransfer\n" ); + TRice("msg:StartTask02:Diagnostics and TriceTransfer\n" ); /* Infinite loop */ for(;;) { diff --git a/examples/L432_inst/Core/Src/stm32l4xx_it.c b/examples/L432_inst/Core/Src/stm32l4xx_it.c index 063631347..109107538 100644 --- a/examples/L432_inst/Core/Src/stm32l4xx_it.c +++ b/examples/L432_inst/Core/Src/stm32l4xx_it.c @@ -188,13 +188,13 @@ void USART2_IRQHandler(void) static int index = 0; uint8_t v; if( LL_USART_IsActiveFlag_ORE(TRICE_UARTA) ){ - TRice(iD(13007), "WARNING:USARTq OverRun Error Flag is set!\n" ); + TRice("WARNING:USARTq OverRun Error Flag is set!\n" ); } v = LL_USART_ReceiveData8(TRICE_UARTA); // implicit clears the flag rxBuf[index] = (char)v; index += index < TRICE_COMMAND_SIZE_MAX ? 1 : 0; if( v == 0 ){ // command end - TRICE_S(Id(13008), "rx:received command:%s\n", rxBuf ); + TRICE_S(Id(0), "rx:received command:%s\n", rxBuf ); strcpy(triceCommandBuffer, rxBuf ); triceCommandFlag = 1; index = 0; diff --git a/examples/exampleData/triceExamples.c b/examples/exampleData/triceExamples.c index 256ec2675..d60d98a03 100644 --- a/examples/exampleData/triceExamples.c +++ b/examples/exampleData/triceExamples.c @@ -9,47 +9,47 @@ //! TriceHeadLine emits a decorated name. The name length should be 18 characters. void TriceHeadLine(char* name) { //! This is usable as the very first trice sequence after restart. Adapt it. Use a UTF-8 capable editor like VS-Code or use pure ASCII. - TriceS(iD(16369), "w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", name); + TriceS("w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", name); } //! SomeExampleTrices generates a few Trice example logs and a burst of Trices. void SomeExampleTrices(int burstCount) { - // TRICE32_0(ID(16368), "att:🐁 Speedy Gonzales A 32-bit time stamp\n"); - // TRICE32_0(ID(16367), "att:🐁 Speedy Gonzales B 32-bit time stamp\n"); - // TRICE32_0(ID(16366), "att:🐁 Speedy Gonzales C 32-bit time stamp\n"); - // TRICE32_0(ID(16365), "att:🐁 Speedy Gonzales D 32-bit time stamp\n"); - // TRICE32_0(Id(16364), "att:🐁 Speedy Gonzales E 16-bit time stamp\n"); - // TRICE32_0(Id(16363), "att:🐁 Speedy Gonzales F 16-bit time stamp\n"); - // TRICE32_0(Id(16362), "att:🐁 Speedy Gonzales G 16-bit time stamp\n"); - // TRICE32_0(Id(16361), "att:🐁 Speedy Gonzales H 16-bit time stamp\n"); - // TRICE32_0(id(16360), "att:🐁 Speedy Gonzales I without time stamp\n"); - // TRICE32_0(id(16359), "att:🐁 Speedy Gonzales J without time stamp\n"); - // TRICE32_0(id(16358), "att:🐁 Speedy Gonzales K without time stamp\n"); - // TRICE32_0(id(16357), "att:🐁 Speedy Gonzales L without time stamp\n"); - TRice(iD(16356), "att:🐁 Speedy Gonzales a 32-bit time stamp\n"); - TRice(iD(16355), "att:🐁 Speedy Gonzales b 32-bit time stamp\n"); - TRice(iD(16354), "att:🐁 Speedy Gonzales c 32-bit time stamp\n"); - TRice(iD(16353), "att:🐁 Speedy Gonzales d 32-bit time stamp\n"); - Trice(iD(16352), "att:🐁 Speedy Gonzales e 16-bit time stamp\n"); - Trice(iD(16351), "att:🐁 Speedy Gonzales f 16-bit time stamp\n"); - Trice(iD(16350), "att:🐁 Speedy Gonzales g 16-bit time stamp\n"); - Trice(iD(16349), "att:🐁 Speedy Gonzales h 16-bit time stamp\n"); - // trice(iD(16348), "att:🐁 Speedy Gonzales i without time stamp\n"); - // trice(iD(16347), "att:🐁 Speedy Gonzales j without time stamp\n"); - // trice(iD(16346), "att:🐁 Speedy Gonzales k without time stamp\n"); - // trice(iD(16345), "att:🐁 Speedy Gonzales l without time stamp\n"); + // TRICE32_0(ID(0), "att:🐁 Speedy Gonzales A 32-bit time stamp\n"); + // TRICE32_0(ID(0), "att:🐁 Speedy Gonzales B 32-bit time stamp\n"); + // TRICE32_0(ID(0), "att:🐁 Speedy Gonzales C 32-bit time stamp\n"); + // TRICE32_0(ID(0), "att:🐁 Speedy Gonzales D 32-bit time stamp\n"); + // TRICE32_0(Id(0), "att:🐁 Speedy Gonzales E 16-bit time stamp\n"); + // TRICE32_0(Id(0), "att:🐁 Speedy Gonzales F 16-bit time stamp\n"); + // TRICE32_0(Id(0), "att:🐁 Speedy Gonzales G 16-bit time stamp\n"); + // TRICE32_0(Id(0), "att:🐁 Speedy Gonzales H 16-bit time stamp\n"); + // TRICE32_0(id(0), "att:🐁 Speedy Gonzales I without time stamp\n"); + // TRICE32_0(id(0), "att:🐁 Speedy Gonzales J without time stamp\n"); + // TRICE32_0(id(0), "att:🐁 Speedy Gonzales K without time stamp\n"); + // TRICE32_0(id(0), "att:🐁 Speedy Gonzales L without time stamp\n"); + TRice("att:🐁 Speedy Gonzales a 32-bit time stamp\n"); + TRice("att:🐁 Speedy Gonzales b 32-bit time stamp\n"); + TRice("att:🐁 Speedy Gonzales c 32-bit time stamp\n"); + TRice("att:🐁 Speedy Gonzales d 32-bit time stamp\n"); + Trice("att:🐁 Speedy Gonzales e 16-bit time stamp\n"); + Trice("att:🐁 Speedy Gonzales f 16-bit time stamp\n"); + Trice("att:🐁 Speedy Gonzales g 16-bit time stamp\n"); + Trice("att:🐁 Speedy Gonzales h 16-bit time stamp\n"); + // trice("att:🐁 Speedy Gonzales i without time stamp\n"); + // trice("att:🐁 Speedy Gonzales j without time stamp\n"); + // trice("att:🐁 Speedy Gonzales k without time stamp\n"); + // trice("att:🐁 Speedy Gonzales l without time stamp\n"); char* aString = "2.71828182845904523536"; - TriceS(iD(16344), "rd:%s <- float number as string\n", aString); - Trice64(iD(16343), "msg:%.20f (double with more ciphers than precision)\n", aDouble(2.71828182845904523536)); - Trice(iD(16342), "msg:%.20f (float with more ciphers than precision)\n", aFloat(2.71828182845904523536)); - Trice(iD(16341), "msg:%f (default rounded float)\n", aFloat(2.71828182845904523536)); - Trice(iD(16340), "info:A Buffer:\n"); - Trice8B(iD(16339), "msg:%02x \n", aString, strlen(aString)); - Trice32B(iD(16338), "msg:%08x \n", aString, strlen(aString) >> 2); - Trice16F(iD(16337), "att:ARemoteFunctionName", aString, strlen(aString) >> 1); - trice(iD(16336), "info:%d times a 16 byte long Trice messages, which may not be written all if the buffer is too small:\n", burstCount); + TriceS("rd:%s <- float number as string\n", aString); + Trice64("msg:%.20f (double with more ciphers than precision)\n", aDouble(2.71828182845904523536)); + Trice("msg:%.20f (float with more ciphers than precision)\n", aFloat(2.71828182845904523536)); + Trice("msg:%f (default rounded float)\n", aFloat(2.71828182845904523536)); + Trice("info:A Buffer:\n"); + Trice8B("msg:%02x \n", aString, strlen(aString)); + Trice32B("msg:%08x \n", aString, strlen(aString) >> 2); + Trice16F("att:ARemoteFunctionName", aString, strlen(aString) >> 1); + trice("info:%d times a 16 byte long Trice messages, which may not be written all if the buffer is too small:\n", burstCount); for (int i = 0; i < burstCount; i++) { - Trice(iD(16335), "i=%x %x\n", 0x44444400 + i, 0xaaaaaa00 + i); + Trice("i=%x %x\n", 0x44444400 + i, 0xaaaaaa00 + i); } } @@ -58,23 +58,23 @@ void LogTriceConfiguration(void) { #ifdef LogConfigInfo LogConfigInfo(); #endif - trice(iD(16334), "deb:TRICE_DIRECT_OUTPUT == %d, TRICE_DEFERRED_OUTPUT == %d\n", TRICE_DIRECT_OUTPUT, TRICE_DEFERRED_OUTPUT); + trice("deb:TRICE_DIRECT_OUTPUT == %d, TRICE_DEFERRED_OUTPUT == %d\n", TRICE_DIRECT_OUTPUT, TRICE_DEFERRED_OUTPUT); #if TRICE_BUFFER == TRICE_STACK_BUFFER - trice(iD(16333), "deb:TRICE_STACK_BUFFER, "); + trice("deb:TRICE_STACK_BUFFER, "); #elif TRICE_BUFFER == TRICE_STATIC_BUFFER - trice(iD(16332), "deb:TRICE_STATIC_BUFFER, "); + trice("deb:TRICE_STATIC_BUFFER, "); #elif TRICE_BUFFER == TRICE_DOUBLE_BUFFER - trice(iD(16331), "deb:TRICE_DOUBLE_BUFFER, "); + trice("deb:TRICE_DOUBLE_BUFFER, "); #elif TRICE_BUFFER == TRICE_RING_BUFFER - trice(iD(16330), "deb:TRICE_RING_BUFFER, "); + trice("deb:TRICE_RING_BUFFER, "); #endif #if TRICE_DEFERRED_TRANSFER_MODE == TRICE_SINGLE_PACK_MODE - trice(iD(16329), "deb:TRICE_SINGLE_PACK_MODE\n"); + trice("deb:TRICE_SINGLE_PACK_MODE\n"); #else - trice(iD(16328), "deb:TRICE_MULTI_PACK_MODE\n"); + trice("deb:TRICE_MULTI_PACK_MODE\n"); #endif - trice(iD(16327), "deb:_CYCLE == %d, _PROTECT == %d, _DIAG == %d, XTEA == %d\n", TRICE_CYCLE_COUNTER, TRICE_PROTECT, TRICE_DIAGNOSTICS, TRICE_DEFERRED_XTEA_ENCRYPT); - trice(iD(16326), "d:_SINGLE_MAX_SIZE=%d, _BUFFER_SIZE=%d, _DEFERRED_BUFFER_SIZE=%d\n", TRICE_SINGLE_MAX_SIZE, TRICE_BUFFER_SIZE, TRICE_DEFERRED_BUFFER_SIZE); + trice("deb:_CYCLE == %d, _PROTECT == %d, _DIAG == %d, XTEA == %d\n", TRICE_CYCLE_COUNTER, TRICE_PROTECT, TRICE_DIAGNOSTICS, TRICE_DEFERRED_XTEA_ENCRYPT); + trice("d:_SINGLE_MAX_SIZE=%d, _BUFFER_SIZE=%d, _DEFERRED_BUFFER_SIZE=%d\n", TRICE_SINGLE_MAX_SIZE, TRICE_BUFFER_SIZE, TRICE_DEFERRED_BUFFER_SIZE); } #endif // #if !TRICE_OFF diff --git a/examples/exampleData/triceLogDiagData.c b/examples/exampleData/triceLogDiagData.c index 1043fced8..38be708af 100644 --- a/examples/exampleData/triceLogDiagData.c +++ b/examples/exampleData/triceLogDiagData.c @@ -16,44 +16,44 @@ void TriceLogDiagnosticData(void) { #ifdef SEGGER_RTT int RTT0_wrSpaceMin = BUFFER_SIZE_UP - RTT0_writeDepthMax; if ((RTT0_wrSpaceMin < TRICE_BUFFER_SIZE)) { - trice16(iD(16383), "WARNING:RTT0_writeDepthMax=%u (BUFFER_SIZE_UP=%u)\n", RTT0_writeDepthMax, BUFFER_SIZE_UP); + trice16("WARNING:RTT0_writeDepthMax=%u (BUFFER_SIZE_UP=%u)\n", RTT0_writeDepthMax, BUFFER_SIZE_UP); } else { - trice16(iD(16382), "diag:RTT0_writeDepthMax=%u (BUFFER_SIZE_UP=%u)\n", RTT0_writeDepthMax, BUFFER_SIZE_UP); + trice16("diag:RTT0_writeDepthMax=%u (BUFFER_SIZE_UP=%u)\n", RTT0_writeDepthMax, BUFFER_SIZE_UP); } #endif // #ifdef SEGGER_RTT if (TriceErrorCount > 0) { - trice16(iD(16381), "err:TriceErrorCount = %u\n", TriceErrorCount); + trice16("err:TriceErrorCount = %u\n", TriceErrorCount); } #if TRICE_PROTECT == 1 #if TRICE_DIRECT_OUTPUT == 1 if (TriceDirectOverflowCount != 0) { - trice16(iD(16380), "err:TriceDirectOverflowCount = %u\n", TriceDirectOverflowCount); + trice16("err:TriceDirectOverflowCount = %u\n", TriceDirectOverflowCount); } #endif // #if TRICE_DIRECT_OUTPUT == 1 #if TRICE_DEFERRED_OUTPUT == 1 if (TriceDeferredOverflowCount != 0) { - trice16(iD(16379), "err:TriceDeferredOverflowCount = %u\n", TriceDeferredOverflowCount); + trice16("err:TriceDeferredOverflowCount = %u\n", TriceDeferredOverflowCount); } #endif // #if TRICE_DEFERRED_OUTPUT == 1 #endif // #if TRICE_PROTECT == 1 unsigned triceSingleDepthMax = TRICE_DATA_OFFSET + (TriceSingleMaxWordCount << 2); // lint !e845 Info 845: The left argument to operator '<<' is certain to be 0 if (triceSingleDepthMax <= TRICE_BUFFER_SIZE) { - trice16(iD(16378), "diag:triceSingleDepthMax =%4u of %d (TRICE_BUFFER_SIZE)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE); + trice16("diag:triceSingleDepthMax =%4u of %d (TRICE_BUFFER_SIZE)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE); } else { - trice16(iD(16377), "err:triceSingleDepthMax =%4u of %d (TRICE_BUFFER_SIZE overflow!)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE); + trice16("err:triceSingleDepthMax =%4u of %d (TRICE_BUFFER_SIZE overflow!)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE); } if (TriceDataOffsetDepthMax < 0 || TriceDataOffsetDepthMax >= TRICE_DATA_OFFSET) { - trice16(iD(16376), "err:TriceDataOffsetDepthMax = %d of %d (TRICE_DATA_OFFSET)\n", TriceDataOffsetDepthMax, TRICE_DATA_OFFSET); + trice16("err:TriceDataOffsetDepthMax = %d of %d (TRICE_DATA_OFFSET)\n", TriceDataOffsetDepthMax, TRICE_DATA_OFFSET); } else if (TriceDataOffsetDepthMax != 0) { - trice16(iD(16375), "diag:TriceDataOffsetDepthMax = %d of %d (TRICE_DATA_OFFSET)\n", TriceDataOffsetDepthMax, TRICE_DATA_OFFSET); + trice16("diag:TriceDataOffsetDepthMax = %d of %d (TRICE_DATA_OFFSET)\n", TriceDataOffsetDepthMax, TRICE_DATA_OFFSET); } if (TriceDynStringBufTruncateCount != 0) { - trice16(iD(15556), "wrn:TriceDynStringBufTruncateCount = %u\n", TriceDynStringBufTruncateCount); + trice16("wrn:TriceDynStringBufTruncateCount = %u\n", TriceDynStringBufTruncateCount); } #if TRICE_BUFFER == TRICE_STACK_BUFFER @@ -64,17 +64,17 @@ void TriceLogDiagnosticData(void) { #if TRICE_BUFFER == TRICE_DOUBLE_BUFFER if (TriceHalfBufferDepthMax <= TRICE_DEFERRED_BUFFER_SIZE / 2) { - trice16(iD(16373), "diag:TriceHalfBufferDepthMax =%4u of%5d\n", TriceHalfBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE / 2); + trice16("diag:TriceHalfBufferDepthMax =%4u of%5d\n", TriceHalfBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE / 2); } else { - trice16(iD(16372), "err:TriceHalfBufferDepthMax =%4u of%5d (overflow!)\n", TriceHalfBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE / 2); + trice16("err:TriceHalfBufferDepthMax =%4u of%5d (overflow!)\n", TriceHalfBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE / 2); } #endif // #if TRICE_BUFFER == TRICE_DOUBLE_BUFFER #if TRICE_BUFFER == TRICE_RING_BUFFER if (TriceRingBufferDepthMax <= TRICE_DEFERRED_BUFFER_SIZE) { - trice16(iD(16371), "diag:triceRingBufferDepthMax =%4u of%5d\n", TriceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE); + trice16("diag:triceRingBufferDepthMax =%4u of%5d\n", TriceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE); } else { - trice16(iD(16370), "err:triceRingBufferDepthMax =%4u of%5d (overflow!)\n", TriceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE); + trice16("err:triceRingBufferDepthMax =%4u of%5d (overflow!)\n", TriceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE); } #endif // #if TRICE_BUFFER == TRICE_RING_BUFFER } diff --git a/internal/id/insertIDs_test.go b/internal/id/insertIDs_test.go index 5fc30fa2a..ad8f85e3c 100644 --- a/internal/id/insertIDs_test.go +++ b/internal/id/insertIDs_test.go @@ -928,9 +928,9 @@ func TestInsertIDsForNewTrice2(t *testing.T) { } } -// TestInsertIDsForNewTrice2 checks for correct line numer in case of an format string / parameter count error. +// _TestInsertIDsForNewTrice_Issue_523 checks for correct line numer in case of an format string / parameter count error. // This test needs a modified insertTriceIDs function: Inside if !SkipAdditionalChecks { replace os.Exit(-1) with return } -func _TestInsertIDsForNewTrice_Issue_5xx(t *testing.T) { +func _TestInsertIDsForNewTrice_Issue_523(t *testing.T) { defer Setup(t)() // This executes Setup(t) and puts the returned function into the defer list. fn0 := t.Name() + "file0.c" From 50c36e151f021ae022636253c7c0df9af34571d3 Mon Sep 17 00:00:00 2001 From: "dependabot[bot]" <49699333+dependabot[bot]@users.noreply.github.com> Date: Mon, 14 Apr 2025 18:56:40 +0000 Subject: [PATCH 012/187] Bump golang.org/x/crypto from 0.31.0 to 0.35.0 Bumps [golang.org/x/crypto](https://github.com/golang/crypto) from 0.31.0 to 0.35.0. - [Commits](https://github.com/golang/crypto/compare/v0.31.0...v0.35.0) --- updated-dependencies: - dependency-name: golang.org/x/crypto dependency-version: 0.35.0 dependency-type: direct:production ... Signed-off-by: dependabot[bot] --- go.mod | 6 +++--- go.sum | 12 ++++++------ 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/go.mod b/go.mod index 72716ca07..3f704d476 100644 --- a/go.mod +++ b/go.mod @@ -14,7 +14,7 @@ require ( github.com/tj/assert v0.0.3 github.com/udhos/equalfile v0.3.0 go.bug.st/serial v1.6.0 - golang.org/x/crypto v0.31.0 + golang.org/x/crypto v0.35.0 ) require ( @@ -24,7 +24,7 @@ require ( github.com/mattn/go-colorable v0.1.13 // indirect github.com/mattn/go-isatty v0.0.19 // indirect github.com/pmezard/go-difflib v1.0.0 // indirect - golang.org/x/sys v0.28.0 // indirect - golang.org/x/text v0.21.0 // indirect + golang.org/x/sys v0.30.0 // indirect + golang.org/x/text v0.22.0 // indirect gopkg.in/yaml.v3 v3.0.1 // indirect ) diff --git a/go.sum b/go.sum index b7cb38660..05c28c04e 100644 --- a/go.sum +++ b/go.sum @@ -179,8 +179,8 @@ golang.org/x/crypto v0.0.0-20191011191535-87dc89f01550/go.mod h1:yigFU9vqHzYiE8U golang.org/x/crypto v0.0.0-20200622213623-75b288015ac9/go.mod h1:LzIPMQfyMNhhGPhUkYOs5KpL4U8rLKemX1yGLhDgUto= golang.org/x/crypto v0.0.0-20210421170649-83a5a9bb288b/go.mod h1:T9bdIzuCu7OtxOm1hfPfRQxPLYneinmdGuTeoZ9dtd4= golang.org/x/crypto v0.0.0-20220722155217-630584e8d5aa/go.mod h1:IxCIyHEi3zRg3s0A5j5BB6A9Jmi73HwBIUl50j+osU4= -golang.org/x/crypto v0.31.0 h1:ihbySMvVjLAeSH1IbfcRTkD/iNscyz8rGzjF/E5hV6U= -golang.org/x/crypto v0.31.0/go.mod h1:kDsLvtWBEx7MV9tJOj9bnXsPbxwJQ6csT/x4KIN4Ssk= +golang.org/x/crypto v0.35.0 h1:b15kiHdrGCHrP6LvwaQ3c03kgNhhiMgvlhxHQhmg2Xs= +golang.org/x/crypto v0.35.0/go.mod h1:dy7dXNW32cAb/6/PRuTNsix8T+vJAqvuIy5Bli/x0YQ= golang.org/x/exp v0.0.0-20190121172915-509febef88a4/go.mod h1:CJ0aWSM057203Lf6IL+f9T1iT9GByDxfZKAQTCR3kQA= golang.org/x/exp v0.0.0-20190306152737-a1d7652674e8/go.mod h1:CJ0aWSM057203Lf6IL+f9T1iT9GByDxfZKAQTCR3kQA= golang.org/x/exp v0.0.0-20190510132918-efd6b22b2522/go.mod h1:ZjyILWgesfNpC6sMxTJOJm9Kp84zZh5NQWvqDGG3Qr8= @@ -303,8 +303,8 @@ golang.org/x/sys v0.0.0-20210615035016-665e8c7367d1/go.mod h1:oPkhp1MJrh7nUepCBc golang.org/x/sys v0.0.0-20220811171246-fbc7d0a398ab/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg= golang.org/x/sys v0.0.0-20220908164124-27713097b956/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg= golang.org/x/sys v0.6.0/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg= -golang.org/x/sys v0.28.0 h1:Fksou7UEQUWlKvIdsqzJmUmCX3cZuD2+P3XyyzwMhlA= -golang.org/x/sys v0.28.0/go.mod h1:/VUhepiaJMQUp4+oa/7Zr1D23ma6VTLIYjOOTFZPUcA= +golang.org/x/sys v0.30.0 h1:QjkSwP/36a20jFYWkSue1YwXzLmsV5Gfq7Eiy72C1uc= +golang.org/x/sys v0.30.0/go.mod h1:/VUhepiaJMQUp4+oa/7Zr1D23ma6VTLIYjOOTFZPUcA= golang.org/x/term v0.0.0-20201126162022-7de9c90e9dd1/go.mod h1:bj7SfCRtBDWHUb9snDiAeCFNEtKQo2Wmx5Cou7ajbmo= golang.org/x/text v0.0.0-20170915032832-14c0d48ead0c/go.mod h1:NqM8EUOU14njkJ3fqMW+pc6Ldnwhi/IjpwHt7yyuwOQ= golang.org/x/text v0.3.0/go.mod h1:NqM8EUOU14njkJ3fqMW+pc6Ldnwhi/IjpwHt7yyuwOQ= @@ -314,8 +314,8 @@ golang.org/x/text v0.3.3/go.mod h1:5Zoc/QRtKVWzQhOtBMvqHzDpF6irO9z98xDceosuGiQ= golang.org/x/text v0.3.4/go.mod h1:5Zoc/QRtKVWzQhOtBMvqHzDpF6irO9z98xDceosuGiQ= golang.org/x/text v0.3.6/go.mod h1:5Zoc/QRtKVWzQhOtBMvqHzDpF6irO9z98xDceosuGiQ= golang.org/x/text v0.3.7/go.mod h1:u+2+/6zg+i71rQMx5EYifcz6MCKuco9NR6JIITiCfzQ= -golang.org/x/text v0.21.0 h1:zyQAAkrwaneQ066sspRyJaG9VNi/YJ1NfzcGB3hZ/qo= -golang.org/x/text v0.21.0/go.mod h1:4IBbMaMmOPCJ8SecivzSH54+73PCFmPWxNTLm+vZkEQ= +golang.org/x/text v0.22.0 h1:bofq7m3/HAFvbF51jz3Q9wLg3jkvSPuiZu/pD1XwgtM= +golang.org/x/text v0.22.0/go.mod h1:YRoo4H8PVmsu+E3Ou7cqLVH8oXWIHVoX0jqUWALQhfY= golang.org/x/time v0.0.0-20181108054448-85acf8d2951c/go.mod h1:tRJNPiyCQ0inRvYxbN9jk5I+vvW/OXSQhTDSoE431IQ= golang.org/x/time v0.0.0-20190308202827-9d24e82272b4/go.mod h1:tRJNPiyCQ0inRvYxbN9jk5I+vvW/OXSQhTDSoE431IQ= golang.org/x/time v0.0.0-20191024005414-555d28b269f0/go.mod h1:tRJNPiyCQ0inRvYxbN9jk5I+vvW/OXSQhTDSoE431IQ= From 47bb43b724d0e92c4f4536c3d17d2314fc497b15 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Fri, 25 Apr 2025 16:27:32 +0200 Subject: [PATCH 013/187] more file extensions supported now --- go.mod | 4 +++- internal/id/Update.go | 4 ++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/go.mod b/go.mod index 3f704d476..20c207838 100644 --- a/go.mod +++ b/go.mod @@ -1,6 +1,8 @@ module github.com/rokath/trice -go 1.20 +go 1.23.0 + +toolchain go1.23.4 require ( github.com/fsnotify/fsnotify v1.6.0 diff --git a/internal/id/Update.go b/internal/id/Update.go index 86256ed20..c11a5a2d7 100644 --- a/internal/id/Update.go +++ b/internal/id/Update.go @@ -19,8 +19,8 @@ import ( const ( - // patSourceFile is a regex pattern matching any source file for patching - patSourceFile = "(\\.c|\\.h|\\.cc|\\.cpp|\\.hpp)$" + // patSourceFile is a regex pattern matching any source file for patching (https://stackoverflow.com/questions/1545080/c-code-file-extension-what-is-the-difference-between-cc-and-cpp) + patSourceFile = "(\\.c|\\.cc|\\.cp|\\.cxx|\\.cpp|\\.CPP|\\.c\\+\\+|\\.C|\\.h|\\.hh|\\.hp|\\.hxx|\\.hpp|\\.HPP|\\.h\\+\\+|\\.H|\\.ixx|\\.inc)$" // patTypNameTRICE matches any TRICE name variant. The (?i) says case-insensitive. (?U)=un-greedy -> only first match. patTypNameTRICE = `(?iU)(\b((TRICE((0|_0|AssertTrue|AssertFalse)|((8|16|32|64)*(_*[0-9|S|N|B|F]*)*))))\b)` // https://regex101.com/r/xuD9ar/1 From 5ef0a23bfcd5907790b6ad8d8e3577e2434ad54a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Fri, 25 Apr 2025 16:49:14 +0200 Subject: [PATCH 014/187] updated --- .goreleaser.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.goreleaser.yaml b/.goreleaser.yaml index 4cda391de..56501af8c 100644 --- a/.goreleaser.yaml +++ b/.goreleaser.yaml @@ -87,7 +87,7 @@ archives: # If format is `binary`, no archives are created and the binaries are instead # uploaded directly. # Default is `tar.gz`. - format: tar.gz + formats: tar.gz # use zip for windows archives # Can be used to change the archive formats for specific GOOSs. @@ -95,7 +95,7 @@ archives: # Default is empty. format_overrides: - goos: windows - format: zip + formats: [ 'zip' ] # Additional files/globs you want to add to the archive. # Defaults are any files matching `LICENCE*`, `LICENSE*`, # `README*` and `CHANGELOG*` (case-insensitive). From ef6f3046819b25d50cdf79ded10cc902a61d5a6a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Fri, 25 Apr 2025 17:19:17 +0200 Subject: [PATCH 015/187] Release 1.0 --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 74669975a..43a04dfe7 100644 --- a/README.md +++ b/README.md @@ -24,7 +24,7 @@ Log in (a) trice ([S>G](https://www.screentogif.com/)) ![ ](./docs/ref/life0.gif even inside **↯ interrupts** in less than 1 µs❗ -## About (Release 1.0 comming soon...) +## About - Replace `printf` or `log` in **C**-code for getting: - **[Speed](./docs/TriceUserManual.md/#trice-speed)**, to be usable also **inside interrupts**, From 526f31a73dba75b10f598f450d967271a0be189f Mon Sep 17 00:00:00 2001 From: rokath Date: Wed, 7 May 2025 12:46:08 +0200 Subject: [PATCH 016/187] wip --- _test/be_dblB_de_tcobs_ua/generated_cgoPackage.go | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/_test/be_dblB_de_tcobs_ua/generated_cgoPackage.go b/_test/be_dblB_de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/be_dblB_de_tcobs_ua/generated_cgoPackage.go +++ b/_test/be_dblB_de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" From 0c46265909c2f221cfea0f41b5d0d64e302bbdc1 Mon Sep 17 00:00:00 2001 From: rokath Date: Wed, 7 May 2025 16:14:23 +0200 Subject: [PATCH 017/187] wip issue 526 --- src/trice.h | 54 ++++++++++++++++++++--------------------- src/trice8McuOrder.h | 12 ++++----- src/triceDoubleBuffer.c | 6 ++--- src/triceMcuOrder.h | 20 +++++++-------- src/triceMcuReverse.h | 20 +++++++-------- src/triceStaticBuffer.c | 2 +- 6 files changed, 57 insertions(+), 57 deletions(-) diff --git a/src/trice.h b/src/trice.h index 73bfbaf5c..2284f91f9 100644 --- a/src/trice.h +++ b/src/trice.h @@ -109,10 +109,10 @@ extern "C" { // aFloat returns passed float value x as bit pattern in a uint32_t type. TRICE_INLINE uint32_t aFloat(float f) { union { - float from; - uint32_t to; - } pun = {.from = f}; - return pun.to; + float from_aFloat; + uint32_t to_aFloat; + } pun = {.from_aFloat = f}; + return pun.to_aFloat; } // aDouble returns passed double value x as bit pattern in a uint64_t type. @@ -120,9 +120,9 @@ TRICE_INLINE uint64_t aDouble(double x) { union { double d; uint64_t u; - } t; - t.d = x; - return t.u; + } t_aDouble; + t_aDouble.d = x; + return t_aDouble.u; } // Just in case you are receiving Trice messages containing uint32_t values to be interpreted as float: @@ -178,7 +178,7 @@ TRICE_INLINE uint64_t aDouble(double x) { // global variables: -extern uint32_t* const triceSingleBufferStartWritePosition; +extern uint32_t* const triceSingleBufferStartWritePositionXXX; extern unsigned TricesCountRingBuffer; extern char triceCommandBuffer[]; extern int triceCommandFlag; @@ -283,9 +283,9 @@ extern uint32_t* TriceBufferWritePosition; //! TRICE_PUT16 copies 16-bit value x into the Trice buffer. #define TRICE_PUT16(x) \ do { \ - uint16_t* p = (uint16_t*)TriceBufferWritePosition; \ - *p++ = TRICE_HTOTS(x); \ - TriceBufferWritePosition = (uint32_t*)p; \ + uint16_t* p_TRICE_PUT16 = (uint16_t*)TriceBufferWritePosition; \ + *p_TRICE_PUT16++ = TRICE_HTOTS(x); \ + TriceBufferWritePosition = (uint32_t*)p_TRICE_PUT16; \ } while (0) #include "trice8.h" @@ -607,19 +607,19 @@ extern uint32_t* TriceBufferWritePosition; #define TRICE_N(tid, pFmt, buf, n) \ do { \ TRICE_UNUSED(pFmt); \ - uint32_t limit = TRICE_SINGLE_MAX_SIZE - 12; /* 12 = head(2) + max timestamp size(4) + count(2) + max 3 zeroes, we take 4 */ \ - uint32_t len_ = n; /* n could be a constant */ \ - if (len_ > limit) { \ + uint32_t limit_TRICE_N = TRICE_SINGLE_MAX_SIZE - 12; /* 12 = head(2) + max timestamp size(4) + count(2) + max 3 zeroes, we take 4 */ \ + uint32_t len_TRICE_N = n; /* n could be a constant */ \ + if (len_TRICE_N > limit_TRICE_N) { \ TRICE_DYN_STRG_BUF_TRUNCATE_COUNT_INCREMENT(); \ - len_ = limit; \ + len_TRICE_N = limit_TRICE_N; \ } \ TRICE_ENTER tid; \ - if (len_ <= 127) { \ - TRICE_CNTC(len_); \ + if (len_TRICE_N <= 127) { \ + TRICE_CNTC(len_TRICE_N); \ } else { \ - TRICE_LCNT(len_); \ + TRICE_LCNT(len_TRICE_N); \ } \ - TRICE_PUT_BUFFER(buf, len_); \ + TRICE_PUT_BUFFER(buf, len_TRICE_N); \ TRICE_LEAVE \ } while (0) @@ -669,8 +669,8 @@ void TRice64F(int tid, char* fmt, void* buf, uint32_t n); //! \param runtimeGeneratedString 0-terminated runtime generated string #define TRICE_S(tid, pFmt, runtimeGeneratedString) \ do { \ - uint32_t ssiz = strlen(runtimeGeneratedString); \ - TRICE_N(tid, pFmt, runtimeGeneratedString, ssiz); \ + uint32_t ssiz_TRICE_S = strlen(runtimeGeneratedString); \ + TRICE_N(tid, pFmt, runtimeGeneratedString, ssiz_TRICE_S); \ } while (0) void triceS(int tid, char* fmt, char* runtimeGeneratedString); @@ -684,8 +684,8 @@ void TRiceS(int tid, char* fmt, char* runtimeGeneratedString); //! C000 = 1100 0000 0000 0000 #define ID(n) \ do { \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT16_1616((0xC000 | (n)), ts); \ + uint32_t ts_ID = TriceStamp32; \ + TRICE_PUT16_1616((0xC000 | (n)), ts_ID); \ } while (0) //! Id writes 14-bit id with 10 as 2 most significant bits two times, followed by a 16-bit stamp. @@ -693,9 +693,9 @@ void TRiceS(int tid, char* fmt, char* runtimeGeneratedString); //! 8000 = 1000 0000 0000 0000 #define Id(n) \ do { \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Id = TriceStamp16; \ TRICE_PUT(TRICE_HTOTL(0x80008000 | ((n) << 16) | (n))); \ - TRICE_PUT16(ts); \ + TRICE_PUT16(ts_Id); \ } while (0) //! id writes 14-bit id with 01 as 2 most significant bits, followed by no stamp. @@ -709,8 +709,8 @@ void TRiceS(int tid, char* fmt, char* runtimeGeneratedString); //! TRICE_CNTC writes 7-bit byte count and 8-bit cycle counter. #define TRICE_CNTC(count) \ do { \ - uint16_t v = ((count) << 8) | TRICE_CYCLE; \ - TRICE_PUT16(v); \ + uint16_t v_TRICE_CNTC = ((count) << 8) | TRICE_CYCLE; \ + TRICE_PUT16(v_TRICE_CNTC); \ } while (0) #if TRICE_CYCLE_COUNTER == 1 diff --git a/src/trice8McuOrder.h b/src/trice8McuOrder.h index 74803130a..2fbaeee19 100644 --- a/src/trice8McuOrder.h +++ b/src/trice8McuOrder.h @@ -81,24 +81,24 @@ #define Trice8m_0(tid) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_0 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(0 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(0 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_0); \ TRICE_LEAVE #define Trice8m_1(tid, v0) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_1 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(1 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(1 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_1); \ TRICE_PUT8_1(v0) \ TRICE_LEAVE #define Trice8m_2(tid, v0, v1) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_2 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(2 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(2 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_0); \ TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE diff --git a/src/triceDoubleBuffer.c b/src/triceDoubleBuffer.c index 54468367c..a6531ec4a 100644 --- a/src/triceDoubleBuffer.c +++ b/src/triceDoubleBuffer.c @@ -173,7 +173,6 @@ static int TriceNext(uint8_t** buf, size_t* pSize, const uint8_t** pStart, size_ uint8_t* firstNotModifiedAddress; int distance; -int triceDataOffsetDepth; //! TriceOut encodes trices and writes them in one step to the output. //! This function is called only, when the slowest deferred output device has finished its last buffer. @@ -193,6 +192,7 @@ static void TriceOut(uint32_t* tb, size_t tLen) { #endif int triceID = 0; // This assignment is only needed to silence compiler complains about being uninitialized. #if TRICE_DIAGNOSTICS == 1 + int triceDataOffsetDepth; unsigned depth = tLen + TRICE_DATA_OFFSET; TriceHalfBufferDepthMax = depth < TriceHalfBufferDepthMax ? TriceHalfBufferDepthMax : depth; #endif @@ -271,7 +271,7 @@ static void TriceOut(uint32_t* tb, size_t tLen) { } #endif #if TRICE_DIAGNOSTICS == 1 - int triceDataOffsetDepth = TRICE_DATA_OFFSET - triceDataOffsetSpaceRemained; + /*int*/ triceDataOffsetDepth = TRICE_DATA_OFFSET - triceDataOffsetSpaceRemained; TriceDataOffsetDepthMax = triceDataOffsetDepth < TriceDataOffsetDepthMax ? TriceDataOffsetDepthMax : triceDataOffsetDepth; #endif } @@ -313,7 +313,7 @@ static void TriceOut(uint32_t* tb, size_t tLen) { // Mostly eLen < encLen, but it could be eLen = encLen + 1 + (encLen>>5) in TCOBS worst case. // dat - enc = TRICE_DATA_OFFSET // if eLen > encLen, then TriceDataOffsetDepth = eLen - encLen - int triceDataOffsetDepth = eLen - encLen; // usually negative + /*int*/ triceDataOffsetDepth = eLen - encLen; // usually negative TriceDataOffsetDepthMax = triceDataOffsetDepth < TriceDataOffsetDepthMax ? TriceDataOffsetDepthMax : triceDataOffsetDepth; #endif encLen = eLen; diff --git a/src/triceMcuOrder.h b/src/triceMcuOrder.h index f6a6dc8c2..0397761d1 100644 --- a/src/triceMcuOrder.h +++ b/src/triceMcuOrder.h @@ -15,11 +15,11 @@ //! TRICE_PUT16_1616 writes a 16-bit value followed by a 32-bit value in 2 16-bit steps to avoid memory alignment hard fault. #define TRICE_PUT16_1616(x, ts) /* little endian */ \ do { \ - uint16_t* p = (uint16_t*)TriceBufferWritePosition; \ - *p++ = x; \ - *p++ = ts; /* lo */ \ - *p++ = (ts) >> 16; /* hi */ \ - TriceBufferWritePosition = (uint32_t*)p; \ + uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ + *p_TRICE_PUT16_1616++ = x; \ + *p_TRICE_PUT16_1616++ = ts; /* lo */ \ + *p_TRICE_PUT16_1616++ = (ts) >> 16; /* hi */ \ + TriceBufferWritePosition = (uint32_t*)p_TRICE_PUT16_1616; \ } while (0) #define TRICE_PUT64(x) \ @@ -31,11 +31,11 @@ //! TRICE_PUT16_1616 writes a 16-bit value followed by a 32-bit value in 2 16-bit steps to avoid memory alignment hard fault. #define TRICE_PUT16_1616(x, ts) /* big endian */ \ do { \ - uint16_t* p = (uint16_t*)TriceBufferWritePosition; \ - *p++ = x; \ - *p++ = (ts) >> 16; /* hi */ \ - *p++ = ts; /* lo */ \ - TriceBufferWritePosition = (uint32_t*)p; \ + uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ + *p_TRICE_PUT16_1616++ = x; \ + *p_TRICE_PUT16_1616++ = (ts) >> 16; /* hi */ \ + *p_TRICE_PUT16_1616++ = ts; /* lo */ \ + TriceBufferWritePosition = (uint32_t*)p_TRICE_PUT16_1616; \ } while (0) #define TRICE_PUT64(x) \ diff --git a/src/triceMcuReverse.h b/src/triceMcuReverse.h index 2e40a66d5..d1d13397a 100644 --- a/src/triceMcuReverse.h +++ b/src/triceMcuReverse.h @@ -46,11 +46,11 @@ TRICE_INLINE uint32_t TriceReverse32(uint32_t value) { //! TRICE_PUT16_1616 writes a 16-bit value followed by a 32-bit value in 2 16-bit steps to avoid memory alignment hard fault. #define TRICE_PUT16_1616(x, ts) /* little endian */ \ do { \ - uint16_t* p = (uint16_t*)TriceBufferWritePosition; \ - *p++ = TRICE_HTOTS(x); \ - *p++ = TRICE_HTOTS(ts); /* lo */ \ - *p++ = TRICE_HTOTS((ts) >> 16); /* hi */ \ - TriceBufferWritePosition = (uint32_t*)p; \ + uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ + *p_TRICE_PUT16_1616++ = TRICE_HTOTS(x); \ + *p_TRICE_PUT16_1616++ = TRICE_HTOTS(ts); /* lo */ \ + *p_TRICE_PUT16_1616++ = TRICE_HTOTS((ts) >> 16); /* hi */ \ + TriceBufferWritePosition = (uint32_t*)p_TRICE_PUT16_1616; \ } while (0) #define TRICE_PUT64(x) \ @@ -62,11 +62,11 @@ TRICE_INLINE uint32_t TriceReverse32(uint32_t value) { //! TRICE_PUT16_1616 writes a 16-bit value followed by a 32-bit value in 2 16-bit steps to avoid memory alignment hard fault. #define TRICE_PUT16_1616(x, ts) /* big endian */ \ do { \ - uint16_t* p = (uint16_t*)TriceBufferWritePosition; \ - *p++ = TRICE_HTOTS(x); \ - *p++ = TRICE_HTOTS((ts) >> 16); /* hi */ \ - *p++ = TRICE_HTOTS(ts); /* lo */ \ - TriceBufferWritePosition = (uint32_t*)p; \ + uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ + *p_TRICE_PUT16_1616++ = TRICE_HTOTS(x); \ + *p_TRICE_PUT16_1616++ = TRICE_HTOTS((ts) >> 16); /* hi */ \ + *p_TRICE_PUT16_1616++ = TRICE_HTOTS(ts); /* lo */ \ + TriceBufferWritePosition = (uint32_t*)p_TRICE_PUT16_1616; \ } while (0) #define TRICE_PUT64(x) \ diff --git a/src/triceStaticBuffer.c b/src/triceStaticBuffer.c index 78d1f4f88..7865d40c1 100644 --- a/src/triceStaticBuffer.c +++ b/src/triceStaticBuffer.c @@ -9,7 +9,7 @@ uint32_t triceSingleBuffer[TRICE_BUFFER_SIZE >> 2]; //! triceSingleBufferStartWritePosition points to trice data start. -uint32_t* const triceSingleBufferStartWritePosition = &triceSingleBuffer[TRICE_DATA_OFFSET >> 2]; +uint32_t* const triceSingleBufferStartWritePositionXXX = &triceSingleBuffer[TRICE_DATA_OFFSET >> 2]; void TriceTransfer(void) {} From 4f4e916ef1bc139450c43cdfd51ece66f1df852b Mon Sep 17 00:00:00 2001 From: rokath Date: Fri, 9 May 2025 13:22:03 +0200 Subject: [PATCH 018/187] wip, all tests ok --- src/trice.h | 2 +- src/trice16McuReverse.h | 52 ++++++++--------- src/trice32McuReverse.h | 52 ++++++++--------- src/trice64McuReverse.h | 52 ++++++++--------- src/trice8McuOrder.h | 120 ++++++++++++++++++++-------------------- src/trice8McuReverse.h | 52 ++++++++--------- src/triceMcuReverse.h | 8 ++- src/triceStaticBuffer.c | 2 +- 8 files changed, 172 insertions(+), 168 deletions(-) diff --git a/src/trice.h b/src/trice.h index 2284f91f9..eddb3409b 100644 --- a/src/trice.h +++ b/src/trice.h @@ -178,7 +178,7 @@ TRICE_INLINE uint64_t aDouble(double x) { // global variables: -extern uint32_t* const triceSingleBufferStartWritePositionXXX; +extern uint32_t* const triceSingleBufferStartWritePosition; extern unsigned TricesCountRingBuffer; extern char triceCommandBuffer[]; extern int triceCommandFlag; diff --git a/src/trice16McuReverse.h b/src/trice16McuReverse.h index e0bfd5de0..502d2dd3a 100644 --- a/src/trice16McuReverse.h +++ b/src/trice16McuReverse.h @@ -87,9 +87,9 @@ #define Trice16m_0(tid) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_0 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice16m_0)|TRICE16_HI_BYTE(ts_Trice16m_0)); \ TRICE_LEAVE //! Trice16m_1 writes trice data as fast as possible in a buffer. @@ -97,97 +97,97 @@ //! \param v0 a 16 bit value #define Trice16m_1(tid, v0) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_1 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE16_LO_BYTE(ts_Trice16m_1)|TRICE16_HI_BYTE(ts_Trice16m_1)); \ TRICE_PUT16_1(v0) \ TRICE_LEAVE #define Trice16m_2(tid, v0, v1) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_2 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice16m_2)|TRICE16_HI_BYTE(ts_Trice16m_2)); \ TRICE_PUT16_2(v0, v1); \ TRICE_LEAVE #define Trice16m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_3 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE16_LO_BYTE(ts_Trice16m_3)|TRICE16_HI_BYTE(ts_Trice16m_3)); \ TRICE_PUT16_3(v0, v1, v2); \ TRICE_LEAVE #define Trice16m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_4 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice16m_4)|TRICE16_HI_BYTE(ts_Trice16m_4)); \ TRICE_PUT16_4(v0, v1, v2, v3); \ TRICE_LEAVE #define Trice16m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_5 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE16_LO_BYTE(ts_Trice16m_5)|TRICE16_HI_BYTE(ts_Trice16m_5)); \ TRICE_PUT16_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define Trice16m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_6 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice16m_6)|TRICE16_HI_BYTE(ts_Trice16m_6)); \ TRICE_PUT16_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define Trice16m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_7 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (14 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (14 << 16) | TRICE16_LO_BYTE(ts_Trice16m_7)|TRICE16_HI_BYTE(ts_Trice16m_7)); \ TRICE_PUT16_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define Trice16m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_8 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice16m_8)|TRICE16_HI_BYTE(ts_Trice16m_8)); \ TRICE_PUT16_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define Trice16m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_9 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (18 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (18 << 16) | TRICE16_LO_BYTE(ts_Trice16m_9)|TRICE16_HI_BYTE(ts_Trice16m_9)); \ TRICE_PUT16_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define Trice16m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_10 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE16_LO_BYTE(ts_Trice16m_10)|TRICE16_HI_BYTE(ts_Trice16m_10)); \ TRICE_PUT16_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define Trice16m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_11 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (22 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (22 << 16) | TRICE16_LO_BYTE(ts_Trice16m_11)|TRICE16_HI_BYTE(ts_Trice16m_11)); \ TRICE_PUT16_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define Trice16m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice16m_12 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice16m_12)|TRICE16_HI_BYTE(ts_Trice16m_12)); \ TRICE_PUT16_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice32McuReverse.h b/src/trice32McuReverse.h index 18c30d9be..e12b38390 100644 --- a/src/trice32McuReverse.h +++ b/src/trice32McuReverse.h @@ -81,104 +81,104 @@ #define Trice32m_0(tid) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_0 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice32m_0)|TRICE16_HI_BYTE(ts_Trice32m_0)); \ TRICE_LEAVE #define Trice32m_1(tid, v0) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_1 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice32m_1)|TRICE16_HI_BYTE(ts_Trice32m_1)); \ TRICE_PUT32_1(v0) \ TRICE_LEAVE #define Trice32m_2(tid, v0, v1) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_2 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice32m_2)|TRICE16_HI_BYTE(ts_Trice32m_2)); \ TRICE_PUT32_2(v0, v1); \ TRICE_LEAVE #define Trice32m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_3 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice32m_3)|TRICE16_HI_BYTE(ts_Trice32m_3)); \ TRICE_PUT32_3(v0, v1, v2); \ TRICE_LEAVE #define Trice32m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_4 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice32m_4)|TRICE16_HI_BYTE(ts_Trice32m_4)); \ TRICE_PUT32_4(v0, v1, v2, v3); \ TRICE_LEAVE #define Trice32m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_5 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE16_LO_BYTE(ts_Trice32m_5)|TRICE16_HI_BYTE(ts_Trice32m_5)); \ TRICE_PUT32_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define Trice32m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_6 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice32m_6)|TRICE16_HI_BYTE(ts_Trice32m_6)); \ TRICE_PUT32_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define Trice32m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_7 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (28 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (28 << 16) | TRICE16_LO_BYTE(ts_Trice32m_7)|TRICE16_HI_BYTE(ts_Trice32m_7)); \ TRICE_PUT32_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define Trice32m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_8 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE16_LO_BYTE(ts_Trice32m_8)|TRICE16_HI_BYTE(ts_Trice32m_8)); \ TRICE_PUT32_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define Trice32m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_9 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (36 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (36 << 16) | TRICE16_LO_BYTE(ts_Trice32m_9)|TRICE16_HI_BYTE(ts_Trice32m_9)); \ TRICE_PUT32_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define Trice32m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_10 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE16_LO_BYTE(ts_Trice32m_10)|TRICE16_HI_BYTE(ts_Trice32m_10)); \ TRICE_PUT32_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define Trice32m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_11 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (44 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (44 << 16) | TRICE16_LO_BYTE(ts_Trice32m_11)|TRICE16_HI_BYTE(ts_Trice32m_11)); \ TRICE_PUT32_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define Trice32m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice32m_12 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE16_LO_BYTE(ts_Trice32m_12)|TRICE16_HI_BYTE(ts_Trice32m_12)); \ TRICE_PUT32_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice64McuReverse.h b/src/trice64McuReverse.h index b4da52c33..3bba8579f 100644 --- a/src/trice64McuReverse.h +++ b/src/trice64McuReverse.h @@ -81,104 +81,104 @@ #define Trice64m_0(tid) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_0 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice64m_0)|TRICE16_HI_BYTE(ts_Trice64m_0)); \ TRICE_LEAVE #define Trice64m_1(tid, v0) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_1 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice64m_1)|TRICE16_HI_BYTE(ts_Trice64m_1)); \ TRICE_PUT64_1(v0) \ TRICE_LEAVE #define Trice64m_2(tid, v0, v1) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_2 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice64m_2)|TRICE16_HI_BYTE(ts_Trice64m_2)); \ TRICE_PUT64_2(v0, v1); \ TRICE_LEAVE #define Trice64m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_3 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice64m_3)|TRICE16_HI_BYTE(ts_Trice64m_3)); \ TRICE_PUT64_3(v0, v1, v2); \ TRICE_LEAVE #define Trice64m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_4 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE16_LO_BYTE(ts_Trice64m_4)|TRICE16_HI_BYTE(ts_Trice64m_4)); \ TRICE_PUT64_4(v0, v1, v2, v3); \ TRICE_LEAVE #define Trice64m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_5 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE16_LO_BYTE(ts_Trice64m_5)|TRICE16_HI_BYTE(ts_Trice64m_5)); \ TRICE_PUT64_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define Trice64m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_6 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE16_LO_BYTE(ts_Trice64m_6)|TRICE16_HI_BYTE(ts_Trice64m_6)); \ TRICE_PUT64_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define Trice64m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_7 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (56 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (56 << 16) | TRICE16_LO_BYTE(ts_Trice64m_7)|TRICE16_HI_BYTE(ts_Trice64m_7)); \ TRICE_PUT64_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define Trice64m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_8 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (64 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (64 << 16) | TRICE16_LO_BYTE(ts_Trice64m_8)|TRICE16_HI_BYTE(ts_Trice64m_8)); \ TRICE_PUT64_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define Trice64m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_9 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (72 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (72 << 16) | TRICE16_LO_BYTE(ts_Trice64m_9)|TRICE16_HI_BYTE(ts_Trice64m_9)); \ TRICE_PUT64_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define Trice64m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_10 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (80 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (80 << 16) | TRICE16_LO_BYTE(ts_Trice64m_10)|TRICE16_HI_BYTE(ts_Trice64m_10)); \ TRICE_PUT64_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define Trice64m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_11 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (88 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (88 << 16) | TRICE16_LO_BYTE(ts_Trice64m_11)|TRICE16_HI_BYTE(ts_Trice64m_11)); \ TRICE_PUT64_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define Trice64m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice64m_12 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | TRICE16_LO_BYTE(ts_Trice64m_12)|TRICE16_HI_BYTE(ts_Trice64m_12)); \ TRICE_PUT64_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice8McuOrder.h b/src/trice8McuOrder.h index 2fbaeee19..a2d88703c 100644 --- a/src/trice8McuOrder.h +++ b/src/trice8McuOrder.h @@ -98,189 +98,189 @@ TRICE_ENTER \ uint16_t ts_Trice8m_2 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(2 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_0); \ + TRICE_PUT(2 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_2); \ TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE #define Trice8m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_3 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(3 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(3 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_3); \ TRICE_PUT8_3(v0, v1, v2); \ TRICE_LEAVE #define Trice8m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_4 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(4 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(4 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_4); \ TRICE_PUT8_4(v0, v1, v2, v3); \ TRICE_LEAVE #define Trice8m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_5 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(5 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(5 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_5); \ TRICE_PUT8_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define Trice8m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_6 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(6 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(6 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_6); \ TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define Trice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_7 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(7 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(7 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_7); \ TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define Trice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_8 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(8 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(8 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_8); \ TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define Trice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_9 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(9 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(9 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_9); \ TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define Trice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_10 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(10 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(10 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_10); \ TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define Trice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_11 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(11 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(11 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_11); \ TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define Trice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_12 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(12 << 24 | (TRICE_CYCLE << 16) | ts); \ + TRICE_PUT(12 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_12); \ TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE #define TRice8m_0(tid) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(0 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_0 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_0 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(0 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_0 >> 16)); \ TRICE_LEAVE #define TRice8m_1(tid, v0) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(1 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_1 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_1 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(1 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_1 >> 16)); \ TRICE_PUT8_1(v0) \ TRICE_LEAVE #define TRice8m_2(tid, v0, v1) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(2 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_2 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_2 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(2 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_2 >> 16)); \ TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE #define TRice8m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(3 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_3 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_3 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(3 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_3 >> 16)); \ TRICE_PUT8_3(v0, v1, v2); \ TRICE_LEAVE #define TRice8m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(4 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_4 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_4 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(4 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_4 >> 16)); \ TRICE_PUT8_4(v0, v1, v2, v3); \ TRICE_LEAVE #define TRice8m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(5 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_5 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_5 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(5 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_5 >> 16)); \ TRICE_PUT8_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define TRice8m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(6 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_6 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_6 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(6 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_6 >> 16)); \ TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define TRice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(7 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_7 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_7 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(7 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_7 >> 16)); \ TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define TRice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(8 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_8 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_8 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(8 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_8 >> 16)); \ TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define TRice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(9 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_9 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_9 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(9 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_9 >> 16)); \ TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define TRice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(10 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_10 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_10 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(10 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_10 >> 16)); \ TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define TRice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(11 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_11 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_11 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(11 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_11 >> 16)); \ TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define TRice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT((ts << 16) | 0xc000 | (tid)); \ - TRICE_PUT(12 << 24 | (TRICE_CYCLE << 16) | (ts >> 16)); \ + uint32_t ts_TRice8m_12 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_12 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(12 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_12 >> 16)); \ TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice8McuReverse.h b/src/trice8McuReverse.h index 724e768ba..c4d837aec 100644 --- a/src/trice8McuReverse.h +++ b/src/trice8McuReverse.h @@ -81,104 +81,104 @@ #define Trice8m_0(tid) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_0 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice8m_0)|TRICE16_HI_BYTE(ts_Trice8m_0)); \ TRICE_LEAVE #define Trice8m_1(tid, v0) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_1 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (1 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (1 << 16) | TRICE16_LO_BYTE(ts_Trice8m_1)|TRICE16_HI_BYTE(ts_Trice8m_1)); \ TRICE_PUT8_1(v0) \ TRICE_LEAVE #define Trice8m_2(tid, v0, v1) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_2 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE16_LO_BYTE(ts_Trice8m_2)|TRICE16_HI_BYTE(ts_Trice8m_2)); \ TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE #define Trice8m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_3 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (3 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (3 << 16) | TRICE16_LO_BYTE(ts_Trice8m_3)|TRICE16_HI_BYTE(ts_Trice8m_3)); \ TRICE_PUT8_3(v0, v1, v2); \ TRICE_LEAVE #define Trice8m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_4 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice8m_4)|TRICE16_HI_BYTE(ts_Trice8m_4)); \ TRICE_PUT8_4(v0, v1, v2, v3); \ TRICE_LEAVE #define Trice8m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_5 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (5 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (5 << 16) | TRICE16_LO_BYTE(ts_Trice8m_5)|TRICE16_HI_BYTE(ts_Trice8m_5)); \ TRICE_PUT8_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define Trice8m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_6 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE16_LO_BYTE(ts_Trice8m_6)|TRICE16_HI_BYTE(ts_Trice8m_6)); \ TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define Trice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_7 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (7 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (7 << 16) | TRICE16_LO_BYTE(ts_Trice8m_7)|TRICE16_HI_BYTE(ts_Trice8m_7)); \ TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define Trice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_8 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice8m_8)|TRICE16_HI_BYTE(ts_Trice8m_8)); \ TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define Trice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_9 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (9 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (9 << 16) | TRICE16_LO_BYTE(ts_Trice8m_9)|TRICE16_HI_BYTE(ts_Trice8m_9)); \ TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define Trice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_10 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE16_LO_BYTE(ts_Trice8m_10)|TRICE16_HI_BYTE(ts_Trice8m_10)); \ TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define Trice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_11 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (11 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (11 << 16) | TRICE16_LO_BYTE(ts_Trice8m_11)|TRICE16_HI_BYTE(ts_Trice8m_11)); \ TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define Trice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint16_t ts = TriceStamp16; \ + uint16_t ts_Trice8m_12 = TriceStamp16; \ TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | tsL | tsH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice8m_12)|TRICE16_HI_BYTE(ts_Trice8m_12)); \ TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/triceMcuReverse.h b/src/triceMcuReverse.h index d1d13397a..5e65b7a54 100644 --- a/src/triceMcuReverse.h +++ b/src/triceMcuReverse.h @@ -79,10 +79,14 @@ TRICE_INLINE uint32_t TriceReverse32(uint32_t value) { #define IdLH TRICE_HTOTS(0x8000 | (tid)) //!< IdLH is the 16-bit-stamp tid, byte swapped to be used in TRICE_PUT, when TRICE_REVERSE == 1. #define IDLH TRICE_HTOTS(0xc000 | (tid)) //!< IDLH is the 32-bit-stamp tid, byte swapped to be used in TRICE_PUT, when TRICE_REVERSE == 1. -#define tsL ((0x00ff & ts) << 8) -#define tsH ((0xff00 & ts) >> 8) + +//#define tsL ((0x00ff & ts) << 8) +//#define tsH ((0xff00 & ts) >> 8) +#define TRICE16_LO_BYTE(x16) ((0x00ff & x16) << 8) // was #define tsL ((0x00ff & ts) << 8) +#define TRICE16_HI_BYTE(x16) ((0xff00 & x16) >> 8) // was #define tsH ((0xff00 & ts) >> 8) #define tsHH ((0xFF000000 & ts) >> 8) #define tsHL ((0x00FF0000 & ts) << 8) #define tsLH ((0x0000FF00 & ts) >> 8) #define tsLL ((0x000000FF & ts) << 8) + diff --git a/src/triceStaticBuffer.c b/src/triceStaticBuffer.c index 7865d40c1..78d1f4f88 100644 --- a/src/triceStaticBuffer.c +++ b/src/triceStaticBuffer.c @@ -9,7 +9,7 @@ uint32_t triceSingleBuffer[TRICE_BUFFER_SIZE >> 2]; //! triceSingleBufferStartWritePosition points to trice data start. -uint32_t* const triceSingleBufferStartWritePositionXXX = &triceSingleBuffer[TRICE_DATA_OFFSET >> 2]; +uint32_t* const triceSingleBufferStartWritePosition = &triceSingleBuffer[TRICE_DATA_OFFSET >> 2]; void TriceTransfer(void) {} From a51b1e1aa44f95561cb44566829e096c8d76eb44 Mon Sep 17 00:00:00 2001 From: rokath Date: Fri, 9 May 2025 20:16:55 +0200 Subject: [PATCH 019/187] wip --- .../generated_cgoPackage.go | 2 +- .../generated_cgoPackage.go | 2 +- .../generated_cgoPackage.go | 2 +- .../generated_cgoPackage.go | 2 +- _test/_ringB_de_multi_cobs_ua/generated_cgoPackage.go | 2 +- _test/_special_dblB_de_tcobs_ua/generated_cgoPackage.go | 2 +- _test/be_staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go | 2 +- _test/dblB_de_cobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_multi_cobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_multi_nopf_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_multi_tcobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_multi_xtea_cobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_nopf_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_tcobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_xtea_cobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_de_xtea_tcobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_di_nopf_rtt32__de_cobs_ua/generated_cgoPackage.go | 2 +- .../generated_cgoPackage.go | 2 +- .../generated_cgoPackage.go | 2 +- _test/dblB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go | 2 +- .../dblB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go | 2 +- _test/dblB_di_nopf_rtt8__de_cobs_ua/generated_cgoPackage.go | 2 +- .../dblB_di_nopf_rtt8__de_multi_cobs_ua/generated_cgoPackage.go | 2 +- .../generated_cgoPackage.go | 2 +- _test/dblB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_de_cobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_de_multi_tcobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_de_multi_xtea_cobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_de_nopf_ua/generated_cgoPackage.go | 2 +- _test/ringB_de_tcobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_de_xtea_cobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_de_xtea_tcobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_di_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_di_cobs_rtt8__de_tcobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go | 2 +- .../generated_cgoPackage.go | 2 +- _test/ringB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go | 2 +- _test/ringB_di_tcobs_rtt32__de_tcobs_ua/generated_cgoPackage.go | 2 +- .../generated_cgoPackage.go | 2 +- _test/special_for_debug/generated_cgoPackage.go | 2 +- _test/special_protect_dblB_de_tcobs_ua/generated_cgoPackage.go | 2 +- _test/stackB_di_nopf_aux32/generated_cgoPackage.go | 2 +- _test/stackB_di_nopf_aux8/generated_cgoPackage.go | 2 +- _test/stackB_di_nopf_rtt32/generated_cgoPackage.go | 2 +- _test/stackB_di_nopf_rtt8/generated_cgoPackage.go | 2 +- _test/stackB_di_xtea_cobs_rtt8/generated_cgoPackage.go | 2 +- _test/staticB_di_nopf_aux32/generated_cgoPackage.go | 2 +- _test/staticB_di_nopf_aux8/generated_cgoPackage.go | 2 +- _test/staticB_di_nopf_rtt32/generated_cgoPackage.go | 2 +- _test/staticB_di_nopf_rtt8/generated_cgoPackage.go | 2 +- _test/staticB_di_tcobs_rtt32/generated_cgoPackage.go | 2 +- _test/staticB_di_tcobs_rtt8/generated_cgoPackage.go | 2 +- _test/staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go | 2 +- _test/testdata/cgoPackage.go | 2 +- 56 files changed, 56 insertions(+), 56 deletions(-) diff --git a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/generated_cgoPackage.go b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/generated_cgoPackage.go +++ b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go +++ b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/_ringB_de_multi_cobs_ua/generated_cgoPackage.go b/_test/_ringB_de_multi_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/_ringB_de_multi_cobs_ua/generated_cgoPackage.go +++ b/_test/_ringB_de_multi_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/_special_dblB_de_tcobs_ua/generated_cgoPackage.go b/_test/_special_dblB_de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/_special_dblB_de_tcobs_ua/generated_cgoPackage.go +++ b/_test/_special_dblB_de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/be_staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go b/_test/be_staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/be_staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go +++ b/_test/be_staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_cobs_ua/generated_cgoPackage.go b/_test/dblB_de_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_de_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_multi_cobs_ua/generated_cgoPackage.go b/_test/dblB_de_multi_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_multi_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_de_multi_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_multi_nopf_ua/generated_cgoPackage.go b/_test/dblB_de_multi_nopf_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_multi_nopf_ua/generated_cgoPackage.go +++ b/_test/dblB_de_multi_nopf_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_multi_tcobs_ua/generated_cgoPackage.go b/_test/dblB_de_multi_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_multi_tcobs_ua/generated_cgoPackage.go +++ b/_test/dblB_de_multi_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_multi_xtea_cobs_ua/generated_cgoPackage.go b/_test/dblB_de_multi_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_multi_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_de_multi_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go b/_test/dblB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go +++ b/_test/dblB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_nopf_ua/generated_cgoPackage.go b/_test/dblB_de_nopf_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_nopf_ua/generated_cgoPackage.go +++ b/_test/dblB_de_nopf_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_tcobs_ua/generated_cgoPackage.go b/_test/dblB_de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_tcobs_ua/generated_cgoPackage.go +++ b/_test/dblB_de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_xtea_cobs_ua/generated_cgoPackage.go b/_test/dblB_de_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_de_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_de_xtea_tcobs_ua/generated_cgoPackage.go b/_test/dblB_de_xtea_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_de_xtea_tcobs_ua/generated_cgoPackage.go +++ b/_test/dblB_de_xtea_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt32__de_cobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt32__de_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt32__de_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt32__de_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt8__de_cobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt8__de_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt8__de_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt8__de_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go +++ b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_de_cobs_ua/generated_cgoPackage.go b/_test/ringB_de_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_de_cobs_ua/generated_cgoPackage.go +++ b/_test/ringB_de_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_de_multi_tcobs_ua/generated_cgoPackage.go b/_test/ringB_de_multi_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_de_multi_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_de_multi_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_de_multi_xtea_cobs_ua/generated_cgoPackage.go b/_test/ringB_de_multi_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_de_multi_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/ringB_de_multi_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go b/_test/ringB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_de_multi_xtea_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_de_nopf_ua/generated_cgoPackage.go b/_test/ringB_de_nopf_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_de_nopf_ua/generated_cgoPackage.go +++ b/_test/ringB_de_nopf_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_de_tcobs_ua/generated_cgoPackage.go b/_test/ringB_de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_de_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_de_xtea_cobs_ua/generated_cgoPackage.go b/_test/ringB_de_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_de_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/ringB_de_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_de_xtea_tcobs_ua/generated_cgoPackage.go b/_test/ringB_de_xtea_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_de_xtea_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_de_xtea_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/generated_cgoPackage.go b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go b/_test/ringB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_di_nopf_rtt8__de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/generated_cgoPackage.go b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/generated_cgoPackage.go +++ b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go +++ b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/special_for_debug/generated_cgoPackage.go b/_test/special_for_debug/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/special_for_debug/generated_cgoPackage.go +++ b/_test/special_for_debug/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/special_protect_dblB_de_tcobs_ua/generated_cgoPackage.go b/_test/special_protect_dblB_de_tcobs_ua/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/special_protect_dblB_de_tcobs_ua/generated_cgoPackage.go +++ b/_test/special_protect_dblB_de_tcobs_ua/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/stackB_di_nopf_aux32/generated_cgoPackage.go b/_test/stackB_di_nopf_aux32/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/stackB_di_nopf_aux32/generated_cgoPackage.go +++ b/_test/stackB_di_nopf_aux32/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/stackB_di_nopf_aux8/generated_cgoPackage.go b/_test/stackB_di_nopf_aux8/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/stackB_di_nopf_aux8/generated_cgoPackage.go +++ b/_test/stackB_di_nopf_aux8/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/stackB_di_nopf_rtt32/generated_cgoPackage.go b/_test/stackB_di_nopf_rtt32/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/stackB_di_nopf_rtt32/generated_cgoPackage.go +++ b/_test/stackB_di_nopf_rtt32/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/stackB_di_nopf_rtt8/generated_cgoPackage.go b/_test/stackB_di_nopf_rtt8/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/stackB_di_nopf_rtt8/generated_cgoPackage.go +++ b/_test/stackB_di_nopf_rtt8/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/stackB_di_xtea_cobs_rtt8/generated_cgoPackage.go b/_test/stackB_di_xtea_cobs_rtt8/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/stackB_di_xtea_cobs_rtt8/generated_cgoPackage.go +++ b/_test/stackB_di_xtea_cobs_rtt8/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/staticB_di_nopf_aux32/generated_cgoPackage.go b/_test/staticB_di_nopf_aux32/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/staticB_di_nopf_aux32/generated_cgoPackage.go +++ b/_test/staticB_di_nopf_aux32/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/staticB_di_nopf_aux8/generated_cgoPackage.go b/_test/staticB_di_nopf_aux8/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/staticB_di_nopf_aux8/generated_cgoPackage.go +++ b/_test/staticB_di_nopf_aux8/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/staticB_di_nopf_rtt32/generated_cgoPackage.go b/_test/staticB_di_nopf_rtt32/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/staticB_di_nopf_rtt32/generated_cgoPackage.go +++ b/_test/staticB_di_nopf_rtt32/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/staticB_di_nopf_rtt8/generated_cgoPackage.go b/_test/staticB_di_nopf_rtt8/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/staticB_di_nopf_rtt8/generated_cgoPackage.go +++ b/_test/staticB_di_nopf_rtt8/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/staticB_di_tcobs_rtt32/generated_cgoPackage.go b/_test/staticB_di_tcobs_rtt32/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/staticB_di_tcobs_rtt32/generated_cgoPackage.go +++ b/_test/staticB_di_tcobs_rtt32/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/staticB_di_tcobs_rtt8/generated_cgoPackage.go b/_test/staticB_di_tcobs_rtt8/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/staticB_di_tcobs_rtt8/generated_cgoPackage.go +++ b/_test/staticB_di_tcobs_rtt8/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go b/_test/staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go +++ b/_test/staticB_di_xtea_cobs_rtt32/generated_cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/testdata/cgoPackage.go b/_test/testdata/cgoPackage.go index 4e8d1e1fe..88214f6bb 100644 --- a/_test/testdata/cgoPackage.go +++ b/_test/testdata/cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" From b73577ead419e9f08dfd21c58d51da4bda95a7f7 Mon Sep 17 00:00:00 2001 From: rokath Date: Sat, 10 May 2025 17:08:44 +0200 Subject: [PATCH 020/187] triceSingleBufferStartWritePosition now a global variable for all 4 buffer variants --- src/trice.h | 14 +++++++------- src/triceDoubleBuffer.c | 2 ++ src/triceRingBuffer.c | 2 ++ src/triceStackBuffer.c | 2 ++ src/triceStaticBuffer.c | 4 ++-- 5 files changed, 15 insertions(+), 9 deletions(-) diff --git a/src/trice.h b/src/trice.h index eddb3409b..c74829fd3 100644 --- a/src/trice.h +++ b/src/trice.h @@ -178,7 +178,7 @@ TRICE_INLINE uint64_t aDouble(double x) { // global variables: -extern uint32_t* const triceSingleBufferStartWritePosition; +extern uint32_t* triceSingleBufferStartWritePosition; extern unsigned TricesCountRingBuffer; extern char triceCommandBuffer[]; extern int triceCommandFlag; @@ -372,7 +372,7 @@ extern uint32_t* TriceBufferWritePosition; #if TRICE_DIAGNOSTICS == 1 #define TRICE_DIAGNOSTICS_SINGLE_BUFFER_KEEP_START \ - uint32_t* const triceSingleBufferStartWritePosition = TriceBufferWritePosition; + triceSingleBufferStartWritePosition = TriceBufferWritePosition; #define TRICE_DIAGNOSTICS_SINGLE_BUFFER \ do { \ @@ -404,7 +404,7 @@ extern uint32_t* TriceBufferWritePosition; TRICE_ENTER_CRITICAL_SECTION { \ { \ uint32_t triceSingleBuffer[TRICE_BUFFER_SIZE >> 2]; /* no = {0} here for speed */ \ - uint32_t* const triceSingleBufferStartWritePosition = &triceSingleBuffer[TRICE_DATA_OFFSET >> 2]; \ + triceSingleBufferStartWritePosition = &triceSingleBuffer[TRICE_DATA_OFFSET >> 2]; \ uint32_t* TriceBufferWritePosition = triceSingleBufferStartWritePosition; #endif // #if TRICE_BUFFER == TRICE_STACK_BUFFER @@ -427,7 +427,7 @@ extern uint32_t* TriceBufferWritePosition; #define TRICE_ENTER \ TRICE_ENTER_CRITICAL_SECTION { \ if (TriceEnoughSpace()) { \ - uint32_t* const triceSingleBufferStartWritePosition = TriceBufferWritePosition; + triceSingleBufferStartWritePosition = TriceBufferWritePosition; #else // #if TRICE_PROTECT == 1 @@ -435,7 +435,7 @@ extern uint32_t* TriceBufferWritePosition; #define TRICE_ENTER \ TRICE_ENTER_CRITICAL_SECTION { \ { \ - uint32_t* const triceSingleBufferStartWritePosition = TriceBufferWritePosition; + triceSingleBufferStartWritePosition = TriceBufferWritePosition; #endif // #else // #if TRICE_PROTECT == 1 @@ -475,7 +475,7 @@ extern uint32_t* TriceBufferWritePosition; /* If this space is not given anymore, the `TriceBufferWritePosition` is reset to the start address of the ring buffer. */ \ TriceBufferWritePosition = TriceBufferWritePosition <= TriceRingBufferProtectLimit ? TriceBufferWritePosition : TriceRingBufferStart; \ if (TriceEnoughSpace()) { \ - uint32_t* const triceSingleBufferStartWritePosition = TriceBufferWritePosition; \ + triceSingleBufferStartWritePosition = TriceBufferWritePosition; \ TricesCountRingBuffer++; // Because TRICE macros are an atomic instruction normally, this can be done here. #else // #if TRICE_PROTECT == 1 @@ -489,7 +489,7 @@ extern uint32_t* TriceBufferWritePosition; /* If this space is not given anymore, the `TriceBufferWritePosition` is reset to the start address of the ring buffer. */ \ /* This implementation is a bit different than a ring buffer is usually implemented. */ \ TriceBufferWritePosition = TriceBufferWritePosition <= TriceRingBufferProtectLimit ? TriceBufferWritePosition : TriceRingBufferStart; \ - uint32_t* const triceSingleBufferStartWritePosition = TriceBufferWritePosition; \ + triceSingleBufferStartWritePosition = TriceBufferWritePosition; \ TricesCountRingBuffer++; // Because TRICE macros are an atomic instruction normally, this can be done here. #endif // #else // #if TRICE_PROTECT == 1 diff --git a/src/triceDoubleBuffer.c b/src/triceDoubleBuffer.c index a6531ec4a..160d4c3d8 100644 --- a/src/triceDoubleBuffer.c +++ b/src/triceDoubleBuffer.c @@ -7,6 +7,8 @@ #if TRICE_BUFFER == TRICE_DOUBLE_BUFFER && TRICE_OFF == 0 +uint32_t* triceSingleBufferStartWritePosition = (void*)0; + static void TriceOut(uint32_t* tb, size_t tLen); //! triceBuffer is a double buffer for better write speed. diff --git a/src/triceRingBuffer.c b/src/triceRingBuffer.c index 44c5520a7..382110328 100644 --- a/src/triceRingBuffer.c +++ b/src/triceRingBuffer.c @@ -7,6 +7,8 @@ #if TRICE_BUFFER == TRICE_RING_BUFFER && TRICE_OFF == 0 +uint32_t* triceSingleBufferStartWritePosition = (void*)0; + #if TRICE_DEFERRED_TRANSFER_MODE == TRICE_SINGLE_PACK_MODE static void triceSingleDeferredOut(int* wordCount); #else diff --git a/src/triceStackBuffer.c b/src/triceStackBuffer.c index a182c10ec..19c4b6cb2 100644 --- a/src/triceStackBuffer.c +++ b/src/triceStackBuffer.c @@ -7,4 +7,6 @@ void TriceTransfer(void) {} +uint32_t* triceSingleBufferStartWritePosition = (void*)0; + #endif // #if TRICE_BUFFER == TRICE_STACK_BUFFER && TRICE_OFF == 0 diff --git a/src/triceStaticBuffer.c b/src/triceStaticBuffer.c index 78d1f4f88..a48f376b0 100644 --- a/src/triceStaticBuffer.c +++ b/src/triceStaticBuffer.c @@ -8,8 +8,8 @@ //! triceSingleBuffer holds a single trice during direct trice macro execution. uint32_t triceSingleBuffer[TRICE_BUFFER_SIZE >> 2]; -//! triceSingleBufferStartWritePosition points to trice data start. -uint32_t* const triceSingleBufferStartWritePosition = &triceSingleBuffer[TRICE_DATA_OFFSET >> 2]; +//! triceSingleBufferStartWritePosition points to trice data start before a single trice message is generated. +uint32_t* triceSingleBufferStartWritePosition = &triceSingleBuffer[TRICE_DATA_OFFSET >> 2]; void TriceTransfer(void) {} From 67fc3f25efcd7bfb081dfad416f3ac989b473d6d Mon Sep 17 00:00:00 2001 From: rokath Date: Sun, 11 May 2025 11:33:17 +0200 Subject: [PATCH 021/187] wip --- src/trice.h | 24 ++++++------- src/trice16McuReverse.h | 80 ++++++++++++++++++++--------------------- src/trice32McuReverse.h | 78 ++++++++++++++++++++-------------------- src/trice64McuReverse.h | 80 ++++++++++++++++++++--------------------- src/trice8McuReverse.h | 78 ++++++++++++++++++++-------------------- src/triceMcuReverse.h | 12 +++---- testAll.sh | 25 +++++++++++-- 7 files changed, 197 insertions(+), 180 deletions(-) diff --git a/src/trice.h b/src/trice.h index c74829fd3..0795a88db 100644 --- a/src/trice.h +++ b/src/trice.h @@ -271,12 +271,12 @@ extern uint32_t* TriceBufferWritePosition; #define idLH idLH #define IdLH IdLH #define IDLH IDLH -#define tsL tsL -#define tsH tsH -#define tsHH tsHH -#define tsHL tsHL -#define tsLH tsLH -#define tsLL tsLL +//#define tsL tsL +//#define tsH tsH +//#define tsHH tsHH +//#define tsHL tsHL +//#define tsLH tsLH +//#define tsLL tsLL // /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// @@ -306,12 +306,12 @@ extern uint32_t* TriceBufferWritePosition; #undef idLH #undef IdLH #undef IDLH -#undef tsL -#undef tsH -#undef tsHH -#undef tsHL -#undef tsLH -#undef tsLL +// #undef tsL +// #undef tsH +// #undef tsHH +// #undef tsHL +// #undef tsLH +// #undef tsLL #if (__STDC_VERSION__ >= 202000) //! C23 standard specification for endianess detection (Note N3022) diff --git a/src/trice16McuReverse.h b/src/trice16McuReverse.h index 502d2dd3a..5301b7963 100644 --- a/src/trice16McuReverse.h +++ b/src/trice16McuReverse.h @@ -190,12 +190,12 @@ TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice16m_12)|TRICE16_HI_BYTE(ts_Trice16m_12)); \ TRICE_PUT16_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE - + #define TRice16m_0(tid) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_LEAVE //! TRice16m_1 writes trice data as fast as possible in a buffer. @@ -203,96 +203,96 @@ //! \param v0 a 16 bit value #define TRice16m_1(tid, v0) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_1(v0) \ TRICE_LEAVE #define TRice16m_2(tid, v0, v1) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_2(v0, v1); \ TRICE_LEAVE #define TRice16m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_3(v0, v1, v2); \ TRICE_LEAVE #define TRice16m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_4(v0, v1, v2, v3); \ TRICE_LEAVE #define TRice16m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define TRice16m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define TRice16m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (14 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (14 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define TRice16m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define TRice16m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (18 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (18 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define TRice16m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define TRice16m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (22 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (22 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define TRice16m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_PUT16_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice32McuReverse.h b/src/trice32McuReverse.h index e12b38390..1e7dc2746 100644 --- a/src/trice32McuReverse.h +++ b/src/trice32McuReverse.h @@ -184,103 +184,103 @@ #define TRice32m_0(tid) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | tsLL | tsLH) \ + uint32_t ts_TRice32m_0 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_0) | TRICE32_HH_BYTE(ts_TRice32m_0)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE32_LL_BYTE(ts_TRice32m_0) | TRICE32_LH_BYTE(ts_TRice32m_0)) \ TRICE_LEAVE #define TRice32m_1(tid, v0) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_1 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_1) | TRICE32_HH_BYTE(ts_TRice32m_1)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE32_LL_BYTE(ts_TRice32m_1) | TRICE32_LH_BYTE(ts_TRice32m_1)) \ TRICE_PUT32_1(v0) \ TRICE_LEAVE #define TRice32m_2(tid, v0, v1) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_2 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_2) | TRICE32_HH_BYTE(ts_TRice32m_2)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE32_LL_BYTE(ts_TRice32m_2) | TRICE32_LH_BYTE(ts_TRice32m_2)) \ TRICE_PUT32_2(v0, v1); \ TRICE_LEAVE #define TRice32m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_3 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_3) | TRICE32_HH_BYTE(ts_TRice32m_3)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE32_LL_BYTE(ts_TRice32m_3) | TRICE32_LH_BYTE(ts_TRice32m_3)) \ TRICE_PUT32_3(v0, v1, v2); \ TRICE_LEAVE #define TRice32m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_4 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_4) | TRICE32_HH_BYTE(ts_TRice32m_4)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE32_LL_BYTE(ts_TRice32m_4) | TRICE32_LH_BYTE(ts_TRice32m_4)) \ TRICE_PUT32_4(v0, v1, v2, v3); \ TRICE_LEAVE #define TRice32m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_5 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_5) | TRICE32_HH_BYTE(ts_TRice32m_5)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE32_LL_BYTE(ts_TRice32m_5) | TRICE32_LH_BYTE(ts_TRice32m_5)) \ TRICE_PUT32_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define TRice32m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_6 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_6) | TRICE32_HH_BYTE(ts_TRice32m_6)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE32_LL_BYTE(ts_TRice32m_6) | TRICE32_LH_BYTE(ts_TRice32m_6)) \ TRICE_PUT32_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define TRice32m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (28 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_7 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_7) | TRICE32_HH_BYTE(ts_TRice32m_7)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (28 << 16) | TRICE32_LL_BYTE(ts_TRice32m_7) | TRICE32_LH_BYTE(ts_TRice32m_7)) \ TRICE_PUT32_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define TRice32m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_8 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_8) | TRICE32_HH_BYTE(ts_TRice32m_8)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE32_LL_BYTE(ts_TRice32m_8) | TRICE32_LH_BYTE(ts_TRice32m_8)) \ TRICE_PUT32_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define TRice32m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (36 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_9 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_9) | TRICE32_HH_BYTE(ts_TRice32m_9)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (36 << 16) | TRICE32_LL_BYTE(ts_TRice32m_9) | TRICE32_LH_BYTE(ts_TRice32m_9)) \ TRICE_PUT32_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define TRice32m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_10 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_10) | TRICE32_HH_BYTE(ts_TRice32m_10)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE32_LL_BYTE(ts_TRice32m_10) | TRICE32_LH_BYTE(ts_TRice32m_10)) \ TRICE_PUT32_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define TRice32m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (44 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_11 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_11) | TRICE32_HH_BYTE(ts_TRice32m_11)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (44 << 16) | TRICE32_LL_BYTE(ts_TRice32m_11) | TRICE32_LH_BYTE(ts_TRice32m_11)) \ TRICE_PUT32_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define TRice32m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice32m_12 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_12) | TRICE32_HH_BYTE(ts_TRice32m_12)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE32_LL_BYTE(ts_TRice32m_12) | TRICE32_LH_BYTE(ts_TRice32m_12)) \ TRICE_PUT32_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice64McuReverse.h b/src/trice64McuReverse.h index 3bba8579f..522c1e9db 100644 --- a/src/trice64McuReverse.h +++ b/src/trice64McuReverse.h @@ -181,106 +181,106 @@ TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | TRICE16_LO_BYTE(ts_Trice64m_12)|TRICE16_HI_BYTE(ts_Trice64m_12)); \ TRICE_PUT64_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE - + #define TRice64m_0(tid) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH); \ - TRICE_PUT((TRICE_CYCLE << 24) | (0 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH); \ + TRICE_PUT((TRICE_CYCLE << 24) | (0 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_LEAVE #define TRice64m_1(tid, v0) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_1(v0) \ TRICE_LEAVE #define TRice64m_2(tid, v0, v1) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_2(v0, v1); \ TRICE_LEAVE #define TRice64m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_3(v0, v1, v2); \ TRICE_LEAVE #define TRice64m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_4(v0, v1, v2, v3); \ TRICE_LEAVE #define TRice64m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define TRice64m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define TRice64m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (56 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (56 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define TRice64m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (64 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (64 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define TRice64m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (72 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (72 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define TRice64m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (80 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (80 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define TRice64m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (88 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (88 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define TRice64m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_PUT64_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice8McuReverse.h b/src/trice8McuReverse.h index c4d837aec..36187e0f5 100644 --- a/src/trice8McuReverse.h +++ b/src/trice8McuReverse.h @@ -184,103 +184,103 @@ #define TRice8m_0(tid) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | tsLL | tsLH) \ + uint32_t ts_TRice8m_0 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_0) | TRICE32_HH_BYTE(ts_TRice8m_0)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE32_LL_BYTE(ts_TRice8m_0) | TRICE32_LH_BYTE(ts_TRice8m_0)) \ TRICE_LEAVE #define TRice8m_1(tid, v0) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (1 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_1 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_1) | TRICE32_HH_BYTE(ts_TRice8m_1)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (1 << 16) | TRICE32_LL_BYTE(ts_TRice8m_1) | TRICE32_LH_BYTE(ts_TRice8m_1)) \ TRICE_PUT8_1(v0) \ TRICE_LEAVE #define TRice8m_2(tid, v0, v1) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_2 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_2) | TRICE32_HH_BYTE(ts_TRice8m_2)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE32_LL_BYTE(ts_TRice8m_2) | TRICE32_LH_BYTE(ts_TRice8m_2)) \ TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE #define TRice8m_3(tid, v0, v1, v2) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (3 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_3 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_3) | TRICE32_HH_BYTE(ts_TRice8m_3)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (3 << 16) | TRICE32_LL_BYTE(ts_TRice8m_3) | TRICE32_LH_BYTE(ts_TRice8m_3)) \ TRICE_PUT8_3(v0, v1, v2); \ TRICE_LEAVE #define TRice8m_4(tid, v0, v1, v2, v3) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_4 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_4) | TRICE32_HH_BYTE(ts_TRice8m_4)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE32_LL_BYTE(ts_TRice8m_4) | TRICE32_LH_BYTE(ts_TRice8m_4)) \ TRICE_PUT8_4(v0, v1, v2, v3); \ TRICE_LEAVE #define TRice8m_5(tid, v0, v1, v2, v3, v4) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (5 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_5 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_5) | TRICE32_HH_BYTE(ts_TRice8m_5)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (5 << 16) | TRICE32_LL_BYTE(ts_TRice8m_5) | TRICE32_LH_BYTE(ts_TRice8m_5)) \ TRICE_PUT8_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE #define TRice8m_6(tid, v0, v1, v2, v3, v4, v5) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_6 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_6) | TRICE32_HH_BYTE(ts_TRice8m_6)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE32_LL_BYTE(ts_TRice8m_6) | TRICE32_LH_BYTE(ts_TRice8m_6)) \ TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE #define TRice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (7 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_7 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_7) | TRICE32_HH_BYTE(ts_TRice8m_7)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (7 << 16) | TRICE32_LL_BYTE(ts_TRice8m_7) | TRICE32_LH_BYTE(ts_TRice8m_7)) \ TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE #define TRice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_8 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_8) | TRICE32_HH_BYTE(ts_TRice8m_8)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE32_LL_BYTE(ts_TRice8m_8) | TRICE32_LH_BYTE(ts_TRice8m_8)) \ TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE #define TRice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (9 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_9 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_9) | TRICE32_HH_BYTE(ts_TRice8m_9)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (9 << 16) | TRICE32_LL_BYTE(ts_TRice8m_9) | TRICE32_LH_BYTE(ts_TRice8m_9)) \ TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define TRice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_10 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_10) | TRICE32_HH_BYTE(ts_TRice8m_10)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE32_LL_BYTE(ts_TRice8m_10) | TRICE32_LH_BYTE(ts_TRice8m_10)) \ TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define TRice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (11 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_11 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_11) | TRICE32_HH_BYTE(ts_TRice8m_11)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (11 << 16) | TRICE32_LL_BYTE(ts_TRice8m_11) | TRICE32_LH_BYTE(ts_TRice8m_11)) \ TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define TRice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint32_t ts = TriceStamp32; \ - TRICE_PUT(tsHL | tsHH | IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | tsLL | tsLH) \ + uint32_t ts_TRice8m_12 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_12) | TRICE32_HH_BYTE(ts_TRice8m_12)| IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE32_LL_BYTE(ts_TRice8m_12) | TRICE32_LH_BYTE(ts_TRice8m_12)) \ TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/triceMcuReverse.h b/src/triceMcuReverse.h index 5e65b7a54..8c2056746 100644 --- a/src/triceMcuReverse.h +++ b/src/triceMcuReverse.h @@ -79,14 +79,10 @@ TRICE_INLINE uint32_t TriceReverse32(uint32_t value) { #define IdLH TRICE_HTOTS(0x8000 | (tid)) //!< IdLH is the 16-bit-stamp tid, byte swapped to be used in TRICE_PUT, when TRICE_REVERSE == 1. #define IDLH TRICE_HTOTS(0xc000 | (tid)) //!< IDLH is the 32-bit-stamp tid, byte swapped to be used in TRICE_PUT, when TRICE_REVERSE == 1. - -//#define tsL ((0x00ff & ts) << 8) -//#define tsH ((0xff00 & ts) >> 8) #define TRICE16_LO_BYTE(x16) ((0x00ff & x16) << 8) // was #define tsL ((0x00ff & ts) << 8) #define TRICE16_HI_BYTE(x16) ((0xff00 & x16) >> 8) // was #define tsH ((0xff00 & ts) >> 8) -#define tsHH ((0xFF000000 & ts) >> 8) -#define tsHL ((0x00FF0000 & ts) << 8) -#define tsLH ((0x0000FF00 & ts) >> 8) -#define tsLL ((0x000000FF & ts) << 8) - +#define TRICE32_HH_BYTE(x32) ((0xFF000000 & x32) >> 8) // was #define tsHH ((0xFF000000 & ts) >> 8) +#define TRICE32_HL_BYTE(x32) ((0x00FF0000 & x32) << 8) // was #define tsHL ((0x00FF0000 & ts) << 8) +#define TRICE32_LH_BYTE(x32) ((0x0000FF00 & x32) >> 8) // was #define tsLH ((0x0000FF00 & ts) >> 8) +#define TRICE32_LL_BYTE(x32) ((0x000000FF & x32) << 8) // was #define tsLL ((0x000000FF & ts) << 8) diff --git a/testAll.sh b/testAll.sh index 113e096fd..593aa2805 100755 --- a/testAll.sh +++ b/testAll.sh @@ -8,14 +8,35 @@ then fi ./renewIDs_in_examples_and_refresh_test_folder.sh -go clean -cache +go clean -cache -testcache go test ./... -./trice_insertIDs_in_examples_and_test_folder.sh +./trice_insertIDs_in_examples_and_test_folder.sh cd _test go test ./... cd - >/dev/null +./trice_cleanIDs_in_examples_and_test_folder.sh +./trice_insertIDs_in_examples_and_test_folder.sh +cd examples +./cleanAllTargets.sh +echo "Translating all examples with TRICE_OFF..." +./buildAllTargets_TRICE_OFF.sh +echo "Translating all examples with TRICE_OFF...done" +./cleanAllTargets.sh +echo "Translating all examples with TRICE_ON..." +./buildAllTargets_TRICE_ON.sh +echo "Translating all examples with TRICE_ON...done" +./cleanAllTargets.sh +cd - >/dev/null +./trice_cleanIDs_in_examples_and_test_folder.sh + +./trice_insertIDs_in_examples_and_test_folder.sh +cd examples/L432_inst +echo "Translating all L432 configurations..." +./all_configs_build.sh +echo "Translating all L432 configurations...done" +cd - >/dev/null ./trice_cleanIDs_in_examples_and_test_folder.sh t1=`date +%s` From 750a9fdca5e918c8fcfdc39c24680fc87f68fa33 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Mon, 12 May 2025 14:14:17 +0200 Subject: [PATCH 022/187] wip --- testAll.sh | 68 +++++++++++++++++++++++++++++++++--------------------- 1 file changed, 42 insertions(+), 26 deletions(-) diff --git a/testAll.sh b/testAll.sh index 593aa2805..724afed00 100755 --- a/testAll.sh +++ b/testAll.sh @@ -1,48 +1,64 @@ #!/bin/bash -date -echo This can take a while ... +triceFolder=`pwd` +date | tee $triceFolder/testAll.log +echo This can take a while ... | tee -a $triceFolder/testAll.log t0=`date +%s` if command -v caffeinate 2>&1 >/dev/null then caffeinate & # keep mac alive fi -./renewIDs_in_examples_and_refresh_test_folder.sh -go clean -cache -testcache -go test ./... +./renewIDs_in_examples_and_refresh_test_folder.sh | tee -a $triceFolder/testAll.log +echo "---" | tee -a $triceFolder/testAll.log +echo "Testing the Go code..." | tee -a $triceFolder/testAll.log +go clean -cache -testcache | tee -a $triceFolder/testAll.log +go test ./... | tee -a $triceFolder/testAll.log +echo "Testing the Go code...done" | tee -a $triceFolder/testAll.log +echo "---" | tee -a $triceFolder/testAll.log -./trice_insertIDs_in_examples_and_test_folder.sh +./trice_insertIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log cd _test -go test ./... +echo "---" | tee -a $triceFolder/testAll.log +echo "Testing the Target code..." | tee -a $triceFolder/testAll.log +go test ./... | tee -a $triceFolder/testAll.log cd - >/dev/null -./trice_cleanIDs_in_examples_and_test_folder.sh +./trice_cleanIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log +echo "Testing the Target code...done" | tee -a $triceFolder/testAll.log +echo "---" | tee -a $triceFolder/testAll.log -./trice_insertIDs_in_examples_and_test_folder.sh +./trice_insertIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log cd examples -./cleanAllTargets.sh -echo "Translating all examples with TRICE_OFF..." -./buildAllTargets_TRICE_OFF.sh -echo "Translating all examples with TRICE_OFF...done" -./cleanAllTargets.sh -echo "Translating all examples with TRICE_ON..." -./buildAllTargets_TRICE_ON.sh -echo "Translating all examples with TRICE_ON...done" -./cleanAllTargets.sh +./cleanAllTargets.sh | tee -a $triceFolder/testAll.log +echo "---" | tee -a $triceFolder/testAll.log +echo "Translating all examples with TRICE_OFF..." | tee -a $triceFolder/testAll.log +./buildAllTargets_TRICE_OFF.sh | tee -a $triceFolder/testAll.log +echo "Translating all examples with TRICE_OFF...done"| tee -a $triceFolder/testAll.log +echo "---" | tee -a $triceFolder/testAll.log +./cleanAllTargets.sh | tee -a $triceFolder/testAll.log +echo "---" | tee -a $triceFolder/testAll.log +echo "Translating all examples with TRICE_ON..." | tee -a $triceFolder/testAll.log +./buildAllTargets_TRICE_ON.sh | tee -a $triceFolder/testAll.log +echo "Translating all examples with TRICE_ON...done" | tee -a $triceFolder/testAll.log +echo "---" | tee -a $triceFolder/testAll.log +./cleanAllTargets.sh | tee -a $triceFolder/testAll.log cd - >/dev/null -./trice_cleanIDs_in_examples_and_test_folder.sh +./trice_cleanIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log -./trice_insertIDs_in_examples_and_test_folder.sh +./trice_insertIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log cd examples/L432_inst -echo "Translating all L432 configurations..." -./all_configs_build.sh -echo "Translating all L432 configurations...done" +echo "---" | tee -a $triceFolder/testAll.log +echo "Translating all L432 configurations..." | tee -a $triceFolder/testAll.log +./all_configs_build.sh | tee -a $triceFolder/testAll.log +echo "Translating all L432 configurations...done" | tee -a $triceFolder/testAll.log +echo "---" | tee -a $triceFolder/testAll.log cd - >/dev/null -./trice_cleanIDs_in_examples_and_test_folder.sh +./trice_cleanIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log t1=`date +%s` if command -v caffeinate 2>&1 >/dev/null then - kill %- # https://stackoverflow.com/questions/30171050/start-a-process-in-background-do-a-task-then-kill-the-process-in-the-background + # https://stackoverflow.com/questions/30171050/start-a-process-in-background-do-a-task-then-kill-the-process-in-the-background + kill %- | tee -a $triceFolder/testAll.log fi runtime=$((t1-t0)) -echo Script run $runtime seconds. +echo Script run $runtime seconds. | tee -a $triceFolder/testAll.log From 68fdc6aaa520139f2adc1a4a46195c6b11ef7d28 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Tue, 13 May 2025 11:38:34 +0200 Subject: [PATCH 023/187] wip --- _test/testdata/triceCheck.c | 91 ++++++++++++----------- examples/L432_inst/Core/Inc/triceConfig.h | 4 +- examples/L432_inst/all_configs_build.sh | 13 +++- examples/L432_inst/build.sh | 4 + examples/L432_inst/flags.mak | 33 ++++---- examples/exampleData/triceExamples.c | 4 +- src/tcobsv1Decode.c | 27 +++---- src/tcobsv1Encode.c | 2 +- src/trice.h | 16 ++-- src/triceMcuOrder.h | 4 +- testAll.sh | 80 ++++++++++---------- 11 files changed, 147 insertions(+), 131 deletions(-) diff --git a/_test/testdata/triceCheck.c b/_test/testdata/triceCheck.c index 04ce60105..f6483de9e 100644 --- a/_test/testdata/triceCheck.c +++ b/_test/testdata/triceCheck.c @@ -50,7 +50,7 @@ void TriceCheck(int n) { static int16_t b16[] = { 0, -1, -2, 0x3344 }; static int32_t b32[] = { 0, -1, -2, 0x33445555}; static int64_t b64[4] = { 0, -1, -2, 0x3344555566666666 }; - unsigned anchorLine = __LINE__ + 20; // The offset value here must point to the first test line containing `anchorLine`. + int anchorLine = __LINE__ + 20; // The offset value here must point to the first test line containing `anchorLine`. switch( n ){ default: @@ -430,14 +430,14 @@ void TriceCheck(int n) { break; case __LINE__: trice16("att: line %u\n", __LINE__ ); break; case __LINE__: exampleOfManualJSONencoding(); //exp: time: be16default: att:MyStructEvaluationFunction(json:ExA{Apple:-1, Birn:2, Fisch:2.781000} - break; case __LINE__: TRICE(Id(0), "MSG:1/11 = %g\n", aFloat( 1.0/11 ) ); //exp: time: be16default: MSG:1/11 = 0.09090909 + break; case __LINE__: TRICE(Id(0), "MSG:1/11 = %g\n", aFloat( 1.0f/11 ) ); //exp: time: be16default: MSG:1/11 = 0.09090909 break; case __LINE__: { //exp: time:feed3322default: msg:x = 5.934 = 5.934, 5.934 #if !TRICE_OFF - float a = (float)5.934; + float a = 5.934f; float b = a + ((a > 0) ? 0.0005f : -0.0005f); int c = (int)b; int d = (int)(b * 1000) % 1000; - int e = (int)(1000 * (float)(a - c)); + int e = (int)(1000 * (a - (float)c)); TRice("msg:x = %g = %d.%03d, %d.%03d\n", aFloat(a), c, d, c, e ); #endif } @@ -476,11 +476,11 @@ void TriceCheck(int n) { break; case __LINE__: trice16("att: line %u\n", __LINE__ ); break; case __LINE__: trice("sig:Float (indent, precision, scientific notation)\n" ); - break; case __LINE__: trice("rd: 1.234560e+02 %e %%e Scientific notation\n", aFloat(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation - break; case __LINE__: trice("rd: 123.456000 %f %%f Decimal point, no exponent\n", aFloat(123.456) ); //exp: time: default: rd: 123.456000 123.456001 %f Decimal point, no exponent - break; case __LINE__: trice("rd: 123.46 %.2f %%.2f Default width, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 - break; case __LINE__: trice("rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aFloat(123.456) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 - break; case __LINE__: trice("rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aFloat(123.456) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only + break; case __LINE__: trice("rd: 1.234560e+02 %e %%e Scientific notation\n", aFloat(123.456f) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation + break; case __LINE__: trice("rd: 123.456000 %f %%f Decimal point, no exponent\n", aFloat(123.456f) ); //exp: time: default: rd: 123.456000 123.456001 %f Decimal point, no exponent + break; case __LINE__: trice("rd: 123.46 %.2f %%.2f Default width, precision 2\n", aFloat(123.456f) ); //exp: time: default: rd: 123.46 123.46 %.2f Default width, precision 2 + break; case __LINE__: trice("rd: ␣␣123.46 %8.2f %%8.2f Width 8, precision 2\n", aFloat(123.456f) ); //exp: time: default: rd: ␣␣123.46 123.46 %8.2f Width 8, precision 2 + break; case __LINE__: trice("rd: 123.456 %g %%g Exponent as needed, necessary digits only\n", aFloat(123.456f) ); //exp: time: default: rd: 123.456 123.456 %g Exponent as needed, necessary digits only break; case __LINE__: trice("sig:Double (indent, precision, scientific notation)\n" ); break; case __LINE__: trice64("rd: 1.234560e+02 %e %%e Scientific notation\n", aDouble(123.456) ); //exp: time: default: rd: 1.234560e+02 1.234560e+02 %e Scientific notation break; case __LINE__: trice64("rd: 123.456000 %f %%f Decimal point, no exponent\n", aDouble(123.456) ); //exp: time: default: rd: 123.456000 123.456000 %f Decimal point, no exponent @@ -500,9 +500,9 @@ void TriceCheck(int n) { break; case __LINE__: exampleOfManualSerialization(); // ATTENTION: This occupies ~1024 bytes in one half buffer when double buffer ist used! // This was a CGO compiler issue: - break; case __LINE__: TRice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: Trice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: trice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + break; case __LINE__: TRice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time:feed3322default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: Trice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time: be16default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: trice("info:12 default bit width values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time: default: info:12 default bit width values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. break; case __LINE__: trice16("att: line %u\n", __LINE__ ); @@ -585,16 +585,16 @@ EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE #if TRICE_CGO == 1 || defined(TRICE_FULL_CHECK) - break; case __LINE__: trice ("rd:%E (%%E)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) - break; case __LINE__: trice ("rd:%F (%%F)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%F) - break; case __LINE__: trice ("rd:%G (%%G)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%G) + break; case __LINE__: trice ("rd:%E (%%E)\n", aFloat(-555555555.5555555555f) ); //exp: time: default: rd:-5.555556E+08 (%E) + break; case __LINE__: trice ("rd:%F (%%F)\n", aFloat(-555555555.5555555555f) ); //exp: time: default: rd:-555555584.000000 (%F) + break; case __LINE__: trice ("rd:%G (%%G)\n", aFloat(-555555555.5555555555f) ); //exp: time: default: rd:-5.555556E+08 (%G) break; case __LINE__: trice64("rd:%E (%%E)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556E+08 (%E) break; case __LINE__: trice64("rd:%F (%%F)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%F) break; case __LINE__: trice64("rd:%G (%%G)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556E+08 (%G) - break; case __LINE__: trice ("rd:%e (%%e)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) - break; case __LINE__: trice ("rd:%f (%%f)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-555555584.000000 (%f) - break; case __LINE__: trice ("rd:%g (%%g)\n", aFloat(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%g) + break; case __LINE__: trice ("rd:%e (%%e)\n", aFloat(-555555555.5555555555f) ); //exp: time: default: rd:-5.555556e+08 (%e) + break; case __LINE__: trice ("rd:%f (%%f)\n", aFloat(-555555555.5555555555f) ); //exp: time: default: rd:-555555584.000000 (%f) + break; case __LINE__: trice ("rd:%g (%%g)\n", aFloat(-555555555.5555555555f) ); //exp: time: default: rd:-5.555556e+08 (%g) break; case __LINE__: trice64("rd:%e (%%e)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555556e+08 (%e) break; case __LINE__: trice64("rd:%f (%%f)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-555555555.555556 (%f) break; case __LINE__: trice64("rd:%g (%%g)\n", aDouble(-555555555.5555555555) ); //exp: time: default: rd:-5.555555555555556e+08 (%g) @@ -693,12 +693,12 @@ EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE break; case __LINE__: TRICE(Id(0), "info:This is a message with one value %d and a 16-bit stamp.\n", -2 ); //exp: time: be16default: info:This is a message with one value -2 and a 16-bit stamp. break; case __LINE__: TRICE(id(0), "info:This is a message with one value %d and without stamp.\n" , -2 ); //exp: time: default: info:This is a message with one value -2 and without stamp. - break; case __LINE__: TRICE(ID(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: TRICE(Id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: TRICE(id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. - break; case __LINE__: TRICE32(ID(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. - break; case __LINE__: TRICE32(Id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. - break; case __LINE__: TRICE32(id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), aFloat(-7.123456789), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + break; case __LINE__: TRICE(ID(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: TRICE(Id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: TRICE(id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. + break; case __LINE__: TRICE32(ID(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 32-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time:feed3322default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 32-bit stamp. + break; case __LINE__: TRICE32(Id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and a 16-bit stamp.\n", -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time: be16default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and a 16-bit stamp. + break; case __LINE__: TRICE32(id(0), "info:12 values %d, %u, %x, %X, %t, %e, %f, %g, %E, %F, %G, 0xb%08b and without stamp.\n" , -3, -4, -5, -6, 1, aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), aFloat(-7.123456789f), -8 ); //exp: time: default: info:12 values -3, 4294967292, fffffffb, FFFFFFFA, true, -7.123457e+00, -7.123457, -7.123457, -7.123457E+00, -7.123457, -7.123457, 0xb11111111111111111111111111111000 and without stamp. break; case __LINE__: TRICE8 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 break; case __LINE__: TRICE8_1 (id(0), "msg:value=%u\n", 200 ); //exp: time: default: msg:value=200 @@ -2173,7 +2173,7 @@ EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); TRICE32(Id(0), "tst:TRICE32 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE32(Id(0), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); + TRICE32(Id(0), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159f), aFloat(3.14159f), aFloat(3.14159f)); } break; case __LINE__: { TRICE32_1 (Id(0), "tst:TRICE32_1 %d\n", -1 ); @@ -2188,8 +2188,8 @@ EEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE TRICE32_10(Id(0), "tst:TRICE32_10 %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10 ); TRICE32_11(Id(0), "tst:TRICE32_11 %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11 ); TRICE32_12(Id(0), "tst:TRICE32_12 %d %d %d %d %d %d %d %d %d %d %d %d\n", -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12 ); - TRICE32 (Id(0), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); - TRICE32_12(Id(0), "tst:TRICE32_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159), aFloat(3.14159), aFloat(3.14159)); + TRICE32 (Id(0), "tst:TRICE32 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159f), aFloat(3.14159f), aFloat(3.14159f)); + TRICE32_12(Id(0), "tst:TRICE32_12 %t %b %x %X %d %u %o %O %p %e %f %g\n", 3, 3, 3, 3, 3, 3, 3, 3, 3, aFloat(3.14159f), aFloat(3.14159f), aFloat(3.14159f)); } break; case __LINE__: trice("sig:TRICE64 with variable param count 1 to 12\n" ); break; case __LINE__: TRICE64(ID(0), "tst:TRICE64 %d\n", -1 ); @@ -2591,23 +2591,23 @@ static int64_t DoubleToInt64(double f) { //! SCOPY is a helper macro for struct serialization. #define SCOPY(element) \ do { \ - char* n = #element; \ - int size = sizeof(src->element); \ - memcpy(p, &(src->element), size); \ - p += size; \ - TRICE_S(ID(0), "rd:sizeof(%8s)", n); \ - TRICE(ID(0), " = %d\n", size); \ + char* n_SCOPY = #element; \ + size_t size_SCOPY = sizeof(src->element); \ + memcpy(p, &(src->element), size_SCOPY); \ + p += size_SCOPY; \ + TRICE_S(ID(0), "rd:sizeof(%8s)", n_SCOPY); \ + TRICE(ID(0), " = %d\n", size_SCOPY); \ } while (0); //! DCOPY is a helper macro for struct deserialization. #define DCOPY(element) \ do { \ - char* n = #element; \ - int size = sizeof(dst->element); \ - memcpy(&(dst->element), p, size); \ - p += size; \ - TRICE_S(ID(0), "rd:sizeof(%8s)", n); \ - TRICE(ID(0), " = %d\n", size); \ + char* n_DCOPY = #element; \ + size_t size_DCOPY = sizeof(dst->element); \ + memcpy(&(dst->element), p, size_DCOPY); \ + p += size_DCOPY; \ + TRICE_S(ID(0), "rd:sizeof(%8s)", n_DCOPY); \ + TRICE(ID(0), " = %d\n", size_DCOPY); \ } while (0); typedef struct { @@ -2707,14 +2707,14 @@ static void exampleOfManualSerialization(void) { memcpy(tx.names[1], "bbbb", strlen("bbbb")); memcpy(tx.names[2], "ccccc", strlen("ccccc")); - tx.point[0].x = 2.22; - tx.point[0].y = -3.33; + tx.point[0].x = 2.22f; + tx.point[0].y = -3.33f; tx.point[0].rgb[0] = 0x44; tx.point[0].rgb[0] = 0x66; tx.point[0].rgb[0] = 0x88; - tx.point[1].x = -66.66; - tx.point[1].y = +5.5555; + tx.point[1].x = -66.66f; + tx.point[1].y = +5.5555f; tx.point[1].rgb[0] = 0xee; tx.point[1].rgb[0] = 0xaa; tx.point[1].rgb[0] = 0xbb; @@ -2762,9 +2762,10 @@ static void exampleOfManualJSONencoding(void) { static void dynString(int n) { char* s = "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,"; const size_t l = strlen(s); - n = n < l ? n : l; + size_t N_dynString = (size_t)n; // avoid warning: comparison of integer expressions of different signedness: 'int' and 'size_t' + N_dynString = N_dynString < l ? N_dynString : l; // trice("sig:%3d:", n ); - this gets overwritten in CGO_Test case, so we avoid it to keep testing simple. - TRICE_N(id(0), "wr:%s\n", s, n); + TRICE_N(id(0), "wr:%s\n", s, N_dynString); } #endif // #ifndef TRICE_CHECK_MIN diff --git a/examples/L432_inst/Core/Inc/triceConfig.h b/examples/L432_inst/Core/Inc/triceConfig.h index fbda044ca..c296d7326 100644 --- a/examples/L432_inst/Core/Inc/triceConfig.h +++ b/examples/L432_inst/Core/Inc/triceConfig.h @@ -20,8 +20,8 @@ extern volatile uint32_t * const DWT_CYCCNT ; extern volatile uint32_t * const DEMCR; extern volatile uint32_t * const LAR; // lock access register -#define TriceStamp16 (*DWT_CYCCNT) // @64MHz wraps after a bit more than 1ms (MCU clocks) -#define TriceStamp32 (*DWT_CYCCNT) // @64MHz -> 1 µs, wraps after 2^32 µs ~= 1.2 hours +#define TriceStamp16 ((uint16_t)(*DWT_CYCCNT)) // @64MHz wraps after a bit more than 1ms (MCU clocks) +#define TriceStamp32 (*DWT_CYCCNT) // @64MHz -> 1 µs, wraps after 2^32 µs ~= 1.2 hours void TriceHeadLine(char* name); void LogTriceConfiguration( void ); diff --git a/examples/L432_inst/all_configs_build.sh b/examples/L432_inst/all_configs_build.sh index c7164ea96..22ab22801 100755 --- a/examples/L432_inst/all_configs_build.sh +++ b/examples/L432_inst/all_configs_build.sh @@ -1,3 +1,14 @@ #!/bin/bash date -time for i in {0..100}; do echo; echo --- CONFIGURATION=$i ---; echo; make clean; ./build.sh CONFIGURATION=$i; done +time for i in {0..100}; do + echo + echo --- CONFIGURATION=$i --- + echo + make clean + ./build.sh CONFIGURATION=$i + EXITCODE=$? + if [ $EXITCODE != 0 ] + then + exit $EXITCODE + fi + done diff --git a/examples/L432_inst/build.sh b/examples/L432_inst/build.sh index 6ad80de35..d1d3ea3d1 100755 --- a/examples/L432_inst/build.sh +++ b/examples/L432_inst/build.sh @@ -14,4 +14,8 @@ done make -j TRICE_FLAGS="$flags" gcc +EXITCODE=$? + ../../trice_cleanIDs_in_examples_and_test_folder.sh # Run this again to get the Trice IDs cleaned state. + +exit $EXITCODE \ No newline at end of file diff --git a/examples/L432_inst/flags.mak b/examples/L432_inst/flags.mak index 7a1f3698a..d35f47af3 100644 --- a/examples/L432_inst/flags.mak +++ b/examples/L432_inst/flags.mak @@ -46,27 +46,26 @@ C_FLAGS += -Ofast # -Ofast optimizes for speed. #C_FLAGS += -g # # -g includes debug information into the ELF. C_FLAGS += -g3 # # -g3 include, a couple extra goodies such as macro definitions used in your application. -#C_FLAGS += -Wunused-parameter - - C_FLAGS += -Wall # # -Wall enables a base set of warnings generally agreed upon as being useful and easy to fix. -### C_FLAGS += -Wextra # -Wextra enables an additional set of flags not covered by -Wall -#C_FLAGS += -Werror # -Werror causes all enabled warnings to cause compilation errors. + C_FLAGS += -Wall # -Wall enables a base set of warnings generally agreed upon as being useful and easy to fix. + C_FLAGS += -Wextra # -Wextra enables an additional set of flags not covered by -Wall + C_FLAGS += -Wno-unused-parameter # Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:... + C_FLAGS += -Wno-sign-conversion # Drivers/CMSIS/Include/core_cm4.h + C_FLAGS += -Wno-conversion # Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h + C_FLAGS += -Werror # -Werror causes all enabled warnings to cause compilation errors. #C_FLAGS += -Wdocumentation # -Wdocumentation can catch errors in comments. # -Wno- to disable the warning altogether # -Wno-error= to keep the warning enabled but not trigger an error. -### C_FLAGS += -Wshadow # -Wshadow detects shadowing variables. -### C_FLAGS += -Wdouble-promotion # -Wdouble-promotion catches implicit double promotion takes place. (https://interrupt.memfault.com/blog/best-and-worst-gcc-clang-compiler-flags#-wdouble-promotion) -#C_FLAGS += -Wformat # -#C_FLAGS += -Wformat=2 # -#C_FLAGS += -Wformat-security # -#C_FLAGS += -Wformat-overflow # -#C_FLAGS += -Wformat-truncation # -### C_FLAGS += -Wundef # -Wundef warns, if an undefined macro silently evaluating as 0 and causing unexpected behavior. -#C_FLAGS += -Wstack-usage=256 # -Wstack-usage= emits a warning when stack usage exceeds limit bytes. -### C_FLAGS += -Wstack-protector -##C_FLAGS += -Wconversion # -Wconversion generates warnings when implicit conversions that are likely to change the underlying value take place. (https://interrupt.memfault.com/blog/best-and-worst-gcc-clang-compiler-flags#-wconversion) + C_FLAGS += -Wshadow # -Wshadow detects shadowing variables. + C_FLAGS += -Wdouble-promotion # -Wdouble-promotion catches implicit double promotion takes place. (https://interrupt.memfault.com/blog/best-and-worst-gcc-clang-compiler-flags#-wdouble-promotion) + C_FLAGS += -Wformat # + C_FLAGS += -Wformat=2 # + C_FLAGS += -Wformat-security # + C_FLAGS += -Wformat-overflow # + C_FLAGS += -Wformat-truncation # + C_FLAGS += -Wundef # -Wundef warns, if an undefined macro silently evaluating as 0 and causing unexpected behavior. + C_FLAGS += -Wstack-usage=300 # -Wstack-usage= emits a warning when stack usage exceeds limit bytes. + C_FLAGS += -Wstack-protector #C_FLAGS += -Wpadded # -Wpadded warns if padding is added to a structure due to alignment requirements. -### C_FLAGS += -Wunused-parameter # -Wunused-parameter will detect when a parameter passed to a function is never used in the function. #C_FLAGS += -Wl,--no-warn-rwx-segments #C_FLAGS += -Wl,--no-warn-execstack # https://www.redhat.com/en/blog/linkers-warnings-about-executable-stacks-and-segments diff --git a/examples/exampleData/triceExamples.c b/examples/exampleData/triceExamples.c index d60d98a03..0dfadaa85 100644 --- a/examples/exampleData/triceExamples.c +++ b/examples/exampleData/triceExamples.c @@ -41,8 +41,8 @@ void SomeExampleTrices(int burstCount) { char* aString = "2.71828182845904523536"; TriceS("rd:%s <- float number as string\n", aString); Trice64("msg:%.20f (double with more ciphers than precision)\n", aDouble(2.71828182845904523536)); - Trice("msg:%.20f (float with more ciphers than precision)\n", aFloat(2.71828182845904523536)); - Trice("msg:%f (default rounded float)\n", aFloat(2.71828182845904523536)); + Trice("msg:%.20f (float with more ciphers than precision)\n", aFloat(2.71828182845904523536f)); + Trice("msg:%f (default rounded float)\n", aFloat(2.71828182845904523536f)); Trice("info:A Buffer:\n"); Trice8B("msg:%02x \n", aString, strlen(aString)); Trice32B("msg:%08x \n", aString, strlen(aString) >> 2); diff --git a/src/tcobsv1Decode.c b/src/tcobsv1Decode.c index c57469455..e27d90c89 100644 --- a/src/tcobsv1Decode.c +++ b/src/tcobsv1Decode.c @@ -17,6 +17,7 @@ int TCOBSDecode(void* __restrict output, size_t max, const void* __restrict inpu int ilen = (int)length; // remaining input length uint8_t* out = (uint8_t*)output; int olen = 0; // output length + int Max = (int)max; while (ilen > 0) { uint8_t next = in[ilen - 1]; // get next sigil byte (starting from the end) uint8_t sigil; @@ -32,46 +33,46 @@ int TCOBSDecode(void* __restrict output, size_t max, const void* __restrict inpu case Z3: olen += 1; - out[max - olen] = 0; + out[Max - olen] = 0; // fallthrough case Z2: olen += 1; - out[max - olen] = 0; + out[Max - olen] = 0; // fallthrough case Z1: olen += 1; - out[max - olen] = 0; + out[Max - olen] = 0; goto copyBytes; case F4: olen += 1; - out[max - olen] = 0xFF; + out[Max - olen] = 0xFF; // fallthrough case F3: olen += 1; - out[max - olen] = 0xFF; + out[Max - olen] = 0xFF; // fallthrough case F2: olen += 1; - out[max - olen] = 0xFF; + out[Max - olen] = 0xFF; olen += 1; - out[max - olen] = 0xFF; + out[Max - olen] = 0xFF; goto copyBytes; case R4: olen += 1; - out[max - olen] = repeatByte(offset, in, ilen); + out[Max - olen] = repeatByte(offset, in, ilen); // fallthrough case R3: olen += 1; - out[max - olen] = repeatByte(offset, in, ilen); + out[Max - olen] = repeatByte(offset, in, ilen); // fallthrough case R2: r = repeatByte(offset, in, ilen); olen += 1; - out[max - olen] = r; + out[Max - olen] = r; olen += 1; - out[max - olen] = r; + out[Max - olen] = r; goto copyBytes; default: @@ -79,12 +80,12 @@ int TCOBSDecode(void* __restrict output, size_t max, const void* __restrict inpu } copyBytes: { - uint8_t* to = out + max - olen - offset; // to := len(d) - n - offset + uint8_t* to = out + Max - olen - offset; // to := len(d) - n - offset uint8_t* from = in + ilen - offset; // from := len(in) - offset // sigil byte is already removed if (to < out) { return OUT_BUFFER_TOO_SMALL - __LINE__; } - memcpy(to, from, offset); // n += copy(d[to:], in[from:]) + memcpy(to, from, (size_t)offset); // n += copy(d[to:], in[from:]) olen += offset; ilen -= offset; // in = in[:len(in)-offset] // remove copied bytes continue; diff --git a/src/tcobsv1Encode.c b/src/tcobsv1Encode.c index d98e71cd0..53b45a052 100644 --- a/src/tcobsv1Encode.c +++ b/src/tcobsv1Encode.c @@ -65,7 +65,7 @@ *o++ = N | offset; \ offset = 0; \ } \ - *o++ = ((reptCount - 1) << 3) | offset; \ + *o++ = (uint8_t)(((reptCount - 1) << 3) | offset); \ offset = 0; \ reptCount = 0; \ } diff --git a/src/trice.h b/src/trice.h index 0795a88db..10a7a4d77 100644 --- a/src/trice.h +++ b/src/trice.h @@ -532,7 +532,7 @@ extern uint32_t* TriceBufferWritePosition; #define TRICE_LEAVE \ /* wordCount is the amount of steps, the TriceBufferWritePosition went forward for the actual trice. */ \ /* The last written uint32_t trice value can contain 1 to 3 padding bytes. */ \ - unsigned wordCount = TriceBufferWritePosition - triceSingleBufferStartWritePosition; \ + unsigned wordCount = (unsigned)(TriceBufferWritePosition - triceSingleBufferStartWritePosition); \ TRICE_DIAGNOSTICS_SINGLE_BUFFER_USING_WORD_COUNT \ TriceNonBlockingDirectWrite(triceSingleBufferStartWritePosition, wordCount); \ } \ @@ -559,7 +559,7 @@ extern uint32_t* TriceBufferWritePosition; //! In that case the byte order needs to be provided by the written code. #define TRICE_PUT(x) \ do { \ - *TriceBufferWritePosition++ = x; \ + *TriceBufferWritePosition++ = (uint32_t)(x); \ } while (0); #endif @@ -570,7 +570,7 @@ extern uint32_t* TriceBufferWritePosition; #define TRICE_PUT_BUFFER(buf, len) \ do { \ memcpy(TriceBufferWritePosition, buf, len); \ - unsigned len4 = ((unsigned)len + 3) & ~3; \ + unsigned len4 = ((unsigned)len + 3u) & ~3u; \ memset((uint8_t*)TriceBufferWritePosition + len, 0, len4 - len); /*clear padding space*/ \ TriceBufferWritePosition += len4 >> 2; \ } while (0) @@ -608,7 +608,7 @@ extern uint32_t* TriceBufferWritePosition; do { \ TRICE_UNUSED(pFmt); \ uint32_t limit_TRICE_N = TRICE_SINGLE_MAX_SIZE - 12; /* 12 = head(2) + max timestamp size(4) + count(2) + max 3 zeroes, we take 4 */ \ - uint32_t len_TRICE_N = n; /* n could be a constant */ \ + uint32_t len_TRICE_N = (uint32_t)(n); /* n could be a constant */ \ if (len_TRICE_N > limit_TRICE_N) { \ TRICE_DYN_STRG_BUF_TRUNCATE_COUNT_INCREMENT(); \ len_TRICE_N = limit_TRICE_N; \ @@ -685,7 +685,7 @@ void TRiceS(int tid, char* fmt, char* runtimeGeneratedString); #define ID(n) \ do { \ uint32_t ts_ID = TriceStamp32; \ - TRICE_PUT16_1616((0xC000 | (n)), ts_ID); \ + TRICE_PUT16_1616((((uint16_t)0xC000) | ((uint16_t)(n))), ts_ID); \ } while (0) //! Id writes 14-bit id with 10 as 2 most significant bits two times, followed by a 16-bit stamp. @@ -694,14 +694,14 @@ void TRiceS(int tid, char* fmt, char* runtimeGeneratedString); #define Id(n) \ do { \ uint16_t ts_Id = TriceStamp16; \ - TRICE_PUT(TRICE_HTOTL(0x80008000 | ((n) << 16) | (n))); \ + TRICE_PUT(TRICE_HTOTL(0x80008000u | (((uint32_t)(n)) << 16) | ((uint32_t)(n)))); \ TRICE_PUT16(ts_Id); \ } while (0) //! id writes 14-bit id with 01 as 2 most significant bits, followed by no stamp. //! 01iiiiiiI (NC) | ... //! 4000 = 0100 0000 0000 0000 -#define id(n) TRICE_PUT16(0x4000 | (n)); +#define id(n) TRICE_PUT16((uint16_t)(0x4000) | (n)); //! iD is just a code parsing helper. #define iD(n) (n) @@ -709,7 +709,7 @@ void TRiceS(int tid, char* fmt, char* runtimeGeneratedString); //! TRICE_CNTC writes 7-bit byte count and 8-bit cycle counter. #define TRICE_CNTC(count) \ do { \ - uint16_t v_TRICE_CNTC = ((count) << 8) | TRICE_CYCLE; \ + uint16_t v_TRICE_CNTC = (((uint16_t)(count)) << 8) | TRICE_CYCLE; \ TRICE_PUT16(v_TRICE_CNTC); \ } while (0) diff --git a/src/triceMcuOrder.h b/src/triceMcuOrder.h index 0397761d1..31f00fe5c 100644 --- a/src/triceMcuOrder.h +++ b/src/triceMcuOrder.h @@ -17,8 +17,8 @@ do { \ uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ *p_TRICE_PUT16_1616++ = x; \ - *p_TRICE_PUT16_1616++ = ts; /* lo */ \ - *p_TRICE_PUT16_1616++ = (ts) >> 16; /* hi */ \ + *p_TRICE_PUT16_1616++ = (uint16_t)(ts); /* lo */ \ + *p_TRICE_PUT16_1616++ = (uint16_t)((ts) >> 16); /* hi */ \ TriceBufferWritePosition = (uint32_t*)p_TRICE_PUT16_1616; \ } while (0) diff --git a/testAll.sh b/testAll.sh index 724afed00..c96998369 100755 --- a/testAll.sh +++ b/testAll.sh @@ -1,64 +1,64 @@ #!/bin/bash triceFolder=`pwd` -date | tee $triceFolder/testAll.log -echo This can take a while ... | tee -a $triceFolder/testAll.log +date 2>&1 | tee $triceFolder/testAll.log +echo This can take a while ... 2>&1 | tee -a $triceFolder/testAll.log t0=`date +%s` if command -v caffeinate 2>&1 >/dev/null then caffeinate & # keep mac alive fi -./renewIDs_in_examples_and_refresh_test_folder.sh | tee -a $triceFolder/testAll.log -echo "---" | tee -a $triceFolder/testAll.log -echo "Testing the Go code..." | tee -a $triceFolder/testAll.log -go clean -cache -testcache | tee -a $triceFolder/testAll.log -go test ./... | tee -a $triceFolder/testAll.log -echo "Testing the Go code...done" | tee -a $triceFolder/testAll.log -echo "---" | tee -a $triceFolder/testAll.log +./renewIDs_in_examples_and_refresh_test_folder.sh 2>&1 | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log +echo "Testing the Go code..." 2>&1 | tee -a $triceFolder/testAll.log +go clean -cache -testcache 2>&1 | tee -a $triceFolder/testAll.log +go test ./... 2>&1 | tee -a $triceFolder/testAll.log +echo "Testing the Go code...done" 2>&1 | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log -./trice_insertIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log +./trice_insertIDs_in_examples_and_test_folder.sh 2>&1 | tee -a $triceFolder/testAll.log cd _test -echo "---" | tee -a $triceFolder/testAll.log -echo "Testing the Target code..." | tee -a $triceFolder/testAll.log -go test ./... | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log +echo "Testing the Target code..." 2>&1 | tee -a $triceFolder/testAll.log +go test ./... 2>&1 | tee -a $triceFolder/testAll.log cd - >/dev/null -./trice_cleanIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log -echo "Testing the Target code...done" | tee -a $triceFolder/testAll.log -echo "---" | tee -a $triceFolder/testAll.log +./trice_cleanIDs_in_examples_and_test_folder.sh 2>&1 | tee -a $triceFolder/testAll.log +echo "Testing the Target code...done" 2>&1 | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log -./trice_insertIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log +./trice_insertIDs_in_examples_and_test_folder.sh 2>&1 | tee -a $triceFolder/testAll.log cd examples -./cleanAllTargets.sh | tee -a $triceFolder/testAll.log -echo "---" | tee -a $triceFolder/testAll.log -echo "Translating all examples with TRICE_OFF..." | tee -a $triceFolder/testAll.log -./buildAllTargets_TRICE_OFF.sh | tee -a $triceFolder/testAll.log -echo "Translating all examples with TRICE_OFF...done"| tee -a $triceFolder/testAll.log -echo "---" | tee -a $triceFolder/testAll.log -./cleanAllTargets.sh | tee -a $triceFolder/testAll.log -echo "---" | tee -a $triceFolder/testAll.log -echo "Translating all examples with TRICE_ON..." | tee -a $triceFolder/testAll.log -./buildAllTargets_TRICE_ON.sh | tee -a $triceFolder/testAll.log -echo "Translating all examples with TRICE_ON...done" | tee -a $triceFolder/testAll.log -echo "---" | tee -a $triceFolder/testAll.log -./cleanAllTargets.sh | tee -a $triceFolder/testAll.log +./cleanAllTargets.sh 2>&1 | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log +echo "Translating all examples with TRICE_OFF..." 2>&1 | tee -a $triceFolder/testAll.log +./buildAllTargets_TRICE_OFF.sh 2>&1 | tee -a $triceFolder/testAll.log +echo "Translating all examples with TRICE_OFF...done"2>&1 | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log +./cleanAllTargets.sh 2>&1 | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log +echo "Translating all examples with TRICE_ON..." 2>&1 | tee -a $triceFolder/testAll.log +./buildAllTargets_TRICE_ON.sh 2>&1 | tee -a $triceFolder/testAll.log +echo "Translating all examples with TRICE_ON...done" 2>&1 | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log +./cleanAllTargets.sh 2>&1 | tee -a $triceFolder/testAll.log cd - >/dev/null -./trice_cleanIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log +./trice_cleanIDs_in_examples_and_test_folder.sh 2>&1 | tee -a $triceFolder/testAll.log -./trice_insertIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log +./trice_insertIDs_in_examples_and_test_folder.sh 2>&1 | tee -a $triceFolder/testAll.log cd examples/L432_inst -echo "---" | tee -a $triceFolder/testAll.log -echo "Translating all L432 configurations..." | tee -a $triceFolder/testAll.log -./all_configs_build.sh | tee -a $triceFolder/testAll.log -echo "Translating all L432 configurations...done" | tee -a $triceFolder/testAll.log -echo "---" | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log +echo "Translating all L432 configurations..." 2>&1 | tee -a $triceFolder/testAll.log +./all_configs_build.sh 2>&1 | tee -a $triceFolder/testAll.log +echo "Translating all L432 configurations...done" 2>&1 | tee -a $triceFolder/testAll.log +echo "---" 2>&1 | tee -a $triceFolder/testAll.log cd - >/dev/null -./trice_cleanIDs_in_examples_and_test_folder.sh | tee -a $triceFolder/testAll.log +./trice_cleanIDs_in_examples_and_test_folder.sh 2>&1 | tee -a $triceFolder/testAll.log t1=`date +%s` if command -v caffeinate 2>&1 >/dev/null then # https://stackoverflow.com/questions/30171050/start-a-process-in-background-do-a-task-then-kill-the-process-in-the-background - kill %- | tee -a $triceFolder/testAll.log + kill %- 2>&1 | tee -a $triceFolder/testAll.log fi runtime=$((t1-t0)) -echo Script run $runtime seconds. | tee -a $triceFolder/testAll.log +echo Script run $runtime seconds. 2>&1 | tee -a $triceFolder/testAll.log From b2c0f28e47db8433716f39d396885224c49be140 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Tue, 13 May 2025 15:08:32 +0200 Subject: [PATCH 024/187] wip --- _test/testdata/cgoPackage.go | 2 +- _test/testdata/triceCheck.c | 8 +-- examples/F030_inst/Core/Inc/triceConfig.h | 2 +- examples/L432_inst/Core/Inc/triceConfig.h | 2 +- examples/L432_inst/Core/Src/main.c | 8 +-- examples/L432_inst/flags.mak | 68 ++++++++++++++++++++--- examples/exampleData/triceExamples.c | 2 +- src/cobsEncode.c | 2 +- src/tcobsv1Decode.c | 2 + src/trice.c | 57 +++++++++---------- src/trice.h | 58 +++++++++---------- 11 files changed, 132 insertions(+), 79 deletions(-) diff --git a/_test/testdata/cgoPackage.go b/_test/testdata/cgoPackage.go index 88214f6bb..22fe070ab 100644 --- a/_test/testdata/cgoPackage.go +++ b/_test/testdata/cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src -Wshadow +// #cgo CFLAGS: -g -I../../src -Wall -Wextra -Werror -Wfatal-errors // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" diff --git a/_test/testdata/triceCheck.c b/_test/testdata/triceCheck.c index f6483de9e..05327f093 100644 --- a/_test/testdata/triceCheck.c +++ b/_test/testdata/triceCheck.c @@ -33,7 +33,7 @@ void TriceCheck(int n) { #ifdef TRICE_CHECK_MIN TRice("\rTriceCheck %4d", n); #else // #ifdef TRICE_CHECK_MIN - char* sABCDE = "abcde 12345"; + char const * sABCDE = "abcde 12345"; uint32_t lenABCDE = strlen(sABCDE); float x = (float)1089.6082763671875; // 0x44883377 double y = 518.0547492508867; // 0x4080307020601050 @@ -2591,7 +2591,7 @@ static int64_t DoubleToInt64(double f) { //! SCOPY is a helper macro for struct serialization. #define SCOPY(element) \ do { \ - char* n_SCOPY = #element; \ + char const * n_SCOPY = #element; \ size_t size_SCOPY = sizeof(src->element); \ memcpy(p, &(src->element), size_SCOPY); \ p += size_SCOPY; \ @@ -2602,7 +2602,7 @@ static int64_t DoubleToInt64(double f) { //! DCOPY is a helper macro for struct deserialization. #define DCOPY(element) \ do { \ - char* n_DCOPY = #element; \ + char const * n_DCOPY = #element; \ size_t size_DCOPY = sizeof(dst->element); \ memcpy(&(dst->element), p, size_DCOPY); \ p += size_DCOPY; \ @@ -2760,7 +2760,7 @@ static void exampleOfManualJSONencoding(void) { } static void dynString(int n) { - char* s = "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,"; + char const* s = "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,"; const size_t l = strlen(s); size_t N_dynString = (size_t)n; // avoid warning: comparison of integer expressions of different signedness: 'int' and 'size_t' N_dynString = N_dynString < l ? N_dynString : l; diff --git a/examples/F030_inst/Core/Inc/triceConfig.h b/examples/F030_inst/Core/Inc/triceConfig.h index 4aaa4f5ad..84e93fad1 100644 --- a/examples/F030_inst/Core/Inc/triceConfig.h +++ b/examples/F030_inst/Core/Inc/triceConfig.h @@ -37,7 +37,7 @@ extern uint32_t ms32; //! ms32 is a 32-bit millisecond counter, counting circula #define TRICE_ENTER_CRITICAL_SECTION { uint32_t primaskstate = __get_PRIMASK(); __disable_irq(); { #define TRICE_LEAVE_CRITICAL_SECTION } __set_PRIMASK(primaskstate); } -void TriceHeadLine(char* name); +void TriceHeadLine(char const * name); void LogTriceConfiguration(void); void SomeExampleTrices(int burstCount); diff --git a/examples/L432_inst/Core/Inc/triceConfig.h b/examples/L432_inst/Core/Inc/triceConfig.h index c296d7326..a0509b063 100644 --- a/examples/L432_inst/Core/Inc/triceConfig.h +++ b/examples/L432_inst/Core/Inc/triceConfig.h @@ -23,7 +23,7 @@ extern volatile uint32_t * const LAR; // lock access register #define TriceStamp16 ((uint16_t)(*DWT_CYCCNT)) // @64MHz wraps after a bit more than 1ms (MCU clocks) #define TriceStamp32 (*DWT_CYCCNT) // @64MHz -> 1 µs, wraps after 2^32 µs ~= 1.2 hours -void TriceHeadLine(char* name); +void TriceHeadLine(char const * name); void LogTriceConfiguration( void ); void SomeExampleTrices(int burstCount); diff --git a/examples/L432_inst/Core/Src/main.c b/examples/L432_inst/Core/Src/main.c index e57beda32..df9243e10 100644 --- a/examples/L432_inst/Core/Src/main.c +++ b/examples/L432_inst/Core/Src/main.c @@ -60,10 +60,10 @@ void StartTask02(void const * argument); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ -__weak int _close(void) { return -1; } -__weak int _lseek(void) { return -1; } -__weak int _read (void) { return -1; } -__weak int _write(void) { return -1; } +int _close(void); __weak int _close(void) { return -1; } +int _lseek(void); __weak int _lseek(void) { return -1; } +int _read (void); __weak int _read (void) { return -1; } +int _write(void); __weak int _write(void) { return -1; } volatile uint32_t * const DWT_CONTROL = (uint32_t *) 0xE0001000; volatile uint32_t * const DWT_CYCCNT = (uint32_t *) 0xE0001004; diff --git a/examples/L432_inst/flags.mak b/examples/L432_inst/flags.mak index d35f47af3..db7d1a083 100644 --- a/examples/L432_inst/flags.mak +++ b/examples/L432_inst/flags.mak @@ -46,26 +46,78 @@ C_FLAGS += -Ofast # -Ofast optimizes for speed. #C_FLAGS += -g # # -g includes debug information into the ELF. C_FLAGS += -g3 # # -g3 include, a couple extra goodies such as macro definitions used in your application. - C_FLAGS += -Wall # -Wall enables a base set of warnings generally agreed upon as being useful and easy to fix. + + + + C_FLAGS += -Wall # -Wall enables a base set of warnings generally agreed upon as being useful and easy to fix. + C_FLAGS += -Walloca # This option warns on all uses of "alloca" in the source. + C_FLAGS += -Wno-builtin-declaration-mismatch # Warn if a built-in function is declared with an incompatible signature. + C_FLAGS += -Wunknown-pragmas # Warn when a pragma() is encountered that is not understood by gdc. + C_FLAGS += -Wextra # -Wextra enables an additional set of flags not covered by -Wall C_FLAGS += -Wno-unused-parameter # Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:... + C_FLAGS += -Wconversion # Warn for implicit conversions that may alter a value. C_FLAGS += -Wno-sign-conversion # Drivers/CMSIS/Include/core_cm4.h C_FLAGS += -Wno-conversion # Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h - C_FLAGS += -Werror # -Werror causes all enabled warnings to cause compilation errors. -#C_FLAGS += -Wdocumentation # -Wdocumentation can catch errors in comments. +#C_FLAGS += -Werror # -Werror causes all enabled warnings to cause compilation errors. # -Wno- to disable the warning altogether # -Wno-error= to keep the warning enabled but not trigger an error. C_FLAGS += -Wshadow # -Wshadow detects shadowing variables. C_FLAGS += -Wdouble-promotion # -Wdouble-promotion catches implicit double promotion takes place. (https://interrupt.memfault.com/blog/best-and-worst-gcc-clang-compiler-flags#-wdouble-promotion) - C_FLAGS += -Wformat # - C_FLAGS += -Wformat=2 # - C_FLAGS += -Wformat-security # + C_FLAGS += -Wformat=2 # Enable -Wformat plus format checks not included in -Wformat. Currently equivalent to `-Wformat -Wformat-nonliteral -Wformat-security -Wformat-y2k'. C_FLAGS += -Wformat-overflow # C_FLAGS += -Wformat-truncation # C_FLAGS += -Wundef # -Wundef warns, if an undefined macro silently evaluating as 0 and causing unexpected behavior. C_FLAGS += -Wstack-usage=300 # -Wstack-usage= emits a warning when stack usage exceeds limit bytes. C_FLAGS += -Wstack-protector -#C_FLAGS += -Wpadded # -Wpadded warns if padding is added to a structure due to alignment requirements. + C_FLAGS += -Wmissing-include-dirs # Warn if a user-supplied include directory does not exist + C_FLAGS += -Wswitch-default # Warn whenever a switch statement does not have a default case. +#C_FLAGS += -Wswitch-enum # Warn whenever a switch statement has an index of enumerated type and lacks a case for one or more of the named codes of that enumeration. case labels outside the enumeration range also provoke warnings when this option is used. +#C_FLAGS += -Wunused-parameter # Warn whenever a function parameter is unused aside from its declaration. To suppress this warning use the `unused' attribute (see Variable Attributes). + C_FLAGS += -Wunknown-pragmas + C_FLAGS += -fstrict-aliasing + C_FLAGS += -fstrict-overflow + C_FLAGS += -Wstrict-overflow=5 + C_FLAGS += -Wfloat-equal # Warn if floating point values are used in equality comparisons. + C_FLAGS += -Wundef # Warn if an undefined identifier is evaluated in an `#if' directive. +#C_FLAGS += -Wlarger-than=512 # Warn whenever an object of larger than len bytes is defined. + C_FLAGS += -Wframe-larger-than=256#Warn if the size of a function frame is larger than len bytes. The computation done to determine the stack frame size is approximate and not conservative. The actual requirements may be somewhat greater than len even if you do not get a warning. In addition, any space allocated via alloca, variable-length arrays, or related constructs is not included by the compiler when determining whether or not to issue a warning. + C_FLAGS += -Wunsafe-loop-optimizations # Warn if the loop cannot be optimized because the compiler could not assume anything on the bounds of the loop indices. With -funsafe-loop-optimizations warn if the compiler made such assumptions. + C_FLAGS += -funsafe-loop-optimizations +#C_FLAGS += -pedantic + C_FLAGS += -Wpointer-arith # Warn about anything that depends on the “size of” a function type or of void. GNU C assigns these types a size of 1, for convenience in calculations with void * pointers and pointers to functions. In C++, warn also when an arithmetic operation involves NULL. This warning is also enabled by -pedantic. + C_FLAGS += -Wbad-function-cast # Warn whenever a function call is cast to a non-matching type. For example, warn if int malloc() is cast to anything *. +#C_FLAGS += -Wc++-compat # Warn about ISO C constructs that are outside of the common subset of ISO C and ISO C++, e.g. request for implicit conversion from void * to a pointer to non-void type. +#C_FLAGS += -Wcast-qual # Warn whenever a pointer is cast so as to remove a type qualifier from the target type. For example, warn if a const char * is cast to an ordinary char *. +#C_FLAGS += -Wcast-align # Warn whenever a pointer is cast such that the required alignment of the target is increased. For example, warn if a char * is cast to an int * on machines where integers can only be accessed at two- or four-byte boundaries. + C_FLAGS += -Wwrite-strings # When compiling C, give string constants the type const char[length] so that copying the address of one into a non-const char * pointer will get a warning. + C_FLAGS += -Waddress # Warn about suspicious uses of memory addresses. + C_FLAGS += -Wlogical-op # Warn about suspicious uses of logical operators in expressions +#C_FLAGS += -Waggregate-return # Warn if any functions that return structures or unions are defined or called. (In languages where you can return an array, this also elicits a warning.) + C_FLAGS += -Wno-attributes # Do not warn if an unexpected __attribute__ is used, such as unrecognized attributes, function attributes applied to variables, etc. + C_FLAGS += -Wstrict-prototypes # Warn if a function is declared or defined without specifying the argument types. + C_FLAGS += -Wold-style-definition # Warn if an old-style function definition is used. A warning is given even if there is a previous prototype. + C_FLAGS += -Wmissing-prototypes # Warn if a global function is defined without a previous prototype declaration. This warning is issued even if the definition itself provides a prototype. The aim is to detect global functions that fail to be declared in header files. + C_FLAGS += -Wmissing-declarations # Warn if a global function is defined without a previous declaration. Do so even if the definition itself provides a prototype. Use this option to detect global functions that are not declared in header files. In C++, no warnings are issued for function templates, or for inline functions, or for functions in anonymous namespaces. + C_FLAGS += -Wmissing-noreturn # Warn about functions which might be candidates for attribute noreturn. Note these are only possible candidates, not absolute ones. Care should be taken to manually verify functions actually do not ever return before adding the noreturn attribute, otherwise subtle code generation bugs could be introduced. You will not get a warning for main in hosted C environments. + C_FLAGS += -Wmissing-format-attribute # Warn about function pointers which might be candidates for format attributes. Note these are only possible candidates, not absolute ones. + C_FLAGS += -Wnormalized=nfc # In ISO C and ISO C++, two identifiers are different if they are different sequences of characters. + C_FLAGS += -Wpacked # Warn if a structure is given the packed attribute, but the packed attribute has no effect on the layout or size of the structure. +#C_FLAGS += -Wredundant-decls # Warn if anything is declared more than once in the same scope, even in cases where multiple declaration is valid and changes nothing. Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h + C_FLAGS += -Wunreachable-code # Warn if the compiler detects that code will never be executed +#C_FLAGS += -Winline # Warn if a function can not be inlined and it was declared as inline. Even with this option, the compiler will not warn about failures to inline functions declared in system headers. + C_FLAGS += -Winvalid-pch # Warn if a precompiled header (see Precompiled Headers) is found in the search path but can't be used. + C_FLAGS += -Wvla # Warn if variable length array is used in the code. -Wno-vla will prevent the -pedantic warning of the variable length array. + C_FLAGS += -Wdisabled-optimization# Warn if a requested optimization pass is disabled. +#C_FLAGS += -Wstack-protector # This option is only active when -fstack-protector is active. It warns about functions that will not be protected against stack smashing. +#C_FLAGS += -fstack-protector + C_FLAGS += -Wno-discarded-qualifiers + C_FLAGS += -Wno-suggest-attribute=noreturn + +#C_FLAGS += -Wnested-externs # Warn if an extern declaration is encountered within a function. +#C_FLAGS += -Wpadded # Warn if padding is included in a structure, either to align an element of the structure or to align the whole structure. Sometimes when this happens it is possible to rearrange the fields of the structure to reduce the padding and so make the structure smaller. + + #C_FLAGS += -Wl,--no-warn-rwx-segments #C_FLAGS += -Wl,--no-warn-execstack # https://www.redhat.com/en/blog/linkers-warnings-about-executable-stacks-and-segments @@ -75,8 +127,6 @@ C_FLAGS += -Ofast # -Ofast optimizes for speed. #C_FLAGS += -c $< # the input file #C_FLAGS += -o $@ # the output file -#C_FLAGS += -pedantic # - #ifeq ($(DEBUG), 1) #C_FLAGS += -g # C_FLAGS += -gdwarf-4 # diff --git a/examples/exampleData/triceExamples.c b/examples/exampleData/triceExamples.c index 0dfadaa85..6fe17236e 100644 --- a/examples/exampleData/triceExamples.c +++ b/examples/exampleData/triceExamples.c @@ -7,7 +7,7 @@ #if !TRICE_OFF //! TriceHeadLine emits a decorated name. The name length should be 18 characters. -void TriceHeadLine(char* name) { +void TriceHeadLine(char const * name) { //! This is usable as the very first trice sequence after restart. Adapt it. Use a UTF-8 capable editor like VS-Code or use pure ASCII. TriceS("w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", name); } diff --git a/src/cobsEncode.c b/src/cobsEncode.c index c736902fe..d2d4535d3 100644 --- a/src/cobsEncode.c +++ b/src/cobsEncode.c @@ -10,7 +10,7 @@ //! @return Encoded buffer length in bytes. //! @note Does not output delimiter byte. Code taken from Wikipedia and slightly adapted. size_t COBSEncode(void* __restrict out, const void* __restrict in, size_t length) { - uint8_t* buffer = out; + uint8_t* buffer = (uint8_t*)out; uint8_t* encode = buffer; // Encoded byte pointer uint8_t* codep = encode++; // Output code pointer uint8_t code = 1; // Code value diff --git a/src/tcobsv1Decode.c b/src/tcobsv1Decode.c index e27d90c89..4867cb61f 100644 --- a/src/tcobsv1Decode.c +++ b/src/tcobsv1Decode.c @@ -12,6 +12,8 @@ static int sigilAndOffset(uint8_t* sigil, uint8_t b); static uint8_t repeatByte(int offset, uint8_t* in, int len); +#pragma GCC diagnostic ignored "-Wstrict-overflow" + int TCOBSDecode(void* __restrict output, size_t max, const void* __restrict input, size_t length) { uint8_t* in = (uint8_t*)input; int ilen = (int)length; // remaining input length diff --git a/src/trice.c b/src/trice.c index 9391b5a00..6ad7ddd44 100644 --- a/src/trice.c +++ b/src/trice.c @@ -392,9 +392,10 @@ size_t TriceEncode(unsigned encrypt, unsigned framing, uint8_t* dst, const uint8 memmove(dst, dat, len); encLen = len; return encLen; + default: + return 0; // unexpected } - return 0; // unexpected } #if (TRICE_DIAGNOSTICS == 1) && defined(SEGGER_RTT) @@ -930,111 +931,111 @@ void TRiceAssertFalse(int idN, char* msg, int flag) { #ifdef TRICE_N -void triceN(int tid, char* fmt, void* buf, uint32_t n) { +void triceN(int tid, char const * fmt, void* buf, uint32_t n) { TRICE_N(id(tid), fmt, buf, n); } -void TriceN(int tid, char* fmt, void* buf, uint32_t n) { +void TriceN(int tid, char const * fmt, void* buf, uint32_t n) { TRICE_N(Id(tid), fmt, buf, n); } -void TRiceN(int tid, char* fmt, void* buf, uint32_t n) { +void TRiceN(int tid, char const * fmt, void* buf, uint32_t n) { TRICE_N(ID(tid), fmt, buf, n); } -void trice8B(int tid, char* fmt, void* buf, uint32_t n) { +void trice8B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE8_B(id(tid), fmt, buf, n); } -void Trice8B(int tid, char* fmt, void* buf, uint32_t n) { +void Trice8B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE8_B(Id(tid), fmt, buf, n); } -void TRice8B(int tid, char* fmt, void* buf, uint32_t n) { +void TRice8B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE8_B(ID(tid), fmt, buf, n); } -void trice16B(int tid, char* fmt, void* buf, uint32_t n) { +void trice16B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE16_B(id(tid), fmt, buf, n); } -void Trice16B(int tid, char* fmt, void* buf, uint32_t n) { +void Trice16B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE16_B(Id(tid), fmt, buf, n); } -void TRice16B(int tid, char* fmt, void* buf, uint32_t n) { +void TRice16B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE16_B(ID(tid), fmt, buf, n); } -void trice32B(int tid, char* fmt, void* buf, uint32_t n) { +void trice32B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE32_B(id(tid), fmt, buf, n); } -void Trice32B(int tid, char* fmt, void* buf, uint32_t n) { +void Trice32B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE32_B(Id(tid), fmt, buf, n); } -void TRice32B(int tid, char* fmt, void* buf, uint32_t n) { +void TRice32B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE32_B(ID(tid), fmt, buf, n); } -void trice64B(int tid, char* fmt, void* buf, uint32_t n) { +void trice64B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE64_B(id(tid), fmt, buf, n); } -void Trice64B(int tid, char* fmt, void* buf, uint32_t n) { +void Trice64B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE64_B(Id(tid), fmt, buf, n); } -void TRice64B(int tid, char* fmt, void* buf, uint32_t n) { +void TRice64B(int tid, char const * fmt, void* buf, uint32_t n) { TRICE64_B(ID(tid), fmt, buf, n); } -void trice8F(int tid, char* fmt, void* buf, uint32_t n) { +void trice8F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE8_F(id(tid), fmt, buf, n); } -void Trice8F(int tid, char* fmt, void* buf, uint32_t n) { +void Trice8F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE8_F(Id(tid), fmt, buf, n); } -void TRice8F(int tid, char* fmt, void* buf, uint32_t n) { +void TRice8F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE8_F(ID(tid), fmt, buf, n); } -void trice16F(int tid, char* fmt, void* buf, uint32_t n) { +void trice16F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE16_F(id(tid), fmt, buf, n); } -void Trice16F(int tid, char* fmt, void* buf, uint32_t n) { +void Trice16F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE16_F(Id(tid), fmt, buf, n); } -void TRice16F(int tid, char* fmt, void* buf, uint32_t n) { +void TRice16F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE16_F(ID(tid), fmt, buf, n); } -void trice32F(int tid, char* fmt, void* buf, uint32_t n) { +void trice32F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE32_F(id(tid), fmt, buf, n); } -void Trice32F(int tid, char* fmt, void* buf, uint32_t n) { +void Trice32F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE32_F(Id(tid), fmt, buf, n); } -void TRice32F(int tid, char* fmt, void* buf, uint32_t n) { +void TRice32F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE32_F(ID(tid), fmt, buf, n); } -void trice64F(int tid, char* fmt, void* buf, uint32_t n) { +void trice64F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE64_F(id(tid), fmt, buf, n); } -void Trice64F(int tid, char* fmt, void* buf, uint32_t n) { +void Trice64F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE64_F(Id(tid), fmt, buf, n); } -void TRice64F(int tid, char* fmt, void* buf, uint32_t n) { +void TRice64F(int tid, char const * fmt, void* buf, uint32_t n) { TRICE64_F(ID(tid), fmt, buf, n); } diff --git a/src/trice.h b/src/trice.h index 10a7a4d77..00beef359 100644 --- a/src/trice.h +++ b/src/trice.h @@ -280,14 +280,14 @@ extern uint32_t* TriceBufferWritePosition; // /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +#pragma GCC diagnostic ignored "-Wincompatible-pointer-types" //! TRICE_PUT16 copies 16-bit value x into the Trice buffer. #define TRICE_PUT16(x) \ do { \ uint16_t* p_TRICE_PUT16 = (uint16_t*)TriceBufferWritePosition; \ *p_TRICE_PUT16++ = TRICE_HTOTS(x); \ - TriceBufferWritePosition = (uint32_t*)p_TRICE_PUT16; \ + TriceBufferWritePosition = p_TRICE_PUT16; \ } while (0) - #include "trice8.h" #include "trice16.h" #include "trice32.h" @@ -623,41 +623,41 @@ extern uint32_t* TriceBufferWritePosition; TRICE_LEAVE \ } while (0) -void triceN(int tid, char* fmt, void* buf, uint32_t n); -void TriceN(int tid, char* fmt, void* buf, uint32_t n); -void TRiceN(int tid, char* fmt, void* buf, uint32_t n); +void triceN(int tid, char const * fmt, void* buf, uint32_t n); +void TriceN(int tid, char const * fmt, void* buf, uint32_t n); +void TRiceN(int tid, char const * fmt, void* buf, uint32_t n); -void trice8B(int tid, char* fmt, void* buf, uint32_t n); -void Trice8B(int tid, char* fmt, void* buf, uint32_t n); -void TRice8B(int tid, char* fmt, void* buf, uint32_t n); +void trice8B(int tid, char const * fmt, void* buf, uint32_t n); +void Trice8B(int tid, char const * fmt, void* buf, uint32_t n); +void TRice8B(int tid, char const * fmt, void* buf, uint32_t n); -void trice16B(int tid, char* fmt, void* buf, uint32_t n); -void Trice16B(int tid, char* fmt, void* buf, uint32_t n); -void TRice16B(int tid, char* fmt, void* buf, uint32_t n); +void trice16B(int tid, char const * fmt, void* buf, uint32_t n); +void Trice16B(int tid, char const * fmt, void* buf, uint32_t n); +void TRice16B(int tid, char const * fmt, void* buf, uint32_t n); -void trice32B(int tid, char* fmt, void* buf, uint32_t n); -void Trice32B(int tid, char* fmt, void* buf, uint32_t n); -void TRice32B(int tid, char* fmt, void* buf, uint32_t n); +void trice32B(int tid, char const * fmt, void* buf, uint32_t n); +void Trice32B(int tid, char const * fmt, void* buf, uint32_t n); +void TRice32B(int tid, char const * fmt, void* buf, uint32_t n); -void trice64B(int tid, char* fmt, void* buf, uint32_t n); -void Trice64B(int tid, char* fmt, void* buf, uint32_t n); -void TRice64B(int tid, char* fmt, void* buf, uint32_t n); +void trice64B(int tid, char const * fmt, void* buf, uint32_t n); +void Trice64B(int tid, char const * fmt, void* buf, uint32_t n); +void TRice64B(int tid, char const * fmt, void* buf, uint32_t n); -void trice8F(int tid, char* fmt, void* buf, uint32_t n); -void Trice8F(int tid, char* fmt, void* buf, uint32_t n); -void TRice8F(int tid, char* fmt, void* buf, uint32_t n); +void trice8F(int tid, char const * fmt, void* buf, uint32_t n); +void Trice8F(int tid, char const * fmt, void* buf, uint32_t n); +void TRice8F(int tid, char const * fmt, void* buf, uint32_t n); -void trice16F(int tid, char* fmt, void* buf, uint32_t n); -void Trice16F(int tid, char* fmt, void* buf, uint32_t n); -void TRice16F(int tid, char* fmt, void* buf, uint32_t n); +void trice16F(int tid, char const * fmt, void* buf, uint32_t n); +void Trice16F(int tid, char const * fmt, void* buf, uint32_t n); +void TRice16F(int tid, char const * fmt, void* buf, uint32_t n); -void trice32F(int tid, char* fmt, void* buf, uint32_t n); -void Trice32F(int tid, char* fmt, void* buf, uint32_t n); -void TRice32F(int tid, char* fmt, void* buf, uint32_t n); +void trice32F(int tid, char const * fmt, void* buf, uint32_t n); +void Trice32F(int tid, char const * fmt, void* buf, uint32_t n); +void TRice32F(int tid, char const * fmt, void* buf, uint32_t n); -void trice64F(int tid, char* fmt, void* buf, uint32_t n); -void Trice64F(int tid, char* fmt, void* buf, uint32_t n); -void TRice64F(int tid, char* fmt, void* buf, uint32_t n); +void trice64F(int tid, char const * fmt, void* buf, uint32_t n); +void Trice64F(int tid, char const * fmt, void* buf, uint32_t n); +void TRice64F(int tid, char const * fmt, void* buf, uint32_t n); #endif // #ifndef TRICE_N From af195acf848c620b6ca0ef4f092d456d277ba00a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Tue, 13 May 2025 15:35:34 +0200 Subject: [PATCH 025/187] wip --- _test/testdata/cgoPackage.go | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/_test/testdata/cgoPackage.go b/_test/testdata/cgoPackage.go index 22fe070ab..88214f6bb 100644 --- a/_test/testdata/cgoPackage.go +++ b/_test/testdata/cgoPackage.go @@ -18,7 +18,7 @@ package cgot // unsigned TriceOutDepth( void ); // void CgoSetTriceBuffer( uint8_t* buf ); // void CgoClearTriceBuffer( void ); -// #cgo CFLAGS: -g -I../../src -Wall -Wextra -Werror -Wfatal-errors +// #cgo CFLAGS: -g -I../../src -Wshadow // #include "../../src/trice.c" // #include "../../src/trice8.c" // #include "../../src/trice16.c" From 5d1cdb43a4aa3a510fa12c8e7fb42f128532debc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Tue, 13 May 2025 16:05:32 +0200 Subject: [PATCH 026/187] wip --- _test/testdata/triceCheck.c | 2 +- docs/TriceUserManual.md | 2 +- examples/G0B1_inst/Core/Inc/triceConfig.h | 2 +- examples/exampleData/triceExamples.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/_test/testdata/triceCheck.c b/_test/testdata/triceCheck.c index 05327f093..346bcae12 100644 --- a/_test/testdata/triceCheck.c +++ b/_test/testdata/triceCheck.c @@ -33,7 +33,7 @@ void TriceCheck(int n) { #ifdef TRICE_CHECK_MIN TRice("\rTriceCheck %4d", n); #else // #ifdef TRICE_CHECK_MIN - char const * sABCDE = "abcde 12345"; + char * sABCDE = "abcde 12345"; uint32_t lenABCDE = strlen(sABCDE); float x = (float)1089.6082763671875; // 0x44883377 double y = 518.0547492508867; // 0x4080307020601050 diff --git a/docs/TriceUserManual.md b/docs/TriceUserManual.md index 9c6a93992..f68faba3b 100644 --- a/docs/TriceUserManual.md +++ b/docs/TriceUserManual.md @@ -2372,7 +2372,7 @@ C:\Users\ms\repos\trice_wt_devel\examples\L432_inst/../exampleData/triceExamples #include "trice.h" //! TriceHeadLine emits a decorated name. The name length should be 18 characters. -void TriceHeadLine(char* name) { +void TriceHeadLine(char const* name) { //! This is usable as the very first trice sequence after restart. Adapt it. Use a UTF-8 capable editor like VS-Code or use pure ASCII. TriceS("w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", name); 0: f240 0100 movw r1, #0 diff --git a/examples/G0B1_inst/Core/Inc/triceConfig.h b/examples/G0B1_inst/Core/Inc/triceConfig.h index 59a380be4..00bb846b3 100644 --- a/examples/G0B1_inst/Core/Inc/triceConfig.h +++ b/examples/G0B1_inst/Core/Inc/triceConfig.h @@ -41,7 +41,7 @@ extern "C" { #define TRICE_ENTER_CRITICAL_SECTION { uint32_t primaskstate = __get_PRIMASK(); __disable_irq(); { #define TRICE_LEAVE_CRITICAL_SECTION } __set_PRIMASK(primaskstate); } -void TriceHeadLine(char* name); +void TriceHeadLine(char const* name); void LogTriceConfiguration(void); void SomeExampleTrices(int burstCount); diff --git a/examples/exampleData/triceExamples.c b/examples/exampleData/triceExamples.c index 6fe17236e..080447309 100644 --- a/examples/exampleData/triceExamples.c +++ b/examples/exampleData/triceExamples.c @@ -9,7 +9,7 @@ //! TriceHeadLine emits a decorated name. The name length should be 18 characters. void TriceHeadLine(char const * name) { //! This is usable as the very first trice sequence after restart. Adapt it. Use a UTF-8 capable editor like VS-Code or use pure ASCII. - TriceS("w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", name); + TriceS("w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", (char*)name); } //! SomeExampleTrices generates a few Trice example logs and a burst of Trices. From 7ace040d96fcdd4fc60c5d25e8dc12b16fb81ad6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Tue, 13 May 2025 17:09:02 +0200 Subject: [PATCH 027/187] wip --- examples/L432_inst/flags.mak | 5 +++-- src/triceRingBuffer.c | 2 ++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/examples/L432_inst/flags.mak b/examples/L432_inst/flags.mak index db7d1a083..bbb0e6c86 100644 --- a/examples/L432_inst/flags.mak +++ b/examples/L432_inst/flags.mak @@ -76,8 +76,9 @@ C_FLAGS += -Ofast # -Ofast optimizes for speed. #C_FLAGS += -Wunused-parameter # Warn whenever a function parameter is unused aside from its declaration. To suppress this warning use the `unused' attribute (see Variable Attributes). C_FLAGS += -Wunknown-pragmas C_FLAGS += -fstrict-aliasing - C_FLAGS += -fstrict-overflow - C_FLAGS += -Wstrict-overflow=5 +#C_FLAGS += -fstrict-overflow +#C_FLAGS += -Wstrict-overflow=5 # TODO: enable + C_FLAGS += -Wno-sign-compare # TODO: disable C_FLAGS += -Wfloat-equal # Warn if floating point values are used in equality comparisons. C_FLAGS += -Wundef # Warn if an undefined identifier is evaluated in an `#if' directive. #C_FLAGS += -Wlarger-than=512 # Warn whenever an object of larger than len bytes is defined. diff --git a/src/triceRingBuffer.c b/src/triceRingBuffer.c index 382110328..d84e88b8f 100644 --- a/src/triceRingBuffer.c +++ b/src/triceRingBuffer.c @@ -207,6 +207,8 @@ void triceTransferSingleFraming(void) { #if TRICE_DEFERRED_TRANSFER_MODE == TRICE_MULTI_PACK_MODE +void triceTransferMultiFraming(void); + //! triceTransferMultiFraming transfers several, but not necessarily all, Trices from the Ring Buffer. void triceTransferMultiFraming(void) { triceRingBufferDiagnostics(); // We need to measure before the RingBufferReadPosition increment. From 1112a97ae7822e147481313a02e66a156b3a296f Mon Sep 17 00:00:00 2001 From: rokath Date: Fri, 16 May 2025 14:44:39 +0300 Subject: [PATCH 028/187] all tests pass --- .../triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + _test/_ringB_de_multi_cobs_ua/triceUart.h | 1 + _test/_ringB_protect_de_tcobs_ua/triceUart.h | 1 + _test/_special_dblB_de_tcobs_ua/triceUart.h | 1 + _test/be_dblB_de_tcobs_ua/triceUart.h | 1 + _test/dblB_de_cobs_ua/triceUart.h | 1 + _test/dblB_de_multi_cobs_ua/triceUart.h | 1 + _test/dblB_de_multi_nopf_ua/triceUart.h | 1 + _test/dblB_de_multi_tcobs_ua/triceUart.h | 1 + _test/dblB_de_multi_xtea_cobs_ua/triceUart.h | 1 + _test/dblB_de_tcobs_ua/triceUart.h | 1 + _test/dblB_de_xtea_cobs_ua/triceUart.h | 1 + _test/dblB_de_xtea_tcobs_ua/triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + .../dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + _test/ringB_de_cobs_ua/triceUart.h | 1 + _test/ringB_de_multi_tcobs_ua/triceUart.h | 1 + _test/ringB_de_multi_xtea_cobs_ua/triceUart.h | 1 + .../ringB_de_multi_xtea_tcobs_ua/triceUart.h | 1 + _test/ringB_de_nopf_ua/triceUart.h | 1 + _test/ringB_de_tcobs_ua/triceUart.h | 1 + _test/ringB_de_xtea_cobs_ua/triceUart.h | 1 + _test/ringB_de_xtea_tcobs_ua/triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + .../triceUart.h | 1 + _test/special_for_debug/triceUart.h | 1 + .../triceUart.h | 1 + _test/testdata/triceCheck.c | 2 + demoLI.json | 4368 +++++----- examples/L432_inst/flags.mak | 4 +- src/triceRingBuffer.c | 1 + testAll.log | 7318 +++++++++++++++++ 44 files changed, 9546 insertions(+), 2186 deletions(-) create mode 100644 testAll.log diff --git a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h +++ b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h +++ b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceUart.h b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceUart.h +++ b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/_ringB_de_multi_cobs_ua/triceUart.h b/_test/_ringB_de_multi_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/_ringB_de_multi_cobs_ua/triceUart.h +++ b/_test/_ringB_de_multi_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/_ringB_protect_de_tcobs_ua/triceUart.h b/_test/_ringB_protect_de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/_ringB_protect_de_tcobs_ua/triceUart.h +++ b/_test/_ringB_protect_de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/_special_dblB_de_tcobs_ua/triceUart.h b/_test/_special_dblB_de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/_special_dblB_de_tcobs_ua/triceUart.h +++ b/_test/_special_dblB_de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/be_dblB_de_tcobs_ua/triceUart.h b/_test/be_dblB_de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/be_dblB_de_tcobs_ua/triceUart.h +++ b/_test/be_dblB_de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_de_cobs_ua/triceUart.h b/_test/dblB_de_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_de_cobs_ua/triceUart.h +++ b/_test/dblB_de_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_de_multi_cobs_ua/triceUart.h b/_test/dblB_de_multi_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_de_multi_cobs_ua/triceUart.h +++ b/_test/dblB_de_multi_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_de_multi_nopf_ua/triceUart.h b/_test/dblB_de_multi_nopf_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_de_multi_nopf_ua/triceUart.h +++ b/_test/dblB_de_multi_nopf_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_de_multi_tcobs_ua/triceUart.h b/_test/dblB_de_multi_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_de_multi_tcobs_ua/triceUart.h +++ b/_test/dblB_de_multi_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_de_multi_xtea_cobs_ua/triceUart.h b/_test/dblB_de_multi_xtea_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_de_multi_xtea_cobs_ua/triceUart.h +++ b/_test/dblB_de_multi_xtea_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_de_tcobs_ua/triceUart.h b/_test/dblB_de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_de_tcobs_ua/triceUart.h +++ b/_test/dblB_de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_de_xtea_cobs_ua/triceUart.h b/_test/dblB_de_xtea_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_de_xtea_cobs_ua/triceUart.h +++ b/_test/dblB_de_xtea_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_de_xtea_tcobs_ua/triceUart.h b/_test/dblB_de_xtea_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_de_xtea_tcobs_ua/triceUart.h +++ b/_test/dblB_de_xtea_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_de_cobs_ua/triceUart.h b/_test/ringB_de_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_de_cobs_ua/triceUart.h +++ b/_test/ringB_de_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_de_multi_tcobs_ua/triceUart.h b/_test/ringB_de_multi_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_de_multi_tcobs_ua/triceUart.h +++ b/_test/ringB_de_multi_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_de_multi_xtea_cobs_ua/triceUart.h b/_test/ringB_de_multi_xtea_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_de_multi_xtea_cobs_ua/triceUart.h +++ b/_test/ringB_de_multi_xtea_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_de_multi_xtea_tcobs_ua/triceUart.h b/_test/ringB_de_multi_xtea_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_de_multi_xtea_tcobs_ua/triceUart.h +++ b/_test/ringB_de_multi_xtea_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_de_nopf_ua/triceUart.h b/_test/ringB_de_nopf_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_de_nopf_ua/triceUart.h +++ b/_test/ringB_de_nopf_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_de_tcobs_ua/triceUart.h b/_test/ringB_de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_de_tcobs_ua/triceUart.h +++ b/_test/ringB_de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_de_xtea_cobs_ua/triceUart.h b/_test/ringB_de_xtea_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_de_xtea_cobs_ua/triceUart.h +++ b/_test/ringB_de_xtea_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_de_xtea_tcobs_ua/triceUart.h b/_test/ringB_de_xtea_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_de_xtea_tcobs_ua/triceUart.h +++ b/_test/ringB_de_xtea_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceUart.h b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceUart.h +++ b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceUart.h b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceUart.h +++ b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceUart.h b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceUart.h +++ b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceUart.h b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceUart.h +++ b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceUart.h b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceUart.h +++ b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceUart.h b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceUart.h +++ b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/special_for_debug/triceUart.h b/_test/special_for_debug/triceUart.h index 168f1b417..891963443 100644 --- a/_test/special_for_debug/triceUart.h +++ b/_test/special_for_debug/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/special_protect_dblB_de_tcobs_ua/triceUart.h b/_test/special_protect_dblB_de_tcobs_ua/triceUart.h index 168f1b417..891963443 100644 --- a/_test/special_protect_dblB_de_tcobs_ua/triceUart.h +++ b/_test/special_protect_dblB_de_tcobs_ua/triceUart.h @@ -25,6 +25,7 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter // LL_USART_TransmitData8(TRICE_UARTA, v); } diff --git a/_test/testdata/triceCheck.c b/_test/testdata/triceCheck.c index 346bcae12..bf5d34db4 100644 --- a/_test/testdata/triceCheck.c +++ b/_test/testdata/triceCheck.c @@ -23,6 +23,8 @@ static void dynString(int n); // clang-format off +void TriceCheck(int index); // Avoid noise with option -Wmissing-prototypes. + //! TriceCheck performs trice code sequence n. TriceCheck writes out all types of trices with fixed values for testing //! \details One trice has one subtrace, if param size max 2 bytes. //! Traces with more bytes as parameter consist of several subtraces. diff --git a/demoLI.json b/demoLI.json index ec8a6ce4f..8f736d66f 100644 --- a/demoLI.json +++ b/demoLI.json @@ -57,8739 +57,8739 @@ }, "13014": { "File": "_test/testdata/triceCheck.c", - "Line": 34 + "Line": 36 }, "13015": { "File": "_test/testdata/triceCheck.c", - "Line": 57 + "Line": 59 }, "13016": { "File": "_test/testdata/triceCheck.c", - "Line": 59 + "Line": 61 }, "13017": { "File": "_test/testdata/triceCheck.c", - "Line": 61 + "Line": 63 }, "13018": { "File": "_test/testdata/triceCheck.c", - "Line": 62 + "Line": 64 }, "13019": { "File": "_test/testdata/triceCheck.c", - "Line": 63 + "Line": 65 }, "13020": { "File": "_test/testdata/triceCheck.c", - "Line": 139 + "Line": 141 }, "13021": { "File": "_test/testdata/triceCheck.c", - "Line": 140 + "Line": 142 }, "13022": { "File": "_test/testdata/triceCheck.c", - "Line": 141 + "Line": 143 }, "13023": { "File": "_test/testdata/triceCheck.c", - "Line": 142 + "Line": 144 }, "13024": { "File": "_test/testdata/triceCheck.c", - "Line": 143 + "Line": 145 }, "13025": { "File": "_test/testdata/triceCheck.c", - "Line": 144 + "Line": 146 }, "13026": { "File": "_test/testdata/triceCheck.c", - "Line": 145 + "Line": 147 }, "13027": { "File": "_test/testdata/triceCheck.c", - "Line": 146 + "Line": 148 }, "13028": { "File": "_test/testdata/triceCheck.c", - "Line": 147 + "Line": 149 }, "13029": { "File": "_test/testdata/triceCheck.c", - "Line": 148 + "Line": 150 }, "13030": { "File": "_test/testdata/triceCheck.c", - "Line": 149 + "Line": 151 }, "13031": { "File": "_test/testdata/triceCheck.c", - "Line": 150 + "Line": 152 }, "13032": { "File": "_test/testdata/triceCheck.c", - "Line": 151 + "Line": 153 }, "13033": { "File": "_test/testdata/triceCheck.c", - "Line": 152 + "Line": 154 }, "13034": { "File": "_test/testdata/triceCheck.c", - "Line": 154 + "Line": 156 }, "13035": { "File": "_test/testdata/triceCheck.c", - "Line": 155 + "Line": 157 }, "13036": { "File": "_test/testdata/triceCheck.c", - "Line": 156 + "Line": 158 }, "13037": { "File": "_test/testdata/triceCheck.c", - "Line": 157 + "Line": 159 }, "13038": { "File": "_test/testdata/triceCheck.c", - "Line": 158 + "Line": 160 }, "13039": { "File": "_test/testdata/triceCheck.c", - "Line": 159 + "Line": 161 }, "13040": { "File": "_test/testdata/triceCheck.c", - "Line": 160 + "Line": 162 }, "13041": { "File": "_test/testdata/triceCheck.c", - "Line": 161 + "Line": 163 }, "13042": { "File": "_test/testdata/triceCheck.c", - "Line": 162 + "Line": 164 }, "13043": { "File": "_test/testdata/triceCheck.c", - "Line": 163 + "Line": 165 }, "13044": { "File": "_test/testdata/triceCheck.c", - "Line": 164 + "Line": 166 }, "13045": { "File": "_test/testdata/triceCheck.c", - "Line": 165 + "Line": 167 }, "13046": { "File": "_test/testdata/triceCheck.c", - "Line": 166 + "Line": 168 }, "13047": { "File": "_test/testdata/triceCheck.c", - "Line": 167 + "Line": 169 }, "13048": { "File": "_test/testdata/triceCheck.c", - "Line": 169 + "Line": 171 }, "13049": { "File": "_test/testdata/triceCheck.c", - "Line": 170 + "Line": 172 }, "13050": { "File": "_test/testdata/triceCheck.c", - "Line": 171 + "Line": 173 }, "13051": { "File": "_test/testdata/triceCheck.c", - "Line": 172 + "Line": 174 }, "13052": { "File": "_test/testdata/triceCheck.c", - "Line": 173 + "Line": 175 }, "13053": { "File": "_test/testdata/triceCheck.c", - "Line": 174 + "Line": 176 }, "13054": { "File": "_test/testdata/triceCheck.c", - "Line": 175 + "Line": 177 }, "13055": { "File": "_test/testdata/triceCheck.c", - "Line": 176 + "Line": 178 }, "13056": { "File": "_test/testdata/triceCheck.c", - "Line": 177 + "Line": 179 }, "13057": { "File": "_test/testdata/triceCheck.c", - "Line": 178 + "Line": 180 }, "13058": { "File": "_test/testdata/triceCheck.c", - "Line": 179 + "Line": 181 }, "13059": { "File": "_test/testdata/triceCheck.c", - "Line": 180 + "Line": 182 }, "13060": { "File": "_test/testdata/triceCheck.c", - "Line": 181 + "Line": 183 }, "13061": { "File": "_test/testdata/triceCheck.c", - "Line": 182 + "Line": 184 }, "13062": { "File": "_test/testdata/triceCheck.c", - "Line": 184 + "Line": 186 }, "13063": { "File": "_test/testdata/triceCheck.c", - "Line": 185 + "Line": 187 }, "13064": { "File": "_test/testdata/triceCheck.c", - "Line": 186 + "Line": 188 }, "13065": { "File": "_test/testdata/triceCheck.c", - "Line": 187 + "Line": 189 }, "13066": { "File": "_test/testdata/triceCheck.c", - "Line": 188 + "Line": 190 }, "13067": { "File": "_test/testdata/triceCheck.c", - "Line": 189 + "Line": 191 }, "13068": { "File": "_test/testdata/triceCheck.c", - "Line": 190 + "Line": 192 }, "13069": { "File": "_test/testdata/triceCheck.c", - "Line": 191 + "Line": 193 }, "13070": { "File": "_test/testdata/triceCheck.c", - "Line": 192 + "Line": 194 }, "13071": { "File": "_test/testdata/triceCheck.c", - "Line": 193 + "Line": 195 }, "13072": { "File": "_test/testdata/triceCheck.c", - "Line": 194 + "Line": 196 }, "13073": { "File": "_test/testdata/triceCheck.c", - "Line": 195 + "Line": 197 }, "13074": { "File": "_test/testdata/triceCheck.c", - "Line": 196 + "Line": 198 }, "13075": { "File": "_test/testdata/triceCheck.c", - "Line": 197 + "Line": 199 }, "13076": { "File": "_test/testdata/triceCheck.c", - "Line": 198 + "Line": 200 }, "13077": { "File": "_test/testdata/triceCheck.c", - "Line": 200 + "Line": 202 }, "13078": { "File": "_test/testdata/triceCheck.c", - "Line": 201 + "Line": 203 }, "13079": { "File": "_test/testdata/triceCheck.c", - "Line": 202 + "Line": 204 }, "13080": { "File": "_test/testdata/triceCheck.c", - "Line": 203 + "Line": 205 }, "13081": { "File": "_test/testdata/triceCheck.c", - "Line": 204 + "Line": 206 }, "13082": { "File": "_test/testdata/triceCheck.c", - "Line": 205 + "Line": 207 }, "13083": { "File": "_test/testdata/triceCheck.c", - "Line": 206 + "Line": 208 }, "13084": { "File": "_test/testdata/triceCheck.c", - "Line": 207 + "Line": 209 }, "13085": { "File": "_test/testdata/triceCheck.c", - "Line": 208 + "Line": 210 }, "13086": { "File": "_test/testdata/triceCheck.c", - "Line": 209 + "Line": 211 }, "13087": { "File": "_test/testdata/triceCheck.c", - "Line": 210 + "Line": 212 }, "13088": { "File": "_test/testdata/triceCheck.c", - "Line": 211 + "Line": 213 }, "13089": { "File": "_test/testdata/triceCheck.c", - "Line": 212 + "Line": 214 }, "13090": { "File": "_test/testdata/triceCheck.c", - "Line": 213 + "Line": 215 }, "13091": { "File": "_test/testdata/triceCheck.c", - "Line": 214 + "Line": 216 }, "13092": { "File": "_test/testdata/triceCheck.c", - "Line": 216 + "Line": 218 }, "13093": { "File": "_test/testdata/triceCheck.c", - "Line": 220 + "Line": 222 }, "13094": { "File": "_test/testdata/triceCheck.c", - "Line": 224 + "Line": 226 }, "13095": { "File": "_test/testdata/triceCheck.c", - "Line": 225 + "Line": 227 }, "13096": { "File": "_test/testdata/triceCheck.c", - "Line": 227 + "Line": 229 }, "13097": { "File": "_test/testdata/triceCheck.c", - "Line": 228 + "Line": 230 }, "13098": { "File": "_test/testdata/triceCheck.c", - "Line": 230 + "Line": 232 }, "13099": { "File": "_test/testdata/triceCheck.c", - "Line": 232 + "Line": 234 }, "13100": { "File": "_test/testdata/triceCheck.c", - "Line": 234 + "Line": 236 }, "13101": { "File": "_test/testdata/triceCheck.c", - "Line": 236 + "Line": 238 }, "13102": { "File": "_test/testdata/triceCheck.c", - "Line": 239 + "Line": 241 }, "13103": { "File": "_test/testdata/triceCheck.c", - "Line": 240 + "Line": 242 }, "13104": { "File": "_test/testdata/triceCheck.c", - "Line": 241 + "Line": 243 }, "13105": { "File": "_test/testdata/triceCheck.c", - "Line": 242 + "Line": 244 }, "13106": { "File": "_test/testdata/triceCheck.c", - "Line": 243 + "Line": 245 }, "13107": { "File": "_test/testdata/triceCheck.c", - "Line": 244 + "Line": 246 }, "13108": { "File": "_test/testdata/triceCheck.c", - "Line": 245 + "Line": 247 }, "13109": { "File": "_test/testdata/triceCheck.c", - "Line": 246 + "Line": 248 }, "13110": { "File": "_test/testdata/triceCheck.c", - "Line": 247 + "Line": 249 }, "13111": { "File": "_test/testdata/triceCheck.c", - "Line": 248 + "Line": 250 }, "13112": { "File": "_test/testdata/triceCheck.c", - "Line": 249 + "Line": 251 }, "13113": { "File": "_test/testdata/triceCheck.c", - "Line": 250 + "Line": 252 }, "13114": { "File": "_test/testdata/triceCheck.c", - "Line": 251 + "Line": 253 }, "13115": { "File": "_test/testdata/triceCheck.c", - "Line": 252 + "Line": 254 }, "13116": { "File": "_test/testdata/triceCheck.c", - "Line": 253 + "Line": 255 }, "13117": { "File": "_test/testdata/triceCheck.c", - "Line": 254 + "Line": 256 }, "13118": { "File": "_test/testdata/triceCheck.c", - "Line": 255 + "Line": 257 }, "13119": { "File": "_test/testdata/triceCheck.c", - "Line": 256 + "Line": 258 }, "13120": { "File": "_test/testdata/triceCheck.c", - "Line": 257 + "Line": 259 }, "13121": { "File": "_test/testdata/triceCheck.c", - "Line": 258 + "Line": 260 }, "13122": { "File": "_test/testdata/triceCheck.c", - "Line": 259 + "Line": 261 }, "13123": { "File": "_test/testdata/triceCheck.c", - "Line": 260 + "Line": 262 }, "13124": { "File": "_test/testdata/triceCheck.c", - "Line": 261 + "Line": 263 }, "13125": { "File": "_test/testdata/triceCheck.c", - "Line": 262 + "Line": 264 }, "13126": { "File": "_test/testdata/triceCheck.c", - "Line": 264 + "Line": 266 }, "13127": { "File": "_test/testdata/triceCheck.c", - "Line": 265 + "Line": 267 }, "13128": { "File": "_test/testdata/triceCheck.c", - "Line": 266 + "Line": 268 }, "13129": { "File": "_test/testdata/triceCheck.c", - "Line": 267 + "Line": 269 }, "13130": { "File": "_test/testdata/triceCheck.c", - "Line": 268 + "Line": 270 }, "13131": { "File": "_test/testdata/triceCheck.c", - "Line": 269 + "Line": 271 }, "13132": { "File": "_test/testdata/triceCheck.c", - "Line": 270 + "Line": 272 }, "13133": { "File": "_test/testdata/triceCheck.c", - "Line": 271 + "Line": 273 }, "13134": { "File": "_test/testdata/triceCheck.c", - "Line": 272 + "Line": 274 }, "13135": { "File": "_test/testdata/triceCheck.c", - "Line": 273 + "Line": 275 }, "13136": { "File": "_test/testdata/triceCheck.c", - "Line": 274 + "Line": 276 }, "13137": { "File": "_test/testdata/triceCheck.c", - "Line": 275 + "Line": 277 }, "13138": { "File": "_test/testdata/triceCheck.c", - "Line": 276 + "Line": 278 }, "13139": { "File": "_test/testdata/triceCheck.c", - "Line": 277 + "Line": 279 }, "13140": { "File": "_test/testdata/triceCheck.c", - "Line": 278 + "Line": 280 }, "13141": { "File": "_test/testdata/triceCheck.c", - "Line": 279 + "Line": 281 }, "13142": { "File": "_test/testdata/triceCheck.c", - "Line": 280 + "Line": 282 }, "13143": { "File": "_test/testdata/triceCheck.c", - "Line": 281 + "Line": 283 }, "13144": { "File": "_test/testdata/triceCheck.c", - "Line": 282 + "Line": 284 }, "13145": { "File": "_test/testdata/triceCheck.c", - "Line": 283 + "Line": 285 }, "13146": { "File": "_test/testdata/triceCheck.c", - "Line": 284 + "Line": 286 }, "13147": { "File": "_test/testdata/triceCheck.c", - "Line": 285 + "Line": 287 }, "13148": { "File": "_test/testdata/triceCheck.c", - "Line": 286 + "Line": 288 }, "13149": { "File": "_test/testdata/triceCheck.c", - "Line": 287 + "Line": 289 }, "13150": { "File": "_test/testdata/triceCheck.c", - "Line": 290 + "Line": 292 }, "13151": { "File": "_test/testdata/triceCheck.c", - "Line": 291 + "Line": 293 }, "13152": { "File": "_test/testdata/triceCheck.c", - "Line": 292 + "Line": 294 }, "13153": { "File": "_test/testdata/triceCheck.c", - "Line": 294 + "Line": 296 }, "13154": { "File": "_test/testdata/triceCheck.c", - "Line": 295 + "Line": 297 }, "13155": { "File": "_test/testdata/triceCheck.c", - "Line": 296 + "Line": 298 }, "13156": { "File": "_test/testdata/triceCheck.c", - "Line": 297 + "Line": 299 }, "13157": { "File": "_test/testdata/triceCheck.c", - "Line": 298 + "Line": 300 }, "13158": { "File": "_test/testdata/triceCheck.c", - "Line": 299 + "Line": 301 }, "13159": { "File": "_test/testdata/triceCheck.c", - "Line": 300 + "Line": 302 }, "13160": { "File": "_test/testdata/triceCheck.c", - "Line": 301 + "Line": 303 }, "13161": { "File": "_test/testdata/triceCheck.c", - "Line": 302 + "Line": 304 }, "13162": { "File": "_test/testdata/triceCheck.c", - "Line": 304 + "Line": 306 }, "13163": { "File": "_test/testdata/triceCheck.c", - "Line": 306 + "Line": 308 }, "13164": { "File": "_test/testdata/triceCheck.c", - "Line": 307 + "Line": 309 }, "13165": { "File": "_test/testdata/triceCheck.c", - "Line": 308 + "Line": 310 }, "13166": { "File": "_test/testdata/triceCheck.c", - "Line": 311 + "Line": 313 }, "13167": { "File": "_test/testdata/triceCheck.c", - "Line": 312 + "Line": 314 }, "13168": { "File": "_test/testdata/triceCheck.c", - "Line": 313 + "Line": 315 }, "13169": { "File": "_test/testdata/triceCheck.c", - "Line": 315 + "Line": 317 }, "13170": { "File": "_test/testdata/triceCheck.c", - "Line": 316 + "Line": 318 }, "13171": { "File": "_test/testdata/triceCheck.c", - "Line": 317 + "Line": 319 }, "13172": { "File": "_test/testdata/triceCheck.c", - "Line": 318 + "Line": 320 }, "13173": { "File": "_test/testdata/triceCheck.c", - "Line": 319 + "Line": 321 }, "13174": { "File": "_test/testdata/triceCheck.c", - "Line": 320 + "Line": 322 }, "13175": { "File": "_test/testdata/triceCheck.c", - "Line": 321 + "Line": 323 }, "13176": { "File": "_test/testdata/triceCheck.c", - "Line": 322 + "Line": 324 }, "13177": { "File": "_test/testdata/triceCheck.c", - "Line": 323 + "Line": 325 }, "13178": { "File": "_test/testdata/triceCheck.c", - "Line": 324 + "Line": 326 }, "13179": { "File": "_test/testdata/triceCheck.c", - "Line": 325 + "Line": 327 }, "13180": { "File": "_test/testdata/triceCheck.c", - "Line": 326 + "Line": 328 }, "13181": { "File": "_test/testdata/triceCheck.c", - "Line": 327 + "Line": 329 }, "13182": { "File": "_test/testdata/triceCheck.c", - "Line": 328 + "Line": 330 }, "13183": { "File": "_test/testdata/triceCheck.c", - "Line": 330 + "Line": 332 }, "13184": { "File": "_test/testdata/triceCheck.c", - "Line": 331 + "Line": 333 }, "13185": { "File": "_test/testdata/triceCheck.c", - "Line": 332 + "Line": 334 }, "13186": { "File": "_test/testdata/triceCheck.c", - "Line": 333 + "Line": 335 }, "13187": { "File": "_test/testdata/triceCheck.c", - "Line": 334 + "Line": 336 }, "13188": { "File": "_test/testdata/triceCheck.c", - "Line": 335 + "Line": 337 }, "13189": { "File": "_test/testdata/triceCheck.c", - "Line": 336 + "Line": 338 }, "13190": { "File": "_test/testdata/triceCheck.c", - "Line": 337 + "Line": 339 }, "13191": { "File": "_test/testdata/triceCheck.c", - "Line": 338 + "Line": 340 }, "13192": { "File": "_test/testdata/triceCheck.c", - "Line": 339 + "Line": 341 }, "13193": { "File": "_test/testdata/triceCheck.c", - "Line": 340 + "Line": 342 }, "13194": { "File": "_test/testdata/triceCheck.c", - "Line": 341 + "Line": 343 }, "13195": { "File": "_test/testdata/triceCheck.c", - "Line": 342 + "Line": 344 }, "13196": { "File": "_test/testdata/triceCheck.c", - "Line": 344 + "Line": 346 }, "13197": { "File": "_test/testdata/triceCheck.c", - "Line": 345 + "Line": 347 }, "13198": { "File": "_test/testdata/triceCheck.c", - "Line": 346 + "Line": 348 }, "13199": { "File": "_test/testdata/triceCheck.c", - "Line": 347 + "Line": 349 }, "13200": { "File": "_test/testdata/triceCheck.c", - "Line": 348 + "Line": 350 }, "13201": { "File": "_test/testdata/triceCheck.c", - "Line": 349 + "Line": 351 }, "13202": { "File": "_test/testdata/triceCheck.c", - "Line": 350 + "Line": 352 }, "13203": { "File": "_test/testdata/triceCheck.c", - "Line": 352 + "Line": 354 }, "13204": { "File": "_test/testdata/triceCheck.c", - "Line": 353 + "Line": 355 }, "13205": { "File": "_test/testdata/triceCheck.c", - "Line": 354 + "Line": 356 }, "13206": { "File": "_test/testdata/triceCheck.c", - "Line": 355 + "Line": 357 }, "13207": { "File": "_test/testdata/triceCheck.c", - "Line": 356 + "Line": 358 }, "13208": { "File": "_test/testdata/triceCheck.c", - "Line": 357 + "Line": 359 }, "13209": { "File": "_test/testdata/triceCheck.c", - "Line": 359 + "Line": 361 }, "13210": { "File": "_test/testdata/triceCheck.c", - "Line": 360 + "Line": 362 }, "13211": { "File": "_test/testdata/triceCheck.c", - "Line": 361 + "Line": 363 }, "13212": { "File": "_test/testdata/triceCheck.c", - "Line": 362 + "Line": 364 }, "13213": { "File": "_test/testdata/triceCheck.c", - "Line": 364 + "Line": 366 }, "13214": { "File": "_test/testdata/triceCheck.c", - "Line": 365 + "Line": 367 }, "13215": { "File": "_test/testdata/triceCheck.c", - "Line": 366 + "Line": 368 }, "13216": { "File": "_test/testdata/triceCheck.c", - "Line": 367 + "Line": 369 }, "13217": { "File": "_test/testdata/triceCheck.c", - "Line": 368 + "Line": 370 }, "13218": { "File": "_test/testdata/triceCheck.c", - "Line": 369 + "Line": 371 }, "13219": { "File": "_test/testdata/triceCheck.c", - "Line": 370 + "Line": 372 }, "13220": { "File": "_test/testdata/triceCheck.c", - "Line": 371 + "Line": 373 }, "13221": { "File": "_test/testdata/triceCheck.c", - "Line": 372 + "Line": 374 }, "13222": { "File": "_test/testdata/triceCheck.c", - "Line": 374 + "Line": 376 }, "13223": { "File": "_test/testdata/triceCheck.c", - "Line": 375 + "Line": 377 }, "13224": { "File": "_test/testdata/triceCheck.c", - "Line": 376 + "Line": 378 }, "13225": { "File": "_test/testdata/triceCheck.c", - "Line": 377 + "Line": 379 }, "13226": { "File": "_test/testdata/triceCheck.c", - "Line": 378 + "Line": 380 }, "13227": { "File": "_test/testdata/triceCheck.c", - "Line": 379 + "Line": 381 }, "13228": { "File": "_test/testdata/triceCheck.c", - "Line": 380 + "Line": 382 }, "13229": { "File": "_test/testdata/triceCheck.c", - "Line": 381 + "Line": 383 }, "13230": { "File": "_test/testdata/triceCheck.c", - "Line": 382 + "Line": 384 }, "13231": { "File": "_test/testdata/triceCheck.c", - "Line": 384 + "Line": 386 }, "13232": { "File": "_test/testdata/triceCheck.c", - "Line": 385 + "Line": 387 }, "13233": { "File": "_test/testdata/triceCheck.c", - "Line": 386 + "Line": 388 }, "13234": { "File": "_test/testdata/triceCheck.c", - "Line": 387 + "Line": 389 }, "13235": { "File": "_test/testdata/triceCheck.c", - "Line": 388 + "Line": 390 }, "13236": { "File": "_test/testdata/triceCheck.c", - "Line": 389 + "Line": 391 }, "13237": { "File": "_test/testdata/triceCheck.c", - "Line": 390 + "Line": 392 }, "13238": { "File": "_test/testdata/triceCheck.c", - "Line": 391 + "Line": 393 }, "13239": { "File": "_test/testdata/triceCheck.c", - "Line": 392 + "Line": 394 }, "13240": { "File": "_test/testdata/triceCheck.c", - "Line": 394 + "Line": 396 }, "13241": { "File": "_test/testdata/triceCheck.c", - "Line": 395 + "Line": 397 }, "13242": { "File": "_test/testdata/triceCheck.c", - "Line": 396 + "Line": 398 }, "13243": { "File": "_test/testdata/triceCheck.c", - "Line": 397 + "Line": 399 }, "13244": { "File": "_test/testdata/triceCheck.c", - "Line": 398 + "Line": 400 }, "13245": { "File": "_test/testdata/triceCheck.c", - "Line": 399 + "Line": 401 }, "13246": { "File": "_test/testdata/triceCheck.c", - "Line": 400 + "Line": 402 }, "13247": { "File": "_test/testdata/triceCheck.c", - "Line": 401 + "Line": 403 }, "13248": { "File": "_test/testdata/triceCheck.c", - "Line": 402 + "Line": 404 }, "13249": { "File": "_test/testdata/triceCheck.c", - "Line": 403 + "Line": 405 }, "13250": { "File": "_test/testdata/triceCheck.c", - "Line": 404 + "Line": 406 }, "13251": { "File": "_test/testdata/triceCheck.c", - "Line": 405 + "Line": 407 }, "13252": { "File": "_test/testdata/triceCheck.c", - "Line": 406 + "Line": 408 }, "13253": { "File": "_test/testdata/triceCheck.c", - "Line": 407 + "Line": 409 }, "13254": { "File": "_test/testdata/triceCheck.c", - "Line": 408 + "Line": 410 }, "13255": { "File": "_test/testdata/triceCheck.c", - "Line": 409 + "Line": 411 }, "13256": { "File": "_test/testdata/triceCheck.c", - "Line": 411 + "Line": 413 }, "13257": { "File": "_test/testdata/triceCheck.c", - "Line": 412 + "Line": 414 }, "13258": { "File": "_test/testdata/triceCheck.c", - "Line": 413 + "Line": 415 }, "13259": { "File": "_test/testdata/triceCheck.c", - "Line": 414 + "Line": 416 }, "13260": { "File": "_test/testdata/triceCheck.c", - "Line": 415 + "Line": 417 }, "13261": { "File": "_test/testdata/triceCheck.c", - "Line": 416 + "Line": 418 }, "13262": { "File": "_test/testdata/triceCheck.c", - "Line": 417 + "Line": 419 }, "13263": { "File": "_test/testdata/triceCheck.c", - "Line": 418 + "Line": 420 }, "13264": { "File": "_test/testdata/triceCheck.c", - "Line": 419 + "Line": 421 }, "13265": { "File": "_test/testdata/triceCheck.c", - "Line": 420 + "Line": 422 }, "13266": { "File": "_test/testdata/triceCheck.c", - "Line": 421 + "Line": 423 }, "13267": { "File": "_test/testdata/triceCheck.c", - "Line": 422 + "Line": 424 }, "13268": { "File": "_test/testdata/triceCheck.c", - "Line": 423 + "Line": 425 }, "13269": { "File": "_test/testdata/triceCheck.c", - "Line": 424 + "Line": 426 }, "13270": { "File": "_test/testdata/triceCheck.c", - "Line": 425 + "Line": 427 }, "13271": { "File": "_test/testdata/triceCheck.c", - "Line": 426 + "Line": 428 }, "13272": { "File": "_test/testdata/triceCheck.c", - "Line": 427 + "Line": 429 }, "13273": { "File": "_test/testdata/triceCheck.c", - "Line": 428 + "Line": 430 }, "13274": { "File": "_test/testdata/triceCheck.c", - "Line": 430 + "Line": 432 }, "13275": { "File": "_test/testdata/triceCheck.c", - "Line": 433 + "Line": 435 }, "13276": { "File": "_test/testdata/triceCheck.c", - "Line": 441 + "Line": 443 }, "13277": { "File": "_test/testdata/triceCheck.c", - "Line": 445 + "Line": 447 }, "13278": { "File": "_test/testdata/triceCheck.c", - "Line": 447 + "Line": 449 }, "13279": { "File": "_test/testdata/triceCheck.c", - "Line": 448 + "Line": 450 }, "13280": { "File": "_test/testdata/triceCheck.c", - "Line": 449 + "Line": 451 }, "13281": { "File": "_test/testdata/triceCheck.c", - "Line": 450 + "Line": 452 }, "13282": { "File": "_test/testdata/triceCheck.c", - "Line": 451 + "Line": 453 }, "13283": { "File": "_test/testdata/triceCheck.c", - "Line": 452 + "Line": 454 }, "13284": { "File": "_test/testdata/triceCheck.c", - "Line": 453 + "Line": 455 }, "13285": { "File": "_test/testdata/triceCheck.c", - "Line": 454 + "Line": 456 }, "13286": { "File": "_test/testdata/triceCheck.c", - "Line": 455 + "Line": 457 }, "13287": { "File": "_test/testdata/triceCheck.c", - "Line": 456 + "Line": 458 }, "13288": { "File": "_test/testdata/triceCheck.c", - "Line": 457 + "Line": 459 }, "13289": { "File": "_test/testdata/triceCheck.c", - "Line": 459 + "Line": 461 }, "13290": { "File": "_test/testdata/triceCheck.c", - "Line": 461 + "Line": 463 }, "13291": { "File": "_test/testdata/triceCheck.c", - "Line": 462 + "Line": 464 }, "13292": { "File": "_test/testdata/triceCheck.c", - "Line": 463 + "Line": 465 }, "13293": { "File": "_test/testdata/triceCheck.c", - "Line": 464 + "Line": 466 }, "13294": { "File": "_test/testdata/triceCheck.c", - "Line": 465 + "Line": 467 }, "13295": { "File": "_test/testdata/triceCheck.c", - "Line": 467 + "Line": 469 }, "13296": { "File": "_test/testdata/triceCheck.c", - "Line": 468 + "Line": 470 }, "13297": { "File": "_test/testdata/triceCheck.c", - "Line": 470 + "Line": 472 }, "13298": { "File": "_test/testdata/triceCheck.c", - "Line": 471 + "Line": 473 }, "13299": { "File": "_test/testdata/triceCheck.c", - "Line": 472 + "Line": 474 }, "13300": { "File": "_test/testdata/triceCheck.c", - "Line": 473 + "Line": 475 }, "13301": { "File": "_test/testdata/triceCheck.c", - "Line": 474 + "Line": 476 }, "13302": { "File": "_test/testdata/triceCheck.c", - "Line": 475 + "Line": 477 }, "13303": { "File": "_test/testdata/triceCheck.c", - "Line": 477 + "Line": 479 }, "13304": { "File": "_test/testdata/triceCheck.c", - "Line": 478 + "Line": 480 }, "13305": { "File": "_test/testdata/triceCheck.c", - "Line": 479 + "Line": 481 }, "13306": { "File": "_test/testdata/triceCheck.c", - "Line": 480 + "Line": 482 }, "13307": { "File": "_test/testdata/triceCheck.c", - "Line": 481 + "Line": 483 }, "13308": { "File": "_test/testdata/triceCheck.c", - "Line": 482 + "Line": 484 }, "13309": { "File": "_test/testdata/triceCheck.c", - "Line": 483 + "Line": 485 }, "13310": { "File": "_test/testdata/triceCheck.c", - "Line": 484 + "Line": 486 }, "13311": { "File": "_test/testdata/triceCheck.c", - "Line": 485 + "Line": 487 }, "13312": { "File": "_test/testdata/triceCheck.c", - "Line": 486 + "Line": 488 }, "13313": { "File": "_test/testdata/triceCheck.c", - "Line": 487 + "Line": 489 }, "13314": { "File": "_test/testdata/triceCheck.c", - "Line": 488 + "Line": 490 }, "13315": { "File": "_test/testdata/triceCheck.c", - "Line": 489 + "Line": 491 }, "13316": { "File": "_test/testdata/triceCheck.c", - "Line": 491 + "Line": 493 }, "13317": { "File": "_test/testdata/triceCheck.c", - "Line": 492 + "Line": 494 }, "13318": { "File": "_test/testdata/triceCheck.c", - "Line": 493 + "Line": 495 }, "13319": { "File": "_test/testdata/triceCheck.c", - "Line": 494 + "Line": 496 }, "13320": { "File": "_test/testdata/triceCheck.c", - "Line": 495 + "Line": 497 }, "13321": { "File": "_test/testdata/triceCheck.c", - "Line": 496 + "Line": 498 }, "13322": { "File": "_test/testdata/triceCheck.c", - "Line": 497 + "Line": 499 }, "13323": { "File": "_test/testdata/triceCheck.c", - "Line": 499 + "Line": 501 }, "13324": { "File": "_test/testdata/triceCheck.c", - "Line": 503 + "Line": 505 }, "13325": { "File": "_test/testdata/triceCheck.c", - "Line": 504 + "Line": 506 }, "13326": { "File": "_test/testdata/triceCheck.c", - "Line": 505 + "Line": 507 }, "13327": { "File": "_test/testdata/triceCheck.c", - "Line": 507 + "Line": 509 }, "13328": { "File": "_test/testdata/triceCheck.c", - "Line": 509 + "Line": 511 }, "13329": { "File": "_test/testdata/triceCheck.c", - "Line": 515 + "Line": 517 }, "13330": { "File": "_test/testdata/triceCheck.c", - "Line": 516 + "Line": 518 }, "13331": { "File": "_test/testdata/triceCheck.c", - "Line": 525 + "Line": 527 }, "13332": { "File": "_test/testdata/triceCheck.c", - "Line": 526 + "Line": 528 }, "13333": { "File": "_test/testdata/triceCheck.c", - "Line": 539 + "Line": 541 }, "13334": { "File": "_test/testdata/triceCheck.c", - "Line": 540 + "Line": 542 }, "13335": { "File": "_test/testdata/triceCheck.c", - "Line": 556 + "Line": 558 }, "13336": { "File": "_test/testdata/triceCheck.c", - "Line": 557 + "Line": 559 }, "13337": { "File": "_test/testdata/triceCheck.c", - "Line": 581 + "Line": 583 }, "13338": { "File": "_test/testdata/triceCheck.c", - "Line": 582 + "Line": 584 }, "13339": { "File": "_test/testdata/triceCheck.c", - "Line": 588 + "Line": 590 }, "13340": { "File": "_test/testdata/triceCheck.c", - "Line": 589 + "Line": 591 }, "13341": { "File": "_test/testdata/triceCheck.c", - "Line": 590 + "Line": 592 }, "13342": { "File": "_test/testdata/triceCheck.c", - "Line": 591 + "Line": 593 }, "13343": { "File": "_test/testdata/triceCheck.c", - "Line": 592 + "Line": 594 }, "13344": { "File": "_test/testdata/triceCheck.c", - "Line": 593 + "Line": 595 }, "13345": { "File": "_test/testdata/triceCheck.c", - "Line": 595 + "Line": 597 }, "13346": { "File": "_test/testdata/triceCheck.c", - "Line": 596 + "Line": 598 }, "13347": { "File": "_test/testdata/triceCheck.c", - "Line": 597 + "Line": 599 }, "13348": { "File": "_test/testdata/triceCheck.c", - "Line": 598 + "Line": 600 }, "13349": { "File": "_test/testdata/triceCheck.c", - "Line": 599 + "Line": 601 }, "13350": { "File": "_test/testdata/triceCheck.c", - "Line": 600 + "Line": 602 }, "13351": { "File": "_test/testdata/triceCheck.c", - "Line": 602 + "Line": 604 }, "13352": { "File": "_test/testdata/triceCheck.c", - "Line": 603 + "Line": 605 }, "13353": { "File": "_test/testdata/triceCheck.c", - "Line": 604 + "Line": 606 }, "13354": { "File": "_test/testdata/triceCheck.c", - "Line": 605 + "Line": 607 }, "13355": { "File": "_test/testdata/triceCheck.c", - "Line": 606 + "Line": 608 }, "13356": { "File": "_test/testdata/triceCheck.c", - "Line": 607 + "Line": 609 }, "13357": { "File": "_test/testdata/triceCheck.c", - "Line": 608 + "Line": 610 }, "13358": { "File": "_test/testdata/triceCheck.c", - "Line": 609 + "Line": 611 }, "13359": { "File": "_test/testdata/triceCheck.c", - "Line": 610 + "Line": 612 }, "13360": { "File": "_test/testdata/triceCheck.c", - "Line": 611 + "Line": 613 }, "13361": { "File": "_test/testdata/triceCheck.c", - "Line": 612 + "Line": 614 }, "13362": { "File": "_test/testdata/triceCheck.c", - "Line": 613 + "Line": 615 }, "13363": { "File": "_test/testdata/triceCheck.c", - "Line": 614 + "Line": 616 }, "13364": { "File": "_test/testdata/triceCheck.c", - "Line": 616 + "Line": 618 }, "13365": { "File": "_test/testdata/triceCheck.c", - "Line": 617 + "Line": 619 }, "13366": { "File": "_test/testdata/triceCheck.c", - "Line": 618 + "Line": 620 }, "13367": { "File": "_test/testdata/triceCheck.c", - "Line": 619 + "Line": 621 }, "13368": { "File": "_test/testdata/triceCheck.c", - "Line": 620 + "Line": 622 }, "13369": { "File": "_test/testdata/triceCheck.c", - "Line": 621 + "Line": 623 }, "13370": { "File": "_test/testdata/triceCheck.c", - "Line": 622 + "Line": 624 }, "13371": { "File": "_test/testdata/triceCheck.c", - "Line": 623 + "Line": 625 }, "13372": { "File": "_test/testdata/triceCheck.c", - "Line": 624 + "Line": 626 }, "13373": { "File": "_test/testdata/triceCheck.c", - "Line": 625 + "Line": 627 }, "13374": { "File": "_test/testdata/triceCheck.c", - "Line": 626 + "Line": 628 }, "13375": { "File": "_test/testdata/triceCheck.c", - "Line": 627 + "Line": 629 }, "13376": { "File": "_test/testdata/triceCheck.c", - "Line": 628 + "Line": 630 }, "13377": { "File": "_test/testdata/triceCheck.c", - "Line": 629 + "Line": 631 }, "13378": { "File": "_test/testdata/triceCheck.c", - "Line": 630 + "Line": 632 }, "13379": { "File": "_test/testdata/triceCheck.c", - "Line": 632 + "Line": 634 }, "13380": { "File": "_test/testdata/triceCheck.c", - "Line": 633 + "Line": 635 }, "13381": { "File": "_test/testdata/triceCheck.c", - "Line": 634 + "Line": 636 }, "13382": { "File": "_test/testdata/triceCheck.c", - "Line": 635 + "Line": 637 }, "13383": { "File": "_test/testdata/triceCheck.c", - "Line": 636 + "Line": 638 }, "13384": { "File": "_test/testdata/triceCheck.c", - "Line": 637 + "Line": 639 }, "13385": { "File": "_test/testdata/triceCheck.c", - "Line": 638 + "Line": 640 }, "13386": { "File": "_test/testdata/triceCheck.c", - "Line": 639 + "Line": 641 }, "13387": { "File": "_test/testdata/triceCheck.c", - "Line": 640 + "Line": 642 }, "13388": { "File": "_test/testdata/triceCheck.c", - "Line": 641 + "Line": 643 }, "13389": { "File": "_test/testdata/triceCheck.c", - "Line": 642 + "Line": 644 }, "13390": { "File": "_test/testdata/triceCheck.c", - "Line": 643 + "Line": 645 }, "13391": { "File": "_test/testdata/triceCheck.c", - "Line": 644 + "Line": 646 }, "13392": { "File": "_test/testdata/triceCheck.c", - "Line": 645 + "Line": 647 }, "13393": { "File": "_test/testdata/triceCheck.c", - "Line": 646 + "Line": 648 }, "13394": { "File": "_test/testdata/triceCheck.c", - "Line": 648 + "Line": 650 }, "13395": { "File": "_test/testdata/triceCheck.c", - "Line": 649 + "Line": 651 }, "13396": { "File": "_test/testdata/triceCheck.c", - "Line": 650 + "Line": 652 }, "13397": { "File": "_test/testdata/triceCheck.c", - "Line": 651 + "Line": 653 }, "13398": { "File": "_test/testdata/triceCheck.c", - "Line": 652 + "Line": 654 }, "13399": { "File": "_test/testdata/triceCheck.c", - "Line": 653 + "Line": 655 }, "13400": { "File": "_test/testdata/triceCheck.c", - "Line": 654 + "Line": 656 }, "13401": { "File": "_test/testdata/triceCheck.c", - "Line": 655 + "Line": 657 }, "13402": { "File": "_test/testdata/triceCheck.c", - "Line": 656 + "Line": 658 }, "13403": { "File": "_test/testdata/triceCheck.c", - "Line": 657 + "Line": 659 }, "13404": { "File": "_test/testdata/triceCheck.c", - "Line": 658 + "Line": 660 }, "13405": { "File": "_test/testdata/triceCheck.c", - "Line": 659 + "Line": 661 }, "13406": { "File": "_test/testdata/triceCheck.c", - "Line": 660 + "Line": 662 }, "13407": { "File": "_test/testdata/triceCheck.c", - "Line": 661 + "Line": 663 }, "13408": { "File": "_test/testdata/triceCheck.c", - "Line": 662 + "Line": 664 }, "13409": { "File": "_test/testdata/triceCheck.c", - "Line": 664 + "Line": 666 }, "13410": { "File": "_test/testdata/triceCheck.c", - "Line": 665 + "Line": 667 }, "13411": { "File": "_test/testdata/triceCheck.c", - "Line": 666 + "Line": 668 }, "13412": { "File": "_test/testdata/triceCheck.c", - "Line": 667 + "Line": 669 }, "13413": { "File": "_test/testdata/triceCheck.c", - "Line": 668 + "Line": 670 }, "13414": { "File": "_test/testdata/triceCheck.c", - "Line": 669 + "Line": 671 }, "13415": { "File": "_test/testdata/triceCheck.c", - "Line": 670 + "Line": 672 }, "13416": { "File": "_test/testdata/triceCheck.c", - "Line": 671 + "Line": 673 }, "13417": { "File": "_test/testdata/triceCheck.c", - "Line": 672 + "Line": 674 }, "13418": { "File": "_test/testdata/triceCheck.c", - "Line": 673 + "Line": 675 }, "13419": { "File": "_test/testdata/triceCheck.c", - "Line": 674 + "Line": 676 }, "13420": { "File": "_test/testdata/triceCheck.c", - "Line": 675 + "Line": 677 }, "13421": { "File": "_test/testdata/triceCheck.c", - "Line": 676 + "Line": 678 }, "13422": { "File": "_test/testdata/triceCheck.c", - "Line": 677 + "Line": 679 }, "13423": { "File": "_test/testdata/triceCheck.c", - "Line": 678 + "Line": 680 }, "13424": { "File": "_test/testdata/triceCheck.c", - "Line": 679 + "Line": 681 }, "13425": { "File": "_test/testdata/triceCheck.c", - "Line": 680 + "Line": 682 }, "13426": { "File": "_test/testdata/triceCheck.c", - "Line": 681 + "Line": 683 }, "13427": { "File": "_test/testdata/triceCheck.c", - "Line": 682 + "Line": 684 }, "13428": { "File": "_test/testdata/triceCheck.c", - "Line": 683 + "Line": 685 }, "13429": { "File": "_test/testdata/triceCheck.c", - "Line": 684 + "Line": 686 }, "13430": { "File": "_test/testdata/triceCheck.c", - "Line": 686 + "Line": 688 }, "13431": { "File": "_test/testdata/triceCheck.c", - "Line": 687 + "Line": 689 }, "13432": { "File": "_test/testdata/triceCheck.c", - "Line": 688 + "Line": 690 }, "13433": { "File": "_test/testdata/triceCheck.c", - "Line": 689 + "Line": 691 }, "13434": { "File": "_test/testdata/triceCheck.c", - "Line": 690 + "Line": 692 }, "13435": { "File": "_test/testdata/triceCheck.c", - "Line": 691 + "Line": 693 }, "13436": { "File": "_test/testdata/triceCheck.c", - "Line": 692 + "Line": 694 }, "13437": { "File": "_test/testdata/triceCheck.c", - "Line": 693 + "Line": 695 }, "13438": { "File": "_test/testdata/triceCheck.c", - "Line": 694 + "Line": 696 }, "13439": { "File": "_test/testdata/triceCheck.c", - "Line": 696 + "Line": 698 }, "13440": { "File": "_test/testdata/triceCheck.c", - "Line": 697 + "Line": 699 }, "13441": { "File": "_test/testdata/triceCheck.c", - "Line": 698 + "Line": 700 }, "13442": { "File": "_test/testdata/triceCheck.c", - "Line": 699 + "Line": 701 }, "13443": { "File": "_test/testdata/triceCheck.c", - "Line": 700 + "Line": 702 }, "13444": { "File": "_test/testdata/triceCheck.c", - "Line": 701 + "Line": 703 }, "13445": { "File": "_test/testdata/triceCheck.c", - "Line": 703 + "Line": 705 }, "13446": { "File": "_test/testdata/triceCheck.c", - "Line": 704 + "Line": 706 }, "13447": { "File": "_test/testdata/triceCheck.c", - "Line": 705 + "Line": 707 }, "13448": { "File": "_test/testdata/triceCheck.c", - "Line": 706 + "Line": 708 }, "13449": { "File": "_test/testdata/triceCheck.c", - "Line": 707 + "Line": 709 }, "13450": { "File": "_test/testdata/triceCheck.c", - "Line": 708 + "Line": 710 }, "13451": { "File": "_test/testdata/triceCheck.c", - "Line": 709 + "Line": 711 }, "13452": { "File": "_test/testdata/triceCheck.c", - "Line": 710 + "Line": 712 }, "13453": { "File": "_test/testdata/triceCheck.c", - "Line": 711 + "Line": 713 }, "13454": { "File": "_test/testdata/triceCheck.c", - "Line": 712 + "Line": 714 }, "13455": { "File": "_test/testdata/triceCheck.c", - "Line": 713 + "Line": 715 }, "13456": { "File": "_test/testdata/triceCheck.c", - "Line": 714 + "Line": 716 }, "13457": { "File": "_test/testdata/triceCheck.c", - "Line": 716 + "Line": 718 }, "13458": { "File": "_test/testdata/triceCheck.c", - "Line": 717 + "Line": 719 }, "13459": { "File": "_test/testdata/triceCheck.c", - "Line": 718 + "Line": 720 }, "13460": { "File": "_test/testdata/triceCheck.c", - "Line": 719 + "Line": 721 }, "13461": { "File": "_test/testdata/triceCheck.c", - "Line": 720 + "Line": 722 }, "13462": { "File": "_test/testdata/triceCheck.c", - "Line": 721 + "Line": 723 }, "13463": { "File": "_test/testdata/triceCheck.c", - "Line": 722 + "Line": 724 }, "13464": { "File": "_test/testdata/triceCheck.c", - "Line": 723 + "Line": 725 }, "13465": { "File": "_test/testdata/triceCheck.c", - "Line": 724 + "Line": 726 }, "13466": { "File": "_test/testdata/triceCheck.c", - "Line": 725 + "Line": 727 }, "13467": { "File": "_test/testdata/triceCheck.c", - "Line": 726 + "Line": 728 }, "13468": { "File": "_test/testdata/triceCheck.c", - "Line": 727 + "Line": 729 }, "13469": { "File": "_test/testdata/triceCheck.c", - "Line": 729 + "Line": 731 }, "13470": { "File": "_test/testdata/triceCheck.c", - "Line": 730 + "Line": 732 }, "13471": { "File": "_test/testdata/triceCheck.c", - "Line": 731 + "Line": 733 }, "13472": { "File": "_test/testdata/triceCheck.c", - "Line": 732 + "Line": 734 }, "13473": { "File": "_test/testdata/triceCheck.c", - "Line": 733 + "Line": 735 }, "13474": { "File": "_test/testdata/triceCheck.c", - "Line": 734 + "Line": 736 }, "13475": { "File": "_test/testdata/triceCheck.c", - "Line": 735 + "Line": 737 }, "13476": { "File": "_test/testdata/triceCheck.c", - "Line": 736 + "Line": 738 }, "13477": { "File": "_test/testdata/triceCheck.c", - "Line": 737 + "Line": 739 }, "13478": { "File": "_test/testdata/triceCheck.c", - "Line": 738 + "Line": 740 }, "13479": { "File": "_test/testdata/triceCheck.c", - "Line": 739 + "Line": 741 }, "13480": { "File": "_test/testdata/triceCheck.c", - "Line": 740 + "Line": 742 }, "13481": { "File": "_test/testdata/triceCheck.c", - "Line": 742 + "Line": 744 }, "13482": { "File": "_test/testdata/triceCheck.c", - "Line": 743 + "Line": 745 }, "13483": { "File": "_test/testdata/triceCheck.c", - "Line": 744 + "Line": 746 }, "13484": { "File": "_test/testdata/triceCheck.c", - "Line": 745 + "Line": 747 }, "13485": { "File": "_test/testdata/triceCheck.c", - "Line": 746 + "Line": 748 }, "13486": { "File": "_test/testdata/triceCheck.c", - "Line": 747 + "Line": 749 }, "13487": { "File": "_test/testdata/triceCheck.c", - "Line": 748 + "Line": 750 }, "13488": { "File": "_test/testdata/triceCheck.c", - "Line": 749 + "Line": 751 }, "13489": { "File": "_test/testdata/triceCheck.c", - "Line": 750 + "Line": 752 }, "13490": { "File": "_test/testdata/triceCheck.c", - "Line": 751 + "Line": 753 }, "13491": { "File": "_test/testdata/triceCheck.c", - "Line": 752 + "Line": 754 }, "13492": { "File": "_test/testdata/triceCheck.c", - "Line": 753 + "Line": 755 }, "13493": { "File": "_test/testdata/triceCheck.c", - "Line": 757 + "Line": 759 }, "13494": { "File": "_test/testdata/triceCheck.c", - "Line": 758 + "Line": 760 }, "13495": { "File": "_test/testdata/triceCheck.c", - "Line": 759 + "Line": 761 }, "13496": { "File": "_test/testdata/triceCheck.c", - "Line": 760 + "Line": 762 }, "13497": { "File": "_test/testdata/triceCheck.c", - "Line": 761 + "Line": 763 }, "13498": { "File": "_test/testdata/triceCheck.c", - "Line": 762 + "Line": 764 }, "13499": { "File": "_test/testdata/triceCheck.c", - "Line": 763 + "Line": 765 }, "13500": { "File": "_test/testdata/triceCheck.c", - "Line": 764 + "Line": 766 }, "13501": { "File": "_test/testdata/triceCheck.c", - "Line": 765 + "Line": 767 }, "13502": { "File": "_test/testdata/triceCheck.c", - "Line": 766 + "Line": 768 }, "13503": { "File": "_test/testdata/triceCheck.c", - "Line": 767 + "Line": 769 }, "13504": { "File": "_test/testdata/triceCheck.c", - "Line": 768 + "Line": 770 }, "13505": { "File": "_test/testdata/triceCheck.c", - "Line": 770 + "Line": 772 }, "13506": { "File": "_test/testdata/triceCheck.c", - "Line": 771 + "Line": 773 }, "13507": { "File": "_test/testdata/triceCheck.c", - "Line": 772 + "Line": 774 }, "13508": { "File": "_test/testdata/triceCheck.c", - "Line": 773 + "Line": 775 }, "13509": { "File": "_test/testdata/triceCheck.c", - "Line": 774 + "Line": 776 }, "13510": { "File": "_test/testdata/triceCheck.c", - "Line": 775 + "Line": 777 }, "13511": { "File": "_test/testdata/triceCheck.c", - "Line": 776 + "Line": 778 }, "13512": { "File": "_test/testdata/triceCheck.c", - "Line": 777 + "Line": 779 }, "13513": { "File": "_test/testdata/triceCheck.c", - "Line": 778 + "Line": 780 }, "13514": { "File": "_test/testdata/triceCheck.c", - "Line": 779 + "Line": 781 }, "13515": { "File": "_test/testdata/triceCheck.c", - "Line": 780 + "Line": 782 }, "13516": { "File": "_test/testdata/triceCheck.c", - "Line": 781 + "Line": 783 }, "13517": { "File": "_test/testdata/triceCheck.c", - "Line": 783 + "Line": 785 }, "13518": { "File": "_test/testdata/triceCheck.c", - "Line": 784 + "Line": 786 }, "13519": { "File": "_test/testdata/triceCheck.c", - "Line": 785 + "Line": 787 }, "13520": { "File": "_test/testdata/triceCheck.c", - "Line": 786 + "Line": 788 }, "13521": { "File": "_test/testdata/triceCheck.c", - "Line": 787 + "Line": 789 }, "13522": { "File": "_test/testdata/triceCheck.c", - "Line": 788 + "Line": 790 }, "13523": { "File": "_test/testdata/triceCheck.c", - "Line": 789 + "Line": 791 }, "13524": { "File": "_test/testdata/triceCheck.c", - "Line": 790 + "Line": 792 }, "13525": { "File": "_test/testdata/triceCheck.c", - "Line": 791 + "Line": 793 }, "13526": { "File": "_test/testdata/triceCheck.c", - "Line": 792 + "Line": 794 }, "13527": { "File": "_test/testdata/triceCheck.c", - "Line": 793 + "Line": 795 }, "13528": { "File": "_test/testdata/triceCheck.c", - "Line": 794 + "Line": 796 }, "13529": { "File": "_test/testdata/triceCheck.c", - "Line": 796 + "Line": 798 }, "13530": { "File": "_test/testdata/triceCheck.c", - "Line": 797 + "Line": 799 }, "13531": { "File": "_test/testdata/triceCheck.c", - "Line": 798 + "Line": 800 }, "13532": { "File": "_test/testdata/triceCheck.c", - "Line": 799 + "Line": 801 }, "13533": { "File": "_test/testdata/triceCheck.c", - "Line": 800 + "Line": 802 }, "13534": { "File": "_test/testdata/triceCheck.c", - "Line": 801 + "Line": 803 }, "13535": { "File": "_test/testdata/triceCheck.c", - "Line": 802 + "Line": 804 }, "13536": { "File": "_test/testdata/triceCheck.c", - "Line": 803 + "Line": 805 }, "13537": { "File": "_test/testdata/triceCheck.c", - "Line": 804 + "Line": 806 }, "13538": { "File": "_test/testdata/triceCheck.c", - "Line": 805 + "Line": 807 }, "13539": { "File": "_test/testdata/triceCheck.c", - "Line": 806 + "Line": 808 }, "13540": { "File": "_test/testdata/triceCheck.c", - "Line": 807 + "Line": 809 }, "13541": { "File": "_test/testdata/triceCheck.c", - "Line": 809 + "Line": 811 }, "13542": { "File": "_test/testdata/triceCheck.c", - "Line": 810 + "Line": 812 }, "13543": { "File": "_test/testdata/triceCheck.c", - "Line": 811 + "Line": 813 }, "13544": { "File": "_test/testdata/triceCheck.c", - "Line": 812 + "Line": 814 }, "13545": { "File": "_test/testdata/triceCheck.c", - "Line": 813 + "Line": 815 }, "13546": { "File": "_test/testdata/triceCheck.c", - "Line": 814 + "Line": 816 }, "13547": { "File": "_test/testdata/triceCheck.c", - "Line": 815 + "Line": 817 }, "13548": { "File": "_test/testdata/triceCheck.c", - "Line": 816 + "Line": 818 }, "13549": { "File": "_test/testdata/triceCheck.c", - "Line": 817 + "Line": 819 }, "13550": { "File": "_test/testdata/triceCheck.c", - "Line": 818 + "Line": 820 }, "13551": { "File": "_test/testdata/triceCheck.c", - "Line": 819 + "Line": 821 }, "13552": { "File": "_test/testdata/triceCheck.c", - "Line": 820 + "Line": 822 }, "13553": { "File": "_test/testdata/triceCheck.c", - "Line": 822 + "Line": 824 }, "13554": { "File": "_test/testdata/triceCheck.c", - "Line": 823 + "Line": 825 }, "13555": { "File": "_test/testdata/triceCheck.c", - "Line": 824 + "Line": 826 }, "13556": { "File": "_test/testdata/triceCheck.c", - "Line": 825 + "Line": 827 }, "13557": { "File": "_test/testdata/triceCheck.c", - "Line": 826 + "Line": 828 }, "13558": { "File": "_test/testdata/triceCheck.c", - "Line": 827 + "Line": 829 }, "13559": { "File": "_test/testdata/triceCheck.c", - "Line": 828 + "Line": 830 }, "13560": { "File": "_test/testdata/triceCheck.c", - "Line": 829 + "Line": 831 }, "13561": { "File": "_test/testdata/triceCheck.c", - "Line": 830 + "Line": 832 }, "13562": { "File": "_test/testdata/triceCheck.c", - "Line": 831 + "Line": 833 }, "13563": { "File": "_test/testdata/triceCheck.c", - "Line": 832 + "Line": 834 }, "13564": { "File": "_test/testdata/triceCheck.c", - "Line": 833 + "Line": 835 }, "13565": { "File": "_test/testdata/triceCheck.c", - "Line": 835 + "Line": 837 }, "13566": { "File": "_test/testdata/triceCheck.c", - "Line": 836 + "Line": 838 }, "13567": { "File": "_test/testdata/triceCheck.c", - "Line": 837 + "Line": 839 }, "13568": { "File": "_test/testdata/triceCheck.c", - "Line": 838 + "Line": 840 }, "13569": { "File": "_test/testdata/triceCheck.c", - "Line": 839 + "Line": 841 }, "13570": { "File": "_test/testdata/triceCheck.c", - "Line": 840 + "Line": 842 }, "13571": { "File": "_test/testdata/triceCheck.c", - "Line": 841 + "Line": 843 }, "13572": { "File": "_test/testdata/triceCheck.c", - "Line": 842 + "Line": 844 }, "13573": { "File": "_test/testdata/triceCheck.c", - "Line": 843 + "Line": 845 }, "13574": { "File": "_test/testdata/triceCheck.c", - "Line": 844 + "Line": 846 }, "13575": { "File": "_test/testdata/triceCheck.c", - "Line": 845 + "Line": 847 }, "13576": { "File": "_test/testdata/triceCheck.c", - "Line": 846 + "Line": 848 }, "13577": { "File": "_test/testdata/triceCheck.c", - "Line": 848 + "Line": 850 }, "13578": { "File": "_test/testdata/triceCheck.c", - "Line": 849 + "Line": 851 }, "13579": { "File": "_test/testdata/triceCheck.c", - "Line": 850 + "Line": 852 }, "13580": { "File": "_test/testdata/triceCheck.c", - "Line": 851 + "Line": 853 }, "13581": { "File": "_test/testdata/triceCheck.c", - "Line": 852 + "Line": 854 }, "13582": { "File": "_test/testdata/triceCheck.c", - "Line": 853 + "Line": 855 }, "13583": { "File": "_test/testdata/triceCheck.c", - "Line": 854 + "Line": 856 }, "13584": { "File": "_test/testdata/triceCheck.c", - "Line": 855 + "Line": 857 }, "13585": { "File": "_test/testdata/triceCheck.c", - "Line": 856 + "Line": 858 }, "13586": { "File": "_test/testdata/triceCheck.c", - "Line": 857 + "Line": 859 }, "13587": { "File": "_test/testdata/triceCheck.c", - "Line": 858 + "Line": 860 }, "13588": { "File": "_test/testdata/triceCheck.c", - "Line": 859 + "Line": 861 }, "13589": { "File": "_test/testdata/triceCheck.c", - "Line": 862 + "Line": 864 }, "13590": { "File": "_test/testdata/triceCheck.c", - "Line": 863 + "Line": 865 }, "13591": { "File": "_test/testdata/triceCheck.c", - "Line": 864 + "Line": 866 }, "13592": { "File": "_test/testdata/triceCheck.c", - "Line": 865 + "Line": 867 }, "13593": { "File": "_test/testdata/triceCheck.c", - "Line": 866 + "Line": 868 }, "13594": { "File": "_test/testdata/triceCheck.c", - "Line": 867 + "Line": 869 }, "13595": { "File": "_test/testdata/triceCheck.c", - "Line": 870 + "Line": 872 }, "13596": { "File": "_test/testdata/triceCheck.c", - "Line": 871 + "Line": 873 }, "13597": { "File": "_test/testdata/triceCheck.c", - "Line": 872 + "Line": 874 }, "13598": { "File": "_test/testdata/triceCheck.c", - "Line": 873 + "Line": 875 }, "13599": { "File": "_test/testdata/triceCheck.c", - "Line": 874 + "Line": 876 }, "13600": { "File": "_test/testdata/triceCheck.c", - "Line": 875 + "Line": 877 }, "13601": { "File": "_test/testdata/triceCheck.c", - "Line": 878 + "Line": 880 }, "13602": { "File": "_test/testdata/triceCheck.c", - "Line": 879 + "Line": 881 }, "13603": { "File": "_test/testdata/triceCheck.c", - "Line": 880 + "Line": 882 }, "13604": { "File": "_test/testdata/triceCheck.c", - "Line": 881 + "Line": 883 }, "13605": { "File": "_test/testdata/triceCheck.c", - "Line": 882 + "Line": 884 }, "13606": { "File": "_test/testdata/triceCheck.c", - "Line": 883 + "Line": 885 }, "13607": { "File": "_test/testdata/triceCheck.c", - "Line": 886 + "Line": 888 }, "13608": { "File": "_test/testdata/triceCheck.c", - "Line": 887 + "Line": 889 }, "13609": { "File": "_test/testdata/triceCheck.c", - "Line": 888 + "Line": 890 }, "13610": { "File": "_test/testdata/triceCheck.c", - "Line": 889 + "Line": 891 }, "13611": { "File": "_test/testdata/triceCheck.c", - "Line": 890 + "Line": 892 }, "13612": { "File": "_test/testdata/triceCheck.c", - "Line": 891 + "Line": 893 }, "13613": { "File": "_test/testdata/triceCheck.c", - "Line": 894 + "Line": 896 }, "13614": { "File": "_test/testdata/triceCheck.c", - "Line": 895 + "Line": 897 }, "13615": { "File": "_test/testdata/triceCheck.c", - "Line": 896 + "Line": 898 }, "13616": { "File": "_test/testdata/triceCheck.c", - "Line": 897 + "Line": 899 }, "13617": { "File": "_test/testdata/triceCheck.c", - "Line": 900 + "Line": 902 }, "13618": { "File": "_test/testdata/triceCheck.c", - "Line": 901 + "Line": 903 }, "13619": { "File": "_test/testdata/triceCheck.c", - "Line": 904 + "Line": 906 }, "13620": { "File": "_test/testdata/triceCheck.c", - "Line": 905 + "Line": 907 }, "13621": { "File": "_test/testdata/triceCheck.c", - "Line": 906 + "Line": 908 }, "13622": { "File": "_test/testdata/triceCheck.c", - "Line": 907 + "Line": 909 }, "13623": { "File": "_test/testdata/triceCheck.c", - "Line": 910 + "Line": 912 }, "13624": { "File": "_test/testdata/triceCheck.c", - "Line": 911 + "Line": 913 }, "13625": { "File": "_test/testdata/triceCheck.c", - "Line": 912 + "Line": 914 }, "13626": { "File": "_test/testdata/triceCheck.c", - "Line": 913 + "Line": 915 }, "13627": { "File": "_test/testdata/triceCheck.c", - "Line": 916 + "Line": 918 }, "13628": { "File": "_test/testdata/triceCheck.c", - "Line": 917 + "Line": 919 }, "13629": { "File": "_test/testdata/triceCheck.c", - "Line": 918 + "Line": 920 }, "13630": { "File": "_test/testdata/triceCheck.c", - "Line": 919 + "Line": 921 }, "13631": { "File": "_test/testdata/triceCheck.c", - "Line": 923 + "Line": 925 }, "13632": { "File": "_test/testdata/triceCheck.c", - "Line": 924 + "Line": 926 }, "13633": { "File": "_test/testdata/triceCheck.c", - "Line": 925 + "Line": 927 }, "13634": { "File": "_test/testdata/triceCheck.c", - "Line": 926 + "Line": 928 }, "13635": { "File": "_test/testdata/triceCheck.c", - "Line": 927 + "Line": 929 }, "13636": { "File": "_test/testdata/triceCheck.c", - "Line": 928 + "Line": 930 }, "13637": { "File": "_test/testdata/triceCheck.c", - "Line": 929 + "Line": 931 }, "13638": { "File": "_test/testdata/triceCheck.c", - "Line": 930 + "Line": 932 }, "13639": { "File": "_test/testdata/triceCheck.c", - "Line": 931 + "Line": 933 }, "13640": { "File": "_test/testdata/triceCheck.c", - "Line": 932 + "Line": 934 }, "13641": { "File": "_test/testdata/triceCheck.c", - "Line": 933 + "Line": 935 }, "13642": { "File": "_test/testdata/triceCheck.c", - "Line": 934 + "Line": 936 }, "13643": { "File": "_test/testdata/triceCheck.c", - "Line": 935 + "Line": 937 }, "13644": { "File": "_test/testdata/triceCheck.c", - "Line": 936 + "Line": 938 }, "13645": { "File": "_test/testdata/triceCheck.c", - "Line": 937 + "Line": 939 }, "13646": { "File": "_test/testdata/triceCheck.c", - "Line": 938 + "Line": 940 }, "13647": { "File": "_test/testdata/triceCheck.c", - "Line": 939 + "Line": 941 }, "13648": { "File": "_test/testdata/triceCheck.c", - "Line": 940 + "Line": 942 }, "13649": { "File": "_test/testdata/triceCheck.c", - "Line": 941 + "Line": 943 }, "13650": { "File": "_test/testdata/triceCheck.c", - "Line": 942 + "Line": 944 }, "13651": { "File": "_test/testdata/triceCheck.c", - "Line": 943 + "Line": 945 }, "13652": { "File": "_test/testdata/triceCheck.c", - "Line": 944 + "Line": 946 }, "13653": { "File": "_test/testdata/triceCheck.c", - "Line": 945 + "Line": 947 }, "13654": { "File": "_test/testdata/triceCheck.c", - "Line": 946 + "Line": 948 }, "13655": { "File": "_test/testdata/triceCheck.c", - "Line": 947 + "Line": 949 }, "13656": { "File": "_test/testdata/triceCheck.c", - "Line": 948 + "Line": 950 }, "13657": { "File": "_test/testdata/triceCheck.c", - "Line": 949 + "Line": 951 }, "13658": { "File": "_test/testdata/triceCheck.c", - "Line": 950 + "Line": 952 }, "13659": { "File": "_test/testdata/triceCheck.c", - "Line": 951 + "Line": 953 }, "13660": { "File": "_test/testdata/triceCheck.c", - "Line": 952 + "Line": 954 }, "13661": { "File": "_test/testdata/triceCheck.c", - "Line": 953 + "Line": 955 }, "13662": { "File": "_test/testdata/triceCheck.c", - "Line": 954 + "Line": 956 }, "13663": { "File": "_test/testdata/triceCheck.c", - "Line": 955 + "Line": 957 }, "13664": { "File": "_test/testdata/triceCheck.c", - "Line": 956 + "Line": 958 }, "13665": { "File": "_test/testdata/triceCheck.c", - "Line": 957 + "Line": 959 }, "13666": { "File": "_test/testdata/triceCheck.c", - "Line": 958 + "Line": 960 }, "13667": { "File": "_test/testdata/triceCheck.c", - "Line": 959 + "Line": 961 }, "13668": { "File": "_test/testdata/triceCheck.c", - "Line": 960 + "Line": 962 }, "13669": { "File": "_test/testdata/triceCheck.c", - "Line": 961 + "Line": 963 }, "13670": { "File": "_test/testdata/triceCheck.c", - "Line": 962 + "Line": 964 }, "13671": { "File": "_test/testdata/triceCheck.c", - "Line": 963 + "Line": 965 }, "13672": { "File": "_test/testdata/triceCheck.c", - "Line": 964 + "Line": 966 }, "13673": { "File": "_test/testdata/triceCheck.c", - "Line": 965 + "Line": 967 }, "13674": { "File": "_test/testdata/triceCheck.c", - "Line": 966 + "Line": 968 }, "13675": { "File": "_test/testdata/triceCheck.c", - "Line": 967 + "Line": 969 }, "13676": { "File": "_test/testdata/triceCheck.c", - "Line": 968 + "Line": 970 }, "13677": { "File": "_test/testdata/triceCheck.c", - "Line": 969 + "Line": 971 }, "13678": { "File": "_test/testdata/triceCheck.c", - "Line": 970 + "Line": 972 }, "13679": { "File": "_test/testdata/triceCheck.c", - "Line": 971 + "Line": 973 }, "13680": { "File": "_test/testdata/triceCheck.c", - "Line": 972 + "Line": 974 }, "13681": { "File": "_test/testdata/triceCheck.c", - "Line": 974 + "Line": 976 }, "13682": { "File": "_test/testdata/triceCheck.c", - "Line": 975 + "Line": 977 }, "13683": { "File": "_test/testdata/triceCheck.c", - "Line": 976 + "Line": 978 }, "13684": { "File": "_test/testdata/triceCheck.c", - "Line": 977 + "Line": 979 }, "13685": { "File": "_test/testdata/triceCheck.c", - "Line": 978 + "Line": 980 }, "13686": { "File": "_test/testdata/triceCheck.c", - "Line": 979 + "Line": 981 }, "13687": { "File": "_test/testdata/triceCheck.c", - "Line": 980 + "Line": 982 }, "13688": { "File": "_test/testdata/triceCheck.c", - "Line": 981 + "Line": 983 }, "13689": { "File": "_test/testdata/triceCheck.c", - "Line": 982 + "Line": 984 }, "13690": { "File": "_test/testdata/triceCheck.c", - "Line": 983 + "Line": 985 }, "13691": { "File": "_test/testdata/triceCheck.c", - "Line": 984 + "Line": 986 }, "13692": { "File": "_test/testdata/triceCheck.c", - "Line": 985 + "Line": 987 }, "13693": { "File": "_test/testdata/triceCheck.c", - "Line": 986 + "Line": 988 }, "13694": { "File": "_test/testdata/triceCheck.c", - "Line": 987 + "Line": 989 }, "13695": { "File": "_test/testdata/triceCheck.c", - "Line": 988 + "Line": 990 }, "13696": { "File": "_test/testdata/triceCheck.c", - "Line": 989 + "Line": 991 }, "13697": { "File": "_test/testdata/triceCheck.c", - "Line": 990 + "Line": 992 }, "13698": { "File": "_test/testdata/triceCheck.c", - "Line": 991 + "Line": 993 }, "13699": { "File": "_test/testdata/triceCheck.c", - "Line": 992 + "Line": 994 }, "13700": { "File": "_test/testdata/triceCheck.c", - "Line": 993 + "Line": 995 }, "13701": { "File": "_test/testdata/triceCheck.c", - "Line": 994 + "Line": 996 }, "13702": { "File": "_test/testdata/triceCheck.c", - "Line": 995 + "Line": 997 }, "13703": { "File": "_test/testdata/triceCheck.c", - "Line": 996 + "Line": 998 }, "13704": { "File": "_test/testdata/triceCheck.c", - "Line": 997 + "Line": 999 }, "13705": { "File": "_test/testdata/triceCheck.c", - "Line": 998 + "Line": 1000 }, "13706": { "File": "_test/testdata/triceCheck.c", - "Line": 999 + "Line": 1001 }, "13707": { "File": "_test/testdata/triceCheck.c", - "Line": 1000 + "Line": 1002 }, "13708": { "File": "_test/testdata/triceCheck.c", - "Line": 1001 + "Line": 1003 }, "13709": { "File": "_test/testdata/triceCheck.c", - "Line": 1002 + "Line": 1004 }, "13710": { "File": "_test/testdata/triceCheck.c", - "Line": 1003 + "Line": 1005 }, "13711": { "File": "_test/testdata/triceCheck.c", - "Line": 1004 + "Line": 1006 }, "13712": { "File": "_test/testdata/triceCheck.c", - "Line": 1005 + "Line": 1007 }, "13713": { "File": "_test/testdata/triceCheck.c", - "Line": 1006 + "Line": 1008 }, "13714": { "File": "_test/testdata/triceCheck.c", - "Line": 1007 + "Line": 1009 }, "13715": { "File": "_test/testdata/triceCheck.c", - "Line": 1008 + "Line": 1010 }, "13716": { "File": "_test/testdata/triceCheck.c", - "Line": 1009 + "Line": 1011 }, "13717": { "File": "_test/testdata/triceCheck.c", - "Line": 1010 + "Line": 1012 }, "13718": { "File": "_test/testdata/triceCheck.c", - "Line": 1011 + "Line": 1013 }, "13719": { "File": "_test/testdata/triceCheck.c", - "Line": 1012 + "Line": 1014 }, "13720": { "File": "_test/testdata/triceCheck.c", - "Line": 1013 + "Line": 1015 }, "13721": { "File": "_test/testdata/triceCheck.c", - "Line": 1014 + "Line": 1016 }, "13722": { "File": "_test/testdata/triceCheck.c", - "Line": 1015 + "Line": 1017 }, "13723": { "File": "_test/testdata/triceCheck.c", - "Line": 1016 + "Line": 1018 }, "13724": { "File": "_test/testdata/triceCheck.c", - "Line": 1017 + "Line": 1019 }, "13725": { "File": "_test/testdata/triceCheck.c", - "Line": 1018 + "Line": 1020 }, "13726": { "File": "_test/testdata/triceCheck.c", - "Line": 1019 + "Line": 1021 }, "13727": { "File": "_test/testdata/triceCheck.c", - "Line": 1020 + "Line": 1022 }, "13728": { "File": "_test/testdata/triceCheck.c", - "Line": 1021 + "Line": 1023 }, "13729": { "File": "_test/testdata/triceCheck.c", - "Line": 1022 + "Line": 1024 }, "13730": { "File": "_test/testdata/triceCheck.c", - "Line": 1023 + "Line": 1025 }, "13731": { "File": "_test/testdata/triceCheck.c", - "Line": 1025 + "Line": 1027 }, "13732": { "File": "_test/testdata/triceCheck.c", - "Line": 1026 + "Line": 1028 }, "13733": { "File": "_test/testdata/triceCheck.c", - "Line": 1027 + "Line": 1029 }, "13734": { "File": "_test/testdata/triceCheck.c", - "Line": 1028 + "Line": 1030 }, "13735": { "File": "_test/testdata/triceCheck.c", - "Line": 1029 + "Line": 1031 }, "13736": { "File": "_test/testdata/triceCheck.c", - "Line": 1030 + "Line": 1032 }, "13737": { "File": "_test/testdata/triceCheck.c", - "Line": 1031 + "Line": 1033 }, "13738": { "File": "_test/testdata/triceCheck.c", - "Line": 1032 + "Line": 1034 }, "13739": { "File": "_test/testdata/triceCheck.c", - "Line": 1033 + "Line": 1035 }, "13740": { "File": "_test/testdata/triceCheck.c", - "Line": 1034 + "Line": 1036 }, "13741": { "File": "_test/testdata/triceCheck.c", - "Line": 1035 + "Line": 1037 }, "13742": { "File": "_test/testdata/triceCheck.c", - "Line": 1036 + "Line": 1038 }, "13743": { "File": "_test/testdata/triceCheck.c", - "Line": 1037 + "Line": 1039 }, "13744": { "File": "_test/testdata/triceCheck.c", - "Line": 1038 + "Line": 1040 }, "13745": { "File": "_test/testdata/triceCheck.c", - "Line": 1039 + "Line": 1041 }, "13746": { "File": "_test/testdata/triceCheck.c", - "Line": 1040 + "Line": 1042 }, "13747": { "File": "_test/testdata/triceCheck.c", - "Line": 1041 + "Line": 1043 }, "13748": { "File": "_test/testdata/triceCheck.c", - "Line": 1042 + "Line": 1044 }, "13749": { "File": "_test/testdata/triceCheck.c", - "Line": 1043 + "Line": 1045 }, "13750": { "File": "_test/testdata/triceCheck.c", - "Line": 1044 + "Line": 1046 }, "13751": { "File": "_test/testdata/triceCheck.c", - "Line": 1045 + "Line": 1047 }, "13752": { "File": "_test/testdata/triceCheck.c", - "Line": 1046 + "Line": 1048 }, "13753": { "File": "_test/testdata/triceCheck.c", - "Line": 1047 + "Line": 1049 }, "13754": { "File": "_test/testdata/triceCheck.c", - "Line": 1048 + "Line": 1050 }, "13755": { "File": "_test/testdata/triceCheck.c", - "Line": 1049 + "Line": 1051 }, "13756": { "File": "_test/testdata/triceCheck.c", - "Line": 1050 + "Line": 1052 }, "13757": { "File": "_test/testdata/triceCheck.c", - "Line": 1051 + "Line": 1053 }, "13758": { "File": "_test/testdata/triceCheck.c", - "Line": 1052 + "Line": 1054 }, "13759": { "File": "_test/testdata/triceCheck.c", - "Line": 1053 + "Line": 1055 }, "13760": { "File": "_test/testdata/triceCheck.c", - "Line": 1054 + "Line": 1056 }, "13761": { "File": "_test/testdata/triceCheck.c", - "Line": 1055 + "Line": 1057 }, "13762": { "File": "_test/testdata/triceCheck.c", - "Line": 1056 + "Line": 1058 }, "13763": { "File": "_test/testdata/triceCheck.c", - "Line": 1057 + "Line": 1059 }, "13764": { "File": "_test/testdata/triceCheck.c", - "Line": 1058 + "Line": 1060 }, "13765": { "File": "_test/testdata/triceCheck.c", - "Line": 1059 + "Line": 1061 }, "13766": { "File": "_test/testdata/triceCheck.c", - "Line": 1060 + "Line": 1062 }, "13767": { "File": "_test/testdata/triceCheck.c", - "Line": 1061 + "Line": 1063 }, "13768": { "File": "_test/testdata/triceCheck.c", - "Line": 1062 + "Line": 1064 }, "13769": { "File": "_test/testdata/triceCheck.c", - "Line": 1063 + "Line": 1065 }, "13770": { "File": "_test/testdata/triceCheck.c", - "Line": 1064 + "Line": 1066 }, "13771": { "File": "_test/testdata/triceCheck.c", - "Line": 1065 + "Line": 1067 }, "13772": { "File": "_test/testdata/triceCheck.c", - "Line": 1066 + "Line": 1068 }, "13773": { "File": "_test/testdata/triceCheck.c", - "Line": 1067 + "Line": 1069 }, "13774": { "File": "_test/testdata/triceCheck.c", - "Line": 1068 + "Line": 1070 }, "13775": { "File": "_test/testdata/triceCheck.c", - "Line": 1069 + "Line": 1071 }, "13776": { "File": "_test/testdata/triceCheck.c", - "Line": 1070 + "Line": 1072 }, "13777": { "File": "_test/testdata/triceCheck.c", - "Line": 1071 + "Line": 1073 }, "13778": { "File": "_test/testdata/triceCheck.c", - "Line": 1072 + "Line": 1074 }, "13779": { "File": "_test/testdata/triceCheck.c", - "Line": 1073 + "Line": 1075 }, "13780": { "File": "_test/testdata/triceCheck.c", - "Line": 1074 + "Line": 1076 }, "13781": { "File": "_test/testdata/triceCheck.c", - "Line": 1076 + "Line": 1078 }, "13782": { "File": "_test/testdata/triceCheck.c", - "Line": 1077 + "Line": 1079 }, "13783": { "File": "_test/testdata/triceCheck.c", - "Line": 1078 + "Line": 1080 }, "13784": { "File": "_test/testdata/triceCheck.c", - "Line": 1079 + "Line": 1081 }, "13785": { "File": "_test/testdata/triceCheck.c", - "Line": 1080 + "Line": 1082 }, "13786": { "File": "_test/testdata/triceCheck.c", - "Line": 1081 + "Line": 1083 }, "13787": { "File": "_test/testdata/triceCheck.c", - "Line": 1082 + "Line": 1084 }, "13788": { "File": "_test/testdata/triceCheck.c", - "Line": 1083 + "Line": 1085 }, "13789": { "File": "_test/testdata/triceCheck.c", - "Line": 1084 + "Line": 1086 }, "13790": { "File": "_test/testdata/triceCheck.c", - "Line": 1085 + "Line": 1087 }, "13791": { "File": "_test/testdata/triceCheck.c", - "Line": 1086 + "Line": 1088 }, "13792": { "File": "_test/testdata/triceCheck.c", - "Line": 1087 + "Line": 1089 }, "13793": { "File": "_test/testdata/triceCheck.c", - "Line": 1088 + "Line": 1090 }, "13794": { "File": "_test/testdata/triceCheck.c", - "Line": 1089 + "Line": 1091 }, "13795": { "File": "_test/testdata/triceCheck.c", - "Line": 1090 + "Line": 1092 }, "13796": { "File": "_test/testdata/triceCheck.c", - "Line": 1091 + "Line": 1093 }, "13797": { "File": "_test/testdata/triceCheck.c", - "Line": 1092 + "Line": 1094 }, "13798": { "File": "_test/testdata/triceCheck.c", - "Line": 1093 + "Line": 1095 }, "13799": { "File": "_test/testdata/triceCheck.c", - "Line": 1094 + "Line": 1096 }, "13800": { "File": "_test/testdata/triceCheck.c", - "Line": 1095 + "Line": 1097 }, "13801": { "File": "_test/testdata/triceCheck.c", - "Line": 1096 + "Line": 1098 }, "13802": { "File": "_test/testdata/triceCheck.c", - "Line": 1097 + "Line": 1099 }, "13803": { "File": "_test/testdata/triceCheck.c", - "Line": 1098 + "Line": 1100 }, "13804": { "File": "_test/testdata/triceCheck.c", - "Line": 1099 + "Line": 1101 }, "13805": { "File": "_test/testdata/triceCheck.c", - "Line": 1100 + "Line": 1102 }, "13806": { "File": "_test/testdata/triceCheck.c", - "Line": 1101 + "Line": 1103 }, "13807": { "File": "_test/testdata/triceCheck.c", - "Line": 1102 + "Line": 1104 }, "13808": { "File": "_test/testdata/triceCheck.c", - "Line": 1103 + "Line": 1105 }, "13809": { "File": "_test/testdata/triceCheck.c", - "Line": 1104 + "Line": 1106 }, "13810": { "File": "_test/testdata/triceCheck.c", - "Line": 1105 + "Line": 1107 }, "13811": { "File": "_test/testdata/triceCheck.c", - "Line": 1106 + "Line": 1108 }, "13812": { "File": "_test/testdata/triceCheck.c", - "Line": 1107 + "Line": 1109 }, "13813": { "File": "_test/testdata/triceCheck.c", - "Line": 1108 + "Line": 1110 }, "13814": { "File": "_test/testdata/triceCheck.c", - "Line": 1109 + "Line": 1111 }, "13815": { "File": "_test/testdata/triceCheck.c", - "Line": 1110 + "Line": 1112 }, "13816": { "File": "_test/testdata/triceCheck.c", - "Line": 1111 + "Line": 1113 }, "13817": { "File": "_test/testdata/triceCheck.c", - "Line": 1112 + "Line": 1114 }, "13818": { "File": "_test/testdata/triceCheck.c", - "Line": 1113 + "Line": 1115 }, "13819": { "File": "_test/testdata/triceCheck.c", - "Line": 1114 + "Line": 1116 }, "13820": { "File": "_test/testdata/triceCheck.c", - "Line": 1115 + "Line": 1117 }, "13821": { "File": "_test/testdata/triceCheck.c", - "Line": 1116 + "Line": 1118 }, "13822": { "File": "_test/testdata/triceCheck.c", - "Line": 1117 + "Line": 1119 }, "13823": { "File": "_test/testdata/triceCheck.c", - "Line": 1118 + "Line": 1120 }, "13824": { "File": "_test/testdata/triceCheck.c", - "Line": 1119 + "Line": 1121 }, "13825": { "File": "_test/testdata/triceCheck.c", - "Line": 1120 + "Line": 1122 }, "13826": { "File": "_test/testdata/triceCheck.c", - "Line": 1121 + "Line": 1123 }, "13827": { "File": "_test/testdata/triceCheck.c", - "Line": 1122 + "Line": 1124 }, "13828": { "File": "_test/testdata/triceCheck.c", - "Line": 1123 + "Line": 1125 }, "13829": { "File": "_test/testdata/triceCheck.c", - "Line": 1124 + "Line": 1126 }, "13830": { "File": "_test/testdata/triceCheck.c", - "Line": 1125 + "Line": 1127 }, "13831": { "File": "_test/testdata/triceCheck.c", - "Line": 1127 + "Line": 1129 }, "13832": { "File": "_test/testdata/triceCheck.c", - "Line": 1128 + "Line": 1130 }, "13833": { "File": "_test/testdata/triceCheck.c", - "Line": 1129 + "Line": 1131 }, "13834": { "File": "_test/testdata/triceCheck.c", - "Line": 1130 + "Line": 1132 }, "13835": { "File": "_test/testdata/triceCheck.c", - "Line": 1131 + "Line": 1133 }, "13836": { "File": "_test/testdata/triceCheck.c", - "Line": 1132 + "Line": 1134 }, "13837": { "File": "_test/testdata/triceCheck.c", - "Line": 1133 + "Line": 1135 }, "13838": { "File": "_test/testdata/triceCheck.c", - "Line": 1134 + "Line": 1136 }, "13839": { "File": "_test/testdata/triceCheck.c", - "Line": 1135 + "Line": 1137 }, "13840": { "File": "_test/testdata/triceCheck.c", - "Line": 1136 + "Line": 1138 }, "13841": { "File": "_test/testdata/triceCheck.c", - "Line": 1137 + "Line": 1139 }, "13842": { "File": "_test/testdata/triceCheck.c", - "Line": 1138 + "Line": 1140 }, "13843": { "File": "_test/testdata/triceCheck.c", - "Line": 1139 + "Line": 1141 }, "13844": { "File": "_test/testdata/triceCheck.c", - "Line": 1140 + "Line": 1142 }, "13845": { "File": "_test/testdata/triceCheck.c", - "Line": 1141 + "Line": 1143 }, "13846": { "File": "_test/testdata/triceCheck.c", - "Line": 1142 + "Line": 1144 }, "13847": { "File": "_test/testdata/triceCheck.c", - "Line": 1143 + "Line": 1145 }, "13848": { "File": "_test/testdata/triceCheck.c", - "Line": 1144 + "Line": 1146 }, "13849": { "File": "_test/testdata/triceCheck.c", - "Line": 1145 + "Line": 1147 }, "13850": { "File": "_test/testdata/triceCheck.c", - "Line": 1146 + "Line": 1148 }, "13851": { "File": "_test/testdata/triceCheck.c", - "Line": 1147 + "Line": 1149 }, "13852": { "File": "_test/testdata/triceCheck.c", - "Line": 1148 + "Line": 1150 }, "13853": { "File": "_test/testdata/triceCheck.c", - "Line": 1149 + "Line": 1151 }, "13854": { "File": "_test/testdata/triceCheck.c", - "Line": 1150 + "Line": 1152 }, "13855": { "File": "_test/testdata/triceCheck.c", - "Line": 1151 + "Line": 1153 }, "13856": { "File": "_test/testdata/triceCheck.c", - "Line": 1152 + "Line": 1154 }, "13857": { "File": "_test/testdata/triceCheck.c", - "Line": 1153 + "Line": 1155 }, "13858": { "File": "_test/testdata/triceCheck.c", - "Line": 1154 + "Line": 1156 }, "13859": { "File": "_test/testdata/triceCheck.c", - "Line": 1155 + "Line": 1157 }, "13860": { "File": "_test/testdata/triceCheck.c", - "Line": 1156 + "Line": 1158 }, "13861": { "File": "_test/testdata/triceCheck.c", - "Line": 1157 + "Line": 1159 }, "13862": { "File": "_test/testdata/triceCheck.c", - "Line": 1158 + "Line": 1160 }, "13863": { "File": "_test/testdata/triceCheck.c", - "Line": 1159 + "Line": 1161 }, "13864": { "File": "_test/testdata/triceCheck.c", - "Line": 1160 + "Line": 1162 }, "13865": { "File": "_test/testdata/triceCheck.c", - "Line": 1161 + "Line": 1163 }, "13866": { "File": "_test/testdata/triceCheck.c", - "Line": 1162 + "Line": 1164 }, "13867": { "File": "_test/testdata/triceCheck.c", - "Line": 1163 + "Line": 1165 }, "13868": { "File": "_test/testdata/triceCheck.c", - "Line": 1164 + "Line": 1166 }, "13869": { "File": "_test/testdata/triceCheck.c", - "Line": 1165 + "Line": 1167 }, "13870": { "File": "_test/testdata/triceCheck.c", - "Line": 1166 + "Line": 1168 }, "13871": { "File": "_test/testdata/triceCheck.c", - "Line": 1167 + "Line": 1169 }, "13872": { "File": "_test/testdata/triceCheck.c", - "Line": 1168 + "Line": 1170 }, "13873": { "File": "_test/testdata/triceCheck.c", - "Line": 1169 + "Line": 1171 }, "13874": { "File": "_test/testdata/triceCheck.c", - "Line": 1170 + "Line": 1172 }, "13875": { "File": "_test/testdata/triceCheck.c", - "Line": 1171 + "Line": 1173 }, "13876": { "File": "_test/testdata/triceCheck.c", - "Line": 1172 + "Line": 1174 }, "13877": { "File": "_test/testdata/triceCheck.c", - "Line": 1173 + "Line": 1175 }, "13878": { "File": "_test/testdata/triceCheck.c", - "Line": 1174 + "Line": 1176 }, "13879": { "File": "_test/testdata/triceCheck.c", - "Line": 1175 + "Line": 1177 }, "13880": { "File": "_test/testdata/triceCheck.c", - "Line": 1176 + "Line": 1178 }, "13881": { "File": "_test/testdata/triceCheck.c", - "Line": 1178 + "Line": 1180 }, "13882": { "File": "_test/testdata/triceCheck.c", - "Line": 1179 + "Line": 1181 }, "13883": { "File": "_test/testdata/triceCheck.c", - "Line": 1180 + "Line": 1182 }, "13884": { "File": "_test/testdata/triceCheck.c", - "Line": 1181 + "Line": 1183 }, "13885": { "File": "_test/testdata/triceCheck.c", - "Line": 1182 + "Line": 1184 }, "13886": { "File": "_test/testdata/triceCheck.c", - "Line": 1183 + "Line": 1185 }, "13887": { "File": "_test/testdata/triceCheck.c", - "Line": 1184 + "Line": 1186 }, "13888": { "File": "_test/testdata/triceCheck.c", - "Line": 1185 + "Line": 1187 }, "13889": { "File": "_test/testdata/triceCheck.c", - "Line": 1186 + "Line": 1188 }, "13890": { "File": "_test/testdata/triceCheck.c", - "Line": 1187 + "Line": 1189 }, "13891": { "File": "_test/testdata/triceCheck.c", - "Line": 1188 + "Line": 1190 }, "13892": { "File": "_test/testdata/triceCheck.c", - "Line": 1189 + "Line": 1191 }, "13893": { "File": "_test/testdata/triceCheck.c", - "Line": 1190 + "Line": 1192 }, "13894": { "File": "_test/testdata/triceCheck.c", - "Line": 1191 + "Line": 1193 }, "13895": { "File": "_test/testdata/triceCheck.c", - "Line": 1192 + "Line": 1194 }, "13896": { "File": "_test/testdata/triceCheck.c", - "Line": 1193 + "Line": 1195 }, "13897": { "File": "_test/testdata/triceCheck.c", - "Line": 1194 + "Line": 1196 }, "13898": { "File": "_test/testdata/triceCheck.c", - "Line": 1195 + "Line": 1197 }, "13899": { "File": "_test/testdata/triceCheck.c", - "Line": 1196 + "Line": 1198 }, "13900": { "File": "_test/testdata/triceCheck.c", - "Line": 1197 + "Line": 1199 }, "13901": { "File": "_test/testdata/triceCheck.c", - "Line": 1198 + "Line": 1200 }, "13902": { "File": "_test/testdata/triceCheck.c", - "Line": 1199 + "Line": 1201 }, "13903": { "File": "_test/testdata/triceCheck.c", - "Line": 1200 + "Line": 1202 }, "13904": { "File": "_test/testdata/triceCheck.c", - "Line": 1201 + "Line": 1203 }, "13905": { "File": "_test/testdata/triceCheck.c", - "Line": 1202 + "Line": 1204 }, "13906": { "File": "_test/testdata/triceCheck.c", - "Line": 1203 + "Line": 1205 }, "13907": { "File": "_test/testdata/triceCheck.c", - "Line": 1204 + "Line": 1206 }, "13908": { "File": "_test/testdata/triceCheck.c", - "Line": 1205 + "Line": 1207 }, "13909": { "File": "_test/testdata/triceCheck.c", - "Line": 1206 + "Line": 1208 }, "13910": { "File": "_test/testdata/triceCheck.c", - "Line": 1207 + "Line": 1209 }, "13911": { "File": "_test/testdata/triceCheck.c", - "Line": 1208 + "Line": 1210 }, "13912": { "File": "_test/testdata/triceCheck.c", - "Line": 1209 + "Line": 1211 }, "13913": { "File": "_test/testdata/triceCheck.c", - "Line": 1210 + "Line": 1212 }, "13914": { "File": "_test/testdata/triceCheck.c", - "Line": 1211 + "Line": 1213 }, "13915": { "File": "_test/testdata/triceCheck.c", - "Line": 1212 + "Line": 1214 }, "13916": { "File": "_test/testdata/triceCheck.c", - "Line": 1213 + "Line": 1215 }, "13917": { "File": "_test/testdata/triceCheck.c", - "Line": 1214 + "Line": 1216 }, "13918": { "File": "_test/testdata/triceCheck.c", - "Line": 1215 + "Line": 1217 }, "13919": { "File": "_test/testdata/triceCheck.c", - "Line": 1216 + "Line": 1218 }, "13920": { "File": "_test/testdata/triceCheck.c", - "Line": 1217 + "Line": 1219 }, "13921": { "File": "_test/testdata/triceCheck.c", - "Line": 1218 + "Line": 1220 }, "13922": { "File": "_test/testdata/triceCheck.c", - "Line": 1219 + "Line": 1221 }, "13923": { "File": "_test/testdata/triceCheck.c", - "Line": 1220 + "Line": 1222 }, "13924": { "File": "_test/testdata/triceCheck.c", - "Line": 1221 + "Line": 1223 }, "13925": { "File": "_test/testdata/triceCheck.c", - "Line": 1222 + "Line": 1224 }, "13926": { "File": "_test/testdata/triceCheck.c", - "Line": 1223 + "Line": 1225 }, "13927": { "File": "_test/testdata/triceCheck.c", - "Line": 1224 + "Line": 1226 }, "13928": { "File": "_test/testdata/triceCheck.c", - "Line": 1225 + "Line": 1227 }, "13929": { "File": "_test/testdata/triceCheck.c", - "Line": 1226 + "Line": 1228 }, "13930": { "File": "_test/testdata/triceCheck.c", - "Line": 1227 + "Line": 1229 }, "13931": { "File": "_test/testdata/triceCheck.c", - "Line": 1231 + "Line": 1233 }, "13932": { "File": "_test/testdata/triceCheck.c", - "Line": 1233 + "Line": 1235 }, "13933": { "File": "_test/testdata/triceCheck.c", - "Line": 1234 + "Line": 1236 }, "13934": { "File": "_test/testdata/triceCheck.c", - "Line": 1235 + "Line": 1237 }, "13935": { "File": "_test/testdata/triceCheck.c", - "Line": 1236 + "Line": 1238 }, "13936": { "File": "_test/testdata/triceCheck.c", - "Line": 1237 + "Line": 1239 }, "13937": { "File": "_test/testdata/triceCheck.c", - "Line": 1238 + "Line": 1240 }, "13938": { "File": "_test/testdata/triceCheck.c", - "Line": 1239 + "Line": 1241 }, "13939": { "File": "_test/testdata/triceCheck.c", - "Line": 1240 + "Line": 1242 }, "13940": { "File": "_test/testdata/triceCheck.c", - "Line": 1241 + "Line": 1243 }, "13941": { "File": "_test/testdata/triceCheck.c", - "Line": 1242 + "Line": 1244 }, "13942": { "File": "_test/testdata/triceCheck.c", - "Line": 1243 + "Line": 1245 }, "13943": { "File": "_test/testdata/triceCheck.c", - "Line": 1244 + "Line": 1246 }, "13944": { "File": "_test/testdata/triceCheck.c", - "Line": 1245 + "Line": 1247 }, "13945": { "File": "_test/testdata/triceCheck.c", - "Line": 1246 + "Line": 1248 }, "13946": { "File": "_test/testdata/triceCheck.c", - "Line": 1247 + "Line": 1249 }, "13947": { "File": "_test/testdata/triceCheck.c", - "Line": 1248 + "Line": 1250 }, "13948": { "File": "_test/testdata/triceCheck.c", - "Line": 1249 + "Line": 1251 }, "13949": { "File": "_test/testdata/triceCheck.c", - "Line": 1250 + "Line": 1252 }, "13950": { "File": "_test/testdata/triceCheck.c", - "Line": 1251 + "Line": 1253 }, "13951": { "File": "_test/testdata/triceCheck.c", - "Line": 1252 + "Line": 1254 }, "13952": { "File": "_test/testdata/triceCheck.c", - "Line": 1253 + "Line": 1255 }, "13953": { "File": "_test/testdata/triceCheck.c", - "Line": 1254 + "Line": 1256 }, "13954": { "File": "_test/testdata/triceCheck.c", - "Line": 1255 + "Line": 1257 }, "13955": { "File": "_test/testdata/triceCheck.c", - "Line": 1256 + "Line": 1258 }, "13956": { "File": "_test/testdata/triceCheck.c", - "Line": 1257 + "Line": 1259 }, "13957": { "File": "_test/testdata/triceCheck.c", - "Line": 1258 + "Line": 1260 }, "13958": { "File": "_test/testdata/triceCheck.c", - "Line": 1259 + "Line": 1261 }, "13959": { "File": "_test/testdata/triceCheck.c", - "Line": 1260 + "Line": 1262 }, "13960": { "File": "_test/testdata/triceCheck.c", - "Line": 1261 + "Line": 1263 }, "13961": { "File": "_test/testdata/triceCheck.c", - "Line": 1262 + "Line": 1264 }, "13962": { "File": "_test/testdata/triceCheck.c", - "Line": 1263 + "Line": 1265 }, "13963": { "File": "_test/testdata/triceCheck.c", - "Line": 1264 + "Line": 1266 }, "13964": { "File": "_test/testdata/triceCheck.c", - "Line": 1265 + "Line": 1267 }, "13965": { "File": "_test/testdata/triceCheck.c", - "Line": 1266 + "Line": 1268 }, "13966": { "File": "_test/testdata/triceCheck.c", - "Line": 1267 + "Line": 1269 }, "13967": { "File": "_test/testdata/triceCheck.c", - "Line": 1268 + "Line": 1270 }, "13968": { "File": "_test/testdata/triceCheck.c", - "Line": 1269 + "Line": 1271 }, "13969": { "File": "_test/testdata/triceCheck.c", - "Line": 1272 + "Line": 1274 }, "13970": { "File": "_test/testdata/triceCheck.c", - "Line": 1273 + "Line": 1275 }, "13971": { "File": "_test/testdata/triceCheck.c", - "Line": 1274 + "Line": 1276 }, "13972": { "File": "_test/testdata/triceCheck.c", - "Line": 1275 + "Line": 1277 }, "13973": { "File": "_test/testdata/triceCheck.c", - "Line": 1276 + "Line": 1278 }, "13974": { "File": "_test/testdata/triceCheck.c", - "Line": 1277 + "Line": 1279 }, "13975": { "File": "_test/testdata/triceCheck.c", - "Line": 1278 + "Line": 1280 }, "13976": { "File": "_test/testdata/triceCheck.c", - "Line": 1279 + "Line": 1281 }, "13977": { "File": "_test/testdata/triceCheck.c", - "Line": 1280 + "Line": 1282 }, "13978": { "File": "_test/testdata/triceCheck.c", - "Line": 1281 + "Line": 1283 }, "13979": { "File": "_test/testdata/triceCheck.c", - "Line": 1282 + "Line": 1284 }, "13980": { "File": "_test/testdata/triceCheck.c", - "Line": 1283 + "Line": 1285 }, "13981": { "File": "_test/testdata/triceCheck.c", - "Line": 1284 + "Line": 1286 }, "13982": { "File": "_test/testdata/triceCheck.c", - "Line": 1285 + "Line": 1287 }, "13983": { "File": "_test/testdata/triceCheck.c", - "Line": 1286 + "Line": 1288 }, "13984": { "File": "_test/testdata/triceCheck.c", - "Line": 1287 + "Line": 1289 }, "13985": { "File": "_test/testdata/triceCheck.c", - "Line": 1288 + "Line": 1290 }, "13986": { "File": "_test/testdata/triceCheck.c", - "Line": 1289 + "Line": 1291 }, "13987": { "File": "_test/testdata/triceCheck.c", - "Line": 1290 + "Line": 1292 }, "13988": { "File": "_test/testdata/triceCheck.c", - "Line": 1291 + "Line": 1293 }, "13989": { "File": "_test/testdata/triceCheck.c", - "Line": 1292 + "Line": 1294 }, "13990": { "File": "_test/testdata/triceCheck.c", - "Line": 1293 + "Line": 1295 }, "13991": { "File": "_test/testdata/triceCheck.c", - "Line": 1294 + "Line": 1296 }, "13992": { "File": "_test/testdata/triceCheck.c", - "Line": 1295 + "Line": 1297 }, "13993": { "File": "_test/testdata/triceCheck.c", - "Line": 1296 + "Line": 1298 }, "13994": { "File": "_test/testdata/triceCheck.c", - "Line": 1297 + "Line": 1299 }, "13995": { "File": "_test/testdata/triceCheck.c", - "Line": 1298 + "Line": 1300 }, "13996": { "File": "_test/testdata/triceCheck.c", - "Line": 1299 + "Line": 1301 }, "13997": { "File": "_test/testdata/triceCheck.c", - "Line": 1300 + "Line": 1302 }, "13998": { "File": "_test/testdata/triceCheck.c", - "Line": 1301 + "Line": 1303 }, "13999": { "File": "_test/testdata/triceCheck.c", - "Line": 1302 + "Line": 1304 }, "14000": { "File": "_test/testdata/triceCheck.c", - "Line": 1303 + "Line": 1305 }, "14001": { "File": "_test/testdata/triceCheck.c", - "Line": 1304 + "Line": 1306 }, "14002": { "File": "_test/testdata/triceCheck.c", - "Line": 1305 + "Line": 1307 }, "14003": { "File": "_test/testdata/triceCheck.c", - "Line": 1306 + "Line": 1308 }, "14004": { "File": "_test/testdata/triceCheck.c", - "Line": 1307 + "Line": 1309 }, "14005": { "File": "_test/testdata/triceCheck.c", - "Line": 1308 + "Line": 1310 }, "14006": { "File": "_test/testdata/triceCheck.c", - "Line": 1311 + "Line": 1313 }, "14007": { "File": "_test/testdata/triceCheck.c", - "Line": 1312 + "Line": 1314 }, "14008": { "File": "_test/testdata/triceCheck.c", - "Line": 1313 + "Line": 1315 }, "14009": { "File": "_test/testdata/triceCheck.c", - "Line": 1314 + "Line": 1316 }, "14010": { "File": "_test/testdata/triceCheck.c", - "Line": 1315 + "Line": 1317 }, "14011": { "File": "_test/testdata/triceCheck.c", - "Line": 1316 + "Line": 1318 }, "14012": { "File": "_test/testdata/triceCheck.c", - "Line": 1317 + "Line": 1319 }, "14013": { "File": "_test/testdata/triceCheck.c", - "Line": 1318 + "Line": 1320 }, "14014": { "File": "_test/testdata/triceCheck.c", - "Line": 1319 + "Line": 1321 }, "14015": { "File": "_test/testdata/triceCheck.c", - "Line": 1320 + "Line": 1322 }, "14016": { "File": "_test/testdata/triceCheck.c", - "Line": 1321 + "Line": 1323 }, "14017": { "File": "_test/testdata/triceCheck.c", - "Line": 1322 + "Line": 1324 }, "14018": { "File": "_test/testdata/triceCheck.c", - "Line": 1323 + "Line": 1325 }, "14019": { "File": "_test/testdata/triceCheck.c", - "Line": 1324 + "Line": 1326 }, "14020": { "File": "_test/testdata/triceCheck.c", - "Line": 1325 + "Line": 1327 }, "14021": { "File": "_test/testdata/triceCheck.c", - "Line": 1326 + "Line": 1328 }, "14022": { "File": "_test/testdata/triceCheck.c", - "Line": 1327 + "Line": 1329 }, "14023": { "File": "_test/testdata/triceCheck.c", - "Line": 1328 + "Line": 1330 }, "14024": { "File": "_test/testdata/triceCheck.c", - "Line": 1329 + "Line": 1331 }, "14025": { "File": "_test/testdata/triceCheck.c", - "Line": 1330 + "Line": 1332 }, "14026": { "File": "_test/testdata/triceCheck.c", - "Line": 1331 + "Line": 1333 }, "14027": { "File": "_test/testdata/triceCheck.c", - "Line": 1332 + "Line": 1334 }, "14028": { "File": "_test/testdata/triceCheck.c", - "Line": 1333 + "Line": 1335 }, "14029": { "File": "_test/testdata/triceCheck.c", - "Line": 1334 + "Line": 1336 }, "14030": { "File": "_test/testdata/triceCheck.c", - "Line": 1335 + "Line": 1337 }, "14031": { "File": "_test/testdata/triceCheck.c", - "Line": 1336 + "Line": 1338 }, "14032": { "File": "_test/testdata/triceCheck.c", - "Line": 1337 + "Line": 1339 }, "14033": { "File": "_test/testdata/triceCheck.c", - "Line": 1338 + "Line": 1340 }, "14034": { "File": "_test/testdata/triceCheck.c", - "Line": 1339 + "Line": 1341 }, "14035": { "File": "_test/testdata/triceCheck.c", - "Line": 1340 + "Line": 1342 }, "14036": { "File": "_test/testdata/triceCheck.c", - "Line": 1341 + "Line": 1343 }, "14037": { "File": "_test/testdata/triceCheck.c", - "Line": 1342 + "Line": 1344 }, "14038": { "File": "_test/testdata/triceCheck.c", - "Line": 1343 + "Line": 1345 }, "14039": { "File": "_test/testdata/triceCheck.c", - "Line": 1344 + "Line": 1346 }, "14040": { "File": "_test/testdata/triceCheck.c", - "Line": 1345 + "Line": 1347 }, "14041": { "File": "_test/testdata/triceCheck.c", - "Line": 1346 + "Line": 1348 }, "14042": { "File": "_test/testdata/triceCheck.c", - "Line": 1347 + "Line": 1349 }, "14043": { "File": "_test/testdata/triceCheck.c", - "Line": 1349 + "Line": 1351 }, "14044": { "File": "_test/testdata/triceCheck.c", - "Line": 1350 + "Line": 1352 }, "14045": { "File": "_test/testdata/triceCheck.c", - "Line": 1351 + "Line": 1353 }, "14046": { "File": "_test/testdata/triceCheck.c", - "Line": 1352 + "Line": 1354 }, "14047": { "File": "_test/testdata/triceCheck.c", - "Line": 1353 + "Line": 1355 }, "14048": { "File": "_test/testdata/triceCheck.c", - "Line": 1354 + "Line": 1356 }, "14049": { "File": "_test/testdata/triceCheck.c", - "Line": 1355 + "Line": 1357 }, "14050": { "File": "_test/testdata/triceCheck.c", - "Line": 1356 + "Line": 1358 }, "14051": { "File": "_test/testdata/triceCheck.c", - "Line": 1357 + "Line": 1359 }, "14052": { "File": "_test/testdata/triceCheck.c", - "Line": 1358 + "Line": 1360 }, "14053": { "File": "_test/testdata/triceCheck.c", - "Line": 1359 + "Line": 1361 }, "14054": { "File": "_test/testdata/triceCheck.c", - "Line": 1360 + "Line": 1362 }, "14055": { "File": "_test/testdata/triceCheck.c", - "Line": 1361 + "Line": 1363 }, "14056": { "File": "_test/testdata/triceCheck.c", - "Line": 1362 + "Line": 1364 }, "14057": { "File": "_test/testdata/triceCheck.c", - "Line": 1363 + "Line": 1365 }, "14058": { "File": "_test/testdata/triceCheck.c", - "Line": 1364 + "Line": 1366 }, "14059": { "File": "_test/testdata/triceCheck.c", - "Line": 1365 + "Line": 1367 }, "14060": { "File": "_test/testdata/triceCheck.c", - "Line": 1366 + "Line": 1368 }, "14061": { "File": "_test/testdata/triceCheck.c", - "Line": 1367 + "Line": 1369 }, "14062": { "File": "_test/testdata/triceCheck.c", - "Line": 1368 + "Line": 1370 }, "14063": { "File": "_test/testdata/triceCheck.c", - "Line": 1369 + "Line": 1371 }, "14064": { "File": "_test/testdata/triceCheck.c", - "Line": 1370 + "Line": 1372 }, "14065": { "File": "_test/testdata/triceCheck.c", - "Line": 1371 + "Line": 1373 }, "14066": { "File": "_test/testdata/triceCheck.c", - "Line": 1372 + "Line": 1374 }, "14067": { "File": "_test/testdata/triceCheck.c", - "Line": 1373 + "Line": 1375 }, "14068": { "File": "_test/testdata/triceCheck.c", - "Line": 1374 + "Line": 1376 }, "14069": { "File": "_test/testdata/triceCheck.c", - "Line": 1375 + "Line": 1377 }, "14070": { "File": "_test/testdata/triceCheck.c", - "Line": 1376 + "Line": 1378 }, "14071": { "File": "_test/testdata/triceCheck.c", - "Line": 1377 + "Line": 1379 }, "14072": { "File": "_test/testdata/triceCheck.c", - "Line": 1378 + "Line": 1380 }, "14073": { "File": "_test/testdata/triceCheck.c", - "Line": 1379 + "Line": 1381 }, "14074": { "File": "_test/testdata/triceCheck.c", - "Line": 1380 + "Line": 1382 }, "14075": { "File": "_test/testdata/triceCheck.c", - "Line": 1381 + "Line": 1383 }, "14076": { "File": "_test/testdata/triceCheck.c", - "Line": 1382 + "Line": 1384 }, "14077": { "File": "_test/testdata/triceCheck.c", - "Line": 1383 + "Line": 1385 }, "14078": { "File": "_test/testdata/triceCheck.c", - "Line": 1384 + "Line": 1386 }, "14079": { "File": "_test/testdata/triceCheck.c", - "Line": 1385 + "Line": 1387 }, "14080": { "File": "_test/testdata/triceCheck.c", - "Line": 1387 + "Line": 1389 }, "14081": { "File": "_test/testdata/triceCheck.c", - "Line": 1388 + "Line": 1390 }, "14082": { "File": "_test/testdata/triceCheck.c", - "Line": 1389 + "Line": 1391 }, "14083": { "File": "_test/testdata/triceCheck.c", - "Line": 1390 + "Line": 1392 }, "14084": { "File": "_test/testdata/triceCheck.c", - "Line": 1391 + "Line": 1393 }, "14085": { "File": "_test/testdata/triceCheck.c", - "Line": 1392 + "Line": 1394 }, "14086": { "File": "_test/testdata/triceCheck.c", - "Line": 1393 + "Line": 1395 }, "14087": { "File": "_test/testdata/triceCheck.c", - "Line": 1394 + "Line": 1396 }, "14088": { "File": "_test/testdata/triceCheck.c", - "Line": 1395 + "Line": 1397 }, "14089": { "File": "_test/testdata/triceCheck.c", - "Line": 1396 + "Line": 1398 }, "14090": { "File": "_test/testdata/triceCheck.c", - "Line": 1397 + "Line": 1399 }, "14091": { "File": "_test/testdata/triceCheck.c", - "Line": 1398 + "Line": 1400 }, "14092": { "File": "_test/testdata/triceCheck.c", - "Line": 1399 + "Line": 1401 }, "14093": { "File": "_test/testdata/triceCheck.c", - "Line": 1400 + "Line": 1402 }, "14094": { "File": "_test/testdata/triceCheck.c", - "Line": 1401 + "Line": 1403 }, "14095": { "File": "_test/testdata/triceCheck.c", - "Line": 1402 + "Line": 1404 }, "14096": { "File": "_test/testdata/triceCheck.c", - "Line": 1403 + "Line": 1405 }, "14097": { "File": "_test/testdata/triceCheck.c", - "Line": 1404 + "Line": 1406 }, "14098": { "File": "_test/testdata/triceCheck.c", - "Line": 1405 + "Line": 1407 }, "14099": { "File": "_test/testdata/triceCheck.c", - "Line": 1406 + "Line": 1408 }, "14100": { "File": "_test/testdata/triceCheck.c", - "Line": 1407 + "Line": 1409 }, "14101": { "File": "_test/testdata/triceCheck.c", - "Line": 1408 + "Line": 1410 }, "14102": { "File": "_test/testdata/triceCheck.c", - "Line": 1409 + "Line": 1411 }, "14103": { "File": "_test/testdata/triceCheck.c", - "Line": 1410 + "Line": 1412 }, "14104": { "File": "_test/testdata/triceCheck.c", - "Line": 1411 + "Line": 1413 }, "14105": { "File": "_test/testdata/triceCheck.c", - "Line": 1412 + "Line": 1414 }, "14106": { "File": "_test/testdata/triceCheck.c", - "Line": 1413 + "Line": 1415 }, "14107": { "File": "_test/testdata/triceCheck.c", - "Line": 1414 + "Line": 1416 }, "14108": { "File": "_test/testdata/triceCheck.c", - "Line": 1415 + "Line": 1417 }, "14109": { "File": "_test/testdata/triceCheck.c", - "Line": 1416 + "Line": 1418 }, "14110": { "File": "_test/testdata/triceCheck.c", - "Line": 1417 + "Line": 1419 }, "14111": { "File": "_test/testdata/triceCheck.c", - "Line": 1418 + "Line": 1420 }, "14112": { "File": "_test/testdata/triceCheck.c", - "Line": 1419 + "Line": 1421 }, "14113": { "File": "_test/testdata/triceCheck.c", - "Line": 1420 + "Line": 1422 }, "14114": { "File": "_test/testdata/triceCheck.c", - "Line": 1421 + "Line": 1423 }, "14115": { "File": "_test/testdata/triceCheck.c", - "Line": 1422 + "Line": 1424 }, "14116": { "File": "_test/testdata/triceCheck.c", - "Line": 1423 + "Line": 1425 }, "14117": { "File": "_test/testdata/triceCheck.c", - "Line": 1425 + "Line": 1427 }, "14118": { "File": "_test/testdata/triceCheck.c", - "Line": 1426 + "Line": 1428 }, "14119": { "File": "_test/testdata/triceCheck.c", - "Line": 1427 + "Line": 1429 }, "14120": { "File": "_test/testdata/triceCheck.c", - "Line": 1428 + "Line": 1430 }, "14121": { "File": "_test/testdata/triceCheck.c", - "Line": 1429 + "Line": 1431 }, "14122": { "File": "_test/testdata/triceCheck.c", - "Line": 1430 + "Line": 1432 }, "14123": { "File": "_test/testdata/triceCheck.c", - "Line": 1431 + "Line": 1433 }, "14124": { "File": "_test/testdata/triceCheck.c", - "Line": 1432 + "Line": 1434 }, "14125": { "File": "_test/testdata/triceCheck.c", - "Line": 1433 + "Line": 1435 }, "14126": { "File": "_test/testdata/triceCheck.c", - "Line": 1434 + "Line": 1436 }, "14127": { "File": "_test/testdata/triceCheck.c", - "Line": 1435 + "Line": 1437 }, "14128": { "File": "_test/testdata/triceCheck.c", - "Line": 1436 + "Line": 1438 }, "14129": { "File": "_test/testdata/triceCheck.c", - "Line": 1437 + "Line": 1439 }, "14130": { "File": "_test/testdata/triceCheck.c", - "Line": 1438 + "Line": 1440 }, "14131": { "File": "_test/testdata/triceCheck.c", - "Line": 1439 + "Line": 1441 }, "14132": { "File": "_test/testdata/triceCheck.c", - "Line": 1440 + "Line": 1442 }, "14133": { "File": "_test/testdata/triceCheck.c", - "Line": 1441 + "Line": 1443 }, "14134": { "File": "_test/testdata/triceCheck.c", - "Line": 1442 + "Line": 1444 }, "14135": { "File": "_test/testdata/triceCheck.c", - "Line": 1443 + "Line": 1445 }, "14136": { "File": "_test/testdata/triceCheck.c", - "Line": 1444 + "Line": 1446 }, "14137": { "File": "_test/testdata/triceCheck.c", - "Line": 1445 + "Line": 1447 }, "14138": { "File": "_test/testdata/triceCheck.c", - "Line": 1446 + "Line": 1448 }, "14139": { "File": "_test/testdata/triceCheck.c", - "Line": 1447 + "Line": 1449 }, "14140": { "File": "_test/testdata/triceCheck.c", - "Line": 1448 + "Line": 1450 }, "14141": { "File": "_test/testdata/triceCheck.c", - "Line": 1449 + "Line": 1451 }, "14142": { "File": "_test/testdata/triceCheck.c", - "Line": 1450 + "Line": 1452 }, "14143": { "File": "_test/testdata/triceCheck.c", - "Line": 1451 + "Line": 1453 }, "14144": { "File": "_test/testdata/triceCheck.c", - "Line": 1452 + "Line": 1454 }, "14145": { "File": "_test/testdata/triceCheck.c", - "Line": 1453 + "Line": 1455 }, "14146": { "File": "_test/testdata/triceCheck.c", - "Line": 1454 + "Line": 1456 }, "14147": { "File": "_test/testdata/triceCheck.c", - "Line": 1455 + "Line": 1457 }, "14148": { "File": "_test/testdata/triceCheck.c", - "Line": 1456 + "Line": 1458 }, "14149": { "File": "_test/testdata/triceCheck.c", - "Line": 1457 + "Line": 1459 }, "14150": { "File": "_test/testdata/triceCheck.c", - "Line": 1458 + "Line": 1460 }, "14151": { "File": "_test/testdata/triceCheck.c", - "Line": 1459 + "Line": 1461 }, "14152": { "File": "_test/testdata/triceCheck.c", - "Line": 1460 + "Line": 1462 }, "14153": { "File": "_test/testdata/triceCheck.c", - "Line": 1461 + "Line": 1463 }, "14154": { "File": "_test/testdata/triceCheck.c", - "Line": 1463 + "Line": 1465 }, "14155": { "File": "_test/testdata/triceCheck.c", - "Line": 1464 + "Line": 1466 }, "14156": { "File": "_test/testdata/triceCheck.c", - "Line": 1465 + "Line": 1467 }, "14157": { "File": "_test/testdata/triceCheck.c", - "Line": 1466 + "Line": 1468 }, "14158": { "File": "_test/testdata/triceCheck.c", - "Line": 1467 + "Line": 1469 }, "14159": { "File": "_test/testdata/triceCheck.c", - "Line": 1468 + "Line": 1470 }, "14160": { "File": "_test/testdata/triceCheck.c", - "Line": 1469 + "Line": 1471 }, "14161": { "File": "_test/testdata/triceCheck.c", - "Line": 1470 + "Line": 1472 }, "14162": { "File": "_test/testdata/triceCheck.c", - "Line": 1471 + "Line": 1473 }, "14163": { "File": "_test/testdata/triceCheck.c", - "Line": 1472 + "Line": 1474 }, "14164": { "File": "_test/testdata/triceCheck.c", - "Line": 1473 + "Line": 1475 }, "14165": { "File": "_test/testdata/triceCheck.c", - "Line": 1474 + "Line": 1476 }, "14166": { "File": "_test/testdata/triceCheck.c", - "Line": 1475 + "Line": 1477 }, "14167": { "File": "_test/testdata/triceCheck.c", - "Line": 1476 + "Line": 1478 }, "14168": { "File": "_test/testdata/triceCheck.c", - "Line": 1477 + "Line": 1479 }, "14169": { "File": "_test/testdata/triceCheck.c", - "Line": 1478 + "Line": 1480 }, "14170": { "File": "_test/testdata/triceCheck.c", - "Line": 1479 + "Line": 1481 }, "14171": { "File": "_test/testdata/triceCheck.c", - "Line": 1480 + "Line": 1482 }, "14172": { "File": "_test/testdata/triceCheck.c", - "Line": 1481 + "Line": 1483 }, "14173": { "File": "_test/testdata/triceCheck.c", - "Line": 1482 + "Line": 1484 }, "14174": { "File": "_test/testdata/triceCheck.c", - "Line": 1483 + "Line": 1485 }, "14175": { "File": "_test/testdata/triceCheck.c", - "Line": 1484 + "Line": 1486 }, "14176": { "File": "_test/testdata/triceCheck.c", - "Line": 1485 + "Line": 1487 }, "14177": { "File": "_test/testdata/triceCheck.c", - "Line": 1486 + "Line": 1488 }, "14178": { "File": "_test/testdata/triceCheck.c", - "Line": 1487 + "Line": 1489 }, "14179": { "File": "_test/testdata/triceCheck.c", - "Line": 1488 + "Line": 1490 }, "14180": { "File": "_test/testdata/triceCheck.c", - "Line": 1489 + "Line": 1491 }, "14181": { "File": "_test/testdata/triceCheck.c", - "Line": 1490 + "Line": 1492 }, "14182": { "File": "_test/testdata/triceCheck.c", - "Line": 1491 + "Line": 1493 }, "14183": { "File": "_test/testdata/triceCheck.c", - "Line": 1492 + "Line": 1494 }, "14184": { "File": "_test/testdata/triceCheck.c", - "Line": 1493 + "Line": 1495 }, "14185": { "File": "_test/testdata/triceCheck.c", - "Line": 1494 + "Line": 1496 }, "14186": { "File": "_test/testdata/triceCheck.c", - "Line": 1495 + "Line": 1497 }, "14187": { "File": "_test/testdata/triceCheck.c", - "Line": 1496 + "Line": 1498 }, "14188": { "File": "_test/testdata/triceCheck.c", - "Line": 1497 + "Line": 1499 }, "14189": { "File": "_test/testdata/triceCheck.c", - "Line": 1498 + "Line": 1500 }, "14190": { "File": "_test/testdata/triceCheck.c", - "Line": 1499 + "Line": 1501 }, "14191": { "File": "_test/testdata/triceCheck.c", - "Line": 1501 + "Line": 1503 }, "14192": { "File": "_test/testdata/triceCheck.c", - "Line": 1502 + "Line": 1504 }, "14193": { "File": "_test/testdata/triceCheck.c", - "Line": 1503 + "Line": 1505 }, "14194": { "File": "_test/testdata/triceCheck.c", - "Line": 1504 + "Line": 1506 }, "14195": { "File": "_test/testdata/triceCheck.c", - "Line": 1505 + "Line": 1507 }, "14196": { "File": "_test/testdata/triceCheck.c", - "Line": 1506 + "Line": 1508 }, "14197": { "File": "_test/testdata/triceCheck.c", - "Line": 1507 + "Line": 1509 }, "14198": { "File": "_test/testdata/triceCheck.c", - "Line": 1508 + "Line": 1510 }, "14199": { "File": "_test/testdata/triceCheck.c", - "Line": 1509 + "Line": 1511 }, "14200": { "File": "_test/testdata/triceCheck.c", - "Line": 1510 + "Line": 1512 }, "14201": { "File": "_test/testdata/triceCheck.c", - "Line": 1511 + "Line": 1513 }, "14202": { "File": "_test/testdata/triceCheck.c", - "Line": 1512 + "Line": 1514 }, "14203": { "File": "_test/testdata/triceCheck.c", - "Line": 1513 + "Line": 1515 }, "14204": { "File": "_test/testdata/triceCheck.c", - "Line": 1514 + "Line": 1516 }, "14205": { "File": "_test/testdata/triceCheck.c", - "Line": 1515 + "Line": 1517 }, "14206": { "File": "_test/testdata/triceCheck.c", - "Line": 1516 + "Line": 1518 }, "14207": { "File": "_test/testdata/triceCheck.c", - "Line": 1517 + "Line": 1519 }, "14208": { "File": "_test/testdata/triceCheck.c", - "Line": 1518 + "Line": 1520 }, "14209": { "File": "_test/testdata/triceCheck.c", - "Line": 1519 + "Line": 1521 }, "14210": { "File": "_test/testdata/triceCheck.c", - "Line": 1520 + "Line": 1522 }, "14211": { "File": "_test/testdata/triceCheck.c", - "Line": 1521 + "Line": 1523 }, "14212": { "File": "_test/testdata/triceCheck.c", - "Line": 1522 + "Line": 1524 }, "14213": { "File": "_test/testdata/triceCheck.c", - "Line": 1523 + "Line": 1525 }, "14214": { "File": "_test/testdata/triceCheck.c", - "Line": 1524 + "Line": 1526 }, "14215": { "File": "_test/testdata/triceCheck.c", - "Line": 1525 + "Line": 1527 }, "14216": { "File": "_test/testdata/triceCheck.c", - "Line": 1526 + "Line": 1528 }, "14217": { "File": "_test/testdata/triceCheck.c", - "Line": 1527 + "Line": 1529 }, "14218": { "File": "_test/testdata/triceCheck.c", - "Line": 1528 + "Line": 1530 }, "14219": { "File": "_test/testdata/triceCheck.c", - "Line": 1529 + "Line": 1531 }, "14220": { "File": "_test/testdata/triceCheck.c", - "Line": 1530 + "Line": 1532 }, "14221": { "File": "_test/testdata/triceCheck.c", - "Line": 1531 + "Line": 1533 }, "14222": { "File": "_test/testdata/triceCheck.c", - "Line": 1532 + "Line": 1534 }, "14223": { "File": "_test/testdata/triceCheck.c", - "Line": 1533 + "Line": 1535 }, "14224": { "File": "_test/testdata/triceCheck.c", - "Line": 1534 + "Line": 1536 }, "14225": { "File": "_test/testdata/triceCheck.c", - "Line": 1535 + "Line": 1537 }, "14226": { "File": "_test/testdata/triceCheck.c", - "Line": 1536 + "Line": 1538 }, "14227": { "File": "_test/testdata/triceCheck.c", - "Line": 1537 + "Line": 1539 }, "14228": { "File": "_test/testdata/triceCheck.c", - "Line": 1539 + "Line": 1541 }, "14229": { "File": "_test/testdata/triceCheck.c", - "Line": 1540 + "Line": 1542 }, "14230": { "File": "_test/testdata/triceCheck.c", - "Line": 1541 + "Line": 1543 }, "14231": { "File": "_test/testdata/triceCheck.c", - "Line": 1542 + "Line": 1544 }, "14232": { "File": "_test/testdata/triceCheck.c", - "Line": 1543 + "Line": 1545 }, "14233": { "File": "_test/testdata/triceCheck.c", - "Line": 1544 + "Line": 1546 }, "14234": { "File": "_test/testdata/triceCheck.c", - "Line": 1545 + "Line": 1547 }, "14235": { "File": "_test/testdata/triceCheck.c", - "Line": 1546 + "Line": 1548 }, "14236": { "File": "_test/testdata/triceCheck.c", - "Line": 1547 + "Line": 1549 }, "14237": { "File": "_test/testdata/triceCheck.c", - "Line": 1548 + "Line": 1550 }, "14238": { "File": "_test/testdata/triceCheck.c", - "Line": 1549 + "Line": 1551 }, "14239": { "File": "_test/testdata/triceCheck.c", - "Line": 1550 + "Line": 1552 }, "14240": { "File": "_test/testdata/triceCheck.c", - "Line": 1551 + "Line": 1553 }, "14241": { "File": "_test/testdata/triceCheck.c", - "Line": 1552 + "Line": 1554 }, "14242": { "File": "_test/testdata/triceCheck.c", - "Line": 1553 + "Line": 1555 }, "14243": { "File": "_test/testdata/triceCheck.c", - "Line": 1554 + "Line": 1556 }, "14244": { "File": "_test/testdata/triceCheck.c", - "Line": 1555 + "Line": 1557 }, "14245": { "File": "_test/testdata/triceCheck.c", - "Line": 1556 + "Line": 1558 }, "14246": { "File": "_test/testdata/triceCheck.c", - "Line": 1557 + "Line": 1559 }, "14247": { "File": "_test/testdata/triceCheck.c", - "Line": 1558 + "Line": 1560 }, "14248": { "File": "_test/testdata/triceCheck.c", - "Line": 1559 + "Line": 1561 }, "14249": { "File": "_test/testdata/triceCheck.c", - "Line": 1560 + "Line": 1562 }, "14250": { "File": "_test/testdata/triceCheck.c", - "Line": 1561 + "Line": 1563 }, "14251": { "File": "_test/testdata/triceCheck.c", - "Line": 1562 + "Line": 1564 }, "14252": { "File": "_test/testdata/triceCheck.c", - "Line": 1563 + "Line": 1565 }, "14253": { "File": "_test/testdata/triceCheck.c", - "Line": 1564 + "Line": 1566 }, "14254": { "File": "_test/testdata/triceCheck.c", - "Line": 1565 + "Line": 1567 }, "14255": { "File": "_test/testdata/triceCheck.c", - "Line": 1566 + "Line": 1568 }, "14256": { "File": "_test/testdata/triceCheck.c", - "Line": 1567 + "Line": 1569 }, "14257": { "File": "_test/testdata/triceCheck.c", - "Line": 1568 + "Line": 1570 }, "14258": { "File": "_test/testdata/triceCheck.c", - "Line": 1569 + "Line": 1571 }, "14259": { "File": "_test/testdata/triceCheck.c", - "Line": 1570 + "Line": 1572 }, "14260": { "File": "_test/testdata/triceCheck.c", - "Line": 1571 + "Line": 1573 }, "14261": { "File": "_test/testdata/triceCheck.c", - "Line": 1572 + "Line": 1574 }, "14262": { "File": "_test/testdata/triceCheck.c", - "Line": 1573 + "Line": 1575 }, "14263": { "File": "_test/testdata/triceCheck.c", - "Line": 1574 + "Line": 1576 }, "14264": { "File": "_test/testdata/triceCheck.c", - "Line": 1575 + "Line": 1577 }, "14265": { "File": "_test/testdata/triceCheck.c", - "Line": 1577 + "Line": 1579 }, "14266": { "File": "_test/testdata/triceCheck.c", - "Line": 1578 + "Line": 1580 }, "14267": { "File": "_test/testdata/triceCheck.c", - "Line": 1579 + "Line": 1581 }, "14268": { "File": "_test/testdata/triceCheck.c", - "Line": 1580 + "Line": 1582 }, "14269": { "File": "_test/testdata/triceCheck.c", - "Line": 1581 + "Line": 1583 }, "14270": { "File": "_test/testdata/triceCheck.c", - "Line": 1582 + "Line": 1584 }, "14271": { "File": "_test/testdata/triceCheck.c", - "Line": 1583 + "Line": 1585 }, "14272": { "File": "_test/testdata/triceCheck.c", - "Line": 1584 + "Line": 1586 }, "14273": { "File": "_test/testdata/triceCheck.c", - "Line": 1585 + "Line": 1587 }, "14274": { "File": "_test/testdata/triceCheck.c", - "Line": 1586 + "Line": 1588 }, "14275": { "File": "_test/testdata/triceCheck.c", - "Line": 1587 + "Line": 1589 }, "14276": { "File": "_test/testdata/triceCheck.c", - "Line": 1588 + "Line": 1590 }, "14277": { "File": "_test/testdata/triceCheck.c", - "Line": 1589 + "Line": 1591 }, "14278": { "File": "_test/testdata/triceCheck.c", - "Line": 1590 + "Line": 1592 }, "14279": { "File": "_test/testdata/triceCheck.c", - "Line": 1591 + "Line": 1593 }, "14280": { "File": "_test/testdata/triceCheck.c", - "Line": 1592 + "Line": 1594 }, "14281": { "File": "_test/testdata/triceCheck.c", - "Line": 1593 + "Line": 1595 }, "14282": { "File": "_test/testdata/triceCheck.c", - "Line": 1594 + "Line": 1596 }, "14283": { "File": "_test/testdata/triceCheck.c", - "Line": 1595 + "Line": 1597 }, "14284": { "File": "_test/testdata/triceCheck.c", - "Line": 1596 + "Line": 1598 }, "14285": { "File": "_test/testdata/triceCheck.c", - "Line": 1597 + "Line": 1599 }, "14286": { "File": "_test/testdata/triceCheck.c", - "Line": 1598 + "Line": 1600 }, "14287": { "File": "_test/testdata/triceCheck.c", - "Line": 1599 + "Line": 1601 }, "14288": { "File": "_test/testdata/triceCheck.c", - "Line": 1600 + "Line": 1602 }, "14289": { "File": "_test/testdata/triceCheck.c", - "Line": 1601 + "Line": 1603 }, "14290": { "File": "_test/testdata/triceCheck.c", - "Line": 1602 + "Line": 1604 }, "14291": { "File": "_test/testdata/triceCheck.c", - "Line": 1603 + "Line": 1605 }, "14292": { "File": "_test/testdata/triceCheck.c", - "Line": 1604 + "Line": 1606 }, "14293": { "File": "_test/testdata/triceCheck.c", - "Line": 1605 + "Line": 1607 }, "14294": { "File": "_test/testdata/triceCheck.c", - "Line": 1606 + "Line": 1608 }, "14295": { "File": "_test/testdata/triceCheck.c", - "Line": 1607 + "Line": 1609 }, "14296": { "File": "_test/testdata/triceCheck.c", - "Line": 1608 + "Line": 1610 }, "14297": { "File": "_test/testdata/triceCheck.c", - "Line": 1609 + "Line": 1611 }, "14298": { "File": "_test/testdata/triceCheck.c", - "Line": 1610 + "Line": 1612 }, "14299": { "File": "_test/testdata/triceCheck.c", - "Line": 1611 + "Line": 1613 }, "14300": { "File": "_test/testdata/triceCheck.c", - "Line": 1612 + "Line": 1614 }, "14301": { "File": "_test/testdata/triceCheck.c", - "Line": 1613 + "Line": 1615 }, "14302": { "File": "_test/testdata/triceCheck.c", - "Line": 1615 + "Line": 1617 }, "14303": { "File": "_test/testdata/triceCheck.c", - "Line": 1616 + "Line": 1618 }, "14304": { "File": "_test/testdata/triceCheck.c", - "Line": 1617 + "Line": 1619 }, "14305": { "File": "_test/testdata/triceCheck.c", - "Line": 1618 + "Line": 1620 }, "14306": { "File": "_test/testdata/triceCheck.c", - "Line": 1619 + "Line": 1621 }, "14307": { "File": "_test/testdata/triceCheck.c", - "Line": 1620 + "Line": 1622 }, "14308": { "File": "_test/testdata/triceCheck.c", - "Line": 1621 + "Line": 1623 }, "14309": { "File": "_test/testdata/triceCheck.c", - "Line": 1622 + "Line": 1624 }, "14310": { "File": "_test/testdata/triceCheck.c", - "Line": 1623 + "Line": 1625 }, "14311": { "File": "_test/testdata/triceCheck.c", - "Line": 1624 + "Line": 1626 }, "14312": { "File": "_test/testdata/triceCheck.c", - "Line": 1625 + "Line": 1627 }, "14313": { "File": "_test/testdata/triceCheck.c", - "Line": 1626 + "Line": 1628 }, "14314": { "File": "_test/testdata/triceCheck.c", - "Line": 1627 + "Line": 1629 }, "14315": { "File": "_test/testdata/triceCheck.c", - "Line": 1628 + "Line": 1630 }, "14316": { "File": "_test/testdata/triceCheck.c", - "Line": 1629 + "Line": 1631 }, "14317": { "File": "_test/testdata/triceCheck.c", - "Line": 1630 + "Line": 1632 }, "14318": { "File": "_test/testdata/triceCheck.c", - "Line": 1631 + "Line": 1633 }, "14319": { "File": "_test/testdata/triceCheck.c", - "Line": 1632 + "Line": 1634 }, "14320": { "File": "_test/testdata/triceCheck.c", - "Line": 1633 + "Line": 1635 }, "14321": { "File": "_test/testdata/triceCheck.c", - "Line": 1634 + "Line": 1636 }, "14322": { "File": "_test/testdata/triceCheck.c", - "Line": 1635 + "Line": 1637 }, "14323": { "File": "_test/testdata/triceCheck.c", - "Line": 1636 + "Line": 1638 }, "14324": { "File": "_test/testdata/triceCheck.c", - "Line": 1637 + "Line": 1639 }, "14325": { "File": "_test/testdata/triceCheck.c", - "Line": 1638 + "Line": 1640 }, "14326": { "File": "_test/testdata/triceCheck.c", - "Line": 1639 + "Line": 1641 }, "14327": { "File": "_test/testdata/triceCheck.c", - "Line": 1640 + "Line": 1642 }, "14328": { "File": "_test/testdata/triceCheck.c", - "Line": 1641 + "Line": 1643 }, "14329": { "File": "_test/testdata/triceCheck.c", - "Line": 1642 + "Line": 1644 }, "14330": { "File": "_test/testdata/triceCheck.c", - "Line": 1643 + "Line": 1645 }, "14331": { "File": "_test/testdata/triceCheck.c", - "Line": 1644 + "Line": 1646 }, "14332": { "File": "_test/testdata/triceCheck.c", - "Line": 1645 + "Line": 1647 }, "14333": { "File": "_test/testdata/triceCheck.c", - "Line": 1646 + "Line": 1648 }, "14334": { "File": "_test/testdata/triceCheck.c", - "Line": 1647 + "Line": 1649 }, "14335": { "File": "_test/testdata/triceCheck.c", - "Line": 1648 + "Line": 1650 }, "14336": { "File": "_test/testdata/triceCheck.c", - "Line": 1649 + "Line": 1651 }, "14337": { "File": "_test/testdata/triceCheck.c", - "Line": 1650 + "Line": 1652 }, "14338": { "File": "_test/testdata/triceCheck.c", - "Line": 1651 + "Line": 1653 }, "14339": { "File": "_test/testdata/triceCheck.c", - "Line": 1653 + "Line": 1655 }, "14340": { "File": "_test/testdata/triceCheck.c", - "Line": 1654 + "Line": 1656 }, "14341": { "File": "_test/testdata/triceCheck.c", - "Line": 1655 + "Line": 1657 }, "14342": { "File": "_test/testdata/triceCheck.c", - "Line": 1656 + "Line": 1658 }, "14343": { "File": "_test/testdata/triceCheck.c", - "Line": 1657 + "Line": 1659 }, "14344": { "File": "_test/testdata/triceCheck.c", - "Line": 1658 + "Line": 1660 }, "14345": { "File": "_test/testdata/triceCheck.c", - "Line": 1659 + "Line": 1661 }, "14346": { "File": "_test/testdata/triceCheck.c", - "Line": 1660 + "Line": 1662 }, "14347": { "File": "_test/testdata/triceCheck.c", - "Line": 1661 + "Line": 1663 }, "14348": { "File": "_test/testdata/triceCheck.c", - "Line": 1662 + "Line": 1664 }, "14349": { "File": "_test/testdata/triceCheck.c", - "Line": 1663 + "Line": 1665 }, "14350": { "File": "_test/testdata/triceCheck.c", - "Line": 1664 + "Line": 1666 }, "14351": { "File": "_test/testdata/triceCheck.c", - "Line": 1665 + "Line": 1667 }, "14352": { "File": "_test/testdata/triceCheck.c", - "Line": 1666 + "Line": 1668 }, "14353": { "File": "_test/testdata/triceCheck.c", - "Line": 1667 + "Line": 1669 }, "14354": { "File": "_test/testdata/triceCheck.c", - "Line": 1668 + "Line": 1670 }, "14355": { "File": "_test/testdata/triceCheck.c", - "Line": 1669 + "Line": 1671 }, "14356": { "File": "_test/testdata/triceCheck.c", - "Line": 1670 + "Line": 1672 }, "14357": { "File": "_test/testdata/triceCheck.c", - "Line": 1671 + "Line": 1673 }, "14358": { "File": "_test/testdata/triceCheck.c", - "Line": 1672 + "Line": 1674 }, "14359": { "File": "_test/testdata/triceCheck.c", - "Line": 1673 + "Line": 1675 }, "14360": { "File": "_test/testdata/triceCheck.c", - "Line": 1674 + "Line": 1676 }, "14361": { "File": "_test/testdata/triceCheck.c", - "Line": 1675 + "Line": 1677 }, "14362": { "File": "_test/testdata/triceCheck.c", - "Line": 1676 + "Line": 1678 }, "14363": { "File": "_test/testdata/triceCheck.c", - "Line": 1677 + "Line": 1679 }, "14364": { "File": "_test/testdata/triceCheck.c", - "Line": 1678 + "Line": 1680 }, "14365": { "File": "_test/testdata/triceCheck.c", - "Line": 1679 + "Line": 1681 }, "14366": { "File": "_test/testdata/triceCheck.c", - "Line": 1680 + "Line": 1682 }, "14367": { "File": "_test/testdata/triceCheck.c", - "Line": 1681 + "Line": 1683 }, "14368": { "File": "_test/testdata/triceCheck.c", - "Line": 1682 + "Line": 1684 }, "14369": { "File": "_test/testdata/triceCheck.c", - "Line": 1683 + "Line": 1685 }, "14370": { "File": "_test/testdata/triceCheck.c", - "Line": 1684 + "Line": 1686 }, "14371": { "File": "_test/testdata/triceCheck.c", - "Line": 1685 + "Line": 1687 }, "14372": { "File": "_test/testdata/triceCheck.c", - "Line": 1686 + "Line": 1688 }, "14373": { "File": "_test/testdata/triceCheck.c", - "Line": 1687 + "Line": 1689 }, "14374": { "File": "_test/testdata/triceCheck.c", - "Line": 1688 + "Line": 1690 }, "14375": { "File": "_test/testdata/triceCheck.c", - "Line": 1689 + "Line": 1691 }, "14376": { "File": "_test/testdata/triceCheck.c", - "Line": 1691 + "Line": 1693 }, "14377": { "File": "_test/testdata/triceCheck.c", - "Line": 1692 + "Line": 1694 }, "14378": { "File": "_test/testdata/triceCheck.c", - "Line": 1693 + "Line": 1695 }, "14379": { "File": "_test/testdata/triceCheck.c", - "Line": 1694 + "Line": 1696 }, "14380": { "File": "_test/testdata/triceCheck.c", - "Line": 1695 + "Line": 1697 }, "14381": { "File": "_test/testdata/triceCheck.c", - "Line": 1696 + "Line": 1698 }, "14382": { "File": "_test/testdata/triceCheck.c", - "Line": 1697 + "Line": 1699 }, "14383": { "File": "_test/testdata/triceCheck.c", - "Line": 1698 + "Line": 1700 }, "14384": { "File": "_test/testdata/triceCheck.c", - "Line": 1699 + "Line": 1701 }, "14385": { "File": "_test/testdata/triceCheck.c", - "Line": 1700 + "Line": 1702 }, "14386": { "File": "_test/testdata/triceCheck.c", - "Line": 1701 + "Line": 1703 }, "14387": { "File": "_test/testdata/triceCheck.c", - "Line": 1702 + "Line": 1704 }, "14388": { "File": "_test/testdata/triceCheck.c", - "Line": 1703 + "Line": 1705 }, "14389": { "File": "_test/testdata/triceCheck.c", - "Line": 1704 + "Line": 1706 }, "14390": { "File": "_test/testdata/triceCheck.c", - "Line": 1705 + "Line": 1707 }, "14391": { "File": "_test/testdata/triceCheck.c", - "Line": 1706 + "Line": 1708 }, "14392": { "File": "_test/testdata/triceCheck.c", - "Line": 1707 + "Line": 1709 }, "14393": { "File": "_test/testdata/triceCheck.c", - "Line": 1708 + "Line": 1710 }, "14394": { "File": "_test/testdata/triceCheck.c", - "Line": 1709 + "Line": 1711 }, "14395": { "File": "_test/testdata/triceCheck.c", - "Line": 1710 + "Line": 1712 }, "14396": { "File": "_test/testdata/triceCheck.c", - "Line": 1711 + "Line": 1713 }, "14397": { "File": "_test/testdata/triceCheck.c", - "Line": 1712 + "Line": 1714 }, "14398": { "File": "_test/testdata/triceCheck.c", - "Line": 1713 + "Line": 1715 }, "14399": { "File": "_test/testdata/triceCheck.c", - "Line": 1714 + "Line": 1716 }, "14400": { "File": "_test/testdata/triceCheck.c", - "Line": 1715 + "Line": 1717 }, "14401": { "File": "_test/testdata/triceCheck.c", - "Line": 1716 + "Line": 1718 }, "14402": { "File": "_test/testdata/triceCheck.c", - "Line": 1717 + "Line": 1719 }, "14403": { "File": "_test/testdata/triceCheck.c", - "Line": 1718 + "Line": 1720 }, "14404": { "File": "_test/testdata/triceCheck.c", - "Line": 1719 + "Line": 1721 }, "14405": { "File": "_test/testdata/triceCheck.c", - "Line": 1720 + "Line": 1722 }, "14406": { "File": "_test/testdata/triceCheck.c", - "Line": 1721 + "Line": 1723 }, "14407": { "File": "_test/testdata/triceCheck.c", - "Line": 1722 + "Line": 1724 }, "14408": { "File": "_test/testdata/triceCheck.c", - "Line": 1723 + "Line": 1725 }, "14409": { "File": "_test/testdata/triceCheck.c", - "Line": 1724 + "Line": 1726 }, "14410": { "File": "_test/testdata/triceCheck.c", - "Line": 1725 + "Line": 1727 }, "14411": { "File": "_test/testdata/triceCheck.c", - "Line": 1726 + "Line": 1728 }, "14412": { "File": "_test/testdata/triceCheck.c", - "Line": 1727 + "Line": 1729 }, "14413": { "File": "_test/testdata/triceCheck.c", - "Line": 1729 + "Line": 1731 }, "14414": { "File": "_test/testdata/triceCheck.c", - "Line": 1730 + "Line": 1732 }, "14415": { "File": "_test/testdata/triceCheck.c", - "Line": 1731 + "Line": 1733 }, "14416": { "File": "_test/testdata/triceCheck.c", - "Line": 1732 + "Line": 1734 }, "14417": { "File": "_test/testdata/triceCheck.c", - "Line": 1733 + "Line": 1735 }, "14418": { "File": "_test/testdata/triceCheck.c", - "Line": 1734 + "Line": 1736 }, "14419": { "File": "_test/testdata/triceCheck.c", - "Line": 1735 + "Line": 1737 }, "14420": { "File": "_test/testdata/triceCheck.c", - "Line": 1736 + "Line": 1738 }, "14421": { "File": "_test/testdata/triceCheck.c", - "Line": 1737 + "Line": 1739 }, "14422": { "File": "_test/testdata/triceCheck.c", - "Line": 1738 + "Line": 1740 }, "14423": { "File": "_test/testdata/triceCheck.c", - "Line": 1739 + "Line": 1741 }, "14424": { "File": "_test/testdata/triceCheck.c", - "Line": 1740 + "Line": 1742 }, "14425": { "File": "_test/testdata/triceCheck.c", - "Line": 1741 + "Line": 1743 }, "14426": { "File": "_test/testdata/triceCheck.c", - "Line": 1742 + "Line": 1744 }, "14427": { "File": "_test/testdata/triceCheck.c", - "Line": 1743 + "Line": 1745 }, "14428": { "File": "_test/testdata/triceCheck.c", - "Line": 1744 + "Line": 1746 }, "14429": { "File": "_test/testdata/triceCheck.c", - "Line": 1745 + "Line": 1747 }, "14430": { "File": "_test/testdata/triceCheck.c", - "Line": 1746 + "Line": 1748 }, "14431": { "File": "_test/testdata/triceCheck.c", - "Line": 1747 + "Line": 1749 }, "14432": { "File": "_test/testdata/triceCheck.c", - "Line": 1748 + "Line": 1750 }, "14433": { "File": "_test/testdata/triceCheck.c", - "Line": 1749 + "Line": 1751 }, "14434": { "File": "_test/testdata/triceCheck.c", - "Line": 1750 + "Line": 1752 }, "14435": { "File": "_test/testdata/triceCheck.c", - "Line": 1751 + "Line": 1753 }, "14436": { "File": "_test/testdata/triceCheck.c", - "Line": 1752 + "Line": 1754 }, "14437": { "File": "_test/testdata/triceCheck.c", - "Line": 1753 + "Line": 1755 }, "14438": { "File": "_test/testdata/triceCheck.c", - "Line": 1754 + "Line": 1756 }, "14439": { "File": "_test/testdata/triceCheck.c", - "Line": 1755 + "Line": 1757 }, "14440": { "File": "_test/testdata/triceCheck.c", - "Line": 1756 + "Line": 1758 }, "14441": { "File": "_test/testdata/triceCheck.c", - "Line": 1757 + "Line": 1759 }, "14442": { "File": "_test/testdata/triceCheck.c", - "Line": 1758 + "Line": 1760 }, "14443": { "File": "_test/testdata/triceCheck.c", - "Line": 1759 + "Line": 1761 }, "14444": { "File": "_test/testdata/triceCheck.c", - "Line": 1760 + "Line": 1762 }, "14445": { "File": "_test/testdata/triceCheck.c", - "Line": 1761 + "Line": 1763 }, "14446": { "File": "_test/testdata/triceCheck.c", - "Line": 1762 + "Line": 1764 }, "14447": { "File": "_test/testdata/triceCheck.c", - "Line": 1763 + "Line": 1765 }, "14448": { "File": "_test/testdata/triceCheck.c", - "Line": 1764 + "Line": 1766 }, "14449": { "File": "_test/testdata/triceCheck.c", - "Line": 1765 + "Line": 1767 }, "14450": { "File": "_test/testdata/triceCheck.c", - "Line": 1767 + "Line": 1769 }, "14451": { "File": "_test/testdata/triceCheck.c", - "Line": 1769 + "Line": 1771 }, "14452": { "File": "_test/testdata/triceCheck.c", - "Line": 1770 + "Line": 1772 }, "14453": { "File": "_test/testdata/triceCheck.c", - "Line": 1771 + "Line": 1773 }, "14454": { "File": "_test/testdata/triceCheck.c", - "Line": 1772 + "Line": 1774 }, "14455": { "File": "_test/testdata/triceCheck.c", - "Line": 1773 + "Line": 1775 }, "14456": { "File": "_test/testdata/triceCheck.c", - "Line": 1774 + "Line": 1776 }, "14457": { "File": "_test/testdata/triceCheck.c", - "Line": 1775 + "Line": 1777 }, "14458": { "File": "_test/testdata/triceCheck.c", - "Line": 1776 + "Line": 1778 }, "14459": { "File": "_test/testdata/triceCheck.c", - "Line": 1777 + "Line": 1779 }, "14460": { "File": "_test/testdata/triceCheck.c", - "Line": 1778 + "Line": 1780 }, "14461": { "File": "_test/testdata/triceCheck.c", - "Line": 1779 + "Line": 1781 }, "14462": { "File": "_test/testdata/triceCheck.c", - "Line": 1780 + "Line": 1782 }, "14463": { "File": "_test/testdata/triceCheck.c", - "Line": 1781 + "Line": 1783 }, "14464": { "File": "_test/testdata/triceCheck.c", - "Line": 1782 + "Line": 1784 }, "14465": { "File": "_test/testdata/triceCheck.c", - "Line": 1783 + "Line": 1785 }, "14466": { "File": "_test/testdata/triceCheck.c", - "Line": 1784 + "Line": 1786 }, "14467": { "File": "_test/testdata/triceCheck.c", - "Line": 1785 + "Line": 1787 }, "14468": { "File": "_test/testdata/triceCheck.c", - "Line": 1786 + "Line": 1788 }, "14469": { "File": "_test/testdata/triceCheck.c", - "Line": 1787 + "Line": 1789 }, "14470": { "File": "_test/testdata/triceCheck.c", - "Line": 1788 + "Line": 1790 }, "14471": { "File": "_test/testdata/triceCheck.c", - "Line": 1789 + "Line": 1791 }, "14472": { "File": "_test/testdata/triceCheck.c", - "Line": 1790 + "Line": 1792 }, "14473": { "File": "_test/testdata/triceCheck.c", - "Line": 1791 + "Line": 1793 }, "14474": { "File": "_test/testdata/triceCheck.c", - "Line": 1792 + "Line": 1794 }, "14475": { "File": "_test/testdata/triceCheck.c", - "Line": 1793 + "Line": 1795 }, "14476": { "File": "_test/testdata/triceCheck.c", - "Line": 1794 + "Line": 1796 }, "14477": { "File": "_test/testdata/triceCheck.c", - "Line": 1795 + "Line": 1797 }, "14478": { "File": "_test/testdata/triceCheck.c", - "Line": 1796 + "Line": 1798 }, "14479": { "File": "_test/testdata/triceCheck.c", - "Line": 1797 + "Line": 1799 }, "14480": { "File": "_test/testdata/triceCheck.c", - "Line": 1798 + "Line": 1800 }, "14481": { "File": "_test/testdata/triceCheck.c", - "Line": 1799 + "Line": 1801 }, "14482": { "File": "_test/testdata/triceCheck.c", - "Line": 1800 + "Line": 1802 }, "14483": { "File": "_test/testdata/triceCheck.c", - "Line": 1801 + "Line": 1803 }, "14484": { "File": "_test/testdata/triceCheck.c", - "Line": 1802 + "Line": 1804 }, "14485": { "File": "_test/testdata/triceCheck.c", - "Line": 1803 + "Line": 1805 }, "14486": { "File": "_test/testdata/triceCheck.c", - "Line": 1804 + "Line": 1806 }, "14487": { "File": "_test/testdata/triceCheck.c", - "Line": 1806 + "Line": 1808 }, "14488": { "File": "_test/testdata/triceCheck.c", - "Line": 1807 + "Line": 1809 }, "14489": { "File": "_test/testdata/triceCheck.c", - "Line": 1808 + "Line": 1810 }, "14490": { "File": "_test/testdata/triceCheck.c", - "Line": 1809 + "Line": 1811 }, "14491": { "File": "_test/testdata/triceCheck.c", - "Line": 1810 + "Line": 1812 }, "14492": { "File": "_test/testdata/triceCheck.c", - "Line": 1811 + "Line": 1813 }, "14493": { "File": "_test/testdata/triceCheck.c", - "Line": 1812 + "Line": 1814 }, "14494": { "File": "_test/testdata/triceCheck.c", - "Line": 1813 + "Line": 1815 }, "14495": { "File": "_test/testdata/triceCheck.c", - "Line": 1814 + "Line": 1816 }, "14496": { "File": "_test/testdata/triceCheck.c", - "Line": 1815 + "Line": 1817 }, "14497": { "File": "_test/testdata/triceCheck.c", - "Line": 1816 + "Line": 1818 }, "14498": { "File": "_test/testdata/triceCheck.c", - "Line": 1817 + "Line": 1819 }, "14499": { "File": "_test/testdata/triceCheck.c", - "Line": 1818 + "Line": 1820 }, "14500": { "File": "_test/testdata/triceCheck.c", - "Line": 1819 + "Line": 1821 }, "14501": { "File": "_test/testdata/triceCheck.c", - "Line": 1820 + "Line": 1822 }, "14502": { "File": "_test/testdata/triceCheck.c", - "Line": 1821 + "Line": 1823 }, "14503": { "File": "_test/testdata/triceCheck.c", - "Line": 1822 + "Line": 1824 }, "14504": { "File": "_test/testdata/triceCheck.c", - "Line": 1823 + "Line": 1825 }, "14505": { "File": "_test/testdata/triceCheck.c", - "Line": 1824 + "Line": 1826 }, "14506": { "File": "_test/testdata/triceCheck.c", - "Line": 1825 + "Line": 1827 }, "14507": { "File": "_test/testdata/triceCheck.c", - "Line": 1826 + "Line": 1828 }, "14508": { "File": "_test/testdata/triceCheck.c", - "Line": 1827 + "Line": 1829 }, "14509": { "File": "_test/testdata/triceCheck.c", - "Line": 1828 + "Line": 1830 }, "14510": { "File": "_test/testdata/triceCheck.c", - "Line": 1829 + "Line": 1831 }, "14511": { "File": "_test/testdata/triceCheck.c", - "Line": 1830 + "Line": 1832 }, "14512": { "File": "_test/testdata/triceCheck.c", - "Line": 1831 + "Line": 1833 }, "14513": { "File": "_test/testdata/triceCheck.c", - "Line": 1832 + "Line": 1834 }, "14514": { "File": "_test/testdata/triceCheck.c", - "Line": 1833 + "Line": 1835 }, "14515": { "File": "_test/testdata/triceCheck.c", - "Line": 1834 + "Line": 1836 }, "14516": { "File": "_test/testdata/triceCheck.c", - "Line": 1835 + "Line": 1837 }, "14517": { "File": "_test/testdata/triceCheck.c", - "Line": 1836 + "Line": 1838 }, "14518": { "File": "_test/testdata/triceCheck.c", - "Line": 1837 + "Line": 1839 }, "14519": { "File": "_test/testdata/triceCheck.c", - "Line": 1838 + "Line": 1840 }, "14520": { "File": "_test/testdata/triceCheck.c", - "Line": 1839 + "Line": 1841 }, "14521": { "File": "_test/testdata/triceCheck.c", - "Line": 1840 + "Line": 1842 }, "14522": { "File": "_test/testdata/triceCheck.c", - "Line": 1841 + "Line": 1843 }, "14523": { "File": "_test/testdata/triceCheck.c", - "Line": 1842 + "Line": 1844 }, "14524": { "File": "_test/testdata/triceCheck.c", - "Line": 1844 + "Line": 1846 }, "14525": { "File": "_test/testdata/triceCheck.c", - "Line": 1845 + "Line": 1847 }, "14526": { "File": "_test/testdata/triceCheck.c", - "Line": 1846 + "Line": 1848 }, "14527": { "File": "_test/testdata/triceCheck.c", - "Line": 1847 + "Line": 1849 }, "14528": { "File": "_test/testdata/triceCheck.c", - "Line": 1848 + "Line": 1850 }, "14529": { "File": "_test/testdata/triceCheck.c", - "Line": 1849 + "Line": 1851 }, "14530": { "File": "_test/testdata/triceCheck.c", - "Line": 1850 + "Line": 1852 }, "14531": { "File": "_test/testdata/triceCheck.c", - "Line": 1851 + "Line": 1853 }, "14532": { "File": "_test/testdata/triceCheck.c", - "Line": 1852 + "Line": 1854 }, "14533": { "File": "_test/testdata/triceCheck.c", - "Line": 1853 + "Line": 1855 }, "14534": { "File": "_test/testdata/triceCheck.c", - "Line": 1854 + "Line": 1856 }, "14535": { "File": "_test/testdata/triceCheck.c", - "Line": 1855 + "Line": 1857 }, "14536": { "File": "_test/testdata/triceCheck.c", - "Line": 1856 + "Line": 1858 }, "14537": { "File": "_test/testdata/triceCheck.c", - "Line": 1857 + "Line": 1859 }, "14538": { "File": "_test/testdata/triceCheck.c", - "Line": 1858 + "Line": 1860 }, "14539": { "File": "_test/testdata/triceCheck.c", - "Line": 1859 + "Line": 1861 }, "14540": { "File": "_test/testdata/triceCheck.c", - "Line": 1860 + "Line": 1862 }, "14541": { "File": "_test/testdata/triceCheck.c", - "Line": 1861 + "Line": 1863 }, "14542": { "File": "_test/testdata/triceCheck.c", - "Line": 1862 + "Line": 1864 }, "14543": { "File": "_test/testdata/triceCheck.c", - "Line": 1863 + "Line": 1865 }, "14544": { "File": "_test/testdata/triceCheck.c", - "Line": 1864 + "Line": 1866 }, "14545": { "File": "_test/testdata/triceCheck.c", - "Line": 1865 + "Line": 1867 }, "14546": { "File": "_test/testdata/triceCheck.c", - "Line": 1866 + "Line": 1868 }, "14547": { "File": "_test/testdata/triceCheck.c", - "Line": 1867 + "Line": 1869 }, "14548": { "File": "_test/testdata/triceCheck.c", - "Line": 1868 + "Line": 1870 }, "14549": { "File": "_test/testdata/triceCheck.c", - "Line": 1869 + "Line": 1871 }, "14550": { "File": "_test/testdata/triceCheck.c", - "Line": 1870 + "Line": 1872 }, "14551": { "File": "_test/testdata/triceCheck.c", - "Line": 1871 + "Line": 1873 }, "14552": { "File": "_test/testdata/triceCheck.c", - "Line": 1872 + "Line": 1874 }, "14553": { "File": "_test/testdata/triceCheck.c", - "Line": 1873 + "Line": 1875 }, "14554": { "File": "_test/testdata/triceCheck.c", - "Line": 1874 + "Line": 1876 }, "14555": { "File": "_test/testdata/triceCheck.c", - "Line": 1875 + "Line": 1877 }, "14556": { "File": "_test/testdata/triceCheck.c", - "Line": 1876 + "Line": 1878 }, "14557": { "File": "_test/testdata/triceCheck.c", - "Line": 1877 + "Line": 1879 }, "14558": { "File": "_test/testdata/triceCheck.c", - "Line": 1878 + "Line": 1880 }, "14559": { "File": "_test/testdata/triceCheck.c", - "Line": 1879 + "Line": 1881 }, "14560": { "File": "_test/testdata/triceCheck.c", - "Line": 1880 + "Line": 1882 }, "14561": { "File": "_test/testdata/triceCheck.c", - "Line": 1882 + "Line": 1884 }, "14562": { "File": "_test/testdata/triceCheck.c", - "Line": 1883 + "Line": 1885 }, "14563": { "File": "_test/testdata/triceCheck.c", - "Line": 1884 + "Line": 1886 }, "14564": { "File": "_test/testdata/triceCheck.c", - "Line": 1885 + "Line": 1887 }, "14565": { "File": "_test/testdata/triceCheck.c", - "Line": 1886 + "Line": 1888 }, "14566": { "File": "_test/testdata/triceCheck.c", - "Line": 1887 + "Line": 1889 }, "14567": { "File": "_test/testdata/triceCheck.c", - "Line": 1888 + "Line": 1890 }, "14568": { "File": "_test/testdata/triceCheck.c", - "Line": 1889 + "Line": 1891 }, "14569": { "File": "_test/testdata/triceCheck.c", - "Line": 1890 + "Line": 1892 }, "14570": { "File": "_test/testdata/triceCheck.c", - "Line": 1891 + "Line": 1893 }, "14571": { "File": "_test/testdata/triceCheck.c", - "Line": 1892 + "Line": 1894 }, "14572": { "File": "_test/testdata/triceCheck.c", - "Line": 1893 + "Line": 1895 }, "14573": { "File": "_test/testdata/triceCheck.c", - "Line": 1894 + "Line": 1896 }, "14574": { "File": "_test/testdata/triceCheck.c", - "Line": 1895 + "Line": 1897 }, "14575": { "File": "_test/testdata/triceCheck.c", - "Line": 1896 + "Line": 1898 }, "14576": { "File": "_test/testdata/triceCheck.c", - "Line": 1897 + "Line": 1899 }, "14577": { "File": "_test/testdata/triceCheck.c", - "Line": 1898 + "Line": 1900 }, "14578": { "File": "_test/testdata/triceCheck.c", - "Line": 1899 + "Line": 1901 }, "14579": { "File": "_test/testdata/triceCheck.c", - "Line": 1900 + "Line": 1902 }, "14580": { "File": "_test/testdata/triceCheck.c", - "Line": 1901 + "Line": 1903 }, "14581": { "File": "_test/testdata/triceCheck.c", - "Line": 1902 + "Line": 1904 }, "14582": { "File": "_test/testdata/triceCheck.c", - "Line": 1903 + "Line": 1905 }, "14583": { "File": "_test/testdata/triceCheck.c", - "Line": 1904 + "Line": 1906 }, "14584": { "File": "_test/testdata/triceCheck.c", - "Line": 1905 + "Line": 1907 }, "14585": { "File": "_test/testdata/triceCheck.c", - "Line": 1906 + "Line": 1908 }, "14586": { "File": "_test/testdata/triceCheck.c", - "Line": 1907 + "Line": 1909 }, "14587": { "File": "_test/testdata/triceCheck.c", - "Line": 1908 + "Line": 1910 }, "14588": { "File": "_test/testdata/triceCheck.c", - "Line": 1909 + "Line": 1911 }, "14589": { "File": "_test/testdata/triceCheck.c", - "Line": 1910 + "Line": 1912 }, "14590": { "File": "_test/testdata/triceCheck.c", - "Line": 1911 + "Line": 1913 }, "14591": { "File": "_test/testdata/triceCheck.c", - "Line": 1912 + "Line": 1914 }, "14592": { "File": "_test/testdata/triceCheck.c", - "Line": 1913 + "Line": 1915 }, "14593": { "File": "_test/testdata/triceCheck.c", - "Line": 1914 + "Line": 1916 }, "14594": { "File": "_test/testdata/triceCheck.c", - "Line": 1915 + "Line": 1917 }, "14595": { "File": "_test/testdata/triceCheck.c", - "Line": 1916 + "Line": 1918 }, "14596": { "File": "_test/testdata/triceCheck.c", - "Line": 1917 + "Line": 1919 }, "14597": { "File": "_test/testdata/triceCheck.c", - "Line": 1918 + "Line": 1920 }, "14598": { "File": "_test/testdata/triceCheck.c", - "Line": 1920 + "Line": 1922 }, "14599": { "File": "_test/testdata/triceCheck.c", - "Line": 1921 + "Line": 1923 }, "14600": { "File": "_test/testdata/triceCheck.c", - "Line": 1922 + "Line": 1924 }, "14601": { "File": "_test/testdata/triceCheck.c", - "Line": 1923 + "Line": 1925 }, "14602": { "File": "_test/testdata/triceCheck.c", - "Line": 1924 + "Line": 1926 }, "14603": { "File": "_test/testdata/triceCheck.c", - "Line": 1925 + "Line": 1927 }, "14604": { "File": "_test/testdata/triceCheck.c", - "Line": 1926 + "Line": 1928 }, "14605": { "File": "_test/testdata/triceCheck.c", - "Line": 1927 + "Line": 1929 }, "14606": { "File": "_test/testdata/triceCheck.c", - "Line": 1928 + "Line": 1930 }, "14607": { "File": "_test/testdata/triceCheck.c", - "Line": 1929 + "Line": 1931 }, "14608": { "File": "_test/testdata/triceCheck.c", - "Line": 1930 + "Line": 1932 }, "14609": { "File": "_test/testdata/triceCheck.c", - "Line": 1931 + "Line": 1933 }, "14610": { "File": "_test/testdata/triceCheck.c", - "Line": 1932 + "Line": 1934 }, "14611": { "File": "_test/testdata/triceCheck.c", - "Line": 1933 + "Line": 1935 }, "14612": { "File": "_test/testdata/triceCheck.c", - "Line": 1934 + "Line": 1936 }, "14613": { "File": "_test/testdata/triceCheck.c", - "Line": 1935 + "Line": 1937 }, "14614": { "File": "_test/testdata/triceCheck.c", - "Line": 1936 + "Line": 1938 }, "14615": { "File": "_test/testdata/triceCheck.c", - "Line": 1937 + "Line": 1939 }, "14616": { "File": "_test/testdata/triceCheck.c", - "Line": 1938 + "Line": 1940 }, "14617": { "File": "_test/testdata/triceCheck.c", - "Line": 1939 + "Line": 1941 }, "14618": { "File": "_test/testdata/triceCheck.c", - "Line": 1940 + "Line": 1942 }, "14619": { "File": "_test/testdata/triceCheck.c", - "Line": 1941 + "Line": 1943 }, "14620": { "File": "_test/testdata/triceCheck.c", - "Line": 1942 + "Line": 1944 }, "14621": { "File": "_test/testdata/triceCheck.c", - "Line": 1943 + "Line": 1945 }, "14622": { "File": "_test/testdata/triceCheck.c", - "Line": 1944 + "Line": 1946 }, "14623": { "File": "_test/testdata/triceCheck.c", - "Line": 1945 + "Line": 1947 }, "14624": { "File": "_test/testdata/triceCheck.c", - "Line": 1946 + "Line": 1948 }, "14625": { "File": "_test/testdata/triceCheck.c", - "Line": 1947 + "Line": 1949 }, "14626": { "File": "_test/testdata/triceCheck.c", - "Line": 1948 + "Line": 1950 }, "14627": { "File": "_test/testdata/triceCheck.c", - "Line": 1949 + "Line": 1951 }, "14628": { "File": "_test/testdata/triceCheck.c", - "Line": 1950 + "Line": 1952 }, "14629": { "File": "_test/testdata/triceCheck.c", - "Line": 1951 + "Line": 1953 }, "14630": { "File": "_test/testdata/triceCheck.c", - "Line": 1952 + "Line": 1954 }, "14631": { "File": "_test/testdata/triceCheck.c", - "Line": 1953 + "Line": 1955 }, "14632": { "File": "_test/testdata/triceCheck.c", - "Line": 1954 + "Line": 1956 }, "14633": { "File": "_test/testdata/triceCheck.c", - "Line": 1955 + "Line": 1957 }, "14634": { "File": "_test/testdata/triceCheck.c", - "Line": 1956 + "Line": 1958 }, "14635": { "File": "_test/testdata/triceCheck.c", - "Line": 1959 + "Line": 1961 }, "14636": { "File": "_test/testdata/triceCheck.c", - "Line": 1960 + "Line": 1962 }, "14637": { "File": "_test/testdata/triceCheck.c", - "Line": 1961 + "Line": 1963 }, "14638": { "File": "_test/testdata/triceCheck.c", - "Line": 1962 + "Line": 1964 }, "14639": { "File": "_test/testdata/triceCheck.c", - "Line": 1963 + "Line": 1965 }, "14640": { "File": "_test/testdata/triceCheck.c", - "Line": 1964 + "Line": 1966 }, "14641": { "File": "_test/testdata/triceCheck.c", - "Line": 1965 + "Line": 1967 }, "14642": { "File": "_test/testdata/triceCheck.c", - "Line": 1966 + "Line": 1968 }, "14643": { "File": "_test/testdata/triceCheck.c", - "Line": 1967 + "Line": 1969 }, "14644": { "File": "_test/testdata/triceCheck.c", - "Line": 1968 + "Line": 1970 }, "14645": { "File": "_test/testdata/triceCheck.c", - "Line": 1969 + "Line": 1971 }, "14646": { "File": "_test/testdata/triceCheck.c", - "Line": 1970 + "Line": 1972 }, "14647": { "File": "_test/testdata/triceCheck.c", - "Line": 1971 + "Line": 1973 }, "14648": { "File": "_test/testdata/triceCheck.c", - "Line": 1972 + "Line": 1974 }, "14649": { "File": "_test/testdata/triceCheck.c", - "Line": 1973 + "Line": 1975 }, "14650": { "File": "_test/testdata/triceCheck.c", - "Line": 1974 + "Line": 1976 }, "14651": { "File": "_test/testdata/triceCheck.c", - "Line": 1975 + "Line": 1977 }, "14652": { "File": "_test/testdata/triceCheck.c", - "Line": 1976 + "Line": 1978 }, "14653": { "File": "_test/testdata/triceCheck.c", - "Line": 1977 + "Line": 1979 }, "14654": { "File": "_test/testdata/triceCheck.c", - "Line": 1978 + "Line": 1980 }, "14655": { "File": "_test/testdata/triceCheck.c", - "Line": 1981 + "Line": 1983 }, "14656": { "File": "_test/testdata/triceCheck.c", - "Line": 1982 + "Line": 1984 }, "14657": { "File": "_test/testdata/triceCheck.c", - "Line": 1983 + "Line": 1985 }, "14658": { "File": "_test/testdata/triceCheck.c", - "Line": 1984 + "Line": 1986 }, "14659": { "File": "_test/testdata/triceCheck.c", - "Line": 1985 + "Line": 1987 }, "14660": { "File": "_test/testdata/triceCheck.c", - "Line": 1986 + "Line": 1988 }, "14661": { "File": "_test/testdata/triceCheck.c", - "Line": 1987 + "Line": 1989 }, "14662": { "File": "_test/testdata/triceCheck.c", - "Line": 1988 + "Line": 1990 }, "14663": { "File": "_test/testdata/triceCheck.c", - "Line": 1989 + "Line": 1991 }, "14664": { "File": "_test/testdata/triceCheck.c", - "Line": 1990 + "Line": 1992 }, "14665": { "File": "_test/testdata/triceCheck.c", - "Line": 1991 + "Line": 1993 }, "14666": { "File": "_test/testdata/triceCheck.c", - "Line": 1992 + "Line": 1994 }, "14667": { "File": "_test/testdata/triceCheck.c", - "Line": 1993 + "Line": 1995 }, "14668": { "File": "_test/testdata/triceCheck.c", - "Line": 1994 + "Line": 1996 }, "14669": { "File": "_test/testdata/triceCheck.c", - "Line": 1995 + "Line": 1997 }, "14670": { "File": "_test/testdata/triceCheck.c", - "Line": 1996 + "Line": 1998 }, "14671": { "File": "_test/testdata/triceCheck.c", - "Line": 1997 + "Line": 1999 }, "14672": { "File": "_test/testdata/triceCheck.c", - "Line": 1998 + "Line": 2000 }, "14673": { "File": "_test/testdata/triceCheck.c", - "Line": 1999 + "Line": 2001 }, "14674": { "File": "_test/testdata/triceCheck.c", - "Line": 2000 + "Line": 2002 }, "14675": { "File": "_test/testdata/triceCheck.c", - "Line": 2001 + "Line": 2003 }, "14676": { "File": "_test/testdata/triceCheck.c", - "Line": 2002 + "Line": 2004 }, "14677": { "File": "_test/testdata/triceCheck.c", - "Line": 2003 + "Line": 2005 }, "14678": { "File": "_test/testdata/triceCheck.c", - "Line": 2004 + "Line": 2006 }, "14679": { "File": "_test/testdata/triceCheck.c", - "Line": 2005 + "Line": 2007 }, "14680": { "File": "_test/testdata/triceCheck.c", - "Line": 2006 + "Line": 2008 }, "14681": { "File": "_test/testdata/triceCheck.c", - "Line": 2007 + "Line": 2009 }, "14682": { "File": "_test/testdata/triceCheck.c", - "Line": 2008 + "Line": 2010 }, "14683": { "File": "_test/testdata/triceCheck.c", - "Line": 2010 + "Line": 2012 }, "14684": { "File": "_test/testdata/triceCheck.c", - "Line": 2011 + "Line": 2013 }, "14685": { "File": "_test/testdata/triceCheck.c", - "Line": 2012 + "Line": 2014 }, "14686": { "File": "_test/testdata/triceCheck.c", - "Line": 2013 + "Line": 2015 }, "14687": { "File": "_test/testdata/triceCheck.c", - "Line": 2014 + "Line": 2016 }, "14688": { "File": "_test/testdata/triceCheck.c", - "Line": 2015 + "Line": 2017 }, "14689": { "File": "_test/testdata/triceCheck.c", - "Line": 2016 + "Line": 2018 }, "14690": { "File": "_test/testdata/triceCheck.c", - "Line": 2017 + "Line": 2019 }, "14691": { "File": "_test/testdata/triceCheck.c", - "Line": 2019 + "Line": 2021 }, "14692": { "File": "_test/testdata/triceCheck.c", - "Line": 2020 + "Line": 2022 }, "14693": { "File": "_test/testdata/triceCheck.c", - "Line": 2021 + "Line": 2023 }, "14694": { "File": "_test/testdata/triceCheck.c", - "Line": 2022 + "Line": 2024 }, "14695": { "File": "_test/testdata/triceCheck.c", - "Line": 2023 + "Line": 2025 }, "14696": { "File": "_test/testdata/triceCheck.c", - "Line": 2024 + "Line": 2026 }, "14697": { "File": "_test/testdata/triceCheck.c", - "Line": 2025 + "Line": 2027 }, "14698": { "File": "_test/testdata/triceCheck.c", - "Line": 2026 + "Line": 2028 }, "14699": { "File": "_test/testdata/triceCheck.c", - "Line": 2027 + "Line": 2029 }, "14700": { "File": "_test/testdata/triceCheck.c", - "Line": 2028 + "Line": 2030 }, "14701": { "File": "_test/testdata/triceCheck.c", - "Line": 2029 + "Line": 2031 }, "14702": { "File": "_test/testdata/triceCheck.c", - "Line": 2030 + "Line": 2032 }, "14703": { "File": "_test/testdata/triceCheck.c", - "Line": 2031 + "Line": 2033 }, "14704": { "File": "_test/testdata/triceCheck.c", - "Line": 2032 + "Line": 2034 }, "14705": { "File": "_test/testdata/triceCheck.c", - "Line": 2033 + "Line": 2035 }, "14706": { "File": "_test/testdata/triceCheck.c", - "Line": 2034 + "Line": 2036 }, "14707": { "File": "_test/testdata/triceCheck.c", - "Line": 2035 + "Line": 2037 }, "14708": { "File": "_test/testdata/triceCheck.c", - "Line": 2037 + "Line": 2039 }, "14709": { "File": "_test/testdata/triceCheck.c", - "Line": 2039 + "Line": 2041 }, "14710": { "File": "_test/testdata/triceCheck.c", - "Line": 2040 + "Line": 2042 }, "14711": { "File": "_test/testdata/triceCheck.c", - "Line": 2041 + "Line": 2043 }, "14712": { "File": "_test/testdata/triceCheck.c", - "Line": 2042 + "Line": 2044 }, "14713": { "File": "_test/testdata/triceCheck.c", - "Line": 2045 + "Line": 2047 }, "14714": { "File": "_test/testdata/triceCheck.c", - "Line": 2046 + "Line": 2048 }, "14715": { "File": "_test/testdata/triceCheck.c", - "Line": 2047 + "Line": 2049 }, "14716": { "File": "_test/testdata/triceCheck.c", - "Line": 2048 + "Line": 2050 }, "14717": { "File": "_test/testdata/triceCheck.c", - "Line": 2049 + "Line": 2051 }, "14718": { "File": "_test/testdata/triceCheck.c", - "Line": 2050 + "Line": 2052 }, "14719": { "File": "_test/testdata/triceCheck.c", - "Line": 2051 + "Line": 2053 }, "14720": { "File": "_test/testdata/triceCheck.c", - "Line": 2052 + "Line": 2054 }, "14721": { "File": "_test/testdata/triceCheck.c", - "Line": 2055 + "Line": 2057 }, "14722": { "File": "_test/testdata/triceCheck.c", - "Line": 2056 + "Line": 2058 }, "14723": { "File": "_test/testdata/triceCheck.c", - "Line": 2057 + "Line": 2059 }, "14724": { "File": "_test/testdata/triceCheck.c", - "Line": 2058 + "Line": 2060 }, "14725": { "File": "_test/testdata/triceCheck.c", - "Line": 2059 + "Line": 2061 }, "14726": { "File": "_test/testdata/triceCheck.c", - "Line": 2060 + "Line": 2062 }, "14727": { "File": "_test/testdata/triceCheck.c", - "Line": 2063 + "Line": 2065 }, "14728": { "File": "_test/testdata/triceCheck.c", - "Line": 2064 + "Line": 2066 }, "14729": { "File": "_test/testdata/triceCheck.c", - "Line": 2065 + "Line": 2067 }, "14730": { "File": "_test/testdata/triceCheck.c", - "Line": 2066 + "Line": 2068 }, "14731": { "File": "_test/testdata/triceCheck.c", - "Line": 2069 + "Line": 2071 }, "14732": { "File": "_test/testdata/triceCheck.c", - "Line": 2070 + "Line": 2072 }, "14733": { "File": "_test/testdata/triceCheck.c", - "Line": 2071 + "Line": 2073 }, "14734": { "File": "_test/testdata/triceCheck.c", - "Line": 2072 + "Line": 2074 }, "14735": { "File": "_test/testdata/triceCheck.c", - "Line": 2075 + "Line": 2077 }, "14736": { "File": "_test/testdata/triceCheck.c", - "Line": 2077 + "Line": 2079 }, "14737": { "File": "_test/testdata/triceCheck.c", - "Line": 2078 + "Line": 2080 }, "14738": { "File": "_test/testdata/triceCheck.c", - "Line": 2079 + "Line": 2081 }, "14739": { "File": "_test/testdata/triceCheck.c", - "Line": 2080 + "Line": 2082 }, "14740": { "File": "_test/testdata/triceCheck.c", - "Line": 2081 + "Line": 2083 }, "14741": { "File": "_test/testdata/triceCheck.c", - "Line": 2082 + "Line": 2084 }, "14742": { "File": "_test/testdata/triceCheck.c", - "Line": 2083 + "Line": 2085 }, "14743": { "File": "_test/testdata/triceCheck.c", - "Line": 2084 + "Line": 2086 }, "14744": { "File": "_test/testdata/triceCheck.c", - "Line": 2085 + "Line": 2087 }, "14745": { "File": "_test/testdata/triceCheck.c", - "Line": 2086 + "Line": 2088 }, "14746": { "File": "_test/testdata/triceCheck.c", - "Line": 2087 + "Line": 2089 }, "14747": { "File": "_test/testdata/triceCheck.c", - "Line": 2088 + "Line": 2090 }, "14748": { "File": "_test/testdata/triceCheck.c", - "Line": 2089 + "Line": 2091 }, "14749": { "File": "_test/testdata/triceCheck.c", - "Line": 2090 + "Line": 2092 }, "14750": { "File": "_test/testdata/triceCheck.c", - "Line": 2091 + "Line": 2093 }, "14751": { "File": "_test/testdata/triceCheck.c", - "Line": 2092 + "Line": 2094 }, "14752": { "File": "_test/testdata/triceCheck.c", - "Line": 2093 + "Line": 2095 }, "14753": { "File": "_test/testdata/triceCheck.c", - "Line": 2094 + "Line": 2096 }, "14754": { "File": "_test/testdata/triceCheck.c", - "Line": 2095 + "Line": 2097 }, "14755": { "File": "_test/testdata/triceCheck.c", - "Line": 2095 + "Line": 2097 }, "14756": { "File": "_test/testdata/triceCheck.c", - "Line": 2095 + "Line": 2097 }, "14757": { "File": "_test/testdata/triceCheck.c", - "Line": 2096 + "Line": 2098 }, "14758": { "File": "_test/testdata/triceCheck.c", - "Line": 2096 + "Line": 2098 }, "14759": { "File": "_test/testdata/triceCheck.c", - "Line": 2096 + "Line": 2098 }, "14760": { "File": "_test/testdata/triceCheck.c", - "Line": 2099 + "Line": 2101 }, "14761": { "File": "_test/testdata/triceCheck.c", - "Line": 2101 + "Line": 2103 }, "14762": { "File": "_test/testdata/triceCheck.c", - "Line": 2102 + "Line": 2104 }, "14763": { "File": "_test/testdata/triceCheck.c", - "Line": 2103 + "Line": 2105 }, "14764": { "File": "_test/testdata/triceCheck.c", - "Line": 2104 + "Line": 2106 }, "14765": { "File": "_test/testdata/triceCheck.c", - "Line": 2105 + "Line": 2107 }, "14766": { "File": "_test/testdata/triceCheck.c", - "Line": 2106 + "Line": 2108 }, "14767": { "File": "_test/testdata/triceCheck.c", - "Line": 2107 + "Line": 2109 }, "14768": { "File": "_test/testdata/triceCheck.c", - "Line": 2108 + "Line": 2110 }, "14769": { "File": "_test/testdata/triceCheck.c", - "Line": 2109 + "Line": 2111 }, "14770": { "File": "_test/testdata/triceCheck.c", - "Line": 2110 + "Line": 2112 }, "14771": { "File": "_test/testdata/triceCheck.c", - "Line": 2111 + "Line": 2113 }, "14772": { "File": "_test/testdata/triceCheck.c", - "Line": 2112 + "Line": 2114 }, "14773": { "File": "_test/testdata/triceCheck.c", - "Line": 2113 + "Line": 2115 }, "14774": { "File": "_test/testdata/triceCheck.c", - "Line": 2116 + "Line": 2118 }, "14775": { "File": "_test/testdata/triceCheck.c", - "Line": 2117 + "Line": 2119 }, "14776": { "File": "_test/testdata/triceCheck.c", - "Line": 2118 + "Line": 2120 }, "14777": { "File": "_test/testdata/triceCheck.c", - "Line": 2119 + "Line": 2121 }, "14778": { "File": "_test/testdata/triceCheck.c", - "Line": 2120 + "Line": 2122 }, "14779": { "File": "_test/testdata/triceCheck.c", - "Line": 2121 + "Line": 2123 }, "14780": { "File": "_test/testdata/triceCheck.c", - "Line": 2122 + "Line": 2124 }, "14781": { "File": "_test/testdata/triceCheck.c", - "Line": 2123 + "Line": 2125 }, "14782": { "File": "_test/testdata/triceCheck.c", - "Line": 2124 + "Line": 2126 }, "14783": { "File": "_test/testdata/triceCheck.c", - "Line": 2125 + "Line": 2127 }, "14784": { "File": "_test/testdata/triceCheck.c", - "Line": 2126 + "Line": 2128 }, "14785": { "File": "_test/testdata/triceCheck.c", - "Line": 2127 + "Line": 2129 }, "14786": { "File": "_test/testdata/triceCheck.c", - "Line": 2128 + "Line": 2130 }, "14787": { "File": "_test/testdata/triceCheck.c", - "Line": 2129 + "Line": 2131 }, "14788": { "File": "_test/testdata/triceCheck.c", - "Line": 2131 + "Line": 2133 }, "14789": { "File": "_test/testdata/triceCheck.c", - "Line": 2133 + "Line": 2135 }, "14790": { "File": "_test/testdata/triceCheck.c", - "Line": 2134 + "Line": 2136 }, "14791": { "File": "_test/testdata/triceCheck.c", - "Line": 2135 + "Line": 2137 }, "14792": { "File": "_test/testdata/triceCheck.c", - "Line": 2136 + "Line": 2138 }, "14793": { "File": "_test/testdata/triceCheck.c", - "Line": 2137 + "Line": 2139 }, "14794": { "File": "_test/testdata/triceCheck.c", - "Line": 2138 + "Line": 2140 }, "14795": { "File": "_test/testdata/triceCheck.c", - "Line": 2139 + "Line": 2141 }, "14796": { "File": "_test/testdata/triceCheck.c", - "Line": 2140 + "Line": 2142 }, "14797": { "File": "_test/testdata/triceCheck.c", - "Line": 2141 + "Line": 2143 }, "14798": { "File": "_test/testdata/triceCheck.c", - "Line": 2142 + "Line": 2144 }, "14799": { "File": "_test/testdata/triceCheck.c", - "Line": 2143 + "Line": 2145 }, "14800": { "File": "_test/testdata/triceCheck.c", - "Line": 2144 + "Line": 2146 }, "14801": { "File": "_test/testdata/triceCheck.c", - "Line": 2145 + "Line": 2147 }, "14802": { "File": "_test/testdata/triceCheck.c", - "Line": 2148 + "Line": 2150 }, "14803": { "File": "_test/testdata/triceCheck.c", - "Line": 2149 + "Line": 2151 }, "14804": { "File": "_test/testdata/triceCheck.c", - "Line": 2150 + "Line": 2152 }, "14805": { "File": "_test/testdata/triceCheck.c", - "Line": 2151 + "Line": 2153 }, "14806": { "File": "_test/testdata/triceCheck.c", - "Line": 2152 + "Line": 2154 }, "14807": { "File": "_test/testdata/triceCheck.c", - "Line": 2153 + "Line": 2155 }, "14808": { "File": "_test/testdata/triceCheck.c", - "Line": 2154 + "Line": 2156 }, "14809": { "File": "_test/testdata/triceCheck.c", - "Line": 2155 + "Line": 2157 }, "14810": { "File": "_test/testdata/triceCheck.c", - "Line": 2156 + "Line": 2158 }, "14811": { "File": "_test/testdata/triceCheck.c", - "Line": 2157 + "Line": 2159 }, "14812": { "File": "_test/testdata/triceCheck.c", - "Line": 2158 + "Line": 2160 }, "14813": { "File": "_test/testdata/triceCheck.c", - "Line": 2159 + "Line": 2161 }, "14814": { "File": "_test/testdata/triceCheck.c", - "Line": 2160 + "Line": 2162 }, "14815": { "File": "_test/testdata/triceCheck.c", - "Line": 2162 + "Line": 2164 }, "14816": { "File": "_test/testdata/triceCheck.c", - "Line": 2164 + "Line": 2166 }, "14817": { "File": "_test/testdata/triceCheck.c", - "Line": 2165 + "Line": 2167 }, "14818": { "File": "_test/testdata/triceCheck.c", - "Line": 2166 + "Line": 2168 }, "14819": { "File": "_test/testdata/triceCheck.c", - "Line": 2167 + "Line": 2169 }, "14820": { "File": "_test/testdata/triceCheck.c", - "Line": 2168 + "Line": 2170 }, "14821": { "File": "_test/testdata/triceCheck.c", - "Line": 2169 + "Line": 2171 }, "14822": { "File": "_test/testdata/triceCheck.c", - "Line": 2170 + "Line": 2172 }, "14823": { "File": "_test/testdata/triceCheck.c", - "Line": 2171 + "Line": 2173 }, "14824": { "File": "_test/testdata/triceCheck.c", - "Line": 2172 + "Line": 2174 }, "14825": { "File": "_test/testdata/triceCheck.c", - "Line": 2173 + "Line": 2175 }, "14826": { "File": "_test/testdata/triceCheck.c", - "Line": 2174 + "Line": 2176 }, "14827": { "File": "_test/testdata/triceCheck.c", - "Line": 2175 + "Line": 2177 }, "14828": { "File": "_test/testdata/triceCheck.c", - "Line": 2176 + "Line": 2178 }, "14829": { "File": "_test/testdata/triceCheck.c", - "Line": 2179 + "Line": 2181 }, "14830": { "File": "_test/testdata/triceCheck.c", - "Line": 2180 + "Line": 2182 }, "14831": { "File": "_test/testdata/triceCheck.c", - "Line": 2181 + "Line": 2183 }, "14832": { "File": "_test/testdata/triceCheck.c", - "Line": 2182 + "Line": 2184 }, "14833": { "File": "_test/testdata/triceCheck.c", - "Line": 2183 + "Line": 2185 }, "14834": { "File": "_test/testdata/triceCheck.c", - "Line": 2184 + "Line": 2186 }, "14835": { "File": "_test/testdata/triceCheck.c", - "Line": 2185 + "Line": 2187 }, "14836": { "File": "_test/testdata/triceCheck.c", - "Line": 2186 + "Line": 2188 }, "14837": { "File": "_test/testdata/triceCheck.c", - "Line": 2187 + "Line": 2189 }, "14838": { "File": "_test/testdata/triceCheck.c", - "Line": 2188 + "Line": 2190 }, "14839": { "File": "_test/testdata/triceCheck.c", - "Line": 2189 + "Line": 2191 }, "14840": { "File": "_test/testdata/triceCheck.c", - "Line": 2190 + "Line": 2192 }, "14841": { "File": "_test/testdata/triceCheck.c", - "Line": 2191 + "Line": 2193 }, "14842": { "File": "_test/testdata/triceCheck.c", - "Line": 2192 + "Line": 2194 }, "14843": { "File": "_test/testdata/triceCheck.c", - "Line": 2194 + "Line": 2196 }, "14844": { "File": "_test/testdata/triceCheck.c", - "Line": 2195 + "Line": 2197 }, "14845": { "File": "_test/testdata/triceCheck.c", - "Line": 2196 + "Line": 2198 }, "14846": { "File": "_test/testdata/triceCheck.c", - "Line": 2197 + "Line": 2199 }, "14847": { "File": "_test/testdata/triceCheck.c", - "Line": 2198 + "Line": 2200 }, "14848": { "File": "_test/testdata/triceCheck.c", - "Line": 2199 + "Line": 2201 }, "14849": { "File": "_test/testdata/triceCheck.c", - "Line": 2200 + "Line": 2202 }, "14850": { "File": "_test/testdata/triceCheck.c", - "Line": 2201 + "Line": 2203 }, "14851": { "File": "_test/testdata/triceCheck.c", - "Line": 2202 + "Line": 2204 }, "14852": { "File": "_test/testdata/triceCheck.c", - "Line": 2203 + "Line": 2205 }, "14853": { "File": "_test/testdata/triceCheck.c", - "Line": 2204 + "Line": 2206 }, "14854": { "File": "_test/testdata/triceCheck.c", - "Line": 2205 + "Line": 2207 }, "14855": { "File": "_test/testdata/triceCheck.c", - "Line": 2206 + "Line": 2208 }, "14856": { "File": "_test/testdata/triceCheck.c", - "Line": 2207 + "Line": 2209 }, "14857": { "File": "_test/testdata/triceCheck.c", - "Line": 2208 + "Line": 2210 }, "14858": { "File": "_test/testdata/triceCheck.c", - "Line": 2209 + "Line": 2211 }, "14859": { "File": "_test/testdata/triceCheck.c", - "Line": 2210 + "Line": 2212 }, "14860": { "File": "_test/testdata/triceCheck.c", - "Line": 2211 + "Line": 2213 }, "14861": { "File": "_test/testdata/triceCheck.c", - "Line": 2212 + "Line": 2214 }, "14862": { "File": "_test/testdata/triceCheck.c", - "Line": 2213 + "Line": 2215 }, "14863": { "File": "_test/testdata/triceCheck.c", - "Line": 2214 + "Line": 2216 }, "14864": { "File": "_test/testdata/triceCheck.c", - "Line": 2215 + "Line": 2217 }, "14865": { "File": "_test/testdata/triceCheck.c", - "Line": 2216 + "Line": 2218 }, "14866": { "File": "_test/testdata/triceCheck.c", - "Line": 2217 + "Line": 2219 }, "14867": { "File": "_test/testdata/triceCheck.c", - "Line": 2218 + "Line": 2220 }, "14868": { "File": "_test/testdata/triceCheck.c", - "Line": 2219 + "Line": 2221 }, "14869": { "File": "_test/testdata/triceCheck.c", - "Line": 2220 + "Line": 2222 }, "14870": { "File": "_test/testdata/triceCheck.c", - "Line": 2222 + "Line": 2224 }, "14871": { "File": "_test/testdata/triceCheck.c", - "Line": 2224 + "Line": 2226 }, "14872": { "File": "_test/testdata/triceCheck.c", - "Line": 2225 + "Line": 2227 }, "14873": { "File": "_test/testdata/triceCheck.c", - "Line": 2226 + "Line": 2228 }, "14874": { "File": "_test/testdata/triceCheck.c", - "Line": 2227 + "Line": 2229 }, "14875": { "File": "_test/testdata/triceCheck.c", - "Line": 2228 + "Line": 2230 }, "14876": { "File": "_test/testdata/triceCheck.c", - "Line": 2229 + "Line": 2231 }, "14877": { "File": "_test/testdata/triceCheck.c", - "Line": 2230 + "Line": 2232 }, "14878": { "File": "_test/testdata/triceCheck.c", - "Line": 2231 + "Line": 2233 }, "14879": { "File": "_test/testdata/triceCheck.c", - "Line": 2232 + "Line": 2234 }, "14880": { "File": "_test/testdata/triceCheck.c", - "Line": 2233 + "Line": 2235 }, "14881": { "File": "_test/testdata/triceCheck.c", - "Line": 2234 + "Line": 2236 }, "14882": { "File": "_test/testdata/triceCheck.c", - "Line": 2235 + "Line": 2237 }, "14883": { "File": "_test/testdata/triceCheck.c", - "Line": 2236 + "Line": 2238 }, "14884": { "File": "_test/testdata/triceCheck.c", - "Line": 2237 + "Line": 2239 }, "14885": { "File": "_test/testdata/triceCheck.c", - "Line": 2238 + "Line": 2240 }, "14886": { "File": "_test/testdata/triceCheck.c", - "Line": 2239 + "Line": 2241 }, "14887": { "File": "_test/testdata/triceCheck.c", - "Line": 2240 + "Line": 2242 }, "14888": { "File": "_test/testdata/triceCheck.c", - "Line": 2241 + "Line": 2243 }, "14889": { "File": "_test/testdata/triceCheck.c", - "Line": 2242 + "Line": 2244 }, "14890": { "File": "_test/testdata/triceCheck.c", - "Line": 2243 + "Line": 2245 }, "14891": { "File": "_test/testdata/triceCheck.c", - "Line": 2244 + "Line": 2246 }, "14892": { "File": "_test/testdata/triceCheck.c", - "Line": 2245 + "Line": 2247 }, "14893": { "File": "_test/testdata/triceCheck.c", - "Line": 2246 + "Line": 2248 }, "14894": { "File": "_test/testdata/triceCheck.c", - "Line": 2247 + "Line": 2249 }, "14895": { "File": "_test/testdata/triceCheck.c", - "Line": 2248 + "Line": 2250 }, "14896": { "File": "_test/testdata/triceCheck.c", - "Line": 2249 + "Line": 2251 }, "14897": { "File": "_test/testdata/triceCheck.c", - "Line": 2250 + "Line": 2252 }, "14898": { "File": "_test/testdata/triceCheck.c", - "Line": 2251 + "Line": 2253 }, "14899": { "File": "_test/testdata/triceCheck.c", - "Line": 2252 + "Line": 2254 }, "14900": { "File": "_test/testdata/triceCheck.c", - "Line": 2253 + "Line": 2255 }, "14901": { "File": "_test/testdata/triceCheck.c", - "Line": 2256 + "Line": 2258 }, "14902": { "File": "_test/testdata/triceCheck.c", - "Line": 2257 + "Line": 2259 }, "14903": { "File": "_test/testdata/triceCheck.c", - "Line": 2258 + "Line": 2260 }, "14904": { "File": "_test/testdata/triceCheck.c", - "Line": 2259 + "Line": 2261 }, "14905": { "File": "_test/testdata/triceCheck.c", - "Line": 2260 + "Line": 2262 }, "14906": { "File": "_test/testdata/triceCheck.c", - "Line": 2261 + "Line": 2263 }, "14907": { "File": "_test/testdata/triceCheck.c", - "Line": 2262 + "Line": 2264 }, "14908": { "File": "_test/testdata/triceCheck.c", - "Line": 2263 + "Line": 2265 }, "14909": { "File": "_test/testdata/triceCheck.c", - "Line": 2264 + "Line": 2266 }, "14910": { "File": "_test/testdata/triceCheck.c", - "Line": 2265 + "Line": 2267 }, "14911": { "File": "_test/testdata/triceCheck.c", - "Line": 2266 + "Line": 2268 }, "14912": { "File": "_test/testdata/triceCheck.c", - "Line": 2267 + "Line": 2269 }, "14913": { "File": "_test/testdata/triceCheck.c", - "Line": 2268 + "Line": 2270 }, "14914": { "File": "_test/testdata/triceCheck.c", - "Line": 2269 + "Line": 2271 }, "14915": { "File": "_test/testdata/triceCheck.c", - "Line": 2270 + "Line": 2272 }, "14916": { "File": "_test/testdata/triceCheck.c", - "Line": 2271 + "Line": 2273 }, "14917": { "File": "_test/testdata/triceCheck.c", - "Line": 2272 + "Line": 2274 }, "14918": { "File": "_test/testdata/triceCheck.c", - "Line": 2273 + "Line": 2275 }, "14919": { "File": "_test/testdata/triceCheck.c", - "Line": 2274 + "Line": 2276 }, "14920": { "File": "_test/testdata/triceCheck.c", - "Line": 2275 + "Line": 2277 }, "14921": { "File": "_test/testdata/triceCheck.c", - "Line": 2276 + "Line": 2278 }, "14922": { "File": "_test/testdata/triceCheck.c", - "Line": 2277 + "Line": 2279 }, "14923": { "File": "_test/testdata/triceCheck.c", - "Line": 2278 + "Line": 2280 }, "14924": { "File": "_test/testdata/triceCheck.c", - "Line": 2279 + "Line": 2281 }, "14925": { "File": "_test/testdata/triceCheck.c", - "Line": 2280 + "Line": 2282 }, "14926": { "File": "_test/testdata/triceCheck.c", - "Line": 2281 + "Line": 2283 }, "14927": { "File": "_test/testdata/triceCheck.c", - "Line": 2282 + "Line": 2284 }, "14928": { "File": "_test/testdata/triceCheck.c", - "Line": 2283 + "Line": 2285 }, "14929": { "File": "_test/testdata/triceCheck.c", - "Line": 2284 + "Line": 2286 }, "14930": { "File": "_test/testdata/triceCheck.c", - "Line": 2285 + "Line": 2287 }, "14931": { "File": "_test/testdata/triceCheck.c", - "Line": 2286 + "Line": 2288 }, "14932": { "File": "_test/testdata/triceCheck.c", - "Line": 2287 + "Line": 2289 }, "14933": { "File": "_test/testdata/triceCheck.c", - "Line": 2288 + "Line": 2290 }, "14934": { "File": "_test/testdata/triceCheck.c", - "Line": 2289 + "Line": 2291 }, "14935": { "File": "_test/testdata/triceCheck.c", - "Line": 2290 + "Line": 2292 }, "14936": { "File": "_test/testdata/triceCheck.c", - "Line": 2291 + "Line": 2293 }, "14937": { "File": "_test/testdata/triceCheck.c", - "Line": 2292 + "Line": 2294 }, "14938": { "File": "_test/testdata/triceCheck.c", - "Line": 2293 + "Line": 2295 }, "14939": { "File": "_test/testdata/triceCheck.c", - "Line": 2294 + "Line": 2296 }, "14940": { "File": "_test/testdata/triceCheck.c", - "Line": 2295 + "Line": 2297 }, "14941": { "File": "_test/testdata/triceCheck.c", - "Line": 2296 + "Line": 2298 }, "14942": { "File": "_test/testdata/triceCheck.c", - "Line": 2297 + "Line": 2299 }, "14943": { "File": "_test/testdata/triceCheck.c", - "Line": 2298 + "Line": 2300 }, "14944": { "File": "_test/testdata/triceCheck.c", - "Line": 2299 + "Line": 2301 }, "14945": { "File": "_test/testdata/triceCheck.c", - "Line": 2301 + "Line": 2303 }, "14946": { "File": "_test/testdata/triceCheck.c", - "Line": 2303 + "Line": 2305 }, "14947": { "File": "_test/testdata/triceCheck.c", - "Line": 2304 + "Line": 2306 }, "14948": { "File": "_test/testdata/triceCheck.c", - "Line": 2305 + "Line": 2307 }, "14949": { "File": "_test/testdata/triceCheck.c", - "Line": 2306 + "Line": 2308 }, "14950": { "File": "_test/testdata/triceCheck.c", - "Line": 2307 + "Line": 2309 }, "14951": { "File": "_test/testdata/triceCheck.c", - "Line": 2308 + "Line": 2310 }, "14952": { "File": "_test/testdata/triceCheck.c", - "Line": 2310 + "Line": 2312 }, "14953": { "File": "_test/testdata/triceCheck.c", - "Line": 2312 + "Line": 2314 }, "14954": { "File": "_test/testdata/triceCheck.c", - "Line": 2313 + "Line": 2315 }, "14955": { "File": "_test/testdata/triceCheck.c", - "Line": 2314 + "Line": 2316 }, "14956": { "File": "_test/testdata/triceCheck.c", - "Line": 2315 + "Line": 2317 }, "14957": { "File": "_test/testdata/triceCheck.c", - "Line": 2316 + "Line": 2318 }, "14958": { "File": "_test/testdata/triceCheck.c", - "Line": 2317 + "Line": 2319 }, "14959": { "File": "_test/testdata/triceCheck.c", - "Line": 2319 + "Line": 2321 }, "14960": { "File": "_test/testdata/triceCheck.c", - "Line": 2321 + "Line": 2323 }, "14961": { "File": "_test/testdata/triceCheck.c", - "Line": 2322 + "Line": 2324 }, "14962": { "File": "_test/testdata/triceCheck.c", - "Line": 2323 + "Line": 2325 }, "14963": { "File": "_test/testdata/triceCheck.c", - "Line": 2324 + "Line": 2326 }, "14964": { "File": "_test/testdata/triceCheck.c", - "Line": 2325 + "Line": 2327 }, "14965": { "File": "_test/testdata/triceCheck.c", - "Line": 2326 + "Line": 2328 }, "14966": { "File": "_test/testdata/triceCheck.c", - "Line": 2327 + "Line": 2329 }, "14967": { "File": "_test/testdata/triceCheck.c", - "Line": 2328 + "Line": 2330 }, "14968": { "File": "_test/testdata/triceCheck.c", - "Line": 2329 + "Line": 2331 }, "14969": { "File": "_test/testdata/triceCheck.c", - "Line": 2332 + "Line": 2334 }, "14970": { "File": "_test/testdata/triceCheck.c", - "Line": 2333 + "Line": 2335 }, "14971": { "File": "_test/testdata/triceCheck.c", - "Line": 2334 + "Line": 2336 }, "14972": { "File": "_test/testdata/triceCheck.c", - "Line": 2335 + "Line": 2337 }, "14973": { "File": "_test/testdata/triceCheck.c", - "Line": 2336 + "Line": 2338 }, "14974": { "File": "_test/testdata/triceCheck.c", - "Line": 2337 + "Line": 2339 }, "14975": { "File": "_test/testdata/triceCheck.c", - "Line": 2338 + "Line": 2340 }, "14976": { "File": "_test/testdata/triceCheck.c", - "Line": 2339 + "Line": 2341 }, "14977": { "File": "_test/testdata/triceCheck.c", - "Line": 2340 + "Line": 2342 }, "14978": { "File": "_test/testdata/triceCheck.c", - "Line": 2341 + "Line": 2343 }, "14979": { "File": "_test/testdata/triceCheck.c", - "Line": 2342 + "Line": 2344 }, "14980": { "File": "_test/testdata/triceCheck.c", - "Line": 2343 + "Line": 2345 }, "14981": { "File": "_test/testdata/triceCheck.c", - "Line": 2344 + "Line": 2346 }, "14982": { "File": "_test/testdata/triceCheck.c", - "Line": 2345 + "Line": 2347 }, "14983": { "File": "_test/testdata/triceCheck.c", - "Line": 2347 + "Line": 2349 }, "14984": { "File": "_test/testdata/triceCheck.c", - "Line": 2348 + "Line": 2350 }, "14985": { "File": "_test/testdata/triceCheck.c", - "Line": 2349 + "Line": 2351 }, "14986": { "File": "_test/testdata/triceCheck.c", - "Line": 2350 + "Line": 2352 }, "14987": { "File": "_test/testdata/triceCheck.c", - "Line": 2351 + "Line": 2353 }, "14988": { "File": "_test/testdata/triceCheck.c", - "Line": 2352 + "Line": 2354 }, "14989": { "File": "_test/testdata/triceCheck.c", - "Line": 2353 + "Line": 2355 }, "14990": { "File": "_test/testdata/triceCheck.c", - "Line": 2354 + "Line": 2356 }, "14991": { "File": "_test/testdata/triceCheck.c", - "Line": 2355 + "Line": 2357 }, "14992": { "File": "_test/testdata/triceCheck.c", - "Line": 2356 + "Line": 2358 }, "14993": { "File": "_test/testdata/triceCheck.c", - "Line": 2357 + "Line": 2359 }, "14994": { "File": "_test/testdata/triceCheck.c", - "Line": 2358 + "Line": 2360 }, "14995": { "File": "_test/testdata/triceCheck.c", - "Line": 2359 + "Line": 2361 }, "14996": { "File": "_test/testdata/triceCheck.c", - "Line": 2360 + "Line": 2362 }, "14997": { "File": "_test/testdata/triceCheck.c", - "Line": 2361 + "Line": 2363 }, "14998": { "File": "_test/testdata/triceCheck.c", - "Line": 2362 + "Line": 2364 }, "14999": { "File": "_test/testdata/triceCheck.c", - "Line": 2363 + "Line": 2365 }, "15000": { "File": "_test/testdata/triceCheck.c", - "Line": 2364 + "Line": 2366 }, "15001": { "File": "_test/testdata/triceCheck.c", - "Line": 2365 + "Line": 2367 }, "15002": { "File": "_test/testdata/triceCheck.c", - "Line": 2366 + "Line": 2368 }, "15003": { "File": "_test/testdata/triceCheck.c", - "Line": 2367 + "Line": 2369 }, "15004": { "File": "_test/testdata/triceCheck.c", - "Line": 2368 + "Line": 2370 }, "15005": { "File": "_test/testdata/triceCheck.c", - "Line": 2369 + "Line": 2371 }, "15006": { "File": "_test/testdata/triceCheck.c", - "Line": 2370 + "Line": 2372 }, "15007": { "File": "_test/testdata/triceCheck.c", - "Line": 2371 + "Line": 2373 }, "15008": { "File": "_test/testdata/triceCheck.c", - "Line": 2372 + "Line": 2374 }, "15009": { "File": "_test/testdata/triceCheck.c", - "Line": 2373 + "Line": 2375 }, "15010": { "File": "_test/testdata/triceCheck.c", - "Line": 2374 + "Line": 2376 }, "15011": { "File": "_test/testdata/triceCheck.c", - "Line": 2375 + "Line": 2377 }, "15012": { "File": "_test/testdata/triceCheck.c", - "Line": 2376 + "Line": 2378 }, "15013": { "File": "_test/testdata/triceCheck.c", - "Line": 2378 + "Line": 2380 }, "15014": { "File": "_test/testdata/triceCheck.c", - "Line": 2379 + "Line": 2381 }, "15015": { "File": "_test/testdata/triceCheck.c", - "Line": 2380 + "Line": 2382 }, "15016": { "File": "_test/testdata/triceCheck.c", - "Line": 2381 + "Line": 2383 }, "15017": { "File": "_test/testdata/triceCheck.c", - "Line": 2382 + "Line": 2384 }, "15018": { "File": "_test/testdata/triceCheck.c", - "Line": 2383 + "Line": 2385 }, "15019": { "File": "_test/testdata/triceCheck.c", - "Line": 2384 + "Line": 2386 }, "15020": { "File": "_test/testdata/triceCheck.c", - "Line": 2385 + "Line": 2387 }, "15021": { "File": "_test/testdata/triceCheck.c", - "Line": 2386 + "Line": 2388 }, "15022": { "File": "_test/testdata/triceCheck.c", - "Line": 2387 + "Line": 2389 }, "15023": { "File": "_test/testdata/triceCheck.c", - "Line": 2388 + "Line": 2390 }, "15024": { "File": "_test/testdata/triceCheck.c", - "Line": 2389 + "Line": 2391 }, "15025": { "File": "_test/testdata/triceCheck.c", - "Line": 2390 + "Line": 2392 }, "15026": { "File": "_test/testdata/triceCheck.c", - "Line": 2391 + "Line": 2393 }, "15027": { "File": "_test/testdata/triceCheck.c", - "Line": 2392 + "Line": 2394 }, "15028": { "File": "_test/testdata/triceCheck.c", - "Line": 2393 + "Line": 2395 }, "15029": { "File": "_test/testdata/triceCheck.c", - "Line": 2394 + "Line": 2396 }, "15030": { "File": "_test/testdata/triceCheck.c", - "Line": 2395 + "Line": 2397 }, "15031": { "File": "_test/testdata/triceCheck.c", - "Line": 2396 + "Line": 2398 }, "15032": { "File": "_test/testdata/triceCheck.c", - "Line": 2397 + "Line": 2399 }, "15033": { "File": "_test/testdata/triceCheck.c", - "Line": 2398 + "Line": 2400 }, "15034": { "File": "_test/testdata/triceCheck.c", - "Line": 2399 + "Line": 2401 }, "15035": { "File": "_test/testdata/triceCheck.c", - "Line": 2400 + "Line": 2402 }, "15036": { "File": "_test/testdata/triceCheck.c", - "Line": 2401 + "Line": 2403 }, "15037": { "File": "_test/testdata/triceCheck.c", - "Line": 2402 + "Line": 2404 }, "15038": { "File": "_test/testdata/triceCheck.c", - "Line": 2403 + "Line": 2405 }, "15039": { "File": "_test/testdata/triceCheck.c", - "Line": 2404 + "Line": 2406 }, "15040": { "File": "_test/testdata/triceCheck.c", - "Line": 2405 + "Line": 2407 }, "15041": { "File": "_test/testdata/triceCheck.c", - "Line": 2406 + "Line": 2408 }, "15042": { "File": "_test/testdata/triceCheck.c", - "Line": 2407 + "Line": 2409 }, "15043": { "File": "_test/testdata/triceCheck.c", - "Line": 2409 + "Line": 2411 }, "15044": { "File": "_test/testdata/triceCheck.c", - "Line": 2410 + "Line": 2412 }, "15045": { "File": "_test/testdata/triceCheck.c", - "Line": 2411 + "Line": 2413 }, "15046": { "File": "_test/testdata/triceCheck.c", - "Line": 2412 + "Line": 2414 }, "15047": { "File": "_test/testdata/triceCheck.c", - "Line": 2413 + "Line": 2415 }, "15048": { "File": "_test/testdata/triceCheck.c", - "Line": 2414 + "Line": 2416 }, "15049": { "File": "_test/testdata/triceCheck.c", - "Line": 2415 + "Line": 2417 }, "15050": { "File": "_test/testdata/triceCheck.c", - "Line": 2416 + "Line": 2418 }, "15051": { "File": "_test/testdata/triceCheck.c", - "Line": 2417 + "Line": 2419 }, "15052": { "File": "_test/testdata/triceCheck.c", - "Line": 2418 + "Line": 2420 }, "15053": { "File": "_test/testdata/triceCheck.c", - "Line": 2419 + "Line": 2421 }, "15054": { "File": "_test/testdata/triceCheck.c", - "Line": 2420 + "Line": 2422 }, "15055": { "File": "_test/testdata/triceCheck.c", - "Line": 2421 + "Line": 2423 }, "15056": { "File": "_test/testdata/triceCheck.c", - "Line": 2423 + "Line": 2425 }, "15057": { "File": "_test/testdata/triceCheck.c", - "Line": 2424 + "Line": 2426 }, "15058": { "File": "_test/testdata/triceCheck.c", - "Line": 2425 + "Line": 2427 }, "15059": { "File": "_test/testdata/triceCheck.c", - "Line": 2426 + "Line": 2428 }, "15060": { "File": "_test/testdata/triceCheck.c", - "Line": 2427 + "Line": 2429 }, "15061": { "File": "_test/testdata/triceCheck.c", - "Line": 2428 + "Line": 2430 }, "15062": { "File": "_test/testdata/triceCheck.c", - "Line": 2429 + "Line": 2431 }, "15063": { "File": "_test/testdata/triceCheck.c", - "Line": 2430 + "Line": 2432 }, "15064": { "File": "_test/testdata/triceCheck.c", - "Line": 2431 + "Line": 2433 }, "15065": { "File": "_test/testdata/triceCheck.c", - "Line": 2432 + "Line": 2434 }, "15066": { "File": "_test/testdata/triceCheck.c", - "Line": 2433 + "Line": 2435 }, "15067": { "File": "_test/testdata/triceCheck.c", - "Line": 2434 + "Line": 2436 }, "15068": { "File": "_test/testdata/triceCheck.c", - "Line": 2435 + "Line": 2437 }, "15069": { "File": "_test/testdata/triceCheck.c", - "Line": 2437 + "Line": 2439 }, "15070": { "File": "_test/testdata/triceCheck.c", - "Line": 2439 + "Line": 2441 }, "15071": { "File": "_test/testdata/triceCheck.c", - "Line": 2440 + "Line": 2442 }, "15072": { "File": "_test/testdata/triceCheck.c", - "Line": 2441 + "Line": 2443 }, "15073": { "File": "_test/testdata/triceCheck.c", - "Line": 2442 + "Line": 2444 }, "15074": { "File": "_test/testdata/triceCheck.c", - "Line": 2443 + "Line": 2445 }, "15075": { "File": "_test/testdata/triceCheck.c", - "Line": 2444 + "Line": 2446 }, "15076": { "File": "_test/testdata/triceCheck.c", - "Line": 2445 + "Line": 2447 }, "15077": { "File": "_test/testdata/triceCheck.c", - "Line": 2446 + "Line": 2448 }, "15078": { "File": "_test/testdata/triceCheck.c", - "Line": 2447 + "Line": 2449 }, "15079": { "File": "_test/testdata/triceCheck.c", - "Line": 2448 + "Line": 2450 }, "15080": { "File": "_test/testdata/triceCheck.c", - "Line": 2449 + "Line": 2451 }, "15081": { "File": "_test/testdata/triceCheck.c", - "Line": 2450 + "Line": 2452 }, "15082": { "File": "_test/testdata/triceCheck.c", - "Line": 2452 + "Line": 2454 }, "15083": { "File": "_test/testdata/triceCheck.c", - "Line": 2454 + "Line": 2456 }, "15084": { "File": "_test/testdata/triceCheck.c", - "Line": 2455 + "Line": 2457 }, "15085": { "File": "_test/testdata/triceCheck.c", - "Line": 2456 + "Line": 2458 }, "15086": { "File": "_test/testdata/triceCheck.c", - "Line": 2457 + "Line": 2459 }, "15087": { "File": "_test/testdata/triceCheck.c", - "Line": 2458 + "Line": 2460 }, "15088": { "File": "_test/testdata/triceCheck.c", - "Line": 2459 + "Line": 2461 }, "15089": { "File": "_test/testdata/triceCheck.c", - "Line": 2460 + "Line": 2462 }, "15090": { "File": "_test/testdata/triceCheck.c", - "Line": 2461 + "Line": 2463 }, "15091": { "File": "_test/testdata/triceCheck.c", - "Line": 2462 + "Line": 2464 }, "15092": { "File": "_test/testdata/triceCheck.c", - "Line": 2463 + "Line": 2465 }, "15093": { "File": "_test/testdata/triceCheck.c", - "Line": 2464 + "Line": 2466 }, "15094": { "File": "_test/testdata/triceCheck.c", - "Line": 2465 + "Line": 2467 }, "15095": { "File": "_test/testdata/triceCheck.c", - "Line": 2468 + "Line": 2470 }, "15096": { "File": "_test/testdata/triceCheck.c", - "Line": 2469 + "Line": 2471 }, "15097": { "File": "_test/testdata/triceCheck.c", - "Line": 2470 + "Line": 2472 }, "15098": { "File": "_test/testdata/triceCheck.c", - "Line": 2471 + "Line": 2473 }, "15099": { "File": "_test/testdata/triceCheck.c", - "Line": 2472 + "Line": 2474 }, "15100": { "File": "_test/testdata/triceCheck.c", - "Line": 2473 + "Line": 2475 }, "15101": { "File": "_test/testdata/triceCheck.c", - "Line": 2474 + "Line": 2476 }, "15102": { "File": "_test/testdata/triceCheck.c", - "Line": 2476 + "Line": 2478 }, "15103": { "File": "_test/testdata/triceCheck.c", - "Line": 2477 + "Line": 2479 }, "15104": { "File": "_test/testdata/triceCheck.c", - "Line": 2478 + "Line": 2480 }, "15105": { "File": "_test/testdata/triceCheck.c", - "Line": 2479 + "Line": 2481 }, "15106": { "File": "_test/testdata/triceCheck.c", - "Line": 2480 + "Line": 2482 }, "15107": { "File": "_test/testdata/triceCheck.c", - "Line": 2481 + "Line": 2483 }, "15108": { "File": "_test/testdata/triceCheck.c", - "Line": 2482 + "Line": 2484 }, "15109": { "File": "_test/testdata/triceCheck.c", - "Line": 2484 + "Line": 2486 }, "15110": { "File": "_test/testdata/triceCheck.c", - "Line": 2485 + "Line": 2487 }, "15111": { "File": "_test/testdata/triceCheck.c", - "Line": 2486 + "Line": 2488 }, "15112": { "File": "_test/testdata/triceCheck.c", - "Line": 2487 + "Line": 2489 }, "15113": { "File": "_test/testdata/triceCheck.c", - "Line": 2488 + "Line": 2490 }, "15114": { "File": "_test/testdata/triceCheck.c", - "Line": 2489 + "Line": 2491 }, "15115": { "File": "_test/testdata/triceCheck.c", - "Line": 2490 + "Line": 2492 }, "15116": { "File": "_test/testdata/triceCheck.c", - "Line": 2492 + "Line": 2494 }, "15117": { "File": "_test/testdata/triceCheck.c", - "Line": 2493 + "Line": 2495 }, "15118": { "File": "_test/testdata/triceCheck.c", - "Line": 2494 + "Line": 2496 }, "15119": { "File": "_test/testdata/triceCheck.c", - "Line": 2495 + "Line": 2497 }, "15120": { "File": "_test/testdata/triceCheck.c", - "Line": 2496 + "Line": 2498 }, "15121": { "File": "_test/testdata/triceCheck.c", - "Line": 2497 + "Line": 2499 }, "15122": { "File": "_test/testdata/triceCheck.c", - "Line": 2498 + "Line": 2500 }, "15123": { "File": "_test/testdata/triceCheck.c", - "Line": 2500 + "Line": 2502 }, "15124": { "File": "_test/testdata/triceCheck.c", - "Line": 2501 + "Line": 2503 }, "15125": { "File": "_test/testdata/triceCheck.c", - "Line": 2502 + "Line": 2504 }, "15126": { "File": "_test/testdata/triceCheck.c", - "Line": 2503 + "Line": 2505 }, "15127": { "File": "_test/testdata/triceCheck.c", - "Line": 2504 + "Line": 2506 }, "15128": { "File": "_test/testdata/triceCheck.c", - "Line": 2505 + "Line": 2507 }, "15129": { "File": "_test/testdata/triceCheck.c", - "Line": 2506 + "Line": 2508 }, "15130": { "File": "_test/testdata/triceCheck.c", - "Line": 2508 + "Line": 2510 }, "15131": { "File": "_test/testdata/triceCheck.c", - "Line": 2509 + "Line": 2511 }, "15132": { "File": "_test/testdata/triceCheck.c", - "Line": 2510 + "Line": 2512 }, "15133": { "File": "_test/testdata/triceCheck.c", - "Line": 2511 + "Line": 2513 }, "15134": { "File": "_test/testdata/triceCheck.c", - "Line": 2512 + "Line": 2514 }, "15135": { "File": "_test/testdata/triceCheck.c", - "Line": 2513 + "Line": 2515 }, "15136": { "File": "_test/testdata/triceCheck.c", - "Line": 2514 + "Line": 2516 }, "15137": { "File": "_test/testdata/triceCheck.c", - "Line": 2516 + "Line": 2518 }, "15138": { "File": "_test/testdata/triceCheck.c", - "Line": 2517 + "Line": 2519 }, "15139": { "File": "_test/testdata/triceCheck.c", - "Line": 2518 + "Line": 2520 }, "15140": { "File": "_test/testdata/triceCheck.c", - "Line": 2519 + "Line": 2521 }, "15141": { "File": "_test/testdata/triceCheck.c", - "Line": 2520 + "Line": 2522 }, "15142": { "File": "_test/testdata/triceCheck.c", - "Line": 2521 + "Line": 2523 }, "15143": { "File": "_test/testdata/triceCheck.c", - "Line": 2522 + "Line": 2524 }, "15144": { "File": "_test/testdata/triceCheck.c", - "Line": 2524 + "Line": 2526 }, "15145": { "File": "_test/testdata/triceCheck.c", - "Line": 2525 + "Line": 2527 }, "15146": { "File": "_test/testdata/triceCheck.c", - "Line": 2526 + "Line": 2528 }, "15147": { "File": "_test/testdata/triceCheck.c", - "Line": 2527 + "Line": 2529 }, "15148": { "File": "_test/testdata/triceCheck.c", - "Line": 2528 + "Line": 2530 }, "15149": { "File": "_test/testdata/triceCheck.c", - "Line": 2529 + "Line": 2531 }, "15150": { "File": "_test/testdata/triceCheck.c", - "Line": 2530 + "Line": 2532 }, "15151": { "File": "_test/testdata/triceCheck.c", - "Line": 2532 + "Line": 2534 }, "15152": { "File": "_test/testdata/triceCheck.c", - "Line": 2533 + "Line": 2535 }, "15153": { "File": "_test/testdata/triceCheck.c", - "Line": 2534 + "Line": 2536 }, "15154": { "File": "_test/testdata/triceCheck.c", - "Line": 2535 + "Line": 2537 }, "15155": { "File": "_test/testdata/triceCheck.c", - "Line": 2536 + "Line": 2538 }, "15156": { "File": "_test/testdata/triceCheck.c", - "Line": 2537 + "Line": 2539 }, "15157": { "File": "_test/testdata/triceCheck.c", - "Line": 2538 + "Line": 2540 }, "15158": { "File": "_test/testdata/triceCheck.c", - "Line": 2540 + "Line": 2542 }, "15159": { "File": "_test/testdata/triceCheck.c", - "Line": 2541 + "Line": 2543 }, "15160": { "File": "_test/testdata/triceCheck.c", - "Line": 2542 + "Line": 2544 }, "15161": { "File": "_test/testdata/triceCheck.c", - "Line": 2543 + "Line": 2545 }, "15162": { "File": "_test/testdata/triceCheck.c", - "Line": 2544 + "Line": 2546 }, "15163": { "File": "_test/testdata/triceCheck.c", - "Line": 2545 + "Line": 2547 }, "15164": { "File": "_test/testdata/triceCheck.c", - "Line": 2546 + "Line": 2548 }, "15165": { "File": "_test/testdata/triceCheck.c", - "Line": 2548 + "Line": 2550 }, "15166": { "File": "_test/testdata/triceCheck.c", - "Line": 2549 + "Line": 2551 }, "15167": { "File": "_test/testdata/triceCheck.c", - "Line": 2550 + "Line": 2552 }, "15168": { "File": "_test/testdata/triceCheck.c", - "Line": 2551 + "Line": 2553 }, "15169": { "File": "_test/testdata/triceCheck.c", - "Line": 2552 + "Line": 2554 }, "15170": { "File": "_test/testdata/triceCheck.c", - "Line": 2553 + "Line": 2555 }, "15171": { "File": "_test/testdata/triceCheck.c", - "Line": 2554 + "Line": 2556 }, "15172": { "File": "_test/testdata/triceCheck.c", - "Line": 2556 + "Line": 2558 }, "15173": { "File": "_test/testdata/triceCheck.c", - "Line": 2557 + "Line": 2559 }, "15174": { "File": "_test/testdata/triceCheck.c", - "Line": 2558 + "Line": 2560 }, "15175": { "File": "_test/testdata/triceCheck.c", - "Line": 2559 + "Line": 2561 }, "15176": { "File": "_test/testdata/triceCheck.c", - "Line": 2560 + "Line": 2562 }, "15177": { "File": "_test/testdata/triceCheck.c", - "Line": 2561 + "Line": 2563 }, "15178": { "File": "_test/testdata/triceCheck.c", - "Line": 2562 + "Line": 2564 }, "15179": { "File": "_test/testdata/triceCheck.c", - "Line": 2598 + "Line": 2600 }, "15180": { "File": "_test/testdata/triceCheck.c", - "Line": 2599 + "Line": 2601 }, "15181": { "File": "_test/testdata/triceCheck.c", - "Line": 2609 + "Line": 2611 }, "15182": { "File": "_test/testdata/triceCheck.c", - "Line": 2610 + "Line": 2612 }, "15183": { "File": "_test/testdata/triceCheck.c", - "Line": 2730 + "Line": 2732 }, "15184": { "File": "_test/testdata/triceCheck.c", - "Line": 2731 + "Line": 2733 }, "15185": { "File": "_test/testdata/triceCheck.c", - "Line": 2732 + "Line": 2734 }, "15186": { "File": "_test/testdata/triceCheck.c", - "Line": 2734 + "Line": 2736 }, "15187": { "File": "_test/testdata/triceCheck.c", - "Line": 2735 + "Line": 2737 }, "15188": { "File": "_test/testdata/triceCheck.c", - "Line": 2736 + "Line": 2738 }, "15189": { "File": "_test/testdata/triceCheck.c", - "Line": 2742 + "Line": 2744 }, "15190": { "File": "_test/testdata/triceCheck.c", - "Line": 2743 + "Line": 2745 }, "15191": { "File": "_test/testdata/triceCheck.c", - "Line": 2744 + "Line": 2746 }, "15192": { "File": "_test/testdata/triceCheck.c", - "Line": 2746 + "Line": 2748 }, "15193": { "File": "_test/testdata/triceCheck.c", - "Line": 2747 + "Line": 2749 }, "15194": { "File": "_test/testdata/triceCheck.c", - "Line": 2748 + "Line": 2750 }, "15195": { "File": "_test/testdata/triceCheck.c", - "Line": 2759 + "Line": 2761 }, "15196": { "File": "_test/testdata/triceCheck.c", - "Line": 2766 + "Line": 2769 }, "15197": { "File": "_test/testdata/triceCheck.c", - "Line": 2767 + "Line": 2770 }, "15198": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", diff --git a/examples/L432_inst/flags.mak b/examples/L432_inst/flags.mak index bbb0e6c86..20c36b16b 100644 --- a/examples/L432_inst/flags.mak +++ b/examples/L432_inst/flags.mak @@ -68,7 +68,7 @@ C_FLAGS += -Ofast # -Ofast optimizes for speed. C_FLAGS += -Wformat-overflow # C_FLAGS += -Wformat-truncation # C_FLAGS += -Wundef # -Wundef warns, if an undefined macro silently evaluating as 0 and causing unexpected behavior. - C_FLAGS += -Wstack-usage=300 # -Wstack-usage= emits a warning when stack usage exceeds limit bytes. + C_FLAGS += -Wstack-usage=400 # -Wstack-usage= emits a warning when stack usage exceeds limit bytes. C_FLAGS += -Wstack-protector C_FLAGS += -Wmissing-include-dirs # Warn if a user-supplied include directory does not exist C_FLAGS += -Wswitch-default # Warn whenever a switch statement does not have a default case. @@ -82,7 +82,7 @@ C_FLAGS += -Ofast # -Ofast optimizes for speed. C_FLAGS += -Wfloat-equal # Warn if floating point values are used in equality comparisons. C_FLAGS += -Wundef # Warn if an undefined identifier is evaluated in an `#if' directive. #C_FLAGS += -Wlarger-than=512 # Warn whenever an object of larger than len bytes is defined. - C_FLAGS += -Wframe-larger-than=256#Warn if the size of a function frame is larger than len bytes. The computation done to determine the stack frame size is approximate and not conservative. The actual requirements may be somewhat greater than len even if you do not get a warning. In addition, any space allocated via alloca, variable-length arrays, or related constructs is not included by the compiler when determining whether or not to issue a warning. + C_FLAGS += -Wframe-larger-than=400#Warn if the size of a function frame is larger than len bytes. The computation done to determine the stack frame size is approximate and not conservative. The actual requirements may be somewhat greater than len even if you do not get a warning. In addition, any space allocated via alloca, variable-length arrays, or related constructs is not included by the compiler when determining whether or not to issue a warning. C_FLAGS += -Wunsafe-loop-optimizations # Warn if the loop cannot be optimized because the compiler could not assume anything on the bounds of the loop indices. With -funsafe-loop-optimizations warn if the compiler made such assumptions. C_FLAGS += -funsafe-loop-optimizations #C_FLAGS += -pedantic diff --git a/src/triceRingBuffer.c b/src/triceRingBuffer.c index d84e88b8f..ddd966ec0 100644 --- a/src/triceRingBuffer.c +++ b/src/triceRingBuffer.c @@ -182,6 +182,7 @@ TRICE_INLINE void triceRingBufferDiagnostics(void) { } #if TRICE_DEFERRED_TRANSFER_MODE == TRICE_SINGLE_PACK_MODE +void triceTransferSingleFraming(void); // Avoid noise whis enabled -Wmissing-prototypes. //! triceTransferSingleFraming transfers a single Trice from the Ring Buffer. //! Implicit assumed is, that the pre-condition "TricesCountRingBuffer > 0" is fulfilled. diff --git a/testAll.log b/testAll.log new file mode 100644 index 000000000..d080c50ef --- /dev/null +++ b/testAll.log @@ -0,0 +1,7318 @@ +Fr 16 Mai 2025 11:59:11 EEST +This can take a while ... +--- +Testing the Go code... +? github.com/rokath/trice/internal/do [no test files] +ok github.com/rokath/trice/cmd/trice 1.225s +? github.com/rokath/trice/internal/translator [no test files] +? github.com/rokath/trice/pkg/ant [no test files] +ok github.com/rokath/trice/internal/args 1.389s +ok github.com/rokath/trice/internal/charDecoder 0.549s +ok github.com/rokath/trice/internal/com 4.423s +ok github.com/rokath/trice/internal/decoder 0.709s +ok github.com/rokath/trice/internal/dumpDecoder 1.101s +ok github.com/rokath/trice/internal/emitter 0.929s +ok github.com/rokath/trice/internal/id 3.373s +ok github.com/rokath/trice/internal/keybcmd 0.412s +ok github.com/rokath/trice/internal/link 0.772s +ok github.com/rokath/trice/internal/receiver 0.873s +ok github.com/rokath/trice/internal/trexDecoder 0.720s +ok github.com/rokath/trice/pkg/cipher 1.016s +ok github.com/rokath/trice/pkg/endian 0.843s +ok github.com/rokath/trice/pkg/msg 1.168s +ok github.com/rokath/trice/pkg/tst 1.254s +Testing the Go code...done +--- +--- +Testing the Target code... +ok github.com/rokath/trice/_test/be_dblB_de_tcobs_ua 179.177s +ok github.com/rokath/trice/_test/be_staticB_di_xtea_cobs_rtt32 179.454s +ok github.com/rokath/trice/_test/dblB_de_cobs_ua 179.815s +ok github.com/rokath/trice/_test/dblB_de_multi_cobs_ua 180.824s +ok github.com/rokath/trice/_test/dblB_de_multi_nopf_ua 179.998s +ok github.com/rokath/trice/_test/dblB_de_multi_tcobs_ua 178.848s +ok github.com/rokath/trice/_test/dblB_de_multi_xtea_cobs_ua 179.313s +ok github.com/rokath/trice/_test/dblB_de_multi_xtea_tcobs_ua 179.626s +ok github.com/rokath/trice/_test/dblB_de_nopf_ua 180.577s +ok github.com/rokath/trice/_test/dblB_de_tcobs_ua 180.395s +ok github.com/rokath/trice/_test/dblB_de_xtea_cobs_ua 180.255s +ok github.com/rokath/trice/_test/dblB_de_xtea_tcobs_ua 179.218s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt32__de_cobs_ua 362.244s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua 361.480s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua 361.489s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt32__de_tcobs_ua 362.448s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt32__de_xtea_cobs_ua 363.768s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt8__de_cobs_ua 362.255s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua 363.632s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua 361.825s +ok github.com/rokath/trice/_test/dblB_di_nopf_rtt8__de_tcobs_ua 363.060s +ok github.com/rokath/trice/_test/ringB_de_cobs_ua 180.169s +ok github.com/rokath/trice/_test/ringB_de_multi_tcobs_ua 179.406s +ok github.com/rokath/trice/_test/ringB_de_multi_xtea_cobs_ua 179.573s +ok github.com/rokath/trice/_test/ringB_de_multi_xtea_tcobs_ua 178.758s +ok github.com/rokath/trice/_test/ringB_de_nopf_ua 179.509s +ok github.com/rokath/trice/_test/ringB_de_tcobs_ua 179.000s +ok github.com/rokath/trice/_test/ringB_de_xtea_cobs_ua 179.477s +ok github.com/rokath/trice/_test/ringB_de_xtea_tcobs_ua 179.720s +ok github.com/rokath/trice/_test/ringB_di_cobs_rtt32__de_tcobs_ua 360.543s +ok github.com/rokath/trice/_test/ringB_di_cobs_rtt8__de_tcobs_ua 360.785s +ok github.com/rokath/trice/_test/ringB_di_nopf_rtt32__de_tcobs_ua 360.768s +ok github.com/rokath/trice/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua 360.766s +ok github.com/rokath/trice/_test/ringB_di_nopf_rtt8__de_tcobs_ua 360.326s +ok github.com/rokath/trice/_test/ringB_di_tcobs_rtt32__de_tcobs_ua 360.083s +ok github.com/rokath/trice/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua 357.454s +ok github.com/rokath/trice/_test/special_for_debug 0.320s +ok github.com/rokath/trice/_test/special_protect_dblB_de_tcobs_ua 0.322s +ok github.com/rokath/trice/_test/stackB_di_nopf_aux32 179.175s +ok github.com/rokath/trice/_test/stackB_di_nopf_aux8 179.446s +ok github.com/rokath/trice/_test/stackB_di_nopf_rtt32 179.315s +ok github.com/rokath/trice/_test/stackB_di_nopf_rtt8 179.151s +ok github.com/rokath/trice/_test/stackB_di_xtea_cobs_rtt8 178.421s +ok github.com/rokath/trice/_test/staticB_di_nopf_aux32 178.190s +ok github.com/rokath/trice/_test/staticB_di_nopf_aux8 179.050s +ok github.com/rokath/trice/_test/staticB_di_nopf_rtt32 178.584s +ok github.com/rokath/trice/_test/staticB_di_nopf_rtt8 178.871s +ok github.com/rokath/trice/_test/staticB_di_tcobs_rtt32 179.043s +ok github.com/rokath/trice/_test/staticB_di_tcobs_rtt8 178.275s +ok github.com/rokath/trice/_test/staticB_di_xtea_cobs_rtt32 178.273s +Testing the Target code...done +--- +--- +Translating all examples with TRICE_OFF... +-------------------------------------------------------------------------------------------------------- +./F030_bare/ with TRICE_OFF=1 +mkdir out +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/main.d" -Wa,-a,-ad,-alms=out/main.lst Core/Src/main.c -o out/main.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_it.d" -Wa,-a,-ad,-alms=out/stm32f0xx_it.lst Core/Src/stm32f0xx_it.c -o out/stm32f0xx_it.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_gpio.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_gpio.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c -o out/stm32f0xx_ll_gpio.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_pwr.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_pwr.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c -o out/stm32f0xx_ll_pwr.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_exti.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_exti.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c -o out/stm32f0xx_ll_exti.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_usart.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_usart.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c -o out/stm32f0xx_ll_usart.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_rcc.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_rcc.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c -o out/stm32f0xx_ll_rcc.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_dma.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_dma.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c -o out/stm32f0xx_ll_dma.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_utils.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_utils.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c -o out/stm32f0xx_ll_utils.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/system_stm32f0xx.d" -Wa,-a,-ad,-alms=out/system_stm32f0xx.lst Core/Src/system_stm32f0xx.c -o out/system_stm32f0xx.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/syscalls.d" -Wa,-a,-ad,-alms=out/syscalls.lst Core/Src/syscalls.c -o out/syscalls.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/sysmem.d" -Wa,-a,-ad,-alms=out/sysmem.lst Core/Src/sysmem.c -o out/sysmem.o +arm-none-eabi-gcc -x assembler-with-cpp -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/startup_stm32f030x8.d" startup_stm32f030x8.s -o out/startup_stm32f030x8.o +arm-none-eabi-gcc out/main.o out/stm32f0xx_it.o out/stm32f0xx_ll_gpio.o out/stm32f0xx_ll_pwr.o out/stm32f0xx_ll_exti.o out/stm32f0xx_ll_usart.o out/stm32f0xx_ll_rcc.o out/stm32f0xx_ll_dma.o out/stm32f0xx_ll_utils.o out/system_stm32f0xx.o out/syscalls.o out/sysmem.o out/startup_stm32f030x8.o -mcpu=cortex-m0 -mthumb -specs=nano.specs -TSTM32F030R8Tx_FLASH.ld -lc -lm -lnosys -Wl,-Map=out/F030_bare.map,--cref -Wl,--gc-sections -Wl,--no-warn-rwx-segments -Wl,--no-warn-execstack -o out/F030_bare.elf +arm-none-eabi-size out/F030_bare.elf + text data bss dec hex filename + 2428 12 1564 4004 fa4 out/F030_bare.elf +arm-none-eabi-objcopy -O ihex out/F030_bare.elf out/F030_bare.hex +arm-none-eabi-objcopy -O binary -S out/F030_bare.elf out/F030_bare.bin +-------------------------------------------------------------------------------------------------------- +./G0B1_bare/ with TRICE_OFF=1 +mkdir out.gcc +startup_stm32g0b1xx.s +Core/Src/main.c +Core/Src/app_freertos.c +Core/Src/stm32g0xx_it.c +Core/Src/stm32g0xx_hal_msp.c +Core/Src/stm32g0xx_hal_timebase_tim.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_gpio.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_exti.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_utils.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_crs.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_usart.c +Core/Src/system_stm32g0xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c + text data bss dec hex filename + 6796 24 5056 11876 2e64 out.gcc/G0B1.elf +-------------------------------------------------------------------------------------------------------- +./L432_bare/ with TRICE_OFF=1 +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c + text data bss dec hex filename + 8032 32 5592 13656 3558 out.gcc/L432KC.elf +-------------------------------------------------------------------------------------------------------- +./F030_inst/ with TRICE_OFF=1 +mkdir out +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/main.d" -Wa,-a,-ad,-alms=out/main.lst Core/Src/main.c -o out/main.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_it.d" -Wa,-a,-ad,-alms=out/stm32f0xx_it.lst Core/Src/stm32f0xx_it.c -o out/stm32f0xx_it.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_gpio.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_gpio.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c -o out/stm32f0xx_ll_gpio.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_pwr.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_pwr.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c -o out/stm32f0xx_ll_pwr.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_exti.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_exti.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c -o out/stm32f0xx_ll_exti.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_usart.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_usart.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c -o out/stm32f0xx_ll_usart.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_rcc.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_rcc.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c -o out/stm32f0xx_ll_rcc.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_dma.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_dma.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c -o out/stm32f0xx_ll_dma.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_utils.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_utils.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c -o out/stm32f0xx_ll_utils.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/system_stm32f0xx.d" -Wa,-a,-ad,-alms=out/system_stm32f0xx.lst Core/Src/system_stm32f0xx.c -o out/system_stm32f0xx.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/syscalls.d" -Wa,-a,-ad,-alms=out/syscalls.lst Core/Src/syscalls.c -o out/syscalls.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/sysmem.d" -Wa,-a,-ad,-alms=out/sysmem.lst Core/Src/sysmem.c -o out/sysmem.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/cobsDecode.d" -Wa,-a,-ad,-alms=out/cobsDecode.lst ../../src/cobsDecode.c -o out/cobsDecode.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/cobsEncode.d" -Wa,-a,-ad,-alms=out/cobsEncode.lst ../../src/cobsEncode.c -o out/cobsEncode.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/SEGGER_RTT.d" -Wa,-a,-ad,-alms=out/SEGGER_RTT.lst ../../src/SEGGER_RTT.c -o out/SEGGER_RTT.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/tcobsv1Decode.d" -Wa,-a,-ad,-alms=out/tcobsv1Decode.lst ../../src/tcobsv1Decode.c -o out/tcobsv1Decode.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/tcobsv1Encode.d" -Wa,-a,-ad,-alms=out/tcobsv1Encode.lst ../../src/tcobsv1Encode.c -o out/tcobsv1Encode.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice.d" -Wa,-a,-ad,-alms=out/trice.lst ../../src/trice.c -o out/trice.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice8.d" -Wa,-a,-ad,-alms=out/trice8.lst ../../src/trice8.c -o out/trice8.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice16.d" -Wa,-a,-ad,-alms=out/trice16.lst ../../src/trice16.c -o out/trice16.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice32.d" -Wa,-a,-ad,-alms=out/trice32.lst ../../src/trice32.c -o out/trice32.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice64.d" -Wa,-a,-ad,-alms=out/trice64.lst ../../src/trice64.c -o out/trice64.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceUart.d" -Wa,-a,-ad,-alms=out/triceUart.lst ../../src/triceUart.c -o out/triceUart.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceAuxiliary.d" -Wa,-a,-ad,-alms=out/triceAuxiliary.lst ../../src/triceAuxiliary.c -o out/triceAuxiliary.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceDoubleBuffer.d" -Wa,-a,-ad,-alms=out/triceDoubleBuffer.lst ../../src/triceDoubleBuffer.c -o out/triceDoubleBuffer.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceRingBuffer.d" -Wa,-a,-ad,-alms=out/triceRingBuffer.lst ../../src/triceRingBuffer.c -o out/triceRingBuffer.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceStackBuffer.d" -Wa,-a,-ad,-alms=out/triceStackBuffer.lst ../../src/triceStackBuffer.c -o out/triceStackBuffer.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceStaticBuffer.d" -Wa,-a,-ad,-alms=out/triceStaticBuffer.lst ../../src/triceStaticBuffer.c -o out/triceStaticBuffer.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/xtea.d" -Wa,-a,-ad,-alms=out/xtea.lst ../../src/xtea.c -o out/xtea.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceLogDiagData.d" -Wa,-a,-ad,-alms=out/triceLogDiagData.lst ../exampleData/triceLogDiagData.c -o out/triceLogDiagData.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceExamples.d" -Wa,-a,-ad,-alms=out/triceExamples.lst ../exampleData/triceExamples.c -o out/triceExamples.o +arm-none-eabi-gcc -x assembler-with-cpp -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -DTRICE_OFF=1 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/startup_stm32f030x8.d" startup_stm32f030x8.s -o out/startup_stm32f030x8.o +arm-none-eabi-gcc out/main.o out/stm32f0xx_it.o out/stm32f0xx_ll_gpio.o out/stm32f0xx_ll_pwr.o out/stm32f0xx_ll_exti.o out/stm32f0xx_ll_usart.o out/stm32f0xx_ll_rcc.o out/stm32f0xx_ll_dma.o out/stm32f0xx_ll_utils.o out/system_stm32f0xx.o out/syscalls.o out/sysmem.o out/cobsDecode.o out/cobsEncode.o out/SEGGER_RTT.o out/tcobsv1Decode.o out/tcobsv1Encode.o out/trice.o out/trice8.o out/trice16.o out/trice32.o out/trice64.o out/triceUart.o out/triceAuxiliary.o out/triceDoubleBuffer.o out/triceRingBuffer.o out/triceStackBuffer.o out/triceStaticBuffer.o out/xtea.o out/triceLogDiagData.o out/triceExamples.o out/startup_stm32f030x8.o -mcpu=cortex-m0 -mthumb -specs=nano.specs -TSTM32F030R8Tx_FLASH.ld -lc -lm -lnosys -Wl,-Map=out/F030_inst.map,--cref -Wl,--gc-sections -Wl,--no-warn-rwx-segments -Wl,--no-warn-execstack -o out/F030_inst.elf +arm-none-eabi-size out/F030_inst.elf + text data bss dec hex filename + 2428 12 1564 4004 fa4 out/F030_inst.elf +arm-none-eabi-objcopy -O ihex out/F030_inst.elf out/F030_inst.hex +arm-none-eabi-objcopy -O binary -S out/F030_inst.elf out/F030_inst.bin +-------------------------------------------------------------------------------------------------------- +./G0B1_inst/ with TRICE_OFF=1 +mkdir out.gcc +startup_stm32g0b1xx.s +Core/Src/main.c +Core/Src/app_freertos.c +Core/Src/stm32g0xx_it.c +Core/Src/stm32g0xx_hal_msp.c +Core/Src/stm32g0xx_hal_timebase_tim.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_gpio.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_exti.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_utils.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_crs.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_usart.c +Core/Src/system_stm32g0xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/trice.c +../../src/tcobsv1Encode.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 7692 24 5056 12772 31e4 out.gcc/G0B1.elf +-------------------------------------------------------------------------------------------------------- +./L432_inst/ with TRICE_OFF=1 +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +../../src/tcobsv1Encode.c +../../src/tcobsv1Decode.c +../../src/SEGGER_RTT.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/trice16.c +../../src/trice8.c +../../src/trice32.c +../../src/trice64.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/triceDoubleBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/triceUart.c +../../src/triceRingBuffer.c +Core/Src/system_stm32l4xx.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c +../../src/trice.c +../../src/xtea.c +../../src/triceAuxiliary.c + text data bss dec hex filename + 8112 32 5584 13728 35a0 out.gcc/L432KC.elf +Translating all examples with TRICE_OFF...done2 +--- +--- +Translating all examples with TRICE_ON... +-------------------------------------------------------------------------------------------------------- +./F030_bare/ with TRICE_OFF=0 +mkdir out +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/main.d" -Wa,-a,-ad,-alms=out/main.lst Core/Src/main.c -o out/main.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_it.d" -Wa,-a,-ad,-alms=out/stm32f0xx_it.lst Core/Src/stm32f0xx_it.c -o out/stm32f0xx_it.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_gpio.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_gpio.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c -o out/stm32f0xx_ll_gpio.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_pwr.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_pwr.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c -o out/stm32f0xx_ll_pwr.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_exti.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_exti.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c -o out/stm32f0xx_ll_exti.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_usart.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_usart.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c -o out/stm32f0xx_ll_usart.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_rcc.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_rcc.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c -o out/stm32f0xx_ll_rcc.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_dma.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_dma.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c -o out/stm32f0xx_ll_dma.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_utils.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_utils.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c -o out/stm32f0xx_ll_utils.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/system_stm32f0xx.d" -Wa,-a,-ad,-alms=out/system_stm32f0xx.lst Core/Src/system_stm32f0xx.c -o out/system_stm32f0xx.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/syscalls.d" -Wa,-a,-ad,-alms=out/syscalls.lst Core/Src/syscalls.c -o out/syscalls.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/sysmem.d" -Wa,-a,-ad,-alms=out/sysmem.lst Core/Src/sysmem.c -o out/sysmem.o +arm-none-eabi-gcc -x assembler-with-cpp -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/startup_stm32f030x8.d" startup_stm32f030x8.s -o out/startup_stm32f030x8.o +arm-none-eabi-gcc out/main.o out/stm32f0xx_it.o out/stm32f0xx_ll_gpio.o out/stm32f0xx_ll_pwr.o out/stm32f0xx_ll_exti.o out/stm32f0xx_ll_usart.o out/stm32f0xx_ll_rcc.o out/stm32f0xx_ll_dma.o out/stm32f0xx_ll_utils.o out/system_stm32f0xx.o out/syscalls.o out/sysmem.o out/startup_stm32f030x8.o -mcpu=cortex-m0 -mthumb -specs=nano.specs -TSTM32F030R8Tx_FLASH.ld -lc -lm -lnosys -Wl,-Map=out/F030_bare.map,--cref -Wl,--gc-sections -Wl,--no-warn-rwx-segments -Wl,--no-warn-execstack -o out/F030_bare.elf +arm-none-eabi-size out/F030_bare.elf + text data bss dec hex filename + 2428 12 1564 4004 fa4 out/F030_bare.elf +arm-none-eabi-objcopy -O ihex out/F030_bare.elf out/F030_bare.hex +arm-none-eabi-objcopy -O binary -S out/F030_bare.elf out/F030_bare.bin +-------------------------------------------------------------------------------------------------------- +./G0B1_bare/ with TRICE_OFF=0 +mkdir out.gcc +startup_stm32g0b1xx.s +Core/Src/main.c +Core/Src/app_freertos.c +Core/Src/stm32g0xx_it.c +Core/Src/stm32g0xx_hal_msp.c +Core/Src/stm32g0xx_hal_timebase_tim.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_gpio.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_exti.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_utils.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_crs.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_usart.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Core/Src/system_stm32g0xx.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c + text data bss dec hex filename + 6796 24 5056 11876 2e64 out.gcc/G0B1.elf +-------------------------------------------------------------------------------------------------------- +./L432_bare/ with TRICE_OFF=0 +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c + text data bss dec hex filename + 8032 32 5592 13656 3558 out.gcc/L432KC.elf +-------------------------------------------------------------------------------------------------------- +./F030_inst/ with TRICE_OFF=0 +mkdir out +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/main.d" -Wa,-a,-ad,-alms=out/main.lst Core/Src/main.c -o out/main.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_it.d" -Wa,-a,-ad,-alms=out/stm32f0xx_it.lst Core/Src/stm32f0xx_it.c -o out/stm32f0xx_it.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_gpio.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_gpio.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c -o out/stm32f0xx_ll_gpio.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_pwr.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_pwr.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c -o out/stm32f0xx_ll_pwr.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_exti.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_exti.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c -o out/stm32f0xx_ll_exti.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_usart.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_usart.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c -o out/stm32f0xx_ll_usart.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_rcc.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_rcc.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c -o out/stm32f0xx_ll_rcc.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_dma.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_dma.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c -o out/stm32f0xx_ll_dma.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/stm32f0xx_ll_utils.d" -Wa,-a,-ad,-alms=out/stm32f0xx_ll_utils.lst Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c -o out/stm32f0xx_ll_utils.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/system_stm32f0xx.d" -Wa,-a,-ad,-alms=out/system_stm32f0xx.lst Core/Src/system_stm32f0xx.c -o out/system_stm32f0xx.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/syscalls.d" -Wa,-a,-ad,-alms=out/syscalls.lst Core/Src/syscalls.c -o out/syscalls.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/sysmem.d" -Wa,-a,-ad,-alms=out/sysmem.lst Core/Src/sysmem.c -o out/sysmem.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/cobsDecode.d" -Wa,-a,-ad,-alms=out/cobsDecode.lst ../../src/cobsDecode.c -o out/cobsDecode.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/cobsEncode.d" -Wa,-a,-ad,-alms=out/cobsEncode.lst ../../src/cobsEncode.c -o out/cobsEncode.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/SEGGER_RTT.d" -Wa,-a,-ad,-alms=out/SEGGER_RTT.lst ../../src/SEGGER_RTT.c -o out/SEGGER_RTT.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/tcobsv1Decode.d" -Wa,-a,-ad,-alms=out/tcobsv1Decode.lst ../../src/tcobsv1Decode.c -o out/tcobsv1Decode.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/tcobsv1Encode.d" -Wa,-a,-ad,-alms=out/tcobsv1Encode.lst ../../src/tcobsv1Encode.c -o out/tcobsv1Encode.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice.d" -Wa,-a,-ad,-alms=out/trice.lst ../../src/trice.c -o out/trice.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice8.d" -Wa,-a,-ad,-alms=out/trice8.lst ../../src/trice8.c -o out/trice8.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice16.d" -Wa,-a,-ad,-alms=out/trice16.lst ../../src/trice16.c -o out/trice16.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice32.d" -Wa,-a,-ad,-alms=out/trice32.lst ../../src/trice32.c -o out/trice32.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/trice64.d" -Wa,-a,-ad,-alms=out/trice64.lst ../../src/trice64.c -o out/trice64.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceUart.d" -Wa,-a,-ad,-alms=out/triceUart.lst ../../src/triceUart.c -o out/triceUart.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceAuxiliary.d" -Wa,-a,-ad,-alms=out/triceAuxiliary.lst ../../src/triceAuxiliary.c -o out/triceAuxiliary.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceDoubleBuffer.d" -Wa,-a,-ad,-alms=out/triceDoubleBuffer.lst ../../src/triceDoubleBuffer.c -o out/triceDoubleBuffer.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceRingBuffer.d" -Wa,-a,-ad,-alms=out/triceRingBuffer.lst ../../src/triceRingBuffer.c -o out/triceRingBuffer.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceStackBuffer.d" -Wa,-a,-ad,-alms=out/triceStackBuffer.lst ../../src/triceStackBuffer.c -o out/triceStackBuffer.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceStaticBuffer.d" -Wa,-a,-ad,-alms=out/triceStaticBuffer.lst ../../src/triceStaticBuffer.c -o out/triceStaticBuffer.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/xtea.d" -Wa,-a,-ad,-alms=out/xtea.lst ../../src/xtea.c -o out/xtea.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceLogDiagData.d" -Wa,-a,-ad,-alms=out/triceLogDiagData.lst ../exampleData/triceLogDiagData.c -o out/triceLogDiagData.o +arm-none-eabi-gcc -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/triceExamples.d" -Wa,-a,-ad,-alms=out/triceExamples.lst ../exampleData/triceExamples.c -o out/triceExamples.o +arm-none-eabi-gcc -x assembler-with-cpp -c -mcpu=cortex-m0 -mthumb -DUSE_FULL_LL_DRIVER -DHSE_VALUE=8000000 -DHSE_STARTUP_TIMEOUT=100 -DLSE_STARTUP_TIMEOUT=5000 -DLSE_VALUE=32768 -DHSI_VALUE=8000000 -DLSI_VALUE=40000 -DVDD_VALUE=3300 -DPREFETCH_ENABLE=1 -DINSTRUCTION_CACHE_ENABLE=0 -DDATA_CACHE_ENABLE=0 -DSTM32F030x8 -ICore/Inc -IDrivers/STM32F0xx_HAL_Driver/Inc -IDrivers/CMSIS/Device/ST/STM32F0xx/Include -IDrivers/CMSIS/Include -I../../src -Og -Wall -fdata-sections -ffunction-sections -g -gdwarf-2 -MMD -MP -MF"out/startup_stm32f030x8.d" startup_stm32f030x8.s -o out/startup_stm32f030x8.o +arm-none-eabi-gcc out/main.o out/stm32f0xx_it.o out/stm32f0xx_ll_gpio.o out/stm32f0xx_ll_pwr.o out/stm32f0xx_ll_exti.o out/stm32f0xx_ll_usart.o out/stm32f0xx_ll_rcc.o out/stm32f0xx_ll_dma.o out/stm32f0xx_ll_utils.o out/system_stm32f0xx.o out/syscalls.o out/sysmem.o out/cobsDecode.o out/cobsEncode.o out/SEGGER_RTT.o out/tcobsv1Decode.o out/tcobsv1Encode.o out/trice.o out/trice8.o out/trice16.o out/trice32.o out/trice64.o out/triceUart.o out/triceAuxiliary.o out/triceDoubleBuffer.o out/triceRingBuffer.o out/triceStackBuffer.o out/triceStaticBuffer.o out/xtea.o out/triceLogDiagData.o out/triceExamples.o out/startup_stm32f030x8.o -mcpu=cortex-m0 -mthumb -specs=nano.specs -TSTM32F030R8Tx_FLASH.ld -lc -lm -lnosys -Wl,-Map=out/F030_inst.map,--cref -Wl,--gc-sections -Wl,--no-warn-rwx-segments -Wl,--no-warn-execstack -o out/F030_inst.elf +arm-none-eabi-size out/F030_inst.elf + text data bss dec hex filename + 10524 28 4932 15484 3c7c out/F030_inst.elf +arm-none-eabi-objcopy -O ihex out/F030_inst.elf out/F030_inst.hex +arm-none-eabi-objcopy -O binary -S out/F030_inst.elf out/F030_inst.bin +-------------------------------------------------------------------------------------------------------- +./G0B1_inst/ with TRICE_OFF=0 +mkdir out.gcc +startup_stm32g0b1xx.s +Core/Src/main.c +Core/Src/app_freertos.c +Core/Src/stm32g0xx_it.c +Core/Src/stm32g0xx_hal_msp.c +Core/Src/stm32g0xx_hal_timebase_tim.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_exti.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_gpio.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_utils.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_crs.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_dma.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c +Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_usart.c +Core/Src/system_stm32g0xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM0/port.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 237024 120 8696 245840 3c050 out.gcc/G0B1.elf +-------------------------------------------------------------------------------------------------------- +./L432_inst/ with TRICE_OFF=0 +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 140480 120 11048 151648 25060 out.gcc/L432KC.elf +Translating all examples with TRICE_ON...done +--- +--- +Translating all L432 configurations... +Fr 16 Mai 2025 12:19:24 EEST + +--- CONFIGURATION=0 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 140480 120 11048 151648 25060 out.gcc/L432KC.elf + +--- CONFIGURATION=1 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceStackBuffer.c +../../src/triceRingBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 139152 128 7024 146304 23b80 out.gcc/L432KC.elf + +--- CONFIGURATION=2 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 139152 128 7024 146304 23b80 out.gcc/L432KC.elf + +--- CONFIGURATION=3 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceAuxiliary.c +../../src/triceUart.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 157224 128 7024 164376 28218 out.gcc/L432KC.elf + +--- CONFIGURATION=4 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 157216 128 7024 164368 28210 out.gcc/L432KC.elf + +--- CONFIGURATION=5 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 163208 128 7056 170392 29998 out.gcc/L432KC.elf + +--- CONFIGURATION=6 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 163208 128 7056 170392 29998 out.gcc/L432KC.elf + +--- CONFIGURATION=7 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 181400 136 7056 188592 2e0b0 out.gcc/L432KC.elf + +--- CONFIGURATION=8 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 181376 136 7056 188568 2e098 out.gcc/L432KC.elf + +--- CONFIGURATION=9 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice16.c +../../src/trice8.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/xtea.c +../../src/triceStaticBuffer.c +../../src/triceStackBuffer.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137984 128 7024 145136 236f0 out.gcc/L432KC.elf + +--- CONFIGURATION=10 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137984 128 7024 145136 236f0 out.gcc/L432KC.elf + +--- CONFIGURATION=11 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice8.c +../../src/trice.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 156064 128 7024 163216 27d90 out.gcc/L432KC.elf + +--- CONFIGURATION=12 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Core/Src/system_stm32l4xx.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 156056 128 7024 163208 27d88 out.gcc/L432KC.elf + +--- CONFIGURATION=13 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +../../src/cobsDecode.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 162040 128 7056 169224 29508 out.gcc/L432KC.elf + +--- CONFIGURATION=14 --- + +mkdir out.gcc +Core/Src/main.c +startup_stm32l432xx.s +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice8.c +../../src/trice.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../exampleData/triceLogDiagData.c +../../src/xtea.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 162040 128 7056 169224 29508 out.gcc/L432KC.elf + +--- CONFIGURATION=15 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 180240 136 7056 187432 2dc28 out.gcc/L432KC.elf + +--- CONFIGURATION=16 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +../../src/cobsDecode.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 180208 136 7056 187400 2dc08 out.gcc/L432KC.elf + +--- CONFIGURATION=17 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 138672 128 6768 145568 238a0 out.gcc/L432KC.elf + +--- CONFIGURATION=18 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsEncode.c +../../src/cobsDecode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 138720 128 6768 145616 238d0 out.gcc/L432KC.elf + +--- CONFIGURATION=19 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 156744 128 6768 163640 27f38 out.gcc/L432KC.elf + +--- CONFIGURATION=20 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 156808 128 6768 163704 27f78 out.gcc/L432KC.elf + +--- CONFIGURATION=21 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 162648 128 6792 169568 29660 out.gcc/L432KC.elf + +--- CONFIGURATION=22 --- + +mkdir out.gcc +Core/Src/main.c +startup_stm32l432xx.s +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 162712 128 6792 169632 296a0 out.gcc/L432KC.elf + +--- CONFIGURATION=23 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceDoubleBuffer.c +../../src/triceAuxiliary.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 180928 136 6800 187864 2ddd8 out.gcc/L432KC.elf + +--- CONFIGURATION=24 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 180976 136 6800 187912 2de08 out.gcc/L432KC.elf + +--- CONFIGURATION=25 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/freertos.c +Core/Src/main.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice8.c +../../src/trice.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137512 128 6768 144408 23418 out.gcc/L432KC.elf + +--- CONFIGURATION=26 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137560 128 6768 144456 23448 out.gcc/L432KC.elf + +--- CONFIGURATION=27 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 155576 128 6768 162472 27aa8 out.gcc/L432KC.elf + +--- CONFIGURATION=28 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 155648 128 6768 162544 27af0 out.gcc/L432KC.elf + +--- CONFIGURATION=29 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 161480 128 6792 168400 291d0 out.gcc/L432KC.elf + +--- CONFIGURATION=30 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 161544 128 6792 168464 29210 out.gcc/L432KC.elf + +--- CONFIGURATION=31 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 179760 136 6800 186696 2d948 out.gcc/L432KC.elf + +--- CONFIGURATION=32 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 179808 136 6800 186744 2d978 out.gcc/L432KC.elf + +--- CONFIGURATION=33 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice16.c +../../src/trice8.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 172416 128 7032 179576 2bd78 out.gcc/L432KC.elf + +--- CONFIGURATION=34 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 172520 128 7032 179680 2bde0 out.gcc/L432KC.elf + +--- CONFIGURATION=35 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 187120 128 7032 194280 2f6e8 out.gcc/L432KC.elf + +--- CONFIGURATION=36 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/stm32l4xx_it.c +Core/Src/freertos.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsEncode.c +../../src/cobsDecode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 187224 128 7032 194384 2f750 out.gcc/L432KC.elf + +--- CONFIGURATION=37 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 190656 128 7048 197832 304c8 out.gcc/L432KC.elf + +--- CONFIGURATION=38 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 190704 128 7056 197888 30500 out.gcc/L432KC.elf + +--- CONFIGURATION=39 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 212160 128 7056 219344 358d0 out.gcc/L432KC.elf + +--- CONFIGURATION=40 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 212200 128 7056 219384 358f8 out.gcc/L432KC.elf + +--- CONFIGURATION=41 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/tcobsv1Decode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 171256 128 7032 178416 2b8f0 out.gcc/L432KC.elf + +--- CONFIGURATION=42 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/stm32l4xx_it.c +Core/Src/freertos.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 171360 128 7032 178520 2b958 out.gcc/L432KC.elf + +--- CONFIGURATION=43 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 185960 128 7032 193120 2f260 out.gcc/L432KC.elf + +--- CONFIGURATION=44 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 186064 128 7032 193224 2f2c8 out.gcc/L432KC.elf + +--- CONFIGURATION=45 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 189496 128 7048 196672 30040 out.gcc/L432KC.elf + +--- CONFIGURATION=46 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice32.c +../../src/trice16.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 189536 128 7056 196720 30070 out.gcc/L432KC.elf + +--- CONFIGURATION=47 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 210992 128 7056 218176 35440 out.gcc/L432KC.elf + +--- CONFIGURATION=48 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 211040 128 7056 218224 35470 out.gcc/L432KC.elf + +--- CONFIGURATION=49 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 171888 128 6768 178784 2ba60 out.gcc/L432KC.elf + +--- CONFIGURATION=50 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 172072 128 6776 178976 2bb20 out.gcc/L432KC.elf + +--- CONFIGURATION=51 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 186640 128 6768 193536 2f400 out.gcc/L432KC.elf + +--- CONFIGURATION=52 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 186832 128 6776 193736 2f4c8 out.gcc/L432KC.elf + +--- CONFIGURATION=53 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 190160 128 6792 197080 301d8 out.gcc/L432KC.elf + +--- CONFIGURATION=54 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceStackBuffer.c +../../src/triceRingBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 190312 128 6792 197232 30270 out.gcc/L432KC.elf + +--- CONFIGURATION=55 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice64.c +../../src/trice32.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 211664 128 6792 218584 355d8 out.gcc/L432KC.elf + +--- CONFIGURATION=56 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 211816 128 6800 218744 35678 out.gcc/L432KC.elf + +--- CONFIGURATION=57 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 170720 128 6768 177616 2b5d0 out.gcc/L432KC.elf + +--- CONFIGURATION=58 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 170912 128 6776 177816 2b698 out.gcc/L432KC.elf + +--- CONFIGURATION=59 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 185472 128 6768 192368 2ef70 out.gcc/L432KC.elf + +--- CONFIGURATION=60 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 185672 128 6776 192576 2f040 out.gcc/L432KC.elf + +--- CONFIGURATION=61 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 189000 128 6792 195920 2fd50 out.gcc/L432KC.elf + +--- CONFIGURATION=62 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Core/Src/system_stm32l4xx.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 189152 128 6792 196072 2fde8 out.gcc/L432KC.elf + +--- CONFIGURATION=63 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice32.c +../../src/trice16.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 210496 128 6792 217416 35148 out.gcc/L432KC.elf + +--- CONFIGURATION=64 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 210648 128 6800 217576 351e8 out.gcc/L432KC.elf + +--- CONFIGURATION=65 --- + +mkdir out.gcc +Core/Src/main.c +startup_stm32l432xx.s +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice64.c +../../src/trice32.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 152008 120 7160 159288 26e38 out.gcc/L432KC.elf + +--- CONFIGURATION=66 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137712 120 7328 145160 23708 out.gcc/L432KC.elf + +--- CONFIGURATION=67 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 152944 120 7160 160224 271e0 out.gcc/L432KC.elf + +--- CONFIGURATION=68 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137920 120 7328 145368 237d8 out.gcc/L432KC.elf + +--- CONFIGURATION=69 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 167216 120 7184 174520 2a9b8 out.gcc/L432KC.elf + +--- CONFIGURATION=70 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 157416 128 7352 164896 28420 out.gcc/L432KC.elf + +--- CONFIGURATION=71 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/tcobsv1Decode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 167512 120 7184 174816 2aae0 out.gcc/L432KC.elf + +--- CONFIGURATION=72 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Core/Src/system_stm32l4xx.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../../_test/testdata/triceCheck.c +../exampleData/triceExamples.c + text data bss dec hex filename + 157712 128 7352 165192 28548 out.gcc/L432KC.elf + +--- CONFIGURATION=73 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 152008 120 7160 159288 26e38 out.gcc/L432KC.elf + +--- CONFIGURATION=74 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137712 120 7328 145160 23708 out.gcc/L432KC.elf + +--- CONFIGURATION=75 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 152944 120 7160 160224 271e0 out.gcc/L432KC.elf + +--- CONFIGURATION=76 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137920 120 7328 145368 237d8 out.gcc/L432KC.elf + +--- CONFIGURATION=77 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 167216 120 7184 174520 2a9b8 out.gcc/L432KC.elf + +--- CONFIGURATION=78 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 157416 128 7352 164896 28420 out.gcc/L432KC.elf + +--- CONFIGURATION=79 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 167512 120 7184 174816 2aae0 out.gcc/L432KC.elf + +--- CONFIGURATION=80 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 157712 128 7352 165192 28548 out.gcc/L432KC.elf + +--- CONFIGURATION=81 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 146576 120 6904 153600 25800 out.gcc/L432KC.elf + +--- CONFIGURATION=82 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137296 120 7072 144488 23468 out.gcc/L432KC.elf + +--- CONFIGURATION=83 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 147512 120 6904 154536 25ba8 out.gcc/L432KC.elf + +--- CONFIGURATION=84 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137504 120 7072 144696 23538 out.gcc/L432KC.elf + +--- CONFIGURATION=85 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 166856 120 6920 173896 2a748 out.gcc/L432KC.elf + +--- CONFIGURATION=86 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +../../src/cobsEncode.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/SEGGER_RTT.c +../../src/trice32.c +../../src/trice16.c +../../src/trice.c +../../src/tcobsv1Encode.c +../../src/xtea.c +../../src/trice64.c +../../src/triceAuxiliary.c +../../src/trice8.c +../../src/triceRingBuffer.c +../../src/triceUart.c +../exampleData/triceLogDiagData.c +../../_test/testdata/triceCheck.c +../exampleData/triceExamples.c +../../src/triceDoubleBuffer.c +../../src/triceStaticBuffer.c +../../src/triceStackBuffer.c +../../src/tcobsv1Decode.c + text data bss dec hex filename + 157064 128 7088 164280 281b8 out.gcc/L432KC.elf + +--- CONFIGURATION=87 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 167144 120 6928 174192 2a870 out.gcc/L432KC.elf + +--- CONFIGURATION=88 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 157352 128 7096 164576 282e0 out.gcc/L432KC.elf + +--- CONFIGURATION=89 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 146576 120 6904 153600 25800 out.gcc/L432KC.elf + +--- CONFIGURATION=90 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137296 120 7072 144488 23468 out.gcc/L432KC.elf + +--- CONFIGURATION=91 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 147512 120 6904 154536 25ba8 out.gcc/L432KC.elf + +--- CONFIGURATION=92 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 137504 120 7072 144696 23538 out.gcc/L432KC.elf + +--- CONFIGURATION=93 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 166856 120 6920 173896 2a748 out.gcc/L432KC.elf + +--- CONFIGURATION=94 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 157064 128 7088 164280 281b8 out.gcc/L432KC.elf + +--- CONFIGURATION=95 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 167144 120 6928 174192 2a870 out.gcc/L432KC.elf + +--- CONFIGURATION=96 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Core/Src/system_stm32l4xx.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 157352 128 7096 164576 282e0 out.gcc/L432KC.elf + +--- CONFIGURATION=97 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +../../src/cobsDecode.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 146576 120 6904 153600 25800 out.gcc/L432KC.elf + +--- CONFIGURATION=98 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 125608 120 9840 135568 21190 out.gcc/L432KC.elf + +--- CONFIGURATION=99 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 211816 128 6800 218744 35678 out.gcc/L432KC.elf + +--- CONFIGURATION=100 --- + +mkdir out.gcc +startup_stm32l432xx.s +Core/Src/main.c +Core/Src/freertos.c +Core/Src/stm32l4xx_it.c +Core/Src/stm32l4xx_hal_msp.c +Core/Src/stm32l4xx_hal_timebase_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_utils.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usart.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_rcc.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma.c +Core/Src/system_stm32l4xx.c +Middlewares/Third_Party/FreeRTOS/Source/croutine.c +Middlewares/Third_Party/FreeRTOS/Source/event_groups.c +Middlewares/Third_Party/FreeRTOS/Source/list.c +Middlewares/Third_Party/FreeRTOS/Source/queue.c +Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c +Middlewares/Third_Party/FreeRTOS/Source/tasks.c +Middlewares/Third_Party/FreeRTOS/Source/timers.c +Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c +Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +../../src/cobsDecode.c +../../src/cobsEncode.c +../../src/SEGGER_RTT.c +../../src/tcobsv1Decode.c +../../src/tcobsv1Encode.c +../../src/trice.c +../../src/trice8.c +../../src/trice16.c +../../src/trice32.c +../../src/trice64.c +../../src/triceUart.c +../../src/triceAuxiliary.c +../../src/triceDoubleBuffer.c +../../src/triceRingBuffer.c +../../src/triceStackBuffer.c +../../src/triceStaticBuffer.c +../../src/xtea.c +../exampleData/triceLogDiagData.c +../exampleData/triceExamples.c +../../_test/testdata/triceCheck.c + text data bss dec hex filename + 224000 128 8272 232400 38bd0 out.gcc/L432KC.elf + +real 29m10.004s +user 46m34.588s +sys 24m7.166s +Translating all L432 configurations...done +--- +./testAll.sh: line 61: kill: %-: no such job +Script run 2963 seconds. From f032d5d11215331caff7fe79047bbcd32648fb87 Mon Sep 17 00:00:00 2001 From: rokath Date: Fri, 16 May 2025 15:08:16 +0300 Subject: [PATCH 029/187] clang-format --- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- _test/_ringB_de_multi_cobs_ua/triceUart.h | 4 +- _test/_ringB_protect_de_tcobs_ua/triceUart.h | 4 +- .../TargetActivity.c | 4 + _test/_special_dblB_de_tcobs_ua/triceUart.h | 4 +- _test/be_dblB_de_tcobs_ua/triceUart.h | 4 +- _test/dblB_de_cobs_ua/triceUart.h | 4 +- _test/dblB_de_multi_cobs_ua/triceUart.h | 4 +- _test/dblB_de_multi_nopf_ua/triceUart.h | 4 +- _test/dblB_de_multi_tcobs_ua/triceUart.h | 4 +- _test/dblB_de_multi_xtea_cobs_ua/triceUart.h | 4 +- _test/dblB_de_tcobs_ua/triceUart.h | 4 +- _test/dblB_de_xtea_cobs_ua/triceUart.h | 4 +- _test/dblB_de_xtea_tcobs_ua/triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- _test/ringB_de_cobs_ua/triceUart.h | 4 +- _test/ringB_de_multi_tcobs_ua/triceUart.h | 4 +- _test/ringB_de_multi_xtea_cobs_ua/triceUart.h | 4 +- .../ringB_de_multi_xtea_tcobs_ua/triceUart.h | 4 +- _test/ringB_de_nopf_ua/triceUart.h | 4 +- _test/ringB_de_tcobs_ua/triceUart.h | 4 +- _test/ringB_de_xtea_cobs_ua/triceUart.h | 4 +- _test/ringB_de_xtea_tcobs_ua/triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- .../triceUart.h | 4 +- _test/special_for_debug/TargetActivity.c | 2 +- _test/special_for_debug/triceUart.h | 4 +- .../triceUart.h | 4 +- _test/testdata/triceCheck.c | 20 +- clang-format.sh | 6 +- demoLI.json | 44 +-- examples/F030_inst/Core/Inc/triceConfig.h | 17 +- examples/F030_inst/Core/Inc/triceUart.h | 24 +- examples/G0B1_inst/Core/Inc/triceConfig.h | 17 +- examples/G0B1_inst/Core/Inc/triceUart.h | 24 +- examples/L432_inst/Core/Inc/triceConfig.h | 203 ++++++----- examples/L432_inst/Core/Inc/triceUart.h | 24 +- examples/exampleData/triceExamples.c | 2 +- src/tcobsv1Encode.c | 24 +- src/trice.c | 55 ++- src/trice.h | 132 +++---- src/trice16McuReverse.h | 336 +++++++++--------- src/trice32McuReverse.h | 288 +++++++-------- src/trice64McuReverse.h | 290 +++++++-------- src/trice8McuOrder.h | 186 +++++----- src/trice8McuReverse.h | 288 +++++++-------- src/triceDefaultConfig.h | 20 +- src/triceMcuOrder.h | 12 +- src/triceMcuReverse.h | 8 +- testAll.sh | 10 +- 63 files changed, 1103 insertions(+), 1089 deletions(-) diff --git a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h +++ b/_test/_ERROR_dblB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h +++ b/_test/_ERROR_ringB_di_cobs_rtt32__de_xtea_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceUart.h b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceUart.h +++ b/_test/_ERROR_ringB_di_xtea_cobs_rtt32__de_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/_ringB_de_multi_cobs_ua/triceUart.h b/_test/_ringB_de_multi_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/_ringB_de_multi_cobs_ua/triceUart.h +++ b/_test/_ringB_de_multi_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/_ringB_protect_de_tcobs_ua/triceUart.h b/_test/_ringB_protect_de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/_ringB_protect_de_tcobs_ua/triceUart.h +++ b/_test/_ringB_protect_de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/_special_dblB_de_tcobs_ua/TargetActivity.c b/_test/_special_dblB_de_tcobs_ua/TargetActivity.c index 9ee6e42d4..a14c2f786 100644 --- a/_test/_special_dblB_de_tcobs_ua/TargetActivity.c +++ b/_test/_special_dblB_de_tcobs_ua/TargetActivity.c @@ -1,5 +1,7 @@ #include "trice.h" +// clang-format off + void TriceCheckSpecial( int n ) { static int8_t b8[24] = { 0, -1, -2, 0x33, 4, 5, 6, 7, 8, 9, 10, 11, 0, -1, -2, 0x33, 4, 5, 6, 7, 8, 9, 10, 11 }; @@ -27,3 +29,5 @@ void TriceCheckSpecial( int n ) { break; case __LINE__: trice64F("Rpc:FunctionNameZd", b64, sizeof(b64)/sizeof(int64_t) ); //exp: Rpc:FunctionNameZd(0000000000000000)(ffffffffffffffff)(fffffffffffffffe)(3344555566666666) } } + +// clang-format on diff --git a/_test/_special_dblB_de_tcobs_ua/triceUart.h b/_test/_special_dblB_de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/_special_dblB_de_tcobs_ua/triceUart.h +++ b/_test/_special_dblB_de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/be_dblB_de_tcobs_ua/triceUart.h b/_test/be_dblB_de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/be_dblB_de_tcobs_ua/triceUart.h +++ b/_test/be_dblB_de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_de_cobs_ua/triceUart.h b/_test/dblB_de_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_de_cobs_ua/triceUart.h +++ b/_test/dblB_de_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_de_multi_cobs_ua/triceUart.h b/_test/dblB_de_multi_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_de_multi_cobs_ua/triceUart.h +++ b/_test/dblB_de_multi_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_de_multi_nopf_ua/triceUart.h b/_test/dblB_de_multi_nopf_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_de_multi_nopf_ua/triceUart.h +++ b/_test/dblB_de_multi_nopf_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_de_multi_tcobs_ua/triceUart.h b/_test/dblB_de_multi_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_de_multi_tcobs_ua/triceUart.h +++ b/_test/dblB_de_multi_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_de_multi_xtea_cobs_ua/triceUart.h b/_test/dblB_de_multi_xtea_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_de_multi_xtea_cobs_ua/triceUart.h +++ b/_test/dblB_de_multi_xtea_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_de_tcobs_ua/triceUart.h b/_test/dblB_de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_de_tcobs_ua/triceUart.h +++ b/_test/dblB_de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_de_xtea_cobs_ua/triceUart.h b/_test/dblB_de_xtea_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_de_xtea_cobs_ua/triceUart.h +++ b/_test/dblB_de_xtea_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_de_xtea_tcobs_ua/triceUart.h b/_test/dblB_de_xtea_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_de_xtea_tcobs_ua/triceUart.h +++ b/_test/dblB_de_xtea_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt32__de_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt32__de_multi_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt32__de_multi_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt32__de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt8__de_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt8__de_multi_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt8__de_multi_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceUart.h b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceUart.h +++ b/_test/dblB_di_nopf_rtt8__de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_de_cobs_ua/triceUart.h b/_test/ringB_de_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_de_cobs_ua/triceUart.h +++ b/_test/ringB_de_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_de_multi_tcobs_ua/triceUart.h b/_test/ringB_de_multi_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_de_multi_tcobs_ua/triceUart.h +++ b/_test/ringB_de_multi_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_de_multi_xtea_cobs_ua/triceUart.h b/_test/ringB_de_multi_xtea_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_de_multi_xtea_cobs_ua/triceUart.h +++ b/_test/ringB_de_multi_xtea_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_de_multi_xtea_tcobs_ua/triceUart.h b/_test/ringB_de_multi_xtea_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_de_multi_xtea_tcobs_ua/triceUart.h +++ b/_test/ringB_de_multi_xtea_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_de_nopf_ua/triceUart.h b/_test/ringB_de_nopf_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_de_nopf_ua/triceUart.h +++ b/_test/ringB_de_nopf_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_de_tcobs_ua/triceUart.h b/_test/ringB_de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_de_tcobs_ua/triceUart.h +++ b/_test/ringB_de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_de_xtea_cobs_ua/triceUart.h b/_test/ringB_de_xtea_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_de_xtea_cobs_ua/triceUart.h +++ b/_test/ringB_de_xtea_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_de_xtea_tcobs_ua/triceUart.h b/_test/ringB_de_xtea_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_de_xtea_tcobs_ua/triceUart.h +++ b/_test/ringB_de_xtea_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceUart.h b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceUart.h +++ b/_test/ringB_di_cobs_rtt32__de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceUart.h b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceUart.h +++ b/_test/ringB_di_cobs_rtt8__de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceUart.h b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceUart.h +++ b/_test/ringB_di_nopf_rtt32__de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceUart.h b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceUart.h +++ b/_test/ringB_di_nopf_rtt32__de_xtea_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceUart.h b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceUart.h +++ b/_test/ringB_di_tcobs_rtt32__de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceUart.h b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceUart.h +++ b/_test/ringB_di_xtea_cobs_rtt32__de_xtea_cobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/special_for_debug/TargetActivity.c b/_test/special_for_debug/TargetActivity.c index 9d7adbc58..7029aa9a9 100644 --- a/_test/special_for_debug/TargetActivity.c +++ b/_test/special_for_debug/TargetActivity.c @@ -1,7 +1,7 @@ #include "trice.h" char* TargetActivity(void) { - uint8_t buf[3] = {0xaa,0xbb,0xcc}; + uint8_t buf[3] = {0xaa, 0xbb, 0xcc}; TRice8B("%3x\n", buf, 3); TRice8B("%3x\n", buf, 3); return "feed3322 aa bb cc\nfeed3322 aa bb cc"; diff --git a/_test/special_for_debug/triceUart.h b/_test/special_for_debug/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/special_for_debug/triceUart.h +++ b/_test/special_for_debug/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/special_protect_dblB_de_tcobs_ua/triceUart.h b/_test/special_protect_dblB_de_tcobs_ua/triceUart.h index 891963443..0a04f00a4 100644 --- a/_test/special_protect_dblB_de_tcobs_ua/triceUart.h +++ b/_test/special_protect_dblB_de_tcobs_ua/triceUart.h @@ -25,8 +25,8 @@ TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter - // LL_USART_TransmitData8(TRICE_UARTA, v); + TRICE_UNUSED(v); // Avoid noise with -Wunused-parameter + // LL_USART_TransmitData8(TRICE_UARTA, v); } //! Allow interrupt for empty trice data transmit register. diff --git a/_test/testdata/triceCheck.c b/_test/testdata/triceCheck.c index bf5d34db4..ff76e43cc 100644 --- a/_test/testdata/triceCheck.c +++ b/_test/testdata/triceCheck.c @@ -2591,10 +2591,10 @@ static int64_t DoubleToInt64(double f) { #endif //! SCOPY is a helper macro for struct serialization. -#define SCOPY(element) \ - do { \ - char const * n_SCOPY = #element; \ - size_t size_SCOPY = sizeof(src->element); \ +#define SCOPY(element) \ + do { \ + char const* n_SCOPY = #element; \ + size_t size_SCOPY = sizeof(src->element); \ memcpy(p, &(src->element), size_SCOPY); \ p += size_SCOPY; \ TRICE_S(ID(0), "rd:sizeof(%8s)", n_SCOPY); \ @@ -2602,10 +2602,10 @@ static int64_t DoubleToInt64(double f) { } while (0); //! DCOPY is a helper macro for struct deserialization. -#define DCOPY(element) \ - do { \ - char const * n_DCOPY = #element; \ - size_t size_DCOPY = sizeof(dst->element); \ +#define DCOPY(element) \ + do { \ + char const* n_DCOPY = #element; \ + size_t size_DCOPY = sizeof(dst->element); \ memcpy(&(dst->element), p, size_DCOPY); \ p += size_DCOPY; \ TRICE_S(ID(0), "rd:sizeof(%8s)", n_DCOPY); \ @@ -2727,7 +2727,7 @@ static void exampleOfManualSerialization(void) { #if !TRICE_OFF int len = serializeTryout(dst, &tx); // serialized byte count #else - int len = 0; + int len = 0; #endif TRICE(Id(0), "inf: Tryout tx struct:"); TRICE8_B(Id(0), " %02x ", &tx, sizeof(tx)); @@ -2764,7 +2764,7 @@ static void exampleOfManualJSONencoding(void) { static void dynString(int n) { char const* s = "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ.,"; const size_t l = strlen(s); - size_t N_dynString = (size_t)n; // avoid warning: comparison of integer expressions of different signedness: 'int' and 'size_t' + size_t N_dynString = (size_t)n; // avoid warning: comparison of integer expressions of different signedness: 'int' and 'size_t' N_dynString = N_dynString < l ? N_dynString : l; // trice("sig:%3d:", n ); - this gets overwritten in CGO_Test case, so we avoid it to keep testing simple. TRICE_N(id(0), "wr:%s\n", s, N_dynString); diff --git a/clang-format.sh b/clang-format.sh index ddc20e366..39089a9ad 100755 --- a/clang-format.sh +++ b/clang-format.sh @@ -1,8 +1,6 @@ -/C/bin/clang+llvm-18.1.8-x86_64-pc-windows-msvc/bin/clang-format.exe -i \ +clang-format -i \ ./src/*.c \ ./src/*.h \ ./_test/*/*.c \ ./_test/*/*.h \ -./examples/*/trice*.c \ -./examples/*/trice*.h \ - +./examples/*_inst/Core/Inc/trice*.h \ diff --git a/demoLI.json b/demoLI.json index 8f736d66f..b987f8a85 100644 --- a/demoLI.json +++ b/demoLI.json @@ -37,23 +37,23 @@ }, "13009": { "File": "examples/L432_inst/Core/Inc/triceConfig.h", - "Line": 1067 + "Line": 1066 }, "13010": { "File": "examples/L432_inst/Core/Inc/triceConfig.h", - "Line": 1077 + "Line": 1076 }, "13011": { "File": "examples/L432_inst/Core/Inc/triceConfig.h", - "Line": 1096 + "Line": 1095 }, "13012": { "File": "examples/L432_inst/Core/Inc/triceConfig.h", - "Line": 1103 + "Line": 1102 }, "13013": { "File": "examples/L432_inst/Core/Inc/triceConfig.h", - "Line": 1122 + "Line": 1121 }, "13014": { "File": "_test/testdata/triceCheck.c", @@ -8793,55 +8793,55 @@ }, "15198": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 11 + "Line": 13 }, "15199": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 12 + "Line": 14 }, "15200": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 13 + "Line": 15 }, "15201": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 14 + "Line": 16 }, "15202": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 15 + "Line": 17 }, "15203": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 16 + "Line": 18 }, "15204": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 17 + "Line": 19 }, "15205": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 18 + "Line": 20 }, "15206": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 19 + "Line": 21 }, "15207": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 20 + "Line": 22 }, "15208": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 21 + "Line": 23 }, "15209": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 22 + "Line": 24 }, "15210": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 23 + "Line": 25 }, "15211": { "File": "_test/_ringB_protect_de_tcobs_ua/TargetActivity.c", @@ -8849,7 +8849,7 @@ }, "15212": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 24 + "Line": 26 }, "15213": { "File": "_test/_ringB_protect_de_tcobs_ua/TargetActivity.c", @@ -8865,15 +8865,15 @@ }, "15216": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 25 + "Line": 27 }, "15217": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 26 + "Line": 28 }, "15218": { "File": "_test/_special_dblB_de_tcobs_ua/TargetActivity.c", - "Line": 27 + "Line": 29 }, "15219": { "File": "_test/special_protect_dblB_de_tcobs_ua/TargetActivity.c", diff --git a/examples/F030_inst/Core/Inc/triceConfig.h b/examples/F030_inst/Core/Inc/triceConfig.h index 84e93fad1..554526b54 100644 --- a/examples/F030_inst/Core/Inc/triceConfig.h +++ b/examples/F030_inst/Core/Inc/triceConfig.h @@ -15,7 +15,7 @@ extern "C" { extern uint32_t ms32; //! ms32 is a 32-bit millisecond counter, counting circular in steps of 1 every ms. #include "stm32f0xx_ll_system.h" #define TriceStamp16 (SysTick->VAL) // Counts from 31999 -> 0 in each ms. -#define TriceStamp32 ms32 // 1ms, wraps after 2^32 ms ~= 49,7 days +#define TriceStamp32 ms32 // 1ms, wraps after 2^32 ms ~= 49,7 days #define TRICE_BUFFER TRICE_DOUBLE_BUFFER #define TRICE_DEFERRED_BUFFER_SIZE 2048 @@ -34,10 +34,17 @@ extern uint32_t ms32; //! ms32 is a 32-bit millisecond counter, counting circula #define TRICE_UARTA USART2 #include "cmsis_gcc.h" -#define TRICE_ENTER_CRITICAL_SECTION { uint32_t primaskstate = __get_PRIMASK(); __disable_irq(); { -#define TRICE_LEAVE_CRITICAL_SECTION } __set_PRIMASK(primaskstate); } - -void TriceHeadLine(char const * name); +#define TRICE_ENTER_CRITICAL_SECTION \ + { \ + uint32_t primaskstate = __get_PRIMASK(); \ + __disable_irq(); \ + { +#define TRICE_LEAVE_CRITICAL_SECTION \ + } \ + __set_PRIMASK(primaskstate); \ + } + +void TriceHeadLine(char const* name); void LogTriceConfiguration(void); void SomeExampleTrices(int burstCount); diff --git a/examples/F030_inst/Core/Inc/triceUart.h b/examples/F030_inst/Core/Inc/triceUart.h index 22c4dfff4..d03f4ae47 100644 --- a/examples/F030_inst/Core/Inc/triceUart.h +++ b/examples/F030_inst/Core/Inc/triceUart.h @@ -12,8 +12,8 @@ extern "C" { #include "trice.h" #include "main.h" // hardware specific definitions -TRICE_INLINE void ToggleOpticalFeedbackLED( void ){ - //LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); +TRICE_INLINE void ToggleOpticalFeedbackLED(void) { + // LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); } #if TRICE_DEFERRED_UARTA == 1 @@ -23,27 +23,27 @@ TRICE_INLINE void ToggleOpticalFeedbackLED( void ){ //! \retval !0 == empty //! User must provide this function. TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { - return LL_USART_IsActiveFlag_TXE(TRICE_UARTA); + return LL_USART_IsActiveFlag_TXE(TRICE_UARTA); } //! Write value v into trice transmit register. //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - LL_USART_TransmitData8(TRICE_UARTA, v); - ToggleOpticalFeedbackLED(); + LL_USART_TransmitData8(TRICE_UARTA, v); + ToggleOpticalFeedbackLED(); } //! Allow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceEnableTxEmptyInterruptUartA(void) { - LL_USART_EnableIT_TXE(TRICE_UARTA); + LL_USART_EnableIT_TXE(TRICE_UARTA); } //! Disallow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceDisableTxEmptyInterruptUartA(void) { - LL_USART_DisableIT_TXE(TRICE_UARTA); + LL_USART_DisableIT_TXE(TRICE_UARTA); } #endif // #if TRICE_DEFERRED_UARTA == 1 @@ -54,27 +54,27 @@ TRICE_INLINE void triceDisableTxEmptyInterruptUartA(void) { //! \retval !0 == empty //! User must provide this function. TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartB(void) { - return LL_USART_IsActiveFlag_TXE(TRICE_UARTB); + return LL_USART_IsActiveFlag_TXE(TRICE_UARTB); } //! Write value v into trice transmit register. //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartB(uint8_t v) { - LL_USART_TransmitData8(TRICE_UARTB, v); - ToggleOpticalFeedbackLED(); + LL_USART_TransmitData8(TRICE_UARTB, v); + ToggleOpticalFeedbackLED(); } //! Allow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceEnableTxEmptyInterruptUartB(void) { - LL_USART_EnableIT_TXE(TRICE_UARTB); + LL_USART_EnableIT_TXE(TRICE_UARTB); } //! Disallow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceDisableTxEmptyInterruptUartB(void) { - LL_USART_DisableIT_TXE(TRICE_UARTB); + LL_USART_DisableIT_TXE(TRICE_UARTB); } #endif // #if TRICE_DEFERRED_UARTB == 1 diff --git a/examples/G0B1_inst/Core/Inc/triceConfig.h b/examples/G0B1_inst/Core/Inc/triceConfig.h index 00bb846b3..1c6d28196 100644 --- a/examples/G0B1_inst/Core/Inc/triceConfig.h +++ b/examples/G0B1_inst/Core/Inc/triceConfig.h @@ -13,9 +13,9 @@ extern "C" { #define TRICE_CLEAN 1 // Do not define this at an other place! But you can delete this here. // hardware specific trice lib settings -#include "main.h" -#define TriceStamp16 TIM17->CNT // 0...999 us -#define TriceStamp32 HAL_GetTick() // 0...2^32-1 ms (wraps after 49.7 days) +#include "main.h" +#define TriceStamp16 TIM17->CNT // 0...999 us +#define TriceStamp32 HAL_GetTick() // 0...2^32-1 ms (wraps after 49.7 days) #define TRICE_BUFFER TRICE_RING_BUFFER #define TRICE_DEFERRED_BUFFER_SIZE 2000 @@ -38,8 +38,15 @@ extern "C" { #define TRICE_UARTA USART2 #include "cmsis_gcc.h" -#define TRICE_ENTER_CRITICAL_SECTION { uint32_t primaskstate = __get_PRIMASK(); __disable_irq(); { -#define TRICE_LEAVE_CRITICAL_SECTION } __set_PRIMASK(primaskstate); } +#define TRICE_ENTER_CRITICAL_SECTION \ + { \ + uint32_t primaskstate = __get_PRIMASK(); \ + __disable_irq(); \ + { +#define TRICE_LEAVE_CRITICAL_SECTION \ + } \ + __set_PRIMASK(primaskstate); \ + } void TriceHeadLine(char const* name); void LogTriceConfiguration(void); diff --git a/examples/G0B1_inst/Core/Inc/triceUart.h b/examples/G0B1_inst/Core/Inc/triceUart.h index 22c4dfff4..d03f4ae47 100644 --- a/examples/G0B1_inst/Core/Inc/triceUart.h +++ b/examples/G0B1_inst/Core/Inc/triceUart.h @@ -12,8 +12,8 @@ extern "C" { #include "trice.h" #include "main.h" // hardware specific definitions -TRICE_INLINE void ToggleOpticalFeedbackLED( void ){ - //LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); +TRICE_INLINE void ToggleOpticalFeedbackLED(void) { + // LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); } #if TRICE_DEFERRED_UARTA == 1 @@ -23,27 +23,27 @@ TRICE_INLINE void ToggleOpticalFeedbackLED( void ){ //! \retval !0 == empty //! User must provide this function. TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { - return LL_USART_IsActiveFlag_TXE(TRICE_UARTA); + return LL_USART_IsActiveFlag_TXE(TRICE_UARTA); } //! Write value v into trice transmit register. //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - LL_USART_TransmitData8(TRICE_UARTA, v); - ToggleOpticalFeedbackLED(); + LL_USART_TransmitData8(TRICE_UARTA, v); + ToggleOpticalFeedbackLED(); } //! Allow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceEnableTxEmptyInterruptUartA(void) { - LL_USART_EnableIT_TXE(TRICE_UARTA); + LL_USART_EnableIT_TXE(TRICE_UARTA); } //! Disallow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceDisableTxEmptyInterruptUartA(void) { - LL_USART_DisableIT_TXE(TRICE_UARTA); + LL_USART_DisableIT_TXE(TRICE_UARTA); } #endif // #if TRICE_DEFERRED_UARTA == 1 @@ -54,27 +54,27 @@ TRICE_INLINE void triceDisableTxEmptyInterruptUartA(void) { //! \retval !0 == empty //! User must provide this function. TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartB(void) { - return LL_USART_IsActiveFlag_TXE(TRICE_UARTB); + return LL_USART_IsActiveFlag_TXE(TRICE_UARTB); } //! Write value v into trice transmit register. //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartB(uint8_t v) { - LL_USART_TransmitData8(TRICE_UARTB, v); - ToggleOpticalFeedbackLED(); + LL_USART_TransmitData8(TRICE_UARTB, v); + ToggleOpticalFeedbackLED(); } //! Allow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceEnableTxEmptyInterruptUartB(void) { - LL_USART_EnableIT_TXE(TRICE_UARTB); + LL_USART_EnableIT_TXE(TRICE_UARTB); } //! Disallow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceDisableTxEmptyInterruptUartB(void) { - LL_USART_DisableIT_TXE(TRICE_UARTB); + LL_USART_DisableIT_TXE(TRICE_UARTB); } #endif // #if TRICE_DEFERRED_UARTB == 1 diff --git a/examples/L432_inst/Core/Inc/triceConfig.h b/examples/L432_inst/Core/Inc/triceConfig.h index a0509b063..75c10c328 100644 --- a/examples/L432_inst/Core/Inc/triceConfig.h +++ b/examples/L432_inst/Core/Inc/triceConfig.h @@ -15,16 +15,16 @@ extern "C" { #include -extern volatile uint32_t * const DWT_CONTROL; -extern volatile uint32_t * const DWT_CYCCNT ; -extern volatile uint32_t * const DEMCR; -extern volatile uint32_t * const LAR; // lock access register +extern volatile uint32_t* const DWT_CONTROL; +extern volatile uint32_t* const DWT_CYCCNT; +extern volatile uint32_t* const DEMCR; +extern volatile uint32_t* const LAR; // lock access register -#define TriceStamp16 ((uint16_t)(*DWT_CYCCNT)) // @64MHz wraps after a bit more than 1ms (MCU clocks) -#define TriceStamp32 (*DWT_CYCCNT) // @64MHz -> 1 µs, wraps after 2^32 µs ~= 1.2 hours +#define TriceStamp16 ((uint16_t)(*DWT_CYCCNT)) // @64MHz wraps after a bit more than 1ms (MCU clocks) +#define TriceStamp32 (*DWT_CYCCNT) // @64MHz -> 1 µs, wraps after 2^32 µs ~= 1.2 hours -void TriceHeadLine(char const * name); -void LogTriceConfiguration( void ); +void TriceHeadLine(char const* name); +void LogTriceConfiguration(void); void SomeExampleTrices(int burstCount); #define TRICE_FULL_CHECK // enable all code inside triceCheck.c @@ -142,7 +142,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 8+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 8 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -154,7 +154,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 8+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 8 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -166,7 +166,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 8+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 8 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -178,7 +178,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 8+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 8 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -190,7 +190,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 8+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 8 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -202,7 +202,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 8+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 8 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -214,7 +214,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 8+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 8 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -226,7 +226,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 8+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 8 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -238,7 +238,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 16+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 16 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -248,7 +248,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE -#elif CONFIGURATION == 16+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 16 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -258,7 +258,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE -#elif CONFIGURATION == 16+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 16 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -268,7 +268,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE -#elif CONFIGURATION == 16+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 16 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -278,7 +278,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE -#elif CONFIGURATION == 16+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 16 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -288,7 +288,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE -#elif CONFIGURATION == 16+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 16 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -298,7 +298,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE -#elif CONFIGURATION == 16+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 16 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -308,7 +308,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE -#elif CONFIGURATION == 16+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 16 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -318,7 +318,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE -#elif CONFIGURATION == 24+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 24 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -329,7 +329,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 24+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 24 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -340,7 +340,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 24+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 24 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -351,7 +351,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 24+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 24 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -362,7 +362,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 24+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 24 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -373,7 +373,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 24+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 24 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -384,7 +384,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 24+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 24 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -395,7 +395,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 24+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 24 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -406,8 +406,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS - -#elif CONFIGURATION == 32+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -419,7 +418,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 32+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -431,7 +430,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 32+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -443,7 +442,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 32+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -455,7 +454,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 32+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -467,7 +466,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 32+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -479,7 +478,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 32+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -491,7 +490,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 32+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -503,7 +502,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 32+8+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -515,7 +514,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+8+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -527,7 +526,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+8+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -539,7 +538,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+8+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -551,7 +550,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+8+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -563,7 +562,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+8+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -575,7 +574,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+8+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -587,7 +586,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+8+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 8 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -599,7 +598,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+16+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 16 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -609,7 +608,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE -#elif CONFIGURATION == 32+16+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 16 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -619,7 +618,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE -#elif CONFIGURATION == 32+16+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 16 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -629,7 +628,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE -#elif CONFIGURATION == 32+16+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 16 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -639,7 +638,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE -#elif CONFIGURATION == 32+16+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 16 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -649,7 +648,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE -#elif CONFIGURATION == 32+16+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 16 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -659,7 +658,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE -#elif CONFIGURATION == 32+16+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 16 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -669,7 +668,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE -#elif CONFIGURATION == 32+16+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 16 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -679,7 +678,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE -#elif CONFIGURATION == 32+24+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 24 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -690,7 +689,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+24+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 24 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -701,7 +700,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+24+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 24 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -712,7 +711,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+24+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 24 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -723,7 +722,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+24+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 24 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -734,7 +733,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+24+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 24 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -745,7 +744,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+24+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 24 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -756,7 +755,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_SINGLE_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 32+24+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 32 + 24 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 @@ -767,7 +766,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_TRANSFER_MODE TRICE_MULTI_PACK_MODE #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -777,7 +776,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 64+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -787,7 +786,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 64+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -797,7 +796,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 64+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -807,7 +806,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 64+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -817,7 +816,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 64+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -827,7 +826,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 64+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -837,7 +836,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 64+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -847,7 +846,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_CONFIG_WARNINGS 0 -#elif CONFIGURATION == 64+8+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -857,7 +856,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+8+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -867,7 +866,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+8+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -877,7 +876,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+8+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -887,7 +886,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+8+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -897,7 +896,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+8+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -907,7 +906,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+8+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -917,7 +916,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+8+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 8 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -927,7 +926,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_XTEA_ENCRYPT 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+16+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 16 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -935,7 +934,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_PROTECT 0 #define TRICE_DIAGNOSTICS 0 -#elif CONFIGURATION == 64+16+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 16 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -943,7 +942,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_PROTECT 0 #define TRICE_DIAGNOSTICS 0 -#elif CONFIGURATION == 64+16+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 16 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -951,7 +950,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_PROTECT 1 #define TRICE_DIAGNOSTICS 0 -#elif CONFIGURATION == 64+16+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 16 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -959,7 +958,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_PROTECT 1 #define TRICE_DIAGNOSTICS 0 -#elif CONFIGURATION == 64+16+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 16 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -967,7 +966,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_PROTECT 0 #define TRICE_DIAGNOSTICS 1 -#elif CONFIGURATION == 64+16+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 16 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -975,7 +974,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_PROTECT 0 #define TRICE_DIAGNOSTICS 1 -#elif CONFIGURATION == 64+16+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 16 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -983,7 +982,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_PROTECT 1 #define TRICE_DIAGNOSTICS 1 -#elif CONFIGURATION == 64+16+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 16 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -991,7 +990,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_PROTECT 1 #define TRICE_DIAGNOSTICS 1 -#elif CONFIGURATION == 64+24+1 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 24 + 1 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -1000,7 +999,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+24+2 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 24 + 2 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -1009,7 +1008,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+24+3 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 24 + 3 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -1018,7 +1017,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+24+4 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 24 + 4 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -1027,7 +1026,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 0 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+24+5 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 24 + 5 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -1036,7 +1035,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+24+6 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 24 + 6 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -1045,7 +1044,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+24+7 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 24 + 7 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -1054,7 +1053,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIAGNOSTICS 1 #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS -#elif CONFIGURATION == 64+24+8 ////////////////////////////////////////////////////////////// +#elif CONFIGURATION == 64 + 24 + 8 ////////////////////////////////////////////////////////////// #define TRICE_DIRECT_OUTPUT 1 #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 @@ -1064,7 +1063,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS #elif CONFIGURATION == 97 ///////////////////////////////////////////////////////////// -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration with direct RTT output only and optimized for speed\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration with direct RTT output only and optimized for speed\n", CONFIGURATION); #define TRICE_DIRECT_OUTPUT 1 #define TRICE_BUFFER TRICE_STACK_BUFFER #define TRICE_PROTECT 0 @@ -1074,7 +1073,7 @@ void SomeExampleTrices(int burstCount); #define TRICE_DIRECT_SEGGER_RTT_32BIT_WRITE 1 #elif CONFIGURATION == 98 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - UART, no cycle counter, no critical sections.\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - UART, no cycle counter, no critical sections.\n", CONFIGURATION); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 @@ -1093,14 +1092,14 @@ void SomeExampleTrices(int burstCount); #define TRICE_LEAVE_CRITICAL_SECTION } #elif CONFIGURATION == 99 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An minimum configuration example.\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An minimum configuration example.\n", CONFIGURATION); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 #define TRICE_BUFFER TRICE_RING_BUFFER #elif CONFIGURATION == 100 ///////////////////////////////////////////////////// -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration with direct RTT output and parallel deferred UART output.\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration with direct RTT output and parallel deferred UART output.\n", CONFIGURATION); #define TRICE_DEFERRED_OUTPUT 1 #define TRICE_DEFERRED_UARTA 1 #define TRICE_UARTA USART2 @@ -1119,7 +1118,7 @@ void SomeExampleTrices(int burstCount); #endif #ifndef LogConfigInfo -#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration\n", CONFIGURATION ); +#define LogConfigInfo() trice8("dbg:CONFIGURATION == %d - An example configuration\n", CONFIGURATION); #endif #ifdef __cplusplus diff --git a/examples/L432_inst/Core/Inc/triceUart.h b/examples/L432_inst/Core/Inc/triceUart.h index 22c4dfff4..d03f4ae47 100644 --- a/examples/L432_inst/Core/Inc/triceUart.h +++ b/examples/L432_inst/Core/Inc/triceUart.h @@ -12,8 +12,8 @@ extern "C" { #include "trice.h" #include "main.h" // hardware specific definitions -TRICE_INLINE void ToggleOpticalFeedbackLED( void ){ - //LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); +TRICE_INLINE void ToggleOpticalFeedbackLED(void) { + // LL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin); } #if TRICE_DEFERRED_UARTA == 1 @@ -23,27 +23,27 @@ TRICE_INLINE void ToggleOpticalFeedbackLED( void ){ //! \retval !0 == empty //! User must provide this function. TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartA(void) { - return LL_USART_IsActiveFlag_TXE(TRICE_UARTA); + return LL_USART_IsActiveFlag_TXE(TRICE_UARTA); } //! Write value v into trice transmit register. //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartA(uint8_t v) { - LL_USART_TransmitData8(TRICE_UARTA, v); - ToggleOpticalFeedbackLED(); + LL_USART_TransmitData8(TRICE_UARTA, v); + ToggleOpticalFeedbackLED(); } //! Allow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceEnableTxEmptyInterruptUartA(void) { - LL_USART_EnableIT_TXE(TRICE_UARTA); + LL_USART_EnableIT_TXE(TRICE_UARTA); } //! Disallow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceDisableTxEmptyInterruptUartA(void) { - LL_USART_DisableIT_TXE(TRICE_UARTA); + LL_USART_DisableIT_TXE(TRICE_UARTA); } #endif // #if TRICE_DEFERRED_UARTA == 1 @@ -54,27 +54,27 @@ TRICE_INLINE void triceDisableTxEmptyInterruptUartA(void) { //! \retval !0 == empty //! User must provide this function. TRICE_INLINE uint32_t triceTxDataRegisterEmptyUartB(void) { - return LL_USART_IsActiveFlag_TXE(TRICE_UARTB); + return LL_USART_IsActiveFlag_TXE(TRICE_UARTB); } //! Write value v into trice transmit register. //! \param v byte to transmit //! User must provide this function. TRICE_INLINE void triceTransmitData8UartB(uint8_t v) { - LL_USART_TransmitData8(TRICE_UARTB, v); - ToggleOpticalFeedbackLED(); + LL_USART_TransmitData8(TRICE_UARTB, v); + ToggleOpticalFeedbackLED(); } //! Allow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceEnableTxEmptyInterruptUartB(void) { - LL_USART_EnableIT_TXE(TRICE_UARTB); + LL_USART_EnableIT_TXE(TRICE_UARTB); } //! Disallow interrupt for empty trice data transmit register. //! User must provide this function. TRICE_INLINE void triceDisableTxEmptyInterruptUartB(void) { - LL_USART_DisableIT_TXE(TRICE_UARTB); + LL_USART_DisableIT_TXE(TRICE_UARTB); } #endif // #if TRICE_DEFERRED_UARTB == 1 diff --git a/examples/exampleData/triceExamples.c b/examples/exampleData/triceExamples.c index 080447309..ebbf4f2bd 100644 --- a/examples/exampleData/triceExamples.c +++ b/examples/exampleData/triceExamples.c @@ -7,7 +7,7 @@ #if !TRICE_OFF //! TriceHeadLine emits a decorated name. The name length should be 18 characters. -void TriceHeadLine(char const * name) { +void TriceHeadLine(char const* name) { //! This is usable as the very first trice sequence after restart. Adapt it. Use a UTF-8 capable editor like VS-Code or use pure ASCII. TriceS("w: Hello! 👋🙂\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈%s🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n", (char*)name); } diff --git a/src/tcobsv1Encode.c b/src/tcobsv1Encode.c index 53b45a052..cf9f98bad 100644 --- a/src/tcobsv1Encode.c +++ b/src/tcobsv1Encode.c @@ -56,18 +56,18 @@ //! OUT_reptSigil writes one of the sigil bytes R2, R3, R4 //! according to reptCount and sets reptCount=0 and offset=0. //! If offset is bigger than 7 a NOP sigil byte is inserted. -#define OUT_reptSigil \ - { \ - ASSERT((zeroCount | fullCount) == 0); \ - ASSERT(2 <= reptCount && reptCount <= 4); \ - ASSERT(offset <= 31); \ - if (offset > 7) { \ - *o++ = N | offset; \ - offset = 0; \ - } \ - *o++ = (uint8_t)(((reptCount - 1) << 3) | offset); \ - offset = 0; \ - reptCount = 0; \ +#define OUT_reptSigil \ + { \ + ASSERT((zeroCount | fullCount) == 0); \ + ASSERT(2 <= reptCount && reptCount <= 4); \ + ASSERT(offset <= 31); \ + if (offset > 7) { \ + *o++ = N | offset; \ + offset = 0; \ + } \ + *o++ = (uint8_t)(((reptCount - 1) << 3) | offset); \ + offset = 0; \ + reptCount = 0; \ } int TCOBSEncode(void* __restrict output, const void* __restrict input, size_t length) { diff --git a/src/trice.c b/src/trice.c index 6ad7ddd44..93a4c77a1 100644 --- a/src/trice.c +++ b/src/trice.c @@ -395,7 +395,6 @@ size_t TriceEncode(unsigned encrypt, unsigned framing, uint8_t* dst, const uint8 default: return 0; // unexpected } - } #if (TRICE_DIAGNOSTICS == 1) && defined(SEGGER_RTT) @@ -931,111 +930,111 @@ void TRiceAssertFalse(int idN, char* msg, int flag) { #ifdef TRICE_N -void triceN(int tid, char const * fmt, void* buf, uint32_t n) { +void triceN(int tid, char const* fmt, void* buf, uint32_t n) { TRICE_N(id(tid), fmt, buf, n); } -void TriceN(int tid, char const * fmt, void* buf, uint32_t n) { +void TriceN(int tid, char const* fmt, void* buf, uint32_t n) { TRICE_N(Id(tid), fmt, buf, n); } -void TRiceN(int tid, char const * fmt, void* buf, uint32_t n) { +void TRiceN(int tid, char const* fmt, void* buf, uint32_t n) { TRICE_N(ID(tid), fmt, buf, n); } -void trice8B(int tid, char const * fmt, void* buf, uint32_t n) { +void trice8B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE8_B(id(tid), fmt, buf, n); } -void Trice8B(int tid, char const * fmt, void* buf, uint32_t n) { +void Trice8B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE8_B(Id(tid), fmt, buf, n); } -void TRice8B(int tid, char const * fmt, void* buf, uint32_t n) { +void TRice8B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE8_B(ID(tid), fmt, buf, n); } -void trice16B(int tid, char const * fmt, void* buf, uint32_t n) { +void trice16B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE16_B(id(tid), fmt, buf, n); } -void Trice16B(int tid, char const * fmt, void* buf, uint32_t n) { +void Trice16B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE16_B(Id(tid), fmt, buf, n); } -void TRice16B(int tid, char const * fmt, void* buf, uint32_t n) { +void TRice16B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE16_B(ID(tid), fmt, buf, n); } -void trice32B(int tid, char const * fmt, void* buf, uint32_t n) { +void trice32B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE32_B(id(tid), fmt, buf, n); } -void Trice32B(int tid, char const * fmt, void* buf, uint32_t n) { +void Trice32B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE32_B(Id(tid), fmt, buf, n); } -void TRice32B(int tid, char const * fmt, void* buf, uint32_t n) { +void TRice32B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE32_B(ID(tid), fmt, buf, n); } -void trice64B(int tid, char const * fmt, void* buf, uint32_t n) { +void trice64B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE64_B(id(tid), fmt, buf, n); } -void Trice64B(int tid, char const * fmt, void* buf, uint32_t n) { +void Trice64B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE64_B(Id(tid), fmt, buf, n); } -void TRice64B(int tid, char const * fmt, void* buf, uint32_t n) { +void TRice64B(int tid, char const* fmt, void* buf, uint32_t n) { TRICE64_B(ID(tid), fmt, buf, n); } -void trice8F(int tid, char const * fmt, void* buf, uint32_t n) { +void trice8F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE8_F(id(tid), fmt, buf, n); } -void Trice8F(int tid, char const * fmt, void* buf, uint32_t n) { +void Trice8F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE8_F(Id(tid), fmt, buf, n); } -void TRice8F(int tid, char const * fmt, void* buf, uint32_t n) { +void TRice8F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE8_F(ID(tid), fmt, buf, n); } -void trice16F(int tid, char const * fmt, void* buf, uint32_t n) { +void trice16F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE16_F(id(tid), fmt, buf, n); } -void Trice16F(int tid, char const * fmt, void* buf, uint32_t n) { +void Trice16F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE16_F(Id(tid), fmt, buf, n); } -void TRice16F(int tid, char const * fmt, void* buf, uint32_t n) { +void TRice16F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE16_F(ID(tid), fmt, buf, n); } -void trice32F(int tid, char const * fmt, void* buf, uint32_t n) { +void trice32F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE32_F(id(tid), fmt, buf, n); } -void Trice32F(int tid, char const * fmt, void* buf, uint32_t n) { +void Trice32F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE32_F(Id(tid), fmt, buf, n); } -void TRice32F(int tid, char const * fmt, void* buf, uint32_t n) { +void TRice32F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE32_F(ID(tid), fmt, buf, n); } -void trice64F(int tid, char const * fmt, void* buf, uint32_t n) { +void trice64F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE64_F(id(tid), fmt, buf, n); } -void Trice64F(int tid, char const * fmt, void* buf, uint32_t n) { +void Trice64F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE64_F(Id(tid), fmt, buf, n); } -void TRice64F(int tid, char const * fmt, void* buf, uint32_t n) { +void TRice64F(int tid, char const* fmt, void* buf, uint32_t n) { TRICE64_F(ID(tid), fmt, buf, n); } diff --git a/src/trice.h b/src/trice.h index 00beef359..1be9c21c3 100644 --- a/src/trice.h +++ b/src/trice.h @@ -223,8 +223,8 @@ extern unsigned TriceDeferredOverflowCount; #endif // #if TRICE_PROTECT == 1 #define TRICE_DYN_STRG_BUF_TRUNCATE_COUNT_INCREMENT() \ - do { \ - TriceDynStringBufTruncateCount++; \ + do { \ + TriceDynStringBufTruncateCount++; \ } while (0) #else // #if (TRICE_DIAGNOSTICS == 1) @@ -271,22 +271,22 @@ extern uint32_t* TriceBufferWritePosition; #define idLH idLH #define IdLH IdLH #define IDLH IDLH -//#define tsL tsL -//#define tsH tsH -//#define tsHH tsHH -//#define tsHL tsHL -//#define tsLH tsLH -//#define tsLL tsLL +// #define tsL tsL +// #define tsH tsH +// #define tsHH tsHH +// #define tsHL tsHL +// #define tsLH tsLH +// #define tsLL tsLL // /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// #pragma GCC diagnostic ignored "-Wincompatible-pointer-types" //! TRICE_PUT16 copies 16-bit value x into the Trice buffer. -#define TRICE_PUT16(x) \ - do { \ +#define TRICE_PUT16(x) \ + do { \ uint16_t* p_TRICE_PUT16 = (uint16_t*)TriceBufferWritePosition; \ *p_TRICE_PUT16++ = TRICE_HTOTS(x); \ - TriceBufferWritePosition = p_TRICE_PUT16; \ + TriceBufferWritePosition = p_TRICE_PUT16; \ } while (0) #include "trice8.h" #include "trice16.h" @@ -604,60 +604,60 @@ extern uint32_t* TriceBufferWritePosition; // // todo: for some reason this macro is not working well wit name len instead of len_, probably when injected len as value. // -#define TRICE_N(tid, pFmt, buf, n) \ - do { \ - TRICE_UNUSED(pFmt); \ +#define TRICE_N(tid, pFmt, buf, n) \ + do { \ + TRICE_UNUSED(pFmt); \ uint32_t limit_TRICE_N = TRICE_SINGLE_MAX_SIZE - 12; /* 12 = head(2) + max timestamp size(4) + count(2) + max 3 zeroes, we take 4 */ \ - uint32_t len_TRICE_N = (uint32_t)(n); /* n could be a constant */ \ - if (len_TRICE_N > limit_TRICE_N) { \ - TRICE_DYN_STRG_BUF_TRUNCATE_COUNT_INCREMENT(); \ - len_TRICE_N = limit_TRICE_N; \ - } \ - TRICE_ENTER tid; \ - if (len_TRICE_N <= 127) { \ - TRICE_CNTC(len_TRICE_N); \ - } else { \ - TRICE_LCNT(len_TRICE_N); \ - } \ - TRICE_PUT_BUFFER(buf, len_TRICE_N); \ - TRICE_LEAVE \ + uint32_t len_TRICE_N = (uint32_t)(n); /* n could be a constant */ \ + if (len_TRICE_N > limit_TRICE_N) { \ + TRICE_DYN_STRG_BUF_TRUNCATE_COUNT_INCREMENT(); \ + len_TRICE_N = limit_TRICE_N; \ + } \ + TRICE_ENTER tid; \ + if (len_TRICE_N <= 127) { \ + TRICE_CNTC(len_TRICE_N); \ + } else { \ + TRICE_LCNT(len_TRICE_N); \ + } \ + TRICE_PUT_BUFFER(buf, len_TRICE_N); \ + TRICE_LEAVE \ } while (0) -void triceN(int tid, char const * fmt, void* buf, uint32_t n); -void TriceN(int tid, char const * fmt, void* buf, uint32_t n); -void TRiceN(int tid, char const * fmt, void* buf, uint32_t n); +void triceN(int tid, char const* fmt, void* buf, uint32_t n); +void TriceN(int tid, char const* fmt, void* buf, uint32_t n); +void TRiceN(int tid, char const* fmt, void* buf, uint32_t n); -void trice8B(int tid, char const * fmt, void* buf, uint32_t n); -void Trice8B(int tid, char const * fmt, void* buf, uint32_t n); -void TRice8B(int tid, char const * fmt, void* buf, uint32_t n); +void trice8B(int tid, char const* fmt, void* buf, uint32_t n); +void Trice8B(int tid, char const* fmt, void* buf, uint32_t n); +void TRice8B(int tid, char const* fmt, void* buf, uint32_t n); -void trice16B(int tid, char const * fmt, void* buf, uint32_t n); -void Trice16B(int tid, char const * fmt, void* buf, uint32_t n); -void TRice16B(int tid, char const * fmt, void* buf, uint32_t n); +void trice16B(int tid, char const* fmt, void* buf, uint32_t n); +void Trice16B(int tid, char const* fmt, void* buf, uint32_t n); +void TRice16B(int tid, char const* fmt, void* buf, uint32_t n); -void trice32B(int tid, char const * fmt, void* buf, uint32_t n); -void Trice32B(int tid, char const * fmt, void* buf, uint32_t n); -void TRice32B(int tid, char const * fmt, void* buf, uint32_t n); +void trice32B(int tid, char const* fmt, void* buf, uint32_t n); +void Trice32B(int tid, char const* fmt, void* buf, uint32_t n); +void TRice32B(int tid, char const* fmt, void* buf, uint32_t n); -void trice64B(int tid, char const * fmt, void* buf, uint32_t n); -void Trice64B(int tid, char const * fmt, void* buf, uint32_t n); -void TRice64B(int tid, char const * fmt, void* buf, uint32_t n); +void trice64B(int tid, char const* fmt, void* buf, uint32_t n); +void Trice64B(int tid, char const* fmt, void* buf, uint32_t n); +void TRice64B(int tid, char const* fmt, void* buf, uint32_t n); -void trice8F(int tid, char const * fmt, void* buf, uint32_t n); -void Trice8F(int tid, char const * fmt, void* buf, uint32_t n); -void TRice8F(int tid, char const * fmt, void* buf, uint32_t n); +void trice8F(int tid, char const* fmt, void* buf, uint32_t n); +void Trice8F(int tid, char const* fmt, void* buf, uint32_t n); +void TRice8F(int tid, char const* fmt, void* buf, uint32_t n); -void trice16F(int tid, char const * fmt, void* buf, uint32_t n); -void Trice16F(int tid, char const * fmt, void* buf, uint32_t n); -void TRice16F(int tid, char const * fmt, void* buf, uint32_t n); +void trice16F(int tid, char const* fmt, void* buf, uint32_t n); +void Trice16F(int tid, char const* fmt, void* buf, uint32_t n); +void TRice16F(int tid, char const* fmt, void* buf, uint32_t n); -void trice32F(int tid, char const * fmt, void* buf, uint32_t n); -void Trice32F(int tid, char const * fmt, void* buf, uint32_t n); -void TRice32F(int tid, char const * fmt, void* buf, uint32_t n); +void trice32F(int tid, char const* fmt, void* buf, uint32_t n); +void Trice32F(int tid, char const* fmt, void* buf, uint32_t n); +void TRice32F(int tid, char const* fmt, void* buf, uint32_t n); -void trice64F(int tid, char const * fmt, void* buf, uint32_t n); -void Trice64F(int tid, char const * fmt, void* buf, uint32_t n); -void TRice64F(int tid, char const * fmt, void* buf, uint32_t n); +void trice64F(int tid, char const* fmt, void* buf, uint32_t n); +void Trice64F(int tid, char const* fmt, void* buf, uint32_t n); +void TRice64F(int tid, char const* fmt, void* buf, uint32_t n); #endif // #ifndef TRICE_N @@ -667,8 +667,8 @@ void TRice64F(int tid, char const * fmt, void* buf, uint32_t n); //! \param tid trice identifier //! \param pFmt format string for trice (ignored here but used by the trice tool) //! \param runtimeGeneratedString 0-terminated runtime generated string -#define TRICE_S(tid, pFmt, runtimeGeneratedString) \ - do { \ +#define TRICE_S(tid, pFmt, runtimeGeneratedString) \ + do { \ uint32_t ssiz_TRICE_S = strlen(runtimeGeneratedString); \ TRICE_N(tid, pFmt, runtimeGeneratedString, ssiz_TRICE_S); \ } while (0) @@ -682,20 +682,20 @@ void TRiceS(int tid, char* fmt, char* runtimeGeneratedString); //! ID writes 14-bit id with 11 as 2 most significant bits, followed by a 32-bit stamp. //! 11iiiiiiI TT | TT (NC) | ... //! C000 = 1100 0000 0000 0000 -#define ID(n) \ - do { \ - uint32_t ts_ID = TriceStamp32; \ +#define ID(n) \ + do { \ + uint32_t ts_ID = TriceStamp32; \ TRICE_PUT16_1616((((uint16_t)0xC000) | ((uint16_t)(n))), ts_ID); \ } while (0) //! Id writes 14-bit id with 10 as 2 most significant bits two times, followed by a 16-bit stamp. //! 10iiiiiiI 10iiiiiiI | TT (NC) | ... //! 8000 = 1000 0000 0000 0000 -#define Id(n) \ - do { \ - uint16_t ts_Id = TriceStamp16; \ +#define Id(n) \ + do { \ + uint16_t ts_Id = TriceStamp16; \ TRICE_PUT(TRICE_HTOTL(0x80008000u | (((uint32_t)(n)) << 16) | ((uint32_t)(n)))); \ - TRICE_PUT16(ts_Id); \ + TRICE_PUT16(ts_Id); \ } while (0) //! id writes 14-bit id with 01 as 2 most significant bits, followed by no stamp. @@ -707,10 +707,10 @@ void TRiceS(int tid, char* fmt, char* runtimeGeneratedString); #define iD(n) (n) //! TRICE_CNTC writes 7-bit byte count and 8-bit cycle counter. -#define TRICE_CNTC(count) \ - do { \ +#define TRICE_CNTC(count) \ + do { \ uint16_t v_TRICE_CNTC = (((uint16_t)(count)) << 8) | TRICE_CYCLE; \ - TRICE_PUT16(v_TRICE_CNTC); \ + TRICE_PUT16(v_TRICE_CNTC); \ } while (0) #if TRICE_CYCLE_COUNTER == 1 diff --git a/src/trice16McuReverse.h b/src/trice16McuReverse.h index 5301b7963..1c3a51289 100644 --- a/src/trice16McuReverse.h +++ b/src/trice16McuReverse.h @@ -85,214 +85,214 @@ TRICE_PUT16_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE -#define Trice16m_0(tid) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_0 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice16m_0)|TRICE16_HI_BYTE(ts_Trice16m_0)); \ +#define Trice16m_0(tid) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_0 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice16m_0) | TRICE16_HI_BYTE(ts_Trice16m_0)); \ TRICE_LEAVE //! Trice16m_1 writes trice data as fast as possible in a buffer. //! \param tid is a 16 bit Trice id in upper 2 bytes of a 32 bit value //! \param v0 a 16 bit value -#define Trice16m_1(tid, v0) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_1 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE16_LO_BYTE(ts_Trice16m_1)|TRICE16_HI_BYTE(ts_Trice16m_1)); \ - TRICE_PUT16_1(v0) \ - TRICE_LEAVE - -#define Trice16m_2(tid, v0, v1) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_2 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice16m_2)|TRICE16_HI_BYTE(ts_Trice16m_2)); \ - TRICE_PUT16_2(v0, v1); \ - TRICE_LEAVE - -#define Trice16m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_3 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE16_LO_BYTE(ts_Trice16m_3)|TRICE16_HI_BYTE(ts_Trice16m_3)); \ - TRICE_PUT16_3(v0, v1, v2); \ - TRICE_LEAVE - -#define Trice16m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_4 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice16m_4)|TRICE16_HI_BYTE(ts_Trice16m_4)); \ - TRICE_PUT16_4(v0, v1, v2, v3); \ - TRICE_LEAVE - -#define Trice16m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_5 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE16_LO_BYTE(ts_Trice16m_5)|TRICE16_HI_BYTE(ts_Trice16m_5)); \ - TRICE_PUT16_5(v0, v1, v2, v3, v4); \ - TRICE_LEAVE - -#define Trice16m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_6 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice16m_6)|TRICE16_HI_BYTE(ts_Trice16m_6)); \ - TRICE_PUT16_6(v0, v1, v2, v3, v4, v5); \ - TRICE_LEAVE - -#define Trice16m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_7 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (14 << 16) | TRICE16_LO_BYTE(ts_Trice16m_7)|TRICE16_HI_BYTE(ts_Trice16m_7)); \ - TRICE_PUT16_7(v0, v1, v2, v3, v4, v5, v6); \ - TRICE_LEAVE - -#define Trice16m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_8 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice16m_8)|TRICE16_HI_BYTE(ts_Trice16m_8)); \ - TRICE_PUT16_8(v0, v1, v2, v3, v4, v5, v6, v7); \ - TRICE_LEAVE - -#define Trice16m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_9 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (18 << 16) | TRICE16_LO_BYTE(ts_Trice16m_9)|TRICE16_HI_BYTE(ts_Trice16m_9)); \ - TRICE_PUT16_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ - TRICE_LEAVE - -#define Trice16m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_10 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE16_LO_BYTE(ts_Trice16m_10)|TRICE16_HI_BYTE(ts_Trice16m_10)); \ - TRICE_PUT16_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ - TRICE_LEAVE - -#define Trice16m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_11 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (22 << 16) | TRICE16_LO_BYTE(ts_Trice16m_11)|TRICE16_HI_BYTE(ts_Trice16m_11)); \ - TRICE_PUT16_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ - TRICE_LEAVE - -#define Trice16m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_ENTER \ - uint16_t ts_Trice16m_12 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice16m_12)|TRICE16_HI_BYTE(ts_Trice16m_12)); \ - TRICE_PUT16_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_LEAVE - -#define TRice16m_0(tid) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define Trice16m_1(tid, v0) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_1 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE16_LO_BYTE(ts_Trice16m_1) | TRICE16_HI_BYTE(ts_Trice16m_1)); \ + TRICE_PUT16_1(v0) \ + TRICE_LEAVE + +#define Trice16m_2(tid, v0, v1) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_2 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice16m_2) | TRICE16_HI_BYTE(ts_Trice16m_2)); \ + TRICE_PUT16_2(v0, v1); \ + TRICE_LEAVE + +#define Trice16m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_3 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE16_LO_BYTE(ts_Trice16m_3) | TRICE16_HI_BYTE(ts_Trice16m_3)); \ + TRICE_PUT16_3(v0, v1, v2); \ + TRICE_LEAVE + +#define Trice16m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_4 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice16m_4) | TRICE16_HI_BYTE(ts_Trice16m_4)); \ + TRICE_PUT16_4(v0, v1, v2, v3); \ + TRICE_LEAVE + +#define Trice16m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_5 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE16_LO_BYTE(ts_Trice16m_5) | TRICE16_HI_BYTE(ts_Trice16m_5)); \ + TRICE_PUT16_5(v0, v1, v2, v3, v4); \ + TRICE_LEAVE + +#define Trice16m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_6 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice16m_6) | TRICE16_HI_BYTE(ts_Trice16m_6)); \ + TRICE_PUT16_6(v0, v1, v2, v3, v4, v5); \ + TRICE_LEAVE + +#define Trice16m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_7 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (14 << 16) | TRICE16_LO_BYTE(ts_Trice16m_7) | TRICE16_HI_BYTE(ts_Trice16m_7)); \ + TRICE_PUT16_7(v0, v1, v2, v3, v4, v5, v6); \ + TRICE_LEAVE + +#define Trice16m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_8 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice16m_8) | TRICE16_HI_BYTE(ts_Trice16m_8)); \ + TRICE_PUT16_8(v0, v1, v2, v3, v4, v5, v6, v7); \ + TRICE_LEAVE + +#define Trice16m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_9 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (18 << 16) | TRICE16_LO_BYTE(ts_Trice16m_9) | TRICE16_HI_BYTE(ts_Trice16m_9)); \ + TRICE_PUT16_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ + TRICE_LEAVE + +#define Trice16m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_10 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE16_LO_BYTE(ts_Trice16m_10) | TRICE16_HI_BYTE(ts_Trice16m_10)); \ + TRICE_PUT16_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ + TRICE_LEAVE + +#define Trice16m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_11 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (22 << 16) | TRICE16_LO_BYTE(ts_Trice16m_11) | TRICE16_HI_BYTE(ts_Trice16m_11)); \ + TRICE_PUT16_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ + TRICE_LEAVE + +#define Trice16m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_ENTER \ + uint16_t ts_Trice16m_12 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice16m_12) | TRICE16_HI_BYTE(ts_Trice16m_12)); \ + TRICE_PUT16_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_LEAVE + +#define TRice16m_0(tid) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ TRICE_LEAVE //! TRice16m_1 writes trice data as fast as possible in a buffer. //! \param tid is a 14 bit Trice id in upper 2 bytes of a 32 bit value //! \param v0 a 16 bit value -#define TRice16m_1(tid, v0) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_1(tid, v0) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_1(v0) \ + TRICE_PUT16_1(v0) \ TRICE_LEAVE -#define TRice16m_2(tid, v0, v1) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_2(tid, v0, v1) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_2(v0, v1); \ + TRICE_PUT16_2(v0, v1); \ TRICE_LEAVE -#define TRice16m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_3(v0, v1, v2); \ + TRICE_PUT16_3(v0, v1, v2); \ TRICE_LEAVE -#define TRice16m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_4(v0, v1, v2, v3); \ + TRICE_PUT16_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define TRice16m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_5(v0, v1, v2, v3, v4); \ + TRICE_PUT16_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define TRice16m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_6(v0, v1, v2, v3, v4, v5); \ + TRICE_PUT16_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define TRice16m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (14 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_7(v0, v1, v2, v3, v4, v5, v6); \ + TRICE_PUT16_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define TRice16m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_8(v0, v1, v2, v3, v4, v5, v6, v7); \ + TRICE_PUT16_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define TRice16m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ +#define TRice16m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (18 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ + TRICE_PUT16_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE -#define TRice16m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ +#define TRice16m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ + TRICE_PUT16_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE -#define TRice16m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (22 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ +#define TRice16m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (22 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ + TRICE_PUT16_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE -#define TRice16m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_ENTER \ - uint32_t ts_TRice16m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ - TRICE_PUT16_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ +#define TRice16m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_ENTER \ + uint32_t ts_TRice16m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice16m_) | TRICE32_HH_BYTE(ts_TRice16m_) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE32_LL_BYTE(ts_TRice16m_) | TRICE32_LH_BYTE(ts_TRice16m_)) \ + TRICE_PUT16_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice32McuReverse.h b/src/trice32McuReverse.h index 1e7dc2746..e1a938564 100644 --- a/src/trice32McuReverse.h +++ b/src/trice32McuReverse.h @@ -79,208 +79,208 @@ TRICE_PUT32_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE -#define Trice32m_0(tid) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_0 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice32m_0)|TRICE16_HI_BYTE(ts_Trice32m_0)); \ +#define Trice32m_0(tid) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_0 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice32m_0) | TRICE16_HI_BYTE(ts_Trice32m_0)); \ TRICE_LEAVE -#define Trice32m_1(tid, v0) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_1 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice32m_1)|TRICE16_HI_BYTE(ts_Trice32m_1)); \ - TRICE_PUT32_1(v0) \ +#define Trice32m_1(tid, v0) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_1 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice32m_1) | TRICE16_HI_BYTE(ts_Trice32m_1)); \ + TRICE_PUT32_1(v0) \ TRICE_LEAVE -#define Trice32m_2(tid, v0, v1) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_2 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice32m_2)|TRICE16_HI_BYTE(ts_Trice32m_2)); \ - TRICE_PUT32_2(v0, v1); \ +#define Trice32m_2(tid, v0, v1) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_2 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice32m_2) | TRICE16_HI_BYTE(ts_Trice32m_2)); \ + TRICE_PUT32_2(v0, v1); \ TRICE_LEAVE -#define Trice32m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_3 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice32m_3)|TRICE16_HI_BYTE(ts_Trice32m_3)); \ - TRICE_PUT32_3(v0, v1, v2); \ +#define Trice32m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_3 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice32m_3) | TRICE16_HI_BYTE(ts_Trice32m_3)); \ + TRICE_PUT32_3(v0, v1, v2); \ TRICE_LEAVE -#define Trice32m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_4 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice32m_4)|TRICE16_HI_BYTE(ts_Trice32m_4)); \ - TRICE_PUT32_4(v0, v1, v2, v3); \ +#define Trice32m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_4 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice32m_4) | TRICE16_HI_BYTE(ts_Trice32m_4)); \ + TRICE_PUT32_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define Trice32m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_5 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE16_LO_BYTE(ts_Trice32m_5)|TRICE16_HI_BYTE(ts_Trice32m_5)); \ - TRICE_PUT32_5(v0, v1, v2, v3, v4); \ +#define Trice32m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_5 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE16_LO_BYTE(ts_Trice32m_5) | TRICE16_HI_BYTE(ts_Trice32m_5)); \ + TRICE_PUT32_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define Trice32m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_6 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice32m_6)|TRICE16_HI_BYTE(ts_Trice32m_6)); \ - TRICE_PUT32_6(v0, v1, v2, v3, v4, v5); \ +#define Trice32m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_6 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice32m_6) | TRICE16_HI_BYTE(ts_Trice32m_6)); \ + TRICE_PUT32_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define Trice32m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_7 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (28 << 16) | TRICE16_LO_BYTE(ts_Trice32m_7)|TRICE16_HI_BYTE(ts_Trice32m_7)); \ - TRICE_PUT32_7(v0, v1, v2, v3, v4, v5, v6); \ +#define Trice32m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_7 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (28 << 16) | TRICE16_LO_BYTE(ts_Trice32m_7) | TRICE16_HI_BYTE(ts_Trice32m_7)); \ + TRICE_PUT32_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define Trice32m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_8 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE16_LO_BYTE(ts_Trice32m_8)|TRICE16_HI_BYTE(ts_Trice32m_8)); \ - TRICE_PUT32_8(v0, v1, v2, v3, v4, v5, v6, v7); \ +#define Trice32m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_8 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE16_LO_BYTE(ts_Trice32m_8) | TRICE16_HI_BYTE(ts_Trice32m_8)); \ + TRICE_PUT32_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define Trice32m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_9 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (36 << 16) | TRICE16_LO_BYTE(ts_Trice32m_9)|TRICE16_HI_BYTE(ts_Trice32m_9)); \ - TRICE_PUT32_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ +#define Trice32m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_9 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (36 << 16) | TRICE16_LO_BYTE(ts_Trice32m_9) | TRICE16_HI_BYTE(ts_Trice32m_9)); \ + TRICE_PUT32_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE -#define Trice32m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_10 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE16_LO_BYTE(ts_Trice32m_10)|TRICE16_HI_BYTE(ts_Trice32m_10)); \ - TRICE_PUT32_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ +#define Trice32m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_10 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE16_LO_BYTE(ts_Trice32m_10) | TRICE16_HI_BYTE(ts_Trice32m_10)); \ + TRICE_PUT32_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE -#define Trice32m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_11 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (44 << 16) | TRICE16_LO_BYTE(ts_Trice32m_11)|TRICE16_HI_BYTE(ts_Trice32m_11)); \ - TRICE_PUT32_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ +#define Trice32m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_11 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (44 << 16) | TRICE16_LO_BYTE(ts_Trice32m_11) | TRICE16_HI_BYTE(ts_Trice32m_11)); \ + TRICE_PUT32_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE -#define Trice32m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_ENTER \ - uint16_t ts_Trice32m_12 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE16_LO_BYTE(ts_Trice32m_12)|TRICE16_HI_BYTE(ts_Trice32m_12)); \ - TRICE_PUT32_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ +#define Trice32m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_ENTER \ + uint16_t ts_Trice32m_12 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE16_LO_BYTE(ts_Trice32m_12) | TRICE16_HI_BYTE(ts_Trice32m_12)); \ + TRICE_PUT32_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE -#define TRice32m_0(tid) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_0 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_0) | TRICE32_HH_BYTE(ts_TRice32m_0)| IDLH) \ +#define TRice32m_0(tid) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_0 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_0) | TRICE32_HH_BYTE(ts_TRice32m_0) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | TRICE32_LL_BYTE(ts_TRice32m_0) | TRICE32_LH_BYTE(ts_TRice32m_0)) \ TRICE_LEAVE -#define TRice32m_1(tid, v0) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_1 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_1) | TRICE32_HH_BYTE(ts_TRice32m_1)| IDLH) \ +#define TRice32m_1(tid, v0) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_1 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_1) | TRICE32_HH_BYTE(ts_TRice32m_1) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE32_LL_BYTE(ts_TRice32m_1) | TRICE32_LH_BYTE(ts_TRice32m_1)) \ - TRICE_PUT32_1(v0) \ + TRICE_PUT32_1(v0) \ TRICE_LEAVE -#define TRice32m_2(tid, v0, v1) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_2 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_2) | TRICE32_HH_BYTE(ts_TRice32m_2)| IDLH) \ +#define TRice32m_2(tid, v0, v1) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_2 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_2) | TRICE32_HH_BYTE(ts_TRice32m_2) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE32_LL_BYTE(ts_TRice32m_2) | TRICE32_LH_BYTE(ts_TRice32m_2)) \ - TRICE_PUT32_2(v0, v1); \ + TRICE_PUT32_2(v0, v1); \ TRICE_LEAVE -#define TRice32m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_3 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_3) | TRICE32_HH_BYTE(ts_TRice32m_3)| IDLH) \ +#define TRice32m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_3 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_3) | TRICE32_HH_BYTE(ts_TRice32m_3) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE32_LL_BYTE(ts_TRice32m_3) | TRICE32_LH_BYTE(ts_TRice32m_3)) \ - TRICE_PUT32_3(v0, v1, v2); \ + TRICE_PUT32_3(v0, v1, v2); \ TRICE_LEAVE -#define TRice32m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_4 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_4) | TRICE32_HH_BYTE(ts_TRice32m_4)| IDLH) \ +#define TRice32m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_4 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_4) | TRICE32_HH_BYTE(ts_TRice32m_4) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE32_LL_BYTE(ts_TRice32m_4) | TRICE32_LH_BYTE(ts_TRice32m_4)) \ - TRICE_PUT32_4(v0, v1, v2, v3); \ + TRICE_PUT32_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define TRice32m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_5 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_5) | TRICE32_HH_BYTE(ts_TRice32m_5)| IDLH) \ +#define TRice32m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_5 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_5) | TRICE32_HH_BYTE(ts_TRice32m_5) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (20 << 16) | TRICE32_LL_BYTE(ts_TRice32m_5) | TRICE32_LH_BYTE(ts_TRice32m_5)) \ - TRICE_PUT32_5(v0, v1, v2, v3, v4); \ + TRICE_PUT32_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define TRice32m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_6 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_6) | TRICE32_HH_BYTE(ts_TRice32m_6)| IDLH) \ +#define TRice32m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_6 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_6) | TRICE32_HH_BYTE(ts_TRice32m_6) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE32_LL_BYTE(ts_TRice32m_6) | TRICE32_LH_BYTE(ts_TRice32m_6)) \ - TRICE_PUT32_6(v0, v1, v2, v3, v4, v5); \ + TRICE_PUT32_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define TRice32m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_7 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_7) | TRICE32_HH_BYTE(ts_TRice32m_7)| IDLH) \ +#define TRice32m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_7 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_7) | TRICE32_HH_BYTE(ts_TRice32m_7) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (28 << 16) | TRICE32_LL_BYTE(ts_TRice32m_7) | TRICE32_LH_BYTE(ts_TRice32m_7)) \ - TRICE_PUT32_7(v0, v1, v2, v3, v4, v5, v6); \ + TRICE_PUT32_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define TRice32m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_8 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_8) | TRICE32_HH_BYTE(ts_TRice32m_8)| IDLH) \ +#define TRice32m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_8 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_8) | TRICE32_HH_BYTE(ts_TRice32m_8) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE32_LL_BYTE(ts_TRice32m_8) | TRICE32_LH_BYTE(ts_TRice32m_8)) \ - TRICE_PUT32_8(v0, v1, v2, v3, v4, v5, v6, v7); \ + TRICE_PUT32_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define TRice32m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_9 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_9) | TRICE32_HH_BYTE(ts_TRice32m_9)| IDLH) \ +#define TRice32m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_9 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_9) | TRICE32_HH_BYTE(ts_TRice32m_9) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (36 << 16) | TRICE32_LL_BYTE(ts_TRice32m_9) | TRICE32_LH_BYTE(ts_TRice32m_9)) \ - TRICE_PUT32_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ + TRICE_PUT32_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE -#define TRice32m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_10 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_10) | TRICE32_HH_BYTE(ts_TRice32m_10)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE32_LL_BYTE(ts_TRice32m_10) | TRICE32_LH_BYTE(ts_TRice32m_10)) \ - TRICE_PUT32_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ +#define TRice32m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_10 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_10) | TRICE32_HH_BYTE(ts_TRice32m_10) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE32_LL_BYTE(ts_TRice32m_10) | TRICE32_LH_BYTE(ts_TRice32m_10)) \ + TRICE_PUT32_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE -#define TRice32m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_11 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_11) | TRICE32_HH_BYTE(ts_TRice32m_11)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (44 << 16) | TRICE32_LL_BYTE(ts_TRice32m_11) | TRICE32_LH_BYTE(ts_TRice32m_11)) \ - TRICE_PUT32_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ +#define TRice32m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_11 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_11) | TRICE32_HH_BYTE(ts_TRice32m_11) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (44 << 16) | TRICE32_LL_BYTE(ts_TRice32m_11) | TRICE32_LH_BYTE(ts_TRice32m_11)) \ + TRICE_PUT32_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE -#define TRice32m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_ENTER \ - uint32_t ts_TRice32m_12 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_12) | TRICE32_HH_BYTE(ts_TRice32m_12)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE32_LL_BYTE(ts_TRice32m_12) | TRICE32_LH_BYTE(ts_TRice32m_12)) \ - TRICE_PUT32_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ +#define TRice32m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_ENTER \ + uint32_t ts_TRice32m_12 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice32m_12) | TRICE32_HH_BYTE(ts_TRice32m_12) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE32_LL_BYTE(ts_TRice32m_12) | TRICE32_LH_BYTE(ts_TRice32m_12)) \ + TRICE_PUT32_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice64McuReverse.h b/src/trice64McuReverse.h index 522c1e9db..46e11b81d 100644 --- a/src/trice64McuReverse.h +++ b/src/trice64McuReverse.h @@ -79,208 +79,208 @@ TRICE_PUT64_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE -#define Trice64m_0(tid) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_0 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice64m_0)|TRICE16_HI_BYTE(ts_Trice64m_0)); \ +#define Trice64m_0(tid) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_0 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice64m_0) | TRICE16_HI_BYTE(ts_Trice64m_0)); \ TRICE_LEAVE -#define Trice64m_1(tid, v0) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_1 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice64m_1)|TRICE16_HI_BYTE(ts_Trice64m_1)); \ - TRICE_PUT64_1(v0) \ +#define Trice64m_1(tid, v0) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_1 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice64m_1) | TRICE16_HI_BYTE(ts_Trice64m_1)); \ + TRICE_PUT64_1(v0) \ TRICE_LEAVE -#define Trice64m_2(tid, v0, v1) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_2 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice64m_2)|TRICE16_HI_BYTE(ts_Trice64m_2)); \ - TRICE_PUT64_2(v0, v1); \ +#define Trice64m_2(tid, v0, v1) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_2 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE16_LO_BYTE(ts_Trice64m_2) | TRICE16_HI_BYTE(ts_Trice64m_2)); \ + TRICE_PUT64_2(v0, v1); \ TRICE_LEAVE -#define Trice64m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_3 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice64m_3)|TRICE16_HI_BYTE(ts_Trice64m_3)); \ - TRICE_PUT64_3(v0, v1, v2); \ +#define Trice64m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_3 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE16_LO_BYTE(ts_Trice64m_3) | TRICE16_HI_BYTE(ts_Trice64m_3)); \ + TRICE_PUT64_3(v0, v1, v2); \ TRICE_LEAVE -#define Trice64m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_4 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE16_LO_BYTE(ts_Trice64m_4)|TRICE16_HI_BYTE(ts_Trice64m_4)); \ - TRICE_PUT64_4(v0, v1, v2, v3); \ +#define Trice64m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_4 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE16_LO_BYTE(ts_Trice64m_4) | TRICE16_HI_BYTE(ts_Trice64m_4)); \ + TRICE_PUT64_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define Trice64m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_5 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE16_LO_BYTE(ts_Trice64m_5)|TRICE16_HI_BYTE(ts_Trice64m_5)); \ - TRICE_PUT64_5(v0, v1, v2, v3, v4); \ +#define Trice64m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_5 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE16_LO_BYTE(ts_Trice64m_5) | TRICE16_HI_BYTE(ts_Trice64m_5)); \ + TRICE_PUT64_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define Trice64m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_6 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE16_LO_BYTE(ts_Trice64m_6)|TRICE16_HI_BYTE(ts_Trice64m_6)); \ - TRICE_PUT64_6(v0, v1, v2, v3, v4, v5); \ +#define Trice64m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_6 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE16_LO_BYTE(ts_Trice64m_6) | TRICE16_HI_BYTE(ts_Trice64m_6)); \ + TRICE_PUT64_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define Trice64m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_7 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (56 << 16) | TRICE16_LO_BYTE(ts_Trice64m_7)|TRICE16_HI_BYTE(ts_Trice64m_7)); \ - TRICE_PUT64_7(v0, v1, v2, v3, v4, v5, v6); \ +#define Trice64m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_7 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (56 << 16) | TRICE16_LO_BYTE(ts_Trice64m_7) | TRICE16_HI_BYTE(ts_Trice64m_7)); \ + TRICE_PUT64_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define Trice64m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_8 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (64 << 16) | TRICE16_LO_BYTE(ts_Trice64m_8)|TRICE16_HI_BYTE(ts_Trice64m_8)); \ - TRICE_PUT64_8(v0, v1, v2, v3, v4, v5, v6, v7); \ +#define Trice64m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_8 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (64 << 16) | TRICE16_LO_BYTE(ts_Trice64m_8) | TRICE16_HI_BYTE(ts_Trice64m_8)); \ + TRICE_PUT64_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define Trice64m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_9 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (72 << 16) | TRICE16_LO_BYTE(ts_Trice64m_9)|TRICE16_HI_BYTE(ts_Trice64m_9)); \ - TRICE_PUT64_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ +#define Trice64m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_9 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (72 << 16) | TRICE16_LO_BYTE(ts_Trice64m_9) | TRICE16_HI_BYTE(ts_Trice64m_9)); \ + TRICE_PUT64_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE -#define Trice64m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_10 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (80 << 16) | TRICE16_LO_BYTE(ts_Trice64m_10)|TRICE16_HI_BYTE(ts_Trice64m_10)); \ - TRICE_PUT64_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ +#define Trice64m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_10 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (80 << 16) | TRICE16_LO_BYTE(ts_Trice64m_10) | TRICE16_HI_BYTE(ts_Trice64m_10)); \ + TRICE_PUT64_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE -#define Trice64m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_11 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (88 << 16) | TRICE16_LO_BYTE(ts_Trice64m_11)|TRICE16_HI_BYTE(ts_Trice64m_11)); \ - TRICE_PUT64_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ +#define Trice64m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_11 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (88 << 16) | TRICE16_LO_BYTE(ts_Trice64m_11) | TRICE16_HI_BYTE(ts_Trice64m_11)); \ + TRICE_PUT64_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE -#define Trice64m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_ENTER \ - uint16_t ts_Trice64m_12 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | TRICE16_LO_BYTE(ts_Trice64m_12)|TRICE16_HI_BYTE(ts_Trice64m_12)); \ - TRICE_PUT64_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ +#define Trice64m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_ENTER \ + uint16_t ts_Trice64m_12 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | TRICE16_LO_BYTE(ts_Trice64m_12) | TRICE16_HI_BYTE(ts_Trice64m_12)); \ + TRICE_PUT64_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE - -#define TRice64m_0(tid) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH); \ + +#define TRice64m_0(tid) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH); \ TRICE_PUT((TRICE_CYCLE << 24) | (0 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ TRICE_LEAVE -#define TRice64m_1(tid, v0) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_1(tid, v0) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_1(v0) \ + TRICE_PUT64_1(v0) \ TRICE_LEAVE -#define TRice64m_2(tid, v0, v1) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_2(tid, v0, v1) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (16 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_2(v0, v1); \ + TRICE_PUT64_2(v0, v1); \ TRICE_LEAVE -#define TRice64m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (24 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_3(v0, v1, v2); \ + TRICE_PUT64_3(v0, v1, v2); \ TRICE_LEAVE -#define TRice64m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (32 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_4(v0, v1, v2, v3); \ + TRICE_PUT64_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define TRice64m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (40 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_5(v0, v1, v2, v3, v4); \ + TRICE_PUT64_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define TRice64m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (48 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_6(v0, v1, v2, v3, v4, v5); \ + TRICE_PUT64_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define TRice64m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (56 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_7(v0, v1, v2, v3, v4, v5, v6); \ + TRICE_PUT64_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define TRice64m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (64 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_8(v0, v1, v2, v3, v4, v5, v6, v7); \ + TRICE_PUT64_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define TRice64m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ +#define TRice64m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (72 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ + TRICE_PUT64_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE -#define TRice64m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (80 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ +#define TRice64m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (80 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ + TRICE_PUT64_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE -#define TRice64m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (88 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ +#define TRice64m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (88 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ + TRICE_PUT64_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE -#define TRice64m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_ENTER \ - uint32_t ts_TRice64m_ = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ - TRICE_PUT64_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ +#define TRice64m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_ENTER \ + uint32_t ts_TRice64m_ = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice64m_) | TRICE32_HH_BYTE(ts_TRice64m_) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (96 << 16) | TRICE32_LL_BYTE(ts_TRice64m_) | TRICE32_LH_BYTE(ts_TRice64m_)) \ + TRICE_PUT64_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice8McuOrder.h b/src/trice8McuOrder.h index a2d88703c..171995e49 100644 --- a/src/trice8McuOrder.h +++ b/src/trice8McuOrder.h @@ -79,208 +79,208 @@ TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE -#define Trice8m_0(tid) \ - TRICE_ENTER \ +#define Trice8m_0(tid) \ + TRICE_ENTER \ uint16_t ts_Trice8m_0 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ TRICE_PUT(0 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_0); \ TRICE_LEAVE -#define Trice8m_1(tid, v0) \ - TRICE_ENTER \ +#define Trice8m_1(tid, v0) \ + TRICE_ENTER \ uint16_t ts_Trice8m_1 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ TRICE_PUT(1 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_1); \ - TRICE_PUT8_1(v0) \ + TRICE_PUT8_1(v0) \ TRICE_LEAVE -#define Trice8m_2(tid, v0, v1) \ - TRICE_ENTER \ +#define Trice8m_2(tid, v0, v1) \ + TRICE_ENTER \ uint16_t ts_Trice8m_2 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ TRICE_PUT(2 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_2); \ - TRICE_PUT8_2(v0, v1); \ + TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE -#define Trice8m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ +#define Trice8m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ uint16_t ts_Trice8m_3 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ TRICE_PUT(3 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_3); \ - TRICE_PUT8_3(v0, v1, v2); \ + TRICE_PUT8_3(v0, v1, v2); \ TRICE_LEAVE -#define Trice8m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ +#define Trice8m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ uint16_t ts_Trice8m_4 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ TRICE_PUT(4 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_4); \ - TRICE_PUT8_4(v0, v1, v2, v3); \ + TRICE_PUT8_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define Trice8m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ +#define Trice8m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ uint16_t ts_Trice8m_5 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ TRICE_PUT(5 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_5); \ - TRICE_PUT8_5(v0, v1, v2, v3, v4); \ + TRICE_PUT8_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define Trice8m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ +#define Trice8m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ uint16_t ts_Trice8m_6 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ TRICE_PUT(6 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_6); \ - TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ + TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define Trice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ +#define Trice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ uint16_t ts_Trice8m_7 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ TRICE_PUT(7 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_7); \ - TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ + TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define Trice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_8 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(8 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_8); \ - TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ +#define Trice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_8 = TriceStamp16; \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(8 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_8); \ + TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define Trice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_9 = TriceStamp16; \ - TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(9 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_9); \ - TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ +#define Trice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_9 = TriceStamp16; \ + TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ + TRICE_PUT(9 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_9); \ + TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE #define Trice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ TRICE_ENTER \ - uint16_t ts_Trice8m_10 = TriceStamp16; \ + uint16_t ts_Trice8m_10 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(10 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_10); \ + TRICE_PUT(10 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_10); \ TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE #define Trice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ TRICE_ENTER \ - uint16_t ts_Trice8m_11 = TriceStamp16; \ + uint16_t ts_Trice8m_11 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(11 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_11); \ + TRICE_PUT(11 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_11); \ TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define Trice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint16_t ts_Trice8m_12 = TriceStamp16; \ + uint16_t ts_Trice8m_12 = TriceStamp16; \ TRICE_PUT(0x80008000 | (tid << 16) | (tid)); \ - TRICE_PUT(12 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_12); \ + TRICE_PUT(12 << 24 | (TRICE_CYCLE << 16) | ts_Trice8m_12); \ TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE -#define TRice8m_0(tid) \ - TRICE_ENTER \ +#define TRice8m_0(tid) \ + TRICE_ENTER \ uint32_t ts_TRice8m_0 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_0 << 16) | 0xc000 | (tid)); \ TRICE_PUT(0 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_0 >> 16)); \ TRICE_LEAVE -#define TRice8m_1(tid, v0) \ - TRICE_ENTER \ +#define TRice8m_1(tid, v0) \ + TRICE_ENTER \ uint32_t ts_TRice8m_1 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_1 << 16) | 0xc000 | (tid)); \ TRICE_PUT(1 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_1 >> 16)); \ - TRICE_PUT8_1(v0) \ + TRICE_PUT8_1(v0) \ TRICE_LEAVE -#define TRice8m_2(tid, v0, v1) \ - TRICE_ENTER \ +#define TRice8m_2(tid, v0, v1) \ + TRICE_ENTER \ uint32_t ts_TRice8m_2 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_2 << 16) | 0xc000 | (tid)); \ TRICE_PUT(2 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_2 >> 16)); \ - TRICE_PUT8_2(v0, v1); \ + TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE -#define TRice8m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ +#define TRice8m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ uint32_t ts_TRice8m_3 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_3 << 16) | 0xc000 | (tid)); \ TRICE_PUT(3 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_3 >> 16)); \ - TRICE_PUT8_3(v0, v1, v2); \ + TRICE_PUT8_3(v0, v1, v2); \ TRICE_LEAVE -#define TRice8m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ +#define TRice8m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ uint32_t ts_TRice8m_4 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_4 << 16) | 0xc000 | (tid)); \ TRICE_PUT(4 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_4 >> 16)); \ - TRICE_PUT8_4(v0, v1, v2, v3); \ + TRICE_PUT8_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define TRice8m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ +#define TRice8m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ uint32_t ts_TRice8m_5 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_5 << 16) | 0xc000 | (tid)); \ TRICE_PUT(5 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_5 >> 16)); \ - TRICE_PUT8_5(v0, v1, v2, v3, v4); \ + TRICE_PUT8_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define TRice8m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ +#define TRice8m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ uint32_t ts_TRice8m_6 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_6 << 16) | 0xc000 | (tid)); \ TRICE_PUT(6 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_6 >> 16)); \ - TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ + TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define TRice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ +#define TRice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ uint32_t ts_TRice8m_7 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_7 << 16) | 0xc000 | (tid)); \ TRICE_PUT(7 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_7 >> 16)); \ - TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ + TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define TRice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ +#define TRice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ uint32_t ts_TRice8m_8 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_8 << 16) | 0xc000 | (tid)); \ TRICE_PUT(8 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_8 >> 16)); \ - TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ + TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define TRice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ +#define TRice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ uint32_t ts_TRice8m_9 = TriceStamp32; \ TRICE_PUT((ts_TRice8m_9 << 16) | 0xc000 | (tid)); \ TRICE_PUT(9 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_9 >> 16)); \ - TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ + TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE -#define TRice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_10 = TriceStamp32; \ - TRICE_PUT((ts_TRice8m_10 << 16) | 0xc000 | (tid)); \ - TRICE_PUT(10 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_10 >> 16)); \ - TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ +#define TRice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_10 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_10 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(10 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_10 >> 16)); \ + TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE -#define TRice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_11 = TriceStamp32; \ - TRICE_PUT((ts_TRice8m_11 << 16) | 0xc000 | (tid)); \ - TRICE_PUT(11 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_11 >> 16)); \ - TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ +#define TRice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_11 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_11 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(11 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_11 >> 16)); \ + TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE #define TRice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_ENTER \ - uint32_t ts_TRice8m_12 = TriceStamp32; \ - TRICE_PUT((ts_TRice8m_12 << 16) | 0xc000 | (tid)); \ - TRICE_PUT(12 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_12 >> 16)); \ + uint32_t ts_TRice8m_12 = TriceStamp32; \ + TRICE_PUT((ts_TRice8m_12 << 16) | 0xc000 | (tid)); \ + TRICE_PUT(12 << 24 | (TRICE_CYCLE << 16) | (ts_TRice8m_12 >> 16)); \ TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/trice8McuReverse.h b/src/trice8McuReverse.h index 36187e0f5..57ed90f9b 100644 --- a/src/trice8McuReverse.h +++ b/src/trice8McuReverse.h @@ -79,208 +79,208 @@ TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE -#define Trice8m_0(tid) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_0 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice8m_0)|TRICE16_HI_BYTE(ts_Trice8m_0)); \ +#define Trice8m_0(tid) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_0 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | TRICE16_LO_BYTE(ts_Trice8m_0) | TRICE16_HI_BYTE(ts_Trice8m_0)); \ TRICE_LEAVE -#define Trice8m_1(tid, v0) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_1 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (1 << 16) | TRICE16_LO_BYTE(ts_Trice8m_1)|TRICE16_HI_BYTE(ts_Trice8m_1)); \ - TRICE_PUT8_1(v0) \ +#define Trice8m_1(tid, v0) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_1 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (1 << 16) | TRICE16_LO_BYTE(ts_Trice8m_1) | TRICE16_HI_BYTE(ts_Trice8m_1)); \ + TRICE_PUT8_1(v0) \ TRICE_LEAVE -#define Trice8m_2(tid, v0, v1) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_2 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE16_LO_BYTE(ts_Trice8m_2)|TRICE16_HI_BYTE(ts_Trice8m_2)); \ - TRICE_PUT8_2(v0, v1); \ +#define Trice8m_2(tid, v0, v1) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_2 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE16_LO_BYTE(ts_Trice8m_2) | TRICE16_HI_BYTE(ts_Trice8m_2)); \ + TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE -#define Trice8m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_3 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (3 << 16) | TRICE16_LO_BYTE(ts_Trice8m_3)|TRICE16_HI_BYTE(ts_Trice8m_3)); \ - TRICE_PUT8_3(v0, v1, v2); \ +#define Trice8m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_3 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (3 << 16) | TRICE16_LO_BYTE(ts_Trice8m_3) | TRICE16_HI_BYTE(ts_Trice8m_3)); \ + TRICE_PUT8_3(v0, v1, v2); \ TRICE_LEAVE -#define Trice8m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_4 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice8m_4)|TRICE16_HI_BYTE(ts_Trice8m_4)); \ - TRICE_PUT8_4(v0, v1, v2, v3); \ +#define Trice8m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_4 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE16_LO_BYTE(ts_Trice8m_4) | TRICE16_HI_BYTE(ts_Trice8m_4)); \ + TRICE_PUT8_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define Trice8m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_5 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (5 << 16) | TRICE16_LO_BYTE(ts_Trice8m_5)|TRICE16_HI_BYTE(ts_Trice8m_5)); \ - TRICE_PUT8_5(v0, v1, v2, v3, v4); \ +#define Trice8m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_5 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (5 << 16) | TRICE16_LO_BYTE(ts_Trice8m_5) | TRICE16_HI_BYTE(ts_Trice8m_5)); \ + TRICE_PUT8_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define Trice8m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_6 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE16_LO_BYTE(ts_Trice8m_6)|TRICE16_HI_BYTE(ts_Trice8m_6)); \ - TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ +#define Trice8m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_6 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE16_LO_BYTE(ts_Trice8m_6) | TRICE16_HI_BYTE(ts_Trice8m_6)); \ + TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define Trice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_7 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (7 << 16) | TRICE16_LO_BYTE(ts_Trice8m_7)|TRICE16_HI_BYTE(ts_Trice8m_7)); \ - TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ +#define Trice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_7 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (7 << 16) | TRICE16_LO_BYTE(ts_Trice8m_7) | TRICE16_HI_BYTE(ts_Trice8m_7)); \ + TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define Trice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_8 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice8m_8)|TRICE16_HI_BYTE(ts_Trice8m_8)); \ - TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ +#define Trice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_8 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE16_LO_BYTE(ts_Trice8m_8) | TRICE16_HI_BYTE(ts_Trice8m_8)); \ + TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define Trice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_9 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (9 << 16) | TRICE16_LO_BYTE(ts_Trice8m_9)|TRICE16_HI_BYTE(ts_Trice8m_9)); \ - TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ +#define Trice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_9 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (9 << 16) | TRICE16_LO_BYTE(ts_Trice8m_9) | TRICE16_HI_BYTE(ts_Trice8m_9)); \ + TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE -#define Trice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_10 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE16_LO_BYTE(ts_Trice8m_10)|TRICE16_HI_BYTE(ts_Trice8m_10)); \ - TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ +#define Trice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_10 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE16_LO_BYTE(ts_Trice8m_10) | TRICE16_HI_BYTE(ts_Trice8m_10)); \ + TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE -#define Trice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_11 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (11 << 16) | TRICE16_LO_BYTE(ts_Trice8m_11)|TRICE16_HI_BYTE(ts_Trice8m_11)); \ - TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ +#define Trice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_11 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (11 << 16) | TRICE16_LO_BYTE(ts_Trice8m_11) | TRICE16_HI_BYTE(ts_Trice8m_11)); \ + TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE -#define Trice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_ENTER \ - uint16_t ts_Trice8m_12 = TriceStamp16; \ - TRICE_PUT(((IdLH) << 16) | IdLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice8m_12)|TRICE16_HI_BYTE(ts_Trice8m_12)); \ - TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ +#define Trice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_ENTER \ + uint16_t ts_Trice8m_12 = TriceStamp16; \ + TRICE_PUT(((IdLH) << 16) | IdLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE16_LO_BYTE(ts_Trice8m_12) | TRICE16_HI_BYTE(ts_Trice8m_12)); \ + TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE -#define TRice8m_0(tid) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_0 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_0) | TRICE32_HH_BYTE(ts_TRice8m_0)| IDLH) \ +#define TRice8m_0(tid) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_0 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_0) | TRICE32_HH_BYTE(ts_TRice8m_0) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | TRICE32_LL_BYTE(ts_TRice8m_0) | TRICE32_LH_BYTE(ts_TRice8m_0)) \ TRICE_LEAVE -#define TRice8m_1(tid, v0) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_1 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_1) | TRICE32_HH_BYTE(ts_TRice8m_1)| IDLH) \ +#define TRice8m_1(tid, v0) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_1 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_1) | TRICE32_HH_BYTE(ts_TRice8m_1) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (1 << 16) | TRICE32_LL_BYTE(ts_TRice8m_1) | TRICE32_LH_BYTE(ts_TRice8m_1)) \ - TRICE_PUT8_1(v0) \ + TRICE_PUT8_1(v0) \ TRICE_LEAVE -#define TRice8m_2(tid, v0, v1) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_2 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_2) | TRICE32_HH_BYTE(ts_TRice8m_2)| IDLH) \ +#define TRice8m_2(tid, v0, v1) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_2 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_2) | TRICE32_HH_BYTE(ts_TRice8m_2) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (2 << 16) | TRICE32_LL_BYTE(ts_TRice8m_2) | TRICE32_LH_BYTE(ts_TRice8m_2)) \ - TRICE_PUT8_2(v0, v1); \ + TRICE_PUT8_2(v0, v1); \ TRICE_LEAVE -#define TRice8m_3(tid, v0, v1, v2) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_3 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_3) | TRICE32_HH_BYTE(ts_TRice8m_3)| IDLH) \ +#define TRice8m_3(tid, v0, v1, v2) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_3 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_3) | TRICE32_HH_BYTE(ts_TRice8m_3) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (3 << 16) | TRICE32_LL_BYTE(ts_TRice8m_3) | TRICE32_LH_BYTE(ts_TRice8m_3)) \ - TRICE_PUT8_3(v0, v1, v2); \ + TRICE_PUT8_3(v0, v1, v2); \ TRICE_LEAVE -#define TRice8m_4(tid, v0, v1, v2, v3) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_4 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_4) | TRICE32_HH_BYTE(ts_TRice8m_4)| IDLH) \ +#define TRice8m_4(tid, v0, v1, v2, v3) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_4 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_4) | TRICE32_HH_BYTE(ts_TRice8m_4) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (4 << 16) | TRICE32_LL_BYTE(ts_TRice8m_4) | TRICE32_LH_BYTE(ts_TRice8m_4)) \ - TRICE_PUT8_4(v0, v1, v2, v3); \ + TRICE_PUT8_4(v0, v1, v2, v3); \ TRICE_LEAVE -#define TRice8m_5(tid, v0, v1, v2, v3, v4) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_5 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_5) | TRICE32_HH_BYTE(ts_TRice8m_5)| IDLH) \ +#define TRice8m_5(tid, v0, v1, v2, v3, v4) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_5 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_5) | TRICE32_HH_BYTE(ts_TRice8m_5) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (5 << 16) | TRICE32_LL_BYTE(ts_TRice8m_5) | TRICE32_LH_BYTE(ts_TRice8m_5)) \ - TRICE_PUT8_5(v0, v1, v2, v3, v4); \ + TRICE_PUT8_5(v0, v1, v2, v3, v4); \ TRICE_LEAVE -#define TRice8m_6(tid, v0, v1, v2, v3, v4, v5) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_6 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_6) | TRICE32_HH_BYTE(ts_TRice8m_6)| IDLH) \ +#define TRice8m_6(tid, v0, v1, v2, v3, v4, v5) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_6 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_6) | TRICE32_HH_BYTE(ts_TRice8m_6) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (6 << 16) | TRICE32_LL_BYTE(ts_TRice8m_6) | TRICE32_LH_BYTE(ts_TRice8m_6)) \ - TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ + TRICE_PUT8_6(v0, v1, v2, v3, v4, v5); \ TRICE_LEAVE -#define TRice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_7 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_7) | TRICE32_HH_BYTE(ts_TRice8m_7)| IDLH) \ +#define TRice8m_7(tid, v0, v1, v2, v3, v4, v5, v6) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_7 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_7) | TRICE32_HH_BYTE(ts_TRice8m_7) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (7 << 16) | TRICE32_LL_BYTE(ts_TRice8m_7) | TRICE32_LH_BYTE(ts_TRice8m_7)) \ - TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ + TRICE_PUT8_7(v0, v1, v2, v3, v4, v5, v6); \ TRICE_LEAVE -#define TRice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_8 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_8) | TRICE32_HH_BYTE(ts_TRice8m_8)| IDLH) \ +#define TRice8m_8(tid, v0, v1, v2, v3, v4, v5, v6, v7) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_8 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_8) | TRICE32_HH_BYTE(ts_TRice8m_8) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (8 << 16) | TRICE32_LL_BYTE(ts_TRice8m_8) | TRICE32_LH_BYTE(ts_TRice8m_8)) \ - TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ + TRICE_PUT8_8(v0, v1, v2, v3, v4, v5, v6, v7); \ TRICE_LEAVE -#define TRice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_9 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_9) | TRICE32_HH_BYTE(ts_TRice8m_9)| IDLH) \ +#define TRice8m_9(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_9 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_9) | TRICE32_HH_BYTE(ts_TRice8m_9) | IDLH) \ TRICE_PUT((TRICE_CYCLE << 24) | (9 << 16) | TRICE32_LL_BYTE(ts_TRice8m_9) | TRICE32_LH_BYTE(ts_TRice8m_9)) \ - TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ + TRICE_PUT8_9(v0, v1, v2, v3, v4, v5, v6, v7, v8); \ TRICE_LEAVE -#define TRice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_10 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_10) | TRICE32_HH_BYTE(ts_TRice8m_10)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE32_LL_BYTE(ts_TRice8m_10) | TRICE32_LH_BYTE(ts_TRice8m_10)) \ - TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ +#define TRice8m_10(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_10 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_10) | TRICE32_HH_BYTE(ts_TRice8m_10) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (10 << 16) | TRICE32_LL_BYTE(ts_TRice8m_10) | TRICE32_LH_BYTE(ts_TRice8m_10)) \ + TRICE_PUT8_10(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9); \ TRICE_LEAVE -#define TRice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_11 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_11) | TRICE32_HH_BYTE(ts_TRice8m_11)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (11 << 16) | TRICE32_LL_BYTE(ts_TRice8m_11) | TRICE32_LH_BYTE(ts_TRice8m_11)) \ - TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ +#define TRice8m_11(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_11 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_11) | TRICE32_HH_BYTE(ts_TRice8m_11) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (11 << 16) | TRICE32_LL_BYTE(ts_TRice8m_11) | TRICE32_LH_BYTE(ts_TRice8m_11)) \ + TRICE_PUT8_11(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10); \ TRICE_LEAVE -#define TRice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ - TRICE_ENTER \ - uint32_t ts_TRice8m_12 = TriceStamp32; \ - TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_12) | TRICE32_HH_BYTE(ts_TRice8m_12)| IDLH) \ - TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE32_LL_BYTE(ts_TRice8m_12) | TRICE32_LH_BYTE(ts_TRice8m_12)) \ - TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ +#define TRice8m_12(tid, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ + TRICE_ENTER \ + uint32_t ts_TRice8m_12 = TriceStamp32; \ + TRICE_PUT(TRICE32_HL_BYTE(ts_TRice8m_12) | TRICE32_HH_BYTE(ts_TRice8m_12) | IDLH) \ + TRICE_PUT((TRICE_CYCLE << 24) | (12 << 16) | TRICE32_LL_BYTE(ts_TRice8m_12) | TRICE32_LH_BYTE(ts_TRice8m_12)) \ + TRICE_PUT8_12(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11) \ TRICE_LEAVE diff --git a/src/triceDefaultConfig.h b/src/triceDefaultConfig.h index 2f0f0ed38..5d3d49d44 100644 --- a/src/triceDefaultConfig.h +++ b/src/triceDefaultConfig.h @@ -451,24 +451,24 @@ extern "C" { // No separate copy of SEGGER_RTT_Conf.h is needed this way. // The BUFFER_SIZE_UP value is de-facto a TRICE_DIRECT_BUFFER_SIZE, if no direct auxilary output is used. -#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS - #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (1) // Max. number of up-buffers (T->H) available on this target +#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS +#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (1) // Max. number of up-buffers (T->H) available on this target #endif -#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS - #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (0) // Max. number of down-buffers (H->T) available on this target +#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS +#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (0) // Max. number of down-buffers (H->T) available on this target #endif -#ifndef BUFFER_SIZE_UP - #define BUFFER_SIZE_UP (1024) // "TRICE_DIRECT_BUFFER_SIZE" +#ifndef BUFFER_SIZE_UP +#define BUFFER_SIZE_UP (1024) // "TRICE_DIRECT_BUFFER_SIZE" #endif -#ifndef BUFFER_SIZE_DOWN - #define BUFFER_SIZE_DOWN (0) // Size of the buffer for terminal input to target from host +#ifndef BUFFER_SIZE_DOWN +#define BUFFER_SIZE_DOWN (0) // Size of the buffer for terminal input to target from host #endif -#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE - #define SEGGER_RTT_PRINTF_BUFFER_SIZE (0u) // Size of buffer for RTT printf to bulk-send chars via RTT +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE +#define SEGGER_RTT_PRINTF_BUFFER_SIZE (0u) // Size of buffer for RTT printf to bulk-send chars via RTT #endif // diff --git a/src/triceMcuOrder.h b/src/triceMcuOrder.h index 31f00fe5c..833e84b01 100644 --- a/src/triceMcuOrder.h +++ b/src/triceMcuOrder.h @@ -13,12 +13,12 @@ #if TRICE_TRANSFER_ORDER_IS_BIG_ENDIAN == 0 //! TRICE_PUT16_1616 writes a 16-bit value followed by a 32-bit value in 2 16-bit steps to avoid memory alignment hard fault. -#define TRICE_PUT16_1616(x, ts) /* little endian */ \ - do { \ +#define TRICE_PUT16_1616(x, ts) /* little endian */ \ + do { \ uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ *p_TRICE_PUT16_1616++ = x; \ - *p_TRICE_PUT16_1616++ = (uint16_t)(ts); /* lo */ \ - *p_TRICE_PUT16_1616++ = (uint16_t)((ts) >> 16); /* hi */ \ + *p_TRICE_PUT16_1616++ = (uint16_t)(ts); /* lo */ \ + *p_TRICE_PUT16_1616++ = (uint16_t)((ts) >> 16); /* hi */ \ TriceBufferWritePosition = (uint32_t*)p_TRICE_PUT16_1616; \ } while (0) @@ -29,8 +29,8 @@ #else // #if TRICE_TRANSFER_ORDER_IS_BIG_ENDIAN == 0 //! TRICE_PUT16_1616 writes a 16-bit value followed by a 32-bit value in 2 16-bit steps to avoid memory alignment hard fault. -#define TRICE_PUT16_1616(x, ts) /* big endian */ \ - do { \ +#define TRICE_PUT16_1616(x, ts) /* big endian */ \ + do { \ uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ *p_TRICE_PUT16_1616++ = x; \ *p_TRICE_PUT16_1616++ = (ts) >> 16; /* hi */ \ diff --git a/src/triceMcuReverse.h b/src/triceMcuReverse.h index 8c2056746..8298ec48d 100644 --- a/src/triceMcuReverse.h +++ b/src/triceMcuReverse.h @@ -44,8 +44,8 @@ TRICE_INLINE uint32_t TriceReverse32(uint32_t value) { #if TRICE_TRANSFER_ORDER_IS_BIG_ENDIAN == 0 //! TRICE_PUT16_1616 writes a 16-bit value followed by a 32-bit value in 2 16-bit steps to avoid memory alignment hard fault. -#define TRICE_PUT16_1616(x, ts) /* little endian */ \ - do { \ +#define TRICE_PUT16_1616(x, ts) /* little endian */ \ + do { \ uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ *p_TRICE_PUT16_1616++ = TRICE_HTOTS(x); \ *p_TRICE_PUT16_1616++ = TRICE_HTOTS(ts); /* lo */ \ @@ -60,8 +60,8 @@ TRICE_INLINE uint32_t TriceReverse32(uint32_t value) { #else // #if TRICE_TRANSFER_ORDER_IS_BIG_ENDIAN == 0 //! TRICE_PUT16_1616 writes a 16-bit value followed by a 32-bit value in 2 16-bit steps to avoid memory alignment hard fault. -#define TRICE_PUT16_1616(x, ts) /* big endian */ \ - do { \ +#define TRICE_PUT16_1616(x, ts) /* big endian */ \ + do { \ uint16_t* p_TRICE_PUT16_1616 = (uint16_t*)TriceBufferWritePosition; \ *p_TRICE_PUT16_1616++ = TRICE_HTOTS(x); \ *p_TRICE_PUT16_1616++ = TRICE_HTOTS((ts) >> 16); /* hi */ \ diff --git a/testAll.sh b/testAll.sh index c96998369..164eb57c1 100755 --- a/testAll.sh +++ b/testAll.sh @@ -55,10 +55,10 @@ cd - >/dev/null ./trice_cleanIDs_in_examples_and_test_folder.sh 2>&1 | tee -a $triceFolder/testAll.log t1=`date +%s` -if command -v caffeinate 2>&1 >/dev/null -then - # https://stackoverflow.com/questions/30171050/start-a-process-in-background-do-a-task-then-kill-the-process-in-the-background - kill %- 2>&1 | tee -a $triceFolder/testAll.log -fi +#if command -v caffeinate 2>&1 >/dev/null +#then +# # https://stackoverflow.com/questions/30171050/start-a-process-in-background-do-a-task-then-kill-the-process-in-the-background +# kill %- 2>&1 | tee -a $triceFolder/testAll.log +#fi runtime=$((t1-t0)) echo Script run $runtime seconds. 2>&1 | tee -a $triceFolder/testAll.log From 362e47c0b6c51b32d47c826813e6266b0cd3478b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Sat, 17 May 2025 13:12:31 +0200 Subject: [PATCH 030/187] Update README.md TCP4 and UDP4 added --- README.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/README.md b/README.md index 43a04dfe7..88c338bee 100644 --- a/README.md +++ b/README.md @@ -62,6 +62,8 @@ This slightly simplified [view](https://github.com/jgraph/drawio) is explained [ - Implemented: - [UART](https://en.wikipedia.org/wiki/Universal_asynchronous_receiver-transmitter) connectable to virtual UART over USB - [RTT](https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/) over [J-Link](./third_party/segger.com/ReadMe.md) and [RTT over ST-Link](./third_party/goST/ReadMe.md) + - TCP4 + - UDP4 (currently as PR #529) - A small separate microcontroller is always usable as interfaces bridge to [GPIO](https://circuitcellar.com/cc-blog/a-trace-tool-for-embedded-systems/), [I²C](https://en.wikipedia.org/wiki/I%C2%B2C), [SPI](https://en.wikipedia.org/wiki/Serial_Peripheral_Interface), [CAN](https://en.wikipedia.org/wiki/CAN_bus), [LIN](https://en.wikipedia.org/wiki/Local_Interconnect_Network), ... - With a Chip from FTDI, check for example [Adafruit FT232H Breakout](https://learn.adafruit.com/adafruit-ft232h-breakout), GPIO, I2C and SPI are easy accessable. ## Display server option From db6b369418543a220f1c64e9358f2121e347be0f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Sun, 18 May 2025 21:58:39 +0200 Subject: [PATCH 031/187] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 88c338bee..5fca46991 100644 --- a/README.md +++ b/README.md @@ -64,7 +64,7 @@ This slightly simplified [view](https://github.com/jgraph/drawio) is explained [ - [RTT](https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/) over [J-Link](./third_party/segger.com/ReadMe.md) and [RTT over ST-Link](./third_party/goST/ReadMe.md) - TCP4 - UDP4 (currently as PR #529) -- A small separate microcontroller is always usable as interfaces bridge to [GPIO](https://circuitcellar.com/cc-blog/a-trace-tool-for-embedded-systems/), [I²C](https://en.wikipedia.org/wiki/I%C2%B2C), [SPI](https://en.wikipedia.org/wiki/Serial_Peripheral_Interface), [CAN](https://en.wikipedia.org/wiki/CAN_bus), [LIN](https://en.wikipedia.org/wiki/Local_Interconnect_Network), ... +- A small separate microcontroller is always usable as interfaces bridge from [GPIO](https://circuitcellar.com/cc-blog/a-trace-tool-for-embedded-systems/), [I²C](https://en.wikipedia.org/wiki/I%C2%B2C), [SPI](https://en.wikipedia.org/wiki/Serial_Peripheral_Interface), [CAN](https://en.wikipedia.org/wiki/CAN_bus), [LIN](https://en.wikipedia.org/wiki/Local_Interconnect_Network), ... to UART. - With a Chip from FTDI, check for example [Adafruit FT232H Breakout](https://learn.adafruit.com/adafruit-ft232h-breakout), GPIO, I2C and SPI are easy accessable. ## Display server option From 6737da72a1236845f27eb9fa05a7c941f5926f2b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20H=C3=B6henleitner?= Date: Wed, 21 May 2025 14:33:44 +0200 Subject: [PATCH 032/187] Update TriceUserManual.md --- docs/TriceUserManual.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/TriceUserManual.md b/docs/TriceUserManual.md index 9c6a93992..e39c055b3 100644 --- a/docs/TriceUserManual.md +++ b/docs/TriceUserManual.md @@ -3845,7 +3845,7 @@ static inline uint64_t aDouble( double x ){ ```c char s[] = "Hello again!"; - triceS( "A runtime string %20s\n", s; + triceS("A runtime string %20s\n", s); ``` ### 34.7. Runtime Generated counted Strings Transfer with triceN From c0419731b5b1a6849a84602c2888cefc5a7074b1 Mon Sep 17 00:00:00 2001 From: srgg Date: Thu, 15 May 2025 18:25:41 -0600 Subject: [PATCH 033/187] Add an IPv4 UDP receiver and introduce the '-exclude' flag to omit specified sources from scanning. --- internal/args/init.go | 45 +++++++++++++++--------- internal/args/tricehelpall_test.go | 27 ++++++++++++++- internal/id/manage_fs_test.go | 2 ++ internal/id/manage_test.go | 4 +++ internal/id/switchIDs.go | 2 ++ internal/id/vars.go | 1 + internal/receiver/receiver.go | 55 ++++++++++++++++++++++++++++++ pkg/ant/ant.go | 36 +++++++++++++++++-- pkg/tst/tst.go | 25 ++++++++++++++ 9 files changed, 177 insertions(+), 20 deletions(-) diff --git a/internal/args/init.go b/internal/args/init.go index 18d01390c..11efe1641 100644 --- a/internal/args/init.go +++ b/internal/args/init.go @@ -28,8 +28,8 @@ var ( LogfileName = "off" colorInfo = `The format strings can start with a lower or upper case channel information. -See https://github.com/rokath/trice/blob/master/pkg/src/triceCheck.c for examples. Color options: -"off": Disable ANSI color. The lower case channel information is kept: "w:x"-> "w:x" +See https://github.com/rokath/trice/blob/master/pkg/src/triceCheck.c for examples. Color options: +"off": Disable ANSI color. The lower case channel information is kept: "w:x"-> "w:x" "none": Disable ANSI color. The lower case channel information is removed: "w:x"-> "x" "default|color": Use ANSI color codes for known upper and lower case channel info are inserted and lower case channel information is removed. ` @@ -82,7 +82,7 @@ func helpInit() { func logInit() { const defaultEncoding = "TREX" fsScLog = flag.NewFlagSet("log", flag.ExitOnError) // sub-command - fsScLog.StringVar(&translator.Encoding, "encoding", defaultEncoding, `The trice transmit data format type, options: '(CHAR|DUMP|TREX)'. Target device encoding must match. + fsScLog.StringVar(&translator.Encoding, "encoding", defaultEncoding, `The trice transmit data format type, options: '(CHAR|DUMP|TREX)'. Target device encoding must match. TREX=TriceExtendableEncoding, see Trice1.0Specification. Needs '#define TRICE_ENCODING TRICE_TREX_ENCODING' inside triceConfig.h. CHAR prints the received bytes as characters. DUMP prints the received bytes as hex code (see switch -dc too). @@ -96,13 +96,13 @@ Encryption is recommended if you deliver firmware to customers and want protect fsScLog.BoolVar(&cipher.ShowKey, "showKey", false, `Show encryption key. Use this switch for creating your own password keys. If applied together with "-password MySecret" it shows the encryption key. Simply copy this key than into the line "#define ENCRYPT XTEA_KEY( ea, bb, ec, 6f, 31, 80, 4e, b9, 68, e2, fa, ea, ae, f1, 50, 54 ); //!< -password MySecret" inside triceConfig.h. `+boolInfo) - fsScLog.StringVar(&emitter.LogLevel, "logLevel", "all", `Level based log filtering. "off" suppresses everything. If equal to a channel specifier all with a bigger index inside emitter.ColorChannels the log not shown. -A typical use case is "-logLevel wrn". Attention this switch influences also location information (-liFmt), target stamps (-ts0, -ts16, -ts32), prefix and suffix information. Set these channel information appropriate. + fsScLog.StringVar(&emitter.LogLevel, "logLevel", "all", `Level based log filtering. "off" suppresses everything. If equal to a channel specifier all with a bigger index inside emitter.ColorChannels the log not shown. +A typical use case is "-logLevel wrn". Attention this switch influences also location information (-liFmt), target stamps (-ts0, -ts16, -ts32), prefix and suffix information. Set these channel information appropriate. Logs without channel specifier are not suppressed. Using an invalid value like "x" suppresses all logs with a channel specifier. See also CLI switches -pick and -ban.`) fsScLog.StringVar(&id.DefaultTriceBitWidth, "defaultTRICEBitwidth", "32", `The expected value bit width for TRICE macros. Options: 8, 16, 32, 64. Must be in sync with the 'TRICE_DEFAULT_PARAMETER_BIT_WIDTH' setting inside triceConfig.h`) fsScLog.StringVar(&emitter.HostStamp, "hs", "LOCmicro", `PC timestamp for logs and logfile name, options: 'off|none|UTCmicro|zero' -This timestamp switch generates the timestamps on the PC only (reception time), what is good enough for many cases. +This timestamp switch generates the timestamps on the PC only (reception time), what is good enough for many cases. "LOCmicro" means local time with microseconds. "UTCmicro" shows timestamps in universal time. When set to "off" no PC timestamps displayed.`) // flag fsScLog.StringVar(&decoder.ShowID, "showID", "", `Format string for displaying first trice ID at start of each line. Example: "debug:%7d ". Default is "". If several trices form a log line only the first trice ID ist displayed.`) fsScLog.StringVar(&decoder.LocationInformationFormatString, "liFmt", "info:%21s %5d ", `Target location format string at start of each line, if target location existent (configured). Use "off" or "none" to suppress existing target location. If several trices form a log line only the location of first trice ist displayed.`) @@ -116,8 +116,8 @@ This timestamp switch generates the timestamps on the PC only (reception time), fsScLog.StringVar(&emitter.Prefix, "prefix", defaultPrefix, "Line prefix, options: any string or 'off|none' or 'source:' followed by 0-12 spaces, 'source:' will be replaced by source value e.g., 'COM17:'.") // flag fsScLog.StringVar(&emitter.Suffix, "suffix", "", "Append suffix to all lines, options: any string.") // flag - info := `Case insensitive receiver device name: 'serial name|JLINK|STLINK|FILE|FILEBUFFER|TCP4|TCP4BUFFER|DEC|BUFFER|HEX|DUMP. -The serial name is like 'COM12' for Windows or a Linux name like '/dev/tty/usb12'. + info := `Case insensitive receiver device name: 'serial name|JLINK|STLINK|FILE|FILEBUFFER|TCP4|TCP4BUFFER|DEC|BUFFER|HEX|DUMP. +The serial name is like 'COM12' for Windows or a Linux name like '/dev/tty/usb12'. Using a virtual serial COM port on the PC over a FTDI USB adapter is a most likely variant. ` fsScLog.StringVar(&receiver.Port, "port", "J-LINK", info) // flag @@ -138,8 +138,9 @@ port "J-LINK": default="`, receiver.DefaultLinkArgs, `", `, linkArgsInfo, ` port "ST-LINK": default="`, receiver.DefaultLinkArgs, `", `, linkArgsInfo, ` port "FILE": default="`, receiver.DefaultFileArgs, `", Option for args is any file name for binary log data like written []byte{115, 111, 109, 101, 10}. Trice retries on EOF. port "FILEBUFFER": default="`, receiver.DefaultFileArgs, `", Option for args is any file name for binary log data like written []byte{115, 111, 109, 101, 10}. Trice stops on EOF. -port "TCP4": default="`, receiver.DefaultTCP4Args, `", use any IP:port endpoint like "127.0.0.1:19021". This port is usable for reading, when the Trice logs go into a TCP server. +port "TCP4": default="`, receiver.DefaultTCP4Args, `", use any IPv4 IP:port endpoint like "127.0.0.1:19021". This port is usable for reading, when the Trice logs go into a TCP server. port "TCP4BUFFER": default="`, receiver.DefaultTCP4Args, `". This port is used for "-port TCP4" testing, to shutdown the Trice tool automatically. +port "UDP4": default="`, receiver.DefaultUDP4Args, `", use any IPv4 IP:port endpoint to listen on, like 192.168.1.1:17005". port "DEC" or "BUFFER": default="`, receiver.DefaultBUFFERArgs, `", Option for args is any space separated decimal number byte sequence. Example -p BUFFER -args "7 123 44". port "HEX" or "DUMP": default="`, receiver.DefaultDumpArgs, `", Option for args is any space or comma separated byte sequence in hex. Example: -p DUMP -args "7B 1A ee,88, 5a". `) @@ -245,6 +246,7 @@ func sdInit() { func flagsRefreshAndUpdate(p *flag.FlagSet) { flagDryRun(p) flagSrcs(p) + flagExcludeSrcs(p) flagVerbosity(p) flagIDList(p) flagLIList(p) @@ -277,23 +279,32 @@ Change the filename with "-logfile myName.txt" or switch logging off with "-logf func flagSrcs(p *flag.FlagSet) { p.Var(&id.Srcs, "src", `Source dir or file, It has one parameter. Not usable in the form "-src *.c". -This is a multi-flag switch. It can be used several times for directories and also for files. -Example: "trice `+p.Name()+` -dry-run -v -src ./_test/ -src pkg/src/trice.h" will scan all C|C++ header and -source code files inside directory ./_test and scan also file trice.h inside pkg/src directory. +This is a multi-flag switch. It can be used several times for directories and also for files. +Example: "trice `+p.Name()+` -dry-run -v -src ./_test/ -src pkg/src/trice.h" will scan all C|C++ header and +source code files inside directory ./_test and scan also file trice.h inside pkg/src directory. Without the "-dry-run" switch it would create|extend a list file til.json in the current directory. (default "./")`) // multi flag p.Var(&id.Srcs, "s", "Short for src.") // multi flag } +func flagExcludeSrcs(p *flag.FlagSet) { + p.Var(&id.ExcludeSrcs, "exclude", `Exclude dir or file, It has one parameter. Not usable in the form "-exclude *.c". +This is a multi-flag switch. It can be used several times for directories and also for files. +Example: "trice `+p.Name()+` -v -src ./_test/ -exclude _test/src/trice.h" will scan all C|C++ header and +source code files inside directory ./_test EXCEPT file trice.h inside _test/src directory. + (default none)`) // multi flag + p.Var(&id.ExcludeSrcs, "e", "Short for exclude.") // multi flag +} + func flagTriceIDRange(p *flag.FlagSet) { - p.Var(&id.IDRange, "IDRange", `This allows tag specific routing in the target code. + p.Var(&id.IDRange, "IDRange", `This allows tag specific routing in the target code. This switch has one parameter string and is a multi-flag switch. It can be used for each Trice tag. Example: Assign error tag Trice IDs in the range 10-99 and msg tag IDs in the range 100-199: "trice `+p.Name()+` -IDRange err:10,99 -IDRange msg:100,999" (overlapping ID ranges are forbidden) -All other trice tags get IDs from the -IDMin, -IDMax range. The used -IDMethod is the same for all tags. +All other trice tags get IDs from the -IDMin, -IDMax range. The used -IDMethod is the same for all tags. For example you can have all trice messages in direct mode over RTT but err & msg tagged trices additionally in deferred mode over a serial port and, if you need, store all error tagged Trice logs additionally in the Flash memory. -You need to configure the target code in your triceConfig.h accordingly (search trice code for MIN_ID): +You need to configure the target code in your triceConfig.h accordingly (search trice code for MIN_ID): Use "#define TRICE_UARTA_MIN_ID 10" and "#define TRICE_UARTA_MAX_ID 999" for example. (default "")`) // multi flag } @@ -330,8 +341,8 @@ The specified JSON file is needed to display the ID coded trices during runtime func flagLIList(p *flag.FlagSet) { p.StringVar(&id.LIFnJSON, "locationInformation", "li.json", `The trice location information file. -The specified JSON file is needed to display the location information for each ID during runtime. -It is regenerated on each add, clean, or insert trice run. When trice log finds a location information file, it is used for +The specified JSON file is needed to display the location information for each ID during runtime. +It is regenerated on each add, clean, or insert trice run. When trice log finds a location information file, it is used for log output with location information. Otherwise no location information is displayed, what usually is wanted in the field. This way the newest til.json can be used also with legacy firmware, but the li.json must match the current firmware version. With "off" or "none" suppress the display or generation of the location information. See -tLocFmt for formatting. diff --git a/internal/args/tricehelpall_test.go b/internal/args/tricehelpall_test.go index 8f5090f21..3f8b175ee 100644 --- a/internal/args/tricehelpall_test.go +++ b/internal/args/tricehelpall_test.go @@ -115,8 +115,9 @@ sub-command 'l|log': For displaying trice logs coming from port. With "trice log For args options see JLinkRTTLogger in SEGGER UM08001_JLink.pdf. port "FILE": default="trices.raw", Option for args is any file name for binary log data like written []byte{115, 111, 109, 101, 10}. Trice retries on EOF. port "FILEBUFFER": default="trices.raw", Option for args is any file name for binary log data like written []byte{115, 111, 109, 101, 10}. Trice stops on EOF. - port "TCP4": default="localhost:17001", use any IP:port endpoint like "127.0.0.1:19021". This port is usable for reading, when the Trice logs go into a TCP server. + port "TCP4": default="localhost:17001", use any IPv4 IP:port endpoint like "127.0.0.1:19021". This port is usable for reading, when the Trice logs go into a TCP server. port "TCP4BUFFER": default="localhost:17001". This port is used for "-port TCP4" testing, to shutdown the Trice tool automatically. + port "UDP4": default="0.0.0.0:17005", use any IPv4 IP:port endpoint to listen on, like 192.168.1.1:17005". port "DEC" or "BUFFER": default="0 0 0 0", Option for args is any space separated decimal number byte sequence. Example -p BUFFER -args "7 123 44". port "HEX" or "DUMP": default="", Option for args is any space or comma separated byte sequence in hex. Example: -p DUMP -args "7B 1A ee,88, 5a". (default "default") @@ -307,6 +308,14 @@ sub-command 'a|add': Use for adding library source files containing already tric No changes applied but output shows what would happen. "trice add -dry-run" will change nothing but show changes it would perform without the "-dry-run" switch. This is a bool switch. It has no parameters. Its default value is false. If the switch is applied its value is true. You can also set it explicit: =false or =true. + -e value + Short for exclude. + -exclude value + Exclude dir or file, It has one parameter. Not usable in the form "-exclude *.c". + This is a multi-flag switch. It can be used several times for directories and also for files. + Example: "trice add -v -src ./_test/ -exclude _test/src/trice.h" will scan all C|C++ header and + source code files inside directory ./_test EXCEPT file trice.h inside _test/src directory. + (default none) -i string Short for '-idlist'. (default "til.json") @@ -448,6 +457,14 @@ sub-command 'i|insert': For updating til.json and inserting IDs into source file No changes applied but output shows what would happen. "trice insert -dry-run" will change nothing but show changes it would perform without the "-dry-run" switch. This is a bool switch. It has no parameters. Its default value is false. If the switch is applied its value is true. You can also set it explicit: =false or =true. + -e value + Short for exclude. + -exclude value + Exclude dir or file, It has one parameter. Not usable in the form "-exclude *.c". + This is a multi-flag switch. It can be used several times for directories and also for files. + Example: "trice insert -v -src ./_test/ -exclude _test/src/trice.h" will scan all C|C++ header and + source code files inside directory ./_test EXCEPT file trice.h inside _test/src directory. + (default none) -i string Short for '-idlist'. (default "til.json") @@ -511,6 +528,14 @@ sub-command 'c|clean': Set all [id|Id|ID](n) inside source tree dir to [id|Id|ID No changes applied but output shows what would happen. "trice clean -dry-run" will change nothing but show changes it would perform without the "-dry-run" switch. This is a bool switch. It has no parameters. Its default value is false. If the switch is applied its value is true. You can also set it explicit: =false or =true. + -e value + Short for exclude. + -exclude value + Exclude dir or file, It has one parameter. Not usable in the form "-exclude *.c". + This is a multi-flag switch. It can be used several times for directories and also for files. + Example: "trice clean -v -src ./_test/ -exclude _test/src/trice.h" will scan all C|C++ header and + source code files inside directory ./_test EXCEPT file trice.h inside _test/src directory. + (default none) -i string Short for '-idlist'. (default "til.json") diff --git a/internal/id/manage_fs_test.go b/internal/id/manage_fs_test.go index 6ff574e55..05b1ac768 100644 --- a/internal/id/manage_fs_test.go +++ b/internal/id/manage_fs_test.go @@ -9,6 +9,7 @@ import ( "os" "testing" + "github.com/rokath/trice/pkg/tst" "github.com/spf13/afero" "github.com/tj/assert" ) @@ -23,6 +24,7 @@ func TestLutFileTransfer(t *testing.T) { // Anti-Virus issue rd := make(TriceIDLookUp) assert.Nil(t, rd.fromFile(FSys, fn)) act := fmt.Sprint(rd) + act = tst.NormalizeMapString(act) assert.Equal(t, exp, act) } diff --git a/internal/id/manage_test.go b/internal/id/manage_test.go index 6fab64ca7..0ee923ac7 100644 --- a/internal/id/manage_test.go +++ b/internal/id/manage_test.go @@ -6,6 +6,7 @@ package id import ( "fmt" + "github.com/rokath/trice/pkg/tst" "testing" "github.com/tj/assert" @@ -73,6 +74,7 @@ func TestJSONToLutMapUpdate(t *testing.T) { err := lut.FromJSON(b1) assert.Nil(t, err) act := fmt.Sprint(lut) + act = tst.NormalizeMapString(act) assert.Equal(t, exp, act) } @@ -83,6 +85,7 @@ func TestJSONToLut(t *testing.T) { lut := make(TriceIDLookUp) assert.Nil(t, lut.FromJSON(b)) act := fmt.Sprint(lut) + act = tst.NormalizeMapString(act) assert.Equal(t, exp, act) } @@ -106,5 +109,6 @@ func TestJSONWithDoubleIDToLut(t *testing.T) { lut := make(TriceIDLookUp) assert.Nil(t, lut.FromJSON(b)) act := fmt.Sprint(lut) + act = tst.NormalizeMapString(act) assert.Equal(t, exp, act) } diff --git a/internal/id/switchIDs.go b/internal/id/switchIDs.go index 60c647a67..87e60af9d 100644 --- a/internal/id/switchIDs.go +++ b/internal/id/switchIDs.go @@ -203,6 +203,8 @@ func (p *idData) cmdSwitchTriceIDs(w io.Writer, fSys *afero.Afero, action ant.Pr a := new(ant.Admin) a.Action = action a.Trees = Srcs + a.ExcludeTrees = ExcludeSrcs + a.Verbose = Verbose a.MatchingFileName = isSourceFile // process diff --git a/internal/id/vars.go b/internal/id/vars.go index ff44a28da..164ab910e 100644 --- a/internal/id/vars.go +++ b/internal/id/vars.go @@ -16,6 +16,7 @@ var ( SearchMethod = "random" // SearchMethod is the next ID search method. LIPathKind string // LIPathKind controls how to store paths inside li.json: base, relative, full Srcs ArrayFlag // Srcs gets multiple files or directories. + ExcludeSrcs ArrayFlag // ExcludeSrcs is an ArrayFlag representing source files to be excluded from processing. IDRange ArrayFlag // IDPolicy gets ID ranges for Trice ID message channels like "err:". IDData idData matchSourceFile = regexp.MustCompile(patSourceFile) diff --git a/internal/receiver/receiver.go b/internal/receiver/receiver.go index 26488db8b..bb242f62f 100644 --- a/internal/receiver/receiver.go +++ b/internal/receiver/receiver.go @@ -73,6 +73,9 @@ var ( // DefaultTCP4Args replaces "default" args value for TCP4 port. DefaultTCP4Args = "localhost:17001" // OpenOCD starts a server on localhost:17001 where it dumps all RTT messages. + // DefaultUDP4Args replaces "default" args value for UDP4 port. + DefaultUDP4Args = "0.0.0.0:17005" + // DefaultFileArgs replaces "default" args value for FILE port. DefaultFileArgs = "trices.raw" @@ -176,6 +179,46 @@ func (p *tcp4) Close() error { return p.conn.Close() } +// udp holds an open udp connection. +type udp4 struct { + w io.Writer // os.Stdout + conn *net.UDPConn +} + +// newTCP4Connection returns a readCloser capable tcp4 instance. +func newUDPConnection(endpoint string) *udp4 { + r := &udp4{} + addr, err := net.ResolveUDPAddr("udp4", endpoint) + if err != nil { + log.Fatal(endpoint, err) + } + + r.conn, err = net.ListenUDP("udp", addr) + if err != nil { + log.Fatalf("Failed to listen on UDP port: %v", err) + } + + return r +} + +// Read is part of the exported interface io.ReadCloser. It reads a slice of bytes. +func (p *udp4) Read(b []byte) (int, error) { + n, _, err := p.conn.ReadFromUDP(b) // peer address is ignored + return n, err +} + +func (p *udp4) Write(b []byte) (int, error) { + panic("udp4.Write not implemented") +} + +// Close is part of the exported interface io.ReadCloser. It ends the connection. +func (p *udp4) Close() error { + if Verbose { + fmt.Fprintln(p.w, "Closing udp4 device.") + } + return p.conn.Close() +} + // file holds an opened file handle. type file struct { w io.Writer // os.Stdout @@ -259,6 +302,18 @@ func NewReadWriteCloser(w io.Writer, fSys *afero.Afero, verbose bool, port, args } l := newTCP4Connection(args) r = l + case "UDP4": + if args == "default" { // nothing assigned in args + args = DefaultUDP4Args + } + if Verbose { + fmt.Fprintln(w, "PortArguments=", args) + } + if ExecCommand != "" { + fmt.Println("todo: execute ", ExecCommand) + } + l := newUDPConnection(args) + r = l case "FILE", "FILEBUFFER": if args == "default" { // nothing assigned in args args = DefaultFileArgs diff --git a/pkg/ant/ant.go b/pkg/ant/ant.go index b42f97a35..f45ff1c0c 100644 --- a/pkg/ant/ant.go +++ b/pkg/ant/ant.go @@ -12,6 +12,7 @@ import ( "io" "os" "path/filepath" + "strings" "sync" "github.com/rokath/trice/pkg/msg" @@ -24,6 +25,8 @@ type Processing func(w io.Writer, fSys *afero.Afero, path string, fileInfo os.Fi // Admin holds the walk specific data. type Admin struct { Trees []string // Trees contains all files and folders to process. Sub-folders are walked automatically. + ExcludeTrees []string // ExcludeTrees contains file and folder paths to be excluded from processing during the Walk operation. + Verbose bool // Verbose enables or disables detailed logging during processing. MatchingFileName func(fi os.FileInfo) bool // MatchingFileName is a user provided function and returns true on matching user conditions. Simplest case: func(_ os.FileInfo){ return true } for all files. Action Processing // Action is the user provided function executed on each file in Trees. Mutex sync.RWMutex // A sync.RWMutex is thus preferable for data that is mostly read. @@ -83,18 +86,47 @@ func visit(w io.Writer, fSys *afero.Afero, jalan *Admin) filepath.WalkFunc { // when invoked on a non-directory file, Walk skips the remaining files in the // containing directory. return func(path string, fileInfo os.FileInfo, err error) error { - - if err != nil || fileInfo.IsDir() || !jalan.MatchingFileName(fileInfo) { + if err != nil { return err // forward any error and do nothing } + cleanPath := filepath.Clean(path) + + // Check if a path is in the exclusion list + for _, excl := range jalan.ExcludeTrees { + cleanExcl := filepath.Clean(excl) + + if cleanPath == cleanExcl || strings.HasPrefix(cleanPath, cleanExcl+string(os.PathSeparator)) { + if fileInfo.IsDir() { + if jalan.Verbose { + fmt.Fprintf(w, "exclude: %s/ due to match in exclusions: %s\n", path, excl) + } + return filepath.SkipDir + } + + if jalan.Verbose { + fmt.Fprintf(w, "exclude: %s due to match in exclusions: %s\n", path, excl) + } + return nil + } + } + + // Skip directories and files that don't match the pattern + if fileInfo.IsDir() || !jalan.MatchingFileName(fileInfo) { + return nil + } + jalan.wg.Add(1) go func() { defer jalan.wg.Done() err := jalan.Action(w, fSys, path, fileInfo, jalan) if err != nil { fmt.Fprintln(w, path, err) + + // Safely increment errorCount + jalan.Mutex.Lock() jalan.errorCount++ + jalan.Mutex.Unlock() } }() diff --git a/pkg/tst/tst.go b/pkg/tst/tst.go index b0aa03399..0085f9ee1 100644 --- a/pkg/tst/tst.go +++ b/pkg/tst/tst.go @@ -10,6 +10,7 @@ import ( "io" "io/ioutil" "os" + "regexp" "strings" "testing" @@ -125,3 +126,27 @@ func AssertEqualFiles(t *testing.T, fn0, fn1 string) { assert.Nil(t, err) assert.True(t, ok) } + +// NormalizeMapString trims insignificant whitespace in Go-style map[string]struct formatting. +// +// It is useful for comparing stringified maps where `fmt.Sprint(map)` includes +// formatting inconsistencies such as: +// - trailing spaces after struct fields (e.g., "{t11 s11 }") +// - extra spaces between map entries (e.g., "12:{... }") +// +// This behavior may vary subtly between Go versions (e.g., Go 1.18 vs 1.20+), +// where `fmt.Sprint` preserves more internal spacing from struct formatting. +// +// normalizeMapString helps produce stable, human-readable string output +// suitable for comparison in tests without altering the logical content. +func NormalizeMapString(s string) string { + // Trim space after struct close + s = regexp.MustCompile(`\s+}`).ReplaceAllString(s, "}") + // Trim space before struct open + s = regexp.MustCompile(`{\s+`).ReplaceAllString(s, "{") + // Remove extra space after closing } of each map entry + s = regexp.MustCompile(`}\s+`).ReplaceAllString(s, "} ") + // Normalize single space between key:value entries + s = regexp.MustCompile(`\s+`).ReplaceAllString(s, " ") + return strings.TrimSpace(s) +} From 5d211019e346418cc01c5ca36eaea2bccb8c231f Mon Sep 17 00:00:00 2001 From: rokath Date: Wed, 28 May 2025 11:44:30 +0200 Subject: [PATCH 034/187] pr 529 added, ChatGPT Trice compare added --- README.md | 18 +++-- docs/ChatGPTo4-mini-high_TriceCompare.html | 92 ++++++++++++++++++++++ docs/TriceUserManual.md | 54 ++++++++++--- 3 files changed, 146 insertions(+), 18 deletions(-) create mode 100644 docs/ChatGPTo4-mini-high_TriceCompare.html diff --git a/README.md b/README.md index 5fca46991..2cb73063c 100644 --- a/README.md +++ b/README.md @@ -143,29 +143,35 @@ git clone https://github.com/rokath/trice.git ## Similar projects +- **ARM ITM/SWO (hardware-native)** +- **ARM Keil Event Recorder (hardware-native)** - [baical.net](http://baical.net/up7.html) (C) - [call stack logger function instrumentation](https://dev.to/taugustyn/call-stack-logger-function-instrumentation-as-a-way-to-trace-programs-flow-of-execution-419a) (a way to trace programs flow of execution) - [Debugging with Dynamic Printf Breakpoints](https://mcuoneclipse.com/2022/02/09/debugging-with-dynamic-printf-breakpoints/) (Eclipse IDE option) -- [defmt](https://github.com/knurling-rs/defmt) (Rust) +- **[defmt (Rust)](https://github.com/knurling-rs/defmt)** - [Diagnostic Log and Trace](https://github.com/COVESA/dlt-daemon) (AUTOSAR) -- [elog](https://github.com/martinribelotta/elog) (Embedded logger with minimal footprint and memory usage) -- [J-Link System View](https://www.segger.com/products/development-tools/systemview/technology/what-is-systemview/) (SEGGER) +- **[Embedded Logger (elog)](https://github.com/martinribelotta/elog)** (Embedded logger with minimal footprint and memory usage) - [Logging with symbols - The Embedonomicon](https://docs.rust-embedded.org/embedonomicon/logging.html) - [MCUViewer](https://github.com/klonyyy/MCUViewer) -- [Memfault Compact Log Library](https://docs.memfault.com/docs/mcu/compact-logs/#host-decoding) +- **[McuLog (McuOnEclipse)]** +- **[Memfault Compact Log Library](https://docs.memfault.com/docs/mcu/compact-logs/#host-decoding)** (part of firmware SDK) - [Metal Serial Library](https://github.com/metal-ci/_test/tree/master/doc/metal.serial.md) - [Minimal Structured Logging for Autonomous Vehikles](https://youtu.be/FyJI4Z6jD4w) (C++, closed source talk) -- [NanoLog](https://github.com/PlatformLab/NanoLog) (Linux C++) -- [Percepio Tracealyzer](https://percepio.com/tracealyzer/) (Visual Trace Diagnostics) +- [**NanoLog (C++11)**](https://github.com/PlatformLab/NanoLog) (Linux C++) +- [**Percepio Tracealyzer (with TraceRecorder)**](https://percepio.com/tracealyzer/) (Visual Trace Diagnostics) - [Pigweed Trace Tokenized](https://pigweed.dev/pw_trace_tokenized/) - [Postform](https://github.com/Javier-varez/Postform) (Postponed formatting experiments with string interning in C++. Inspired by the defmt Rust crate ) - [qpspy](https://www.state-machine.com/qtools/qpspy.html) (C/C++) - [Real-time binary data logging/tracing toolkit](https://github.com/RTEdbg/RTEdbg) +- **[SEGGER System View](https://www.segger.com/products/development-tools/systemview/technology/what-is-systemview/)** - [Serial-Studio](https://github.com/Serial-Studio/Serial-Studio) (Data visualisation) - [Tonbandgerät](https://github.com/schilkp/Tonbandgeraet) (A small embedded systems tracer with support for bare-metal and FreeRTOS-based targets) - [Traces](https://github.com/yotamr/traces) (API tracing framework for Linux C/C++ applications +- **uLog (RD Poor)** - [Zepyr Dictionary Based Logging](https://docs.zephyrproject.org/3.1.0/services/logging/index.html#dictionary-based-logging) +[ChatGPT Trice Compare (2025-05-26)](./docs/ChatGPTo4-mini-high_TriceCompare.html) + + + + +

Comparable Logging and Tracing Solutions for Embedded Systems

+

Open-Source Solutions (C/C++ and Rust)

+

Trice (Reference) + – License: MIT. Trice is an open-source C logging and tracing library +providing printf-like macros. At runtime it replaces format strings with + 16-bit IDs, keeping the firmware image under 1 KB and achieving very +low execution overhead. Trace data is COBS-encoded and sent via UART or +SEGGER RTT; a Go-based host tool decodes the IDs back into +human-readable messages. Trice is safe to use in interrupts (ISR-safe) +and supports log levels via channels with optional colored output on the + host.

+

Embedded Logger (elog) + – License: MIT. Elog offloads all format strings from the firmware +binary: at runtime only an identifier plus parameters are stored in RAM, + while the actual format strings reside separately and are excluded from + the final image. A host-side decoder then reconstructs the original +messages. This approach minimizes both Flash and RAM usage and supports +custom transports for log retrieval.

+

defmt (Rust) + – License: MIT/Apache 2.0 dual license. Defmt (“deferred formatting”) +is a Rust-native framework that shifts all string formatting to the +host. Macros like defmt::info!() emit binary-encoded logs (e.g., over RTT), and a host tool (often via probe-run) + uses the ELF symbols to decode them. It achieves very low footprint +(e.g., ~1.6 KB Flash for panic logging vs. ~13.8 KB with printf) and +supports log levels. Limitation: only available for Rust targets.

+

NanoLog (C++11) + – License: Apache 2.0. Originally designed for high-performance server +environments, NanoLog uses compile-time extraction of log metadata so +that at runtime only an ID and variables are emitted. Offline tools then + format the messages. It demonstrates nanosecond-scale latencies (≈7 ns) + and tens of millions of logs per second, but is more suited to powerful + systems rather than constrained MCUs.

+

McuLog (McuOnEclipse) – License: BSD 3-Clause. A C-based logger offering traditional printf formatting with log levels (TRACE to FATAL). + Supports multiple outputs simultaneously (UART with ANSI colors, SEGGER + RTT, or logging to an SD card via FAT). Around 6 KB Flash footprint and + moderate CPU overhead, but no external tools required beyond a host RTT + viewer.

+

uLog (RD Poor) + – License: MIT. A minimalist single-file C logger inspired by Log4c: +configurable log levels, pluggable back ends via callbacks (UART, +memory, etc.), and full compile-time disabling of all logging code. It +formats messages on the target (using vsnprintf) but remains extremely lightweight and portable.

+
+

Commercial Tools and Frameworks

+

SEGGER SystemView + – Free from SEGGER (closed source). Includes a small C library (~2 KB +ROM, 600 B RAM) that streams timed events and user logs via SEGGER RTT +to a PC GUI. It visualizes interrupts, task switches, and custom events +with cycle-level timestamps, with under 1% CPU overhead at 10 000 +events/s on a Cortex-M4 @ 200 MHz.

+

Percepio Tracealyzer (with TraceRecorder) + – Commercial (~1 700 USD/user). Provides deep trace and log analysis +for RTOS or bare-metal systems. The TraceRecorder library (2–3 KB +footprint) captures events and logs in a ring buffer, supporting:

+
    +
  • +

    Printf mode (on-target formatting)

    +
    • +
  • +

    Offloaded formatting (parameters sent to PC for formatting)

    +
    • +
  • +

    Compact mode (ID + parameters, with format strings read from the ELF file).
    +Compact mode reduces overhead by ~99.8% (from 1.9 ms to ≈3 µs per log) +and is safe in IRQs. The PC software offers timeline views, CPU load, +heap usage, and correlates logs with RTOS events.

    +
    • +
+

Memfault + – SaaS platform (firmware SDK free; cloud subscription per device). Its + “Compact Log” feature replaces format strings with IDs on the device +(4.5 KB Flash, 1.5 KB RAM) and uploads logs or crash dumps to the cloud, + where they’re reconstructed using debug symbols. Achieves ~88% data +reduction and offloads CPU formatting. Includes log levels, +time-stamping, remote configuration, and OTA updates. Ideal for fleet +monitoring but requires Internet connectivity and a cloud service.

+

Other Hardware-Native Approaches:

+
    +
  • +

    ARM Keil Event Recorder (proprietary in MDK) uses ITM/SWO for low-overhead event tracing.

    +
    • +
  • +

    ARM ITM/SWO can stream trace data with minimal CPU impact; custom protocols can shift formatting off the target.

    +
    • +
+
+

Comparison Table of Solutions

+
NameLicense / TypeLogging ApproachOverhead & ResourcesOutput ChannelsSpecial Features
TriceOpen Source (MIT)Compile-time IDs, host formatting< 1 KB Flash; very low runtime overheadUART, RTT (COBS binary)ISR-safe; Go host tool; log levels via channels; colored host output
Embedded LoggerOpen Source (MIT)Offloaded format strings; ID + args in targetMinimal Flash/RAM (strings excluded)Custom transportVery low resource use; host decoder required
defmt (Rust)Open Source (MIT/Apache)Deferred formatting; host decoding~ 1.6 KB Flash vs. ~13.8 KB with printf; low runtime impactRTT, other transportsRust only; integrated in probe-run; active ecosystem
NanoLog (C++11)Open Source (Apache 2.0)Compile-time extraction; offline formatting≈ 7 ns latency; tens of millions log entries/sFile post-processingUltra-high throughput; less common in MCU contexts
McuLogOpen Source (BSD 3-Clause)On-target printf formatting with log levels~ 6 KB Flash; moderate CPU loadUART (ANSI color), RTT, FAT fileMultiple concurrent outputs; easy integration; configurable
uLogOpen Source (MIT)On-target vsnprintf; hierarchical log levelsTiny footprint; overhead only when enabledAny via callbacksSingle file; fully disable logging via compiler flag
SystemView (SEGGER)Closed Source (free with J-Link)Binary events + optional user logs~ 2 KB ROM, 600 B RAM; < 1% CPU @10 k events/sRTT (J-Link)Real-time timeline; multi-thread tracing; precise timestamps
TracealyzerCommercial (~ 1 700 USD/user)On-target or host formatting (compact mode: ID + args)~ 2–3 KB Flash; 3 µs/log (compact) vs. 1.9 ms UARTRTT, ITM, USB, RAM bufferExtensive visualization; RTOS support; higher cost
MemfaultCommercial SaaS (SDK free; cloud paid)Compact log (ID + args) with cloud decoding~ 4.5 KB Flash; 1.5 KB RAM; ~ 88% data reductionUART, network uploadFleet monitoring; cloud dashboard; requires connectivity