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Commits on Jan 20, 2024

• Implement ADD/CMP/SUB to memory and fix time estimations.

  jesusmgg

  committed
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Commits on Jan 16, 2024

• Update devlog.

  jesusmgg

  committed
  8eff36f

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• Implement cycle estimation option for simulator.

  jesusmgg

  committed
  2e740c1

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• Fix typo

  jesusmgg

  committed
  d4d96ff

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• Parse options with a match expression and add `time` option parsing.

  jesusmgg

  committed
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Commits on Nov 8, 2023

• Add support to dump memory after simulation.

  jesusmgg

  committed
  9e29803

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• Simulate ADD/SUB/CMP from EAC to register.

  jesusmgg

  committed
  0418435

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• Update devlog.

  jesusmgg

  committed
  414abd5

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• Fix word flag setting in operands.

  jesusmgg

  committed
  2740814

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• Include bytes in program struct for debugging.

  jesusmgg

  committed
  1516626

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• Update devlog.

  jesusmgg

  committed
  c4e1826

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• Fix ADD/CMP/SUB immediate to register/memory sign extension encoding.

  jesusmgg

  committed
  9602929

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Commits on Nov 7, 2023

• Add .idea for RustRover debugging.

  jesusmgg

  committed
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• Include devlog file.

  jesusmgg

  committed
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Commits on Jul 12, 2023

• [WIP] Fixing decoder.

  jesusmgg

  committed
  ba8574a

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Commits on Jun 28, 2023

• Simulate MOV to memory.

  jesusmgg

  committed
  551fdb6

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• Fix MOV immediate to reg/mem with explicit size instruction length calculation.

  jesusmgg

  committed
  f74af14

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Commits on Jun 20, 2023

• Simulate conditional jumps (JE/JZ, JNE/JNZ).

  jesusmgg

  committed
  7fc8103

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• Use todo!() for invalid instruction when simulating.

  jesusmgg

  committed
  946fcbe

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• Simulate instruction pointer (IP).

  jesusmgg

  committed
  28d702d

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• Add VSCode config for debugging.

  jesusmgg

  committed
  0a08828

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• Update simulator print formatting.

  jesusmgg

  committed
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Commits on Jun 14, 2023

• Print each instruction while simulating.

  jesusmgg

  committed
  59ff8ec

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• Add IP register to state.

  jesusmgg

  committed
  4f72ae5

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Commits on Jun 8, 2023

• Simulate ADD, SUB and CMP instructions. Also simulate sign and zero flags.

  jesusmgg

  committed
  8e70409

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Commits on May 17, 2023

• Simulate register MOVs.

  jesusmgg

  committed
  630bcc4

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• Print each MOV simulation result.

  jesusmgg

  committed
  b8aae56

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• Slight formatting changes.

  jesusmgg

  committed
  431272b

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• Simulate MOV immediate to register with word registers.

  jesusmgg

  committed
  1bdcd6d

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Commits on Apr 5, 2023

• Create Program, Instruction, InstructionOperan structs.

  jesusmgg

  committed
  dd45fb5

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Commits on Apr 4, 2023

• Fix expected argument count.

  jesusmgg

  committed
  637cacd

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• Move decoder to its own module. Add help print.

  jesusmgg

  committed
  4241069

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Commits on Mar 21, 2023

• Merge branch 'master' of github.com:jesusmgg/perfaware_8086

  jesusmgg

  committed
  232548c

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• Fix jump instructions displacement format.

  jesusmgg

  committed
  38ac3cf

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Commits on Mar 14, 2023

• Create README.

  jesusmgg

  authored
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