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x86_64: our paging code is all kinds of fucked up #547

@hawkw

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@hawkw

i guess there's a bunch of stuff wrong with our current paging code. among other things, our understanding of PTE flags assume the flags are the same at every page table level, which is wrong: the huge/large bit is the PAT bit in level 1 (PT) entries, so it actually is okay for it to be set. we currently panic if we see that bit in a level 1 PTE because we think it's the huge bit. (also thanks to @iximeow for discovering this)

Originally posted by @hawkw in #506 (comment)

@iximeow has been spending a lot of time on this and it turns out we do a whole bunch of stuff wrong.

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arch/x86_64area/halRelated to the hardware abstraction layerkind/bugSomething isn't working

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