/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Assembly Matcher Source Fragment                                           *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/


#ifdef GET_ASSEMBLER_HEADER
#undef GET_ASSEMBLER_HEADER
  // This should be included into the middle of the declaration of
  // your subclasses implementation of MCTargetAsmParser.
  uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
  void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
                       const OperandVector &Operands);
  void convertToMapAndConstraints(unsigned Kind,
                           const OperandVector &Operands) override;
  unsigned MatchInstructionImpl(const OperandVector &Operands,
                                MCInst &Inst,
                                uint64_t &ErrorInfo, bool matchingInlineAsm,
                                unsigned VariantID = 0);
#endif // GET_ASSEMBLER_HEADER_INFO


#ifdef GET_REGISTER_MATCHER
#undef GET_REGISTER_MATCHER

// Flags for subtarget features that participate in instruction matching.
enum SubtargetFeatureFlag : uint16_t {
  Feature_HasAVX512 = (1ULL << 0),
  Feature_HasCDI = (1ULL << 2),
  Feature_HasPFI = (1ULL << 6),
  Feature_HasERI = (1ULL << 4),
  Feature_HasDQI = (1ULL << 3),
  Feature_HasBWI = (1ULL << 1),
  Feature_HasVLX = (1ULL << 8),
  Feature_HasVBMI = (1ULL << 7),
  Feature_HasIFMA = (1ULL << 5),
  Feature_Not64BitMode = (1ULL << 13),
  Feature_In64BitMode = (1ULL << 11),
  Feature_In16BitMode = (1ULL << 9),
  Feature_Not16BitMode = (1ULL << 12),
  Feature_In32BitMode = (1ULL << 10),
  Feature_None = 0
};

static unsigned MatchRegisterName(StringRef Name) {
  switch (Name.size()) {
  default: break;
  case 2:	 // 33 strings to match.
    switch (Name[0]) {
    default: break;
    case 'a':	 // 3 strings to match.
      switch (Name[1]) {
      default: break;
      case 'h':	 // 1 string to match.
        return 1;	 // "ah"
      case 'l':	 // 1 string to match.
        return 2;	 // "al"
      case 'x':	 // 1 string to match.
        return 3;	 // "ax"
      }
      break;
    case 'b':	 // 4 strings to match.
      switch (Name[1]) {
      default: break;
      case 'h':	 // 1 string to match.
        return 4;	 // "bh"
      case 'l':	 // 1 string to match.
        return 5;	 // "bl"
      case 'p':	 // 1 string to match.
        return 6;	 // "bp"
      case 'x':	 // 1 string to match.
        return 8;	 // "bx"
      }
      break;
    case 'c':	 // 4 strings to match.
      switch (Name[1]) {
      default: break;
      case 'h':	 // 1 string to match.
        return 9;	 // "ch"
      case 'l':	 // 1 string to match.
        return 10;	 // "cl"
      case 's':	 // 1 string to match.
        return 11;	 // "cs"
      case 'x':	 // 1 string to match.
        return 12;	 // "cx"
      }
      break;
    case 'd':	 // 5 strings to match.
      switch (Name[1]) {
      default: break;
      case 'h':	 // 1 string to match.
        return 13;	 // "dh"
      case 'i':	 // 1 string to match.
        return 14;	 // "di"
      case 'l':	 // 1 string to match.
        return 16;	 // "dl"
      case 's':	 // 1 string to match.
        return 17;	 // "ds"
      case 'x':	 // 1 string to match.
        return 18;	 // "dx"
      }
      break;
    case 'e':	 // 1 string to match.
      if (Name[1] != 's')
        break;
      return 28;	 // "es"
    case 'f':	 // 1 string to match.
      if (Name[1] != 's')
        break;
      return 32;	 // "fs"
    case 'g':	 // 1 string to match.
      if (Name[1] != 's')
        break;
      return 33;	 // "gs"
    case 'i':	 // 1 string to match.
      if (Name[1] != 'p')
        break;
      return 34;	 // "ip"
    case 'k':	 // 8 strings to match.
      switch (Name[1]) {
      default: break;
      case '0':	 // 1 string to match.
        return 94;	 // "k0"
      case '1':	 // 1 string to match.
        return 95;	 // "k1"
      case '2':	 // 1 string to match.
        return 96;	 // "k2"
      case '3':	 // 1 string to match.
        return 97;	 // "k3"
      case '4':	 // 1 string to match.
        return 98;	 // "k4"
      case '5':	 // 1 string to match.
        return 99;	 // "k5"
      case '6':	 // 1 string to match.
        return 100;	 // "k6"
      case '7':	 // 1 string to match.
        return 101;	 // "k7"
      }
      break;
    case 'r':	 // 2 strings to match.
      switch (Name[1]) {
      default: break;
      case '8':	 // 1 string to match.
        return 110;	 // "r8"
      case '9':	 // 1 string to match.
        return 111;	 // "r9"
      }
      break;
    case 's':	 // 3 strings to match.
      switch (Name[1]) {
      default: break;
      case 'i':	 // 1 string to match.
        return 45;	 // "si"
      case 'p':	 // 1 string to match.
        return 47;	 // "sp"
      case 's':	 // 1 string to match.
        return 49;	 // "ss"
      }
      break;
    }
    break;
  case 3:	 // 72 strings to match.
    switch (Name[0]) {
    default: break;
    case 'b':	 // 1 string to match.
      if (memcmp(Name.data()+1, "pl", 2))
        break;
      return 7;	 // "bpl"
    case 'c':	 // 10 strings to match.
      if (Name[1] != 'r')
        break;
      switch (Name[2]) {
      default: break;
      case '0':	 // 1 string to match.
        return 54;	 // "cr0"
      case '1':	 // 1 string to match.
        return 55;	 // "cr1"
      case '2':	 // 1 string to match.
        return 56;	 // "cr2"
      case '3':	 // 1 string to match.
        return 57;	 // "cr3"
      case '4':	 // 1 string to match.
        return 58;	 // "cr4"
      case '5':	 // 1 string to match.
        return 59;	 // "cr5"
      case '6':	 // 1 string to match.
        return 60;	 // "cr6"
      case '7':	 // 1 string to match.
        return 61;	 // "cr7"
      case '8':	 // 1 string to match.
        return 62;	 // "cr8"
      case '9':	 // 1 string to match.
        return 63;	 // "cr9"
      }
      break;
    case 'd':	 // 11 strings to match.
      switch (Name[1]) {
      default: break;
      case 'i':	 // 1 string to match.
        if (Name[2] != 'l')
          break;
        return 15;	 // "dil"
      case 'r':	 // 10 strings to match.
        switch (Name[2]) {
        default: break;
        case '0':	 // 1 string to match.
          return 70;	 // "dr0"
        case '1':	 // 1 string to match.
          return 71;	 // "dr1"
        case '2':	 // 1 string to match.
          return 72;	 // "dr2"
        case '3':	 // 1 string to match.
          return 73;	 // "dr3"
        case '4':	 // 1 string to match.
          return 74;	 // "dr4"
        case '5':	 // 1 string to match.
          return 75;	 // "dr5"
        case '6':	 // 1 string to match.
          return 76;	 // "dr6"
        case '7':	 // 1 string to match.
          return 77;	 // "dr7"
        case '8':	 // 1 string to match.
          return 78;	 // "dr8"
        case '9':	 // 1 string to match.
          return 79;	 // "dr9"
        }
        break;
      }
      break;
    case 'e':	 // 10 strings to match.
      switch (Name[1]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (Name[2] != 'x')
          break;
        return 19;	 // "eax"
      case 'b':	 // 2 strings to match.
        switch (Name[2]) {
        default: break;
        case 'p':	 // 1 string to match.
          return 20;	 // "ebp"
        case 'x':	 // 1 string to match.
          return 21;	 // "ebx"
        }
        break;
      case 'c':	 // 1 string to match.
        if (Name[2] != 'x')
          break;
        return 22;	 // "ecx"
      case 'd':	 // 2 strings to match.
        switch (Name[2]) {
        default: break;
        case 'i':	 // 1 string to match.
          return 23;	 // "edi"
        case 'x':	 // 1 string to match.
          return 24;	 // "edx"
        }
        break;
      case 'i':	 // 2 strings to match.
        switch (Name[2]) {
        default: break;
        case 'p':	 // 1 string to match.
          return 26;	 // "eip"
        case 'z':	 // 1 string to match.
          return 27;	 // "eiz"
        }
        break;
      case 's':	 // 2 strings to match.
        switch (Name[2]) {
        default: break;
        case 'i':	 // 1 string to match.
          return 29;	 // "esi"
        case 'p':	 // 1 string to match.
          return 30;	 // "esp"
        }
        break;
      }
      break;
    case 'f':	 // 8 strings to match.
      if (Name[1] != 'p')
        break;
      switch (Name[2]) {
      default: break;
      case '0':	 // 1 string to match.
        return 86;	 // "fp0"
      case '1':	 // 1 string to match.
        return 87;	 // "fp1"
      case '2':	 // 1 string to match.
        return 88;	 // "fp2"
      case '3':	 // 1 string to match.
        return 89;	 // "fp3"
      case '4':	 // 1 string to match.
        return 90;	 // "fp4"
      case '5':	 // 1 string to match.
        return 91;	 // "fp5"
      case '6':	 // 1 string to match.
        return 92;	 // "fp6"
      case '7':	 // 1 string to match.
        return 93;	 // "fp7"
      }
      break;
    case 'm':	 // 8 strings to match.
      if (Name[1] != 'm')
        break;
      switch (Name[2]) {
      default: break;
      case '0':	 // 1 string to match.
        return 102;	 // "mm0"
      case '1':	 // 1 string to match.
        return 103;	 // "mm1"
      case '2':	 // 1 string to match.
        return 104;	 // "mm2"
      case '3':	 // 1 string to match.
        return 105;	 // "mm3"
      case '4':	 // 1 string to match.
        return 106;	 // "mm4"
      case '5':	 // 1 string to match.
        return 107;	 // "mm5"
      case '6':	 // 1 string to match.
        return 108;	 // "mm6"
      case '7':	 // 1 string to match.
        return 109;	 // "mm7"
      }
      break;
    case 'r':	 // 22 strings to match.
      switch (Name[1]) {
      default: break;
      case '1':	 // 6 strings to match.
        switch (Name[2]) {
        default: break;
        case '0':	 // 1 string to match.
          return 112;	 // "r10"
        case '1':	 // 1 string to match.
          return 113;	 // "r11"
        case '2':	 // 1 string to match.
          return 114;	 // "r12"
        case '3':	 // 1 string to match.
          return 115;	 // "r13"
        case '4':	 // 1 string to match.
          return 116;	 // "r14"
        case '5':	 // 1 string to match.
          return 117;	 // "r15"
        }
        break;
      case '8':	 // 3 strings to match.
        switch (Name[2]) {
        default: break;
        case 'b':	 // 1 string to match.
          return 222;	 // "r8b"
        case 'd':	 // 1 string to match.
          return 230;	 // "r8d"
        case 'w':	 // 1 string to match.
          return 238;	 // "r8w"
        }
        break;
      case '9':	 // 3 strings to match.
        switch (Name[2]) {
        default: break;
        case 'b':	 // 1 string to match.
          return 223;	 // "r9b"
        case 'd':	 // 1 string to match.
          return 231;	 // "r9d"
        case 'w':	 // 1 string to match.
          return 239;	 // "r9w"
        }
        break;
      case 'a':	 // 1 string to match.
        if (Name[2] != 'x')
          break;
        return 35;	 // "rax"
      case 'b':	 // 2 strings to match.
        switch (Name[2]) {
        default: break;
        case 'p':	 // 1 string to match.
          return 36;	 // "rbp"
        case 'x':	 // 1 string to match.
          return 37;	 // "rbx"
        }
        break;
      case 'c':	 // 1 string to match.
        if (Name[2] != 'x')
          break;
        return 38;	 // "rcx"
      case 'd':	 // 2 strings to match.
        switch (Name[2]) {
        default: break;
        case 'i':	 // 1 string to match.
          return 39;	 // "rdi"
        case 'x':	 // 1 string to match.
          return 40;	 // "rdx"
        }
        break;
      case 'i':	 // 2 strings to match.
        switch (Name[2]) {
        default: break;
        case 'p':	 // 1 string to match.
          return 41;	 // "rip"
        case 'z':	 // 1 string to match.
          return 42;	 // "riz"
        }
        break;
      case 's':	 // 2 strings to match.
        switch (Name[2]) {
        default: break;
        case 'i':	 // 1 string to match.
          return 43;	 // "rsi"
        case 'p':	 // 1 string to match.
          return 44;	 // "rsp"
        }
        break;
      }
      break;
    case 's':	 // 2 strings to match.
      switch (Name[1]) {
      default: break;
      case 'i':	 // 1 string to match.
        if (Name[2] != 'l')
          break;
        return 46;	 // "sil"
      case 'p':	 // 1 string to match.
        if (Name[2] != 'l')
          break;
        return 48;	 // "spl"
      }
      break;
    }
    break;
  case 4:	 // 65 strings to match.
    switch (Name[0]) {
    default: break;
    case 'b':	 // 4 strings to match.
      if (memcmp(Name.data()+1, "nd", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '0':	 // 1 string to match.
        return 50;	 // "bnd0"
      case '1':	 // 1 string to match.
        return 51;	 // "bnd1"
      case '2':	 // 1 string to match.
        return 52;	 // "bnd2"
      case '3':	 // 1 string to match.
        return 53;	 // "bnd3"
      }
      break;
    case 'c':	 // 6 strings to match.
      if (memcmp(Name.data()+1, "r1", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '0':	 // 1 string to match.
        return 64;	 // "cr10"
      case '1':	 // 1 string to match.
        return 65;	 // "cr11"
      case '2':	 // 1 string to match.
        return 66;	 // "cr12"
      case '3':	 // 1 string to match.
        return 67;	 // "cr13"
      case '4':	 // 1 string to match.
        return 68;	 // "cr14"
      case '5':	 // 1 string to match.
        return 69;	 // "cr15"
      }
      break;
    case 'd':	 // 6 strings to match.
      if (memcmp(Name.data()+1, "r1", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '0':	 // 1 string to match.
        return 80;	 // "dr10"
      case '1':	 // 1 string to match.
        return 81;	 // "dr11"
      case '2':	 // 1 string to match.
        return 82;	 // "dr12"
      case '3':	 // 1 string to match.
        return 83;	 // "dr13"
      case '4':	 // 1 string to match.
        return 84;	 // "dr14"
      case '5':	 // 1 string to match.
        return 85;	 // "dr15"
      }
      break;
    case 'f':	 // 1 string to match.
      if (memcmp(Name.data()+1, "psw", 3))
        break;
      return 31;	 // "fpsw"
    case 'r':	 // 18 strings to match.
      if (Name[1] != '1')
        break;
      switch (Name[2]) {
      default: break;
      case '0':	 // 3 strings to match.
        switch (Name[3]) {
        default: break;
        case 'b':	 // 1 string to match.
          return 224;	 // "r10b"
        case 'd':	 // 1 string to match.
          return 232;	 // "r10d"
        case 'w':	 // 1 string to match.
          return 240;	 // "r10w"
        }
        break;
      case '1':	 // 3 strings to match.
        switch (Name[3]) {
        default: break;
        case 'b':	 // 1 string to match.
          return 225;	 // "r11b"
        case 'd':	 // 1 string to match.
          return 233;	 // "r11d"
        case 'w':	 // 1 string to match.
          return 241;	 // "r11w"
        }
        break;
      case '2':	 // 3 strings to match.
        switch (Name[3]) {
        default: break;
        case 'b':	 // 1 string to match.
          return 226;	 // "r12b"
        case 'd':	 // 1 string to match.
          return 234;	 // "r12d"
        case 'w':	 // 1 string to match.
          return 242;	 // "r12w"
        }
        break;
      case '3':	 // 3 strings to match.
        switch (Name[3]) {
        default: break;
        case 'b':	 // 1 string to match.
          return 227;	 // "r13b"
        case 'd':	 // 1 string to match.
          return 235;	 // "r13d"
        case 'w':	 // 1 string to match.
          return 243;	 // "r13w"
        }
        break;
      case '4':	 // 3 strings to match.
        switch (Name[3]) {
        default: break;
        case 'b':	 // 1 string to match.
          return 228;	 // "r14b"
        case 'd':	 // 1 string to match.
          return 236;	 // "r14d"
        case 'w':	 // 1 string to match.
          return 244;	 // "r14w"
        }
        break;
      case '5':	 // 3 strings to match.
        switch (Name[3]) {
        default: break;
        case 'b':	 // 1 string to match.
          return 229;	 // "r15b"
        case 'd':	 // 1 string to match.
          return 237;	 // "r15d"
        case 'w':	 // 1 string to match.
          return 245;	 // "r15w"
        }
        break;
      }
      break;
    case 'x':	 // 10 strings to match.
      if (memcmp(Name.data()+1, "mm", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '0':	 // 1 string to match.
        return 126;	 // "xmm0"
      case '1':	 // 1 string to match.
        return 127;	 // "xmm1"
      case '2':	 // 1 string to match.
        return 128;	 // "xmm2"
      case '3':	 // 1 string to match.
        return 129;	 // "xmm3"
      case '4':	 // 1 string to match.
        return 130;	 // "xmm4"
      case '5':	 // 1 string to match.
        return 131;	 // "xmm5"
      case '6':	 // 1 string to match.
        return 132;	 // "xmm6"
      case '7':	 // 1 string to match.
        return 133;	 // "xmm7"
      case '8':	 // 1 string to match.
        return 134;	 // "xmm8"
      case '9':	 // 1 string to match.
        return 135;	 // "xmm9"
      }
      break;
    case 'y':	 // 10 strings to match.
      if (memcmp(Name.data()+1, "mm", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '0':	 // 1 string to match.
        return 158;	 // "ymm0"
      case '1':	 // 1 string to match.
        return 159;	 // "ymm1"
      case '2':	 // 1 string to match.
        return 160;	 // "ymm2"
      case '3':	 // 1 string to match.
        return 161;	 // "ymm3"
      case '4':	 // 1 string to match.
        return 162;	 // "ymm4"
      case '5':	 // 1 string to match.
        return 163;	 // "ymm5"
      case '6':	 // 1 string to match.
        return 164;	 // "ymm6"
      case '7':	 // 1 string to match.
        return 165;	 // "ymm7"
      case '8':	 // 1 string to match.
        return 166;	 // "ymm8"
      case '9':	 // 1 string to match.
        return 167;	 // "ymm9"
      }
      break;
    case 'z':	 // 10 strings to match.
      if (memcmp(Name.data()+1, "mm", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '0':	 // 1 string to match.
        return 190;	 // "zmm0"
      case '1':	 // 1 string to match.
        return 191;	 // "zmm1"
      case '2':	 // 1 string to match.
        return 192;	 // "zmm2"
      case '3':	 // 1 string to match.
        return 193;	 // "zmm3"
      case '4':	 // 1 string to match.
        return 194;	 // "zmm4"
      case '5':	 // 1 string to match.
        return 195;	 // "zmm5"
      case '6':	 // 1 string to match.
        return 196;	 // "zmm6"
      case '7':	 // 1 string to match.
        return 197;	 // "zmm7"
      case '8':	 // 1 string to match.
        return 198;	 // "zmm8"
      case '9':	 // 1 string to match.
        return 199;	 // "zmm9"
      }
      break;
    }
    break;
  case 5:	 // 75 strings to match.
    switch (Name[0]) {
    default: break;
    case 'f':	 // 1 string to match.
      if (memcmp(Name.data()+1, "lags", 4))
        break;
      return 25;	 // "flags"
    case 's':	 // 8 strings to match.
      if (memcmp(Name.data()+1, "t(", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '0':	 // 1 string to match.
        if (Name[4] != ')')
          break;
        return 118;	 // "st(0)"
      case '1':	 // 1 string to match.
        if (Name[4] != ')')
          break;
        return 119;	 // "st(1)"
      case '2':	 // 1 string to match.
        if (Name[4] != ')')
          break;
        return 120;	 // "st(2)"
      case '3':	 // 1 string to match.
        if (Name[4] != ')')
          break;
        return 121;	 // "st(3)"
      case '4':	 // 1 string to match.
        if (Name[4] != ')')
          break;
        return 122;	 // "st(4)"
      case '5':	 // 1 string to match.
        if (Name[4] != ')')
          break;
        return 123;	 // "st(5)"
      case '6':	 // 1 string to match.
        if (Name[4] != ')')
          break;
        return 124;	 // "st(6)"
      case '7':	 // 1 string to match.
        if (Name[4] != ')')
          break;
        return 125;	 // "st(7)"
      }
      break;
    case 'x':	 // 22 strings to match.
      if (memcmp(Name.data()+1, "mm", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '1':	 // 10 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 136;	 // "xmm10"
        case '1':	 // 1 string to match.
          return 137;	 // "xmm11"
        case '2':	 // 1 string to match.
          return 138;	 // "xmm12"
        case '3':	 // 1 string to match.
          return 139;	 // "xmm13"
        case '4':	 // 1 string to match.
          return 140;	 // "xmm14"
        case '5':	 // 1 string to match.
          return 141;	 // "xmm15"
        case '6':	 // 1 string to match.
          return 142;	 // "xmm16"
        case '7':	 // 1 string to match.
          return 143;	 // "xmm17"
        case '8':	 // 1 string to match.
          return 144;	 // "xmm18"
        case '9':	 // 1 string to match.
          return 145;	 // "xmm19"
        }
        break;
      case '2':	 // 10 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 146;	 // "xmm20"
        case '1':	 // 1 string to match.
          return 147;	 // "xmm21"
        case '2':	 // 1 string to match.
          return 148;	 // "xmm22"
        case '3':	 // 1 string to match.
          return 149;	 // "xmm23"
        case '4':	 // 1 string to match.
          return 150;	 // "xmm24"
        case '5':	 // 1 string to match.
          return 151;	 // "xmm25"
        case '6':	 // 1 string to match.
          return 152;	 // "xmm26"
        case '7':	 // 1 string to match.
          return 153;	 // "xmm27"
        case '8':	 // 1 string to match.
          return 154;	 // "xmm28"
        case '9':	 // 1 string to match.
          return 155;	 // "xmm29"
        }
        break;
      case '3':	 // 2 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 156;	 // "xmm30"
        case '1':	 // 1 string to match.
          return 157;	 // "xmm31"
        }
        break;
      }
      break;
    case 'y':	 // 22 strings to match.
      if (memcmp(Name.data()+1, "mm", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '1':	 // 10 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 168;	 // "ymm10"
        case '1':	 // 1 string to match.
          return 169;	 // "ymm11"
        case '2':	 // 1 string to match.
          return 170;	 // "ymm12"
        case '3':	 // 1 string to match.
          return 171;	 // "ymm13"
        case '4':	 // 1 string to match.
          return 172;	 // "ymm14"
        case '5':	 // 1 string to match.
          return 173;	 // "ymm15"
        case '6':	 // 1 string to match.
          return 174;	 // "ymm16"
        case '7':	 // 1 string to match.
          return 175;	 // "ymm17"
        case '8':	 // 1 string to match.
          return 176;	 // "ymm18"
        case '9':	 // 1 string to match.
          return 177;	 // "ymm19"
        }
        break;
      case '2':	 // 10 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 178;	 // "ymm20"
        case '1':	 // 1 string to match.
          return 179;	 // "ymm21"
        case '2':	 // 1 string to match.
          return 180;	 // "ymm22"
        case '3':	 // 1 string to match.
          return 181;	 // "ymm23"
        case '4':	 // 1 string to match.
          return 182;	 // "ymm24"
        case '5':	 // 1 string to match.
          return 183;	 // "ymm25"
        case '6':	 // 1 string to match.
          return 184;	 // "ymm26"
        case '7':	 // 1 string to match.
          return 185;	 // "ymm27"
        case '8':	 // 1 string to match.
          return 186;	 // "ymm28"
        case '9':	 // 1 string to match.
          return 187;	 // "ymm29"
        }
        break;
      case '3':	 // 2 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 188;	 // "ymm30"
        case '1':	 // 1 string to match.
          return 189;	 // "ymm31"
        }
        break;
      }
      break;
    case 'z':	 // 22 strings to match.
      if (memcmp(Name.data()+1, "mm", 2))
        break;
      switch (Name[3]) {
      default: break;
      case '1':	 // 10 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 200;	 // "zmm10"
        case '1':	 // 1 string to match.
          return 201;	 // "zmm11"
        case '2':	 // 1 string to match.
          return 202;	 // "zmm12"
        case '3':	 // 1 string to match.
          return 203;	 // "zmm13"
        case '4':	 // 1 string to match.
          return 204;	 // "zmm14"
        case '5':	 // 1 string to match.
          return 205;	 // "zmm15"
        case '6':	 // 1 string to match.
          return 206;	 // "zmm16"
        case '7':	 // 1 string to match.
          return 207;	 // "zmm17"
        case '8':	 // 1 string to match.
          return 208;	 // "zmm18"
        case '9':	 // 1 string to match.
          return 209;	 // "zmm19"
        }
        break;
      case '2':	 // 10 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 210;	 // "zmm20"
        case '1':	 // 1 string to match.
          return 211;	 // "zmm21"
        case '2':	 // 1 string to match.
          return 212;	 // "zmm22"
        case '3':	 // 1 string to match.
          return 213;	 // "zmm23"
        case '4':	 // 1 string to match.
          return 214;	 // "zmm24"
        case '5':	 // 1 string to match.
          return 215;	 // "zmm25"
        case '6':	 // 1 string to match.
          return 216;	 // "zmm26"
        case '7':	 // 1 string to match.
          return 217;	 // "zmm27"
        case '8':	 // 1 string to match.
          return 218;	 // "zmm28"
        case '9':	 // 1 string to match.
          return 219;	 // "zmm29"
        }
        break;
      case '3':	 // 2 strings to match.
        switch (Name[4]) {
        default: break;
        case '0':	 // 1 string to match.
          return 220;	 // "zmm30"
        case '1':	 // 1 string to match.
          return 221;	 // "zmm31"
        }
        break;
      }
      break;
    }
    break;
  }
  return 0;
}

#endif // GET_REGISTER_MATCHER


#ifdef GET_SUBTARGET_FEATURE_NAME
#undef GET_SUBTARGET_FEATURE_NAME

// User-level names for subtarget features that participate in
// instruction matching.
static const char *getSubtargetFeatureName(uint64_t Val) {
  switch(Val) {
  case Feature_HasAVX512: return "AVX-512 ISA";
  case Feature_HasCDI: return "AVX-512 CD ISA";
  case Feature_HasPFI: return "AVX-512 PF ISA";
  case Feature_HasERI: return "AVX-512 ER ISA";
  case Feature_HasDQI: return "AVX-512 DQ ISA";
  case Feature_HasBWI: return "AVX-512 BW ISA";
  case Feature_HasVLX: return "AVX-512 VL ISA";
  case Feature_HasVBMI: return "AVX-512 VBMI ISA";
  case Feature_HasIFMA: return "AVX-512 IFMA ISA";
  case Feature_Not64BitMode: return "Not 64-bit mode";
  case Feature_In64BitMode: return "64-bit mode";
  case Feature_In16BitMode: return "16-bit mode";
  case Feature_Not16BitMode: return "Not 16-bit mode";
  case Feature_In32BitMode: return "32-bit mode";
  default: return "(unknown)";
  }
}

#endif // GET_SUBTARGET_FEATURE_NAME


#ifdef GET_MATCHER_IMPLEMENTATION
#undef GET_MATCHER_IMPLEMENTATION

static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
  switch (VariantID) {
    case 0:
      switch (Mnemonic.size()) {
      default: break;
      case 3:	 // 6 strings to match.
        switch (Mnemonic[0]) {
        default: break;
        case 'c':	 // 4 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (Mnemonic[2] != 'w')
              break;
            Mnemonic = "cbtw";	 // "cbw"
            return;
          case 'd':	 // 1 string to match.
            if (Mnemonic[2] != 'q')
              break;
            Mnemonic = "cltd";	 // "cdq"
            return;
          case 'q':	 // 1 string to match.
            if (Mnemonic[2] != 'o')
              break;
            Mnemonic = "cqto";	 // "cqo"
            return;
          case 'w':	 // 1 string to match.
            if (Mnemonic[2] != 'd')
              break;
            Mnemonic = "cwtd";	 // "cwd"
            return;
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "op", 2))
            break;
          if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "pop"
            Mnemonic = "popw";
          else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
            Mnemonic = "popl";
          else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
            Mnemonic = "popq";
          return;
        case 'r':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "et", 2))
            break;
          if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "ret"
            Mnemonic = "retw";
          else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
            Mnemonic = "retl";
          else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
            Mnemonic = "retq";
          return;
        }
        break;
      case 4:	 // 17 strings to match.
        switch (Mnemonic[0]) {
        default: break;
        case 'c':	 // 3 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "ll", 2))
              break;
            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "call"
              Mnemonic = "callw";
            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
              Mnemonic = "calll";
            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
              Mnemonic = "callq";
            return;
          case 'd':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "qe", 2))
              break;
            Mnemonic = "cltq";	 // "cdqe"
            return;
          case 'w':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "de", 2))
              break;
            Mnemonic = "cwtl";	 // "cwde"
            return;
          }
          break;
        case 'i':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "ret", 3))
            break;
          if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "iret"
            Mnemonic = "iretw";
          else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
            Mnemonic = "iretl";
          return;
        case 'l':	 // 3 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'g':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "dt", 2))
              break;
            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "lgdt"
              Mnemonic = "lgdtw";
            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
              Mnemonic = "lgdtl";
            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
              Mnemonic = "lgdtq";
            return;
          case 'i':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "dt", 2))
              break;
            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "lidt"
              Mnemonic = "lidtw";
            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
              Mnemonic = "lidtl";
            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
              Mnemonic = "lidtq";
            return;
          case 'r':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "et", 2))
              break;
            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "lret"
              Mnemonic = "lretw";
            else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
              Mnemonic = "lretl";
            return;
          }
          break;
        case 'p':	 // 3 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'o':	 // 2 strings to match.
            if (Mnemonic[2] != 'p')
              break;
            switch (Mnemonic[3]) {
            default: break;
            case 'a':	 // 1 string to match.
              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "popa"
                Mnemonic = "popaw";
              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
                Mnemonic = "popal";
              return;
            case 'f':	 // 1 string to match.
              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "popf"
                Mnemonic = "popfw";
              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
                Mnemonic = "popfl";
              else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
                Mnemonic = "popfq";
              return;
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "sh", 2))
              break;
            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "push"
              Mnemonic = "pushw";
            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
              Mnemonic = "pushl";
            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
              Mnemonic = "pushq";
            return;
          }
          break;
        case 's':	 // 6 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'a':	 // 4 strings to match.
            if (Mnemonic[2] != 'l')
              break;
            switch (Mnemonic[3]) {
            default: break;
            case 'b':	 // 1 string to match.
              Mnemonic = "shlb";	 // "salb"
              return;
            case 'l':	 // 1 string to match.
              Mnemonic = "shll";	 // "sall"
              return;
            case 'q':	 // 1 string to match.
              Mnemonic = "shlq";	 // "salq"
              return;
            case 'w':	 // 1 string to match.
              Mnemonic = "shlw";	 // "salw"
              return;
            }
            break;
          case 'g':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "dt", 2))
              break;
            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "sgdt"
              Mnemonic = "sgdtw";
            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
              Mnemonic = "sgdtl";
            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
              Mnemonic = "sgdtq";
            return;
          case 'i':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "dt", 2))
              break;
            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "sidt"
              Mnemonic = "sidtw";
            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
              Mnemonic = "sidtl";
            else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
              Mnemonic = "sidtq";
            return;
          }
          break;
        case 'u':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "d2a", 3))
            break;
          Mnemonic = "ud2";	 // "ud2a"
          return;
        }
        break;
      case 5:	 // 9 strings to match.
        switch (Mnemonic[0]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "ildq", 4))
            break;
          Mnemonic = "fildll";	 // "fildq"
          return;
        case 'p':	 // 3 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'o':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "pfd", 3))
              break;
            Mnemonic = "popfl";	 // "popfd"
            return;
          case 'u':	 // 2 strings to match.
            if (memcmp(Mnemonic.data()+2, "sh", 2))
              break;
            switch (Mnemonic[4]) {
            default: break;
            case 'a':	 // 1 string to match.
              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "pusha"
                Mnemonic = "pushaw";
              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
                Mnemonic = "pushal";
              return;
            case 'f':	 // 1 string to match.
              if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "pushf"
                Mnemonic = "pushfw";
              else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
                Mnemonic = "pushfl";
              else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
                Mnemonic = "pushfq";
              return;
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(Mnemonic.data()+1, "mov", 3))
            break;
          switch (Mnemonic[4]) {
          default: break;
          case 'b':	 // 1 string to match.
            Mnemonic = "movsb";	 // "smovb"
            return;
          case 'l':	 // 1 string to match.
            Mnemonic = "movsl";	 // "smovl"
            return;
          case 'q':	 // 1 string to match.
            Mnemonic = "movsq";	 // "smovq"
            return;
          case 'w':	 // 1 string to match.
            Mnemonic = "movsw";	 // "smovw"
            return;
          }
          break;
        case 'v':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "errw", 4))
            break;
          Mnemonic = "verr";	 // "verrw"
          return;
        }
        break;
      case 6:	 // 15 strings to match.
        switch (Mnemonic[0]) {
        default: break;
        case 'c':	 // 6 strings to match.
          if (memcmp(Mnemonic.data()+1, "mov", 3))
            break;
          switch (Mnemonic[4]) {
          default: break;
          case 'c':	 // 3 strings to match.
            switch (Mnemonic[5]) {
            default: break;
            case 'l':	 // 1 string to match.
              Mnemonic = "cmovbl";	 // "cmovcl"
              return;
            case 'q':	 // 1 string to match.
              Mnemonic = "cmovbq";	 // "cmovcq"
              return;
            case 'w':	 // 1 string to match.
              Mnemonic = "cmovbw";	 // "cmovcw"
              return;
            }
            break;
          case 'z':	 // 3 strings to match.
            switch (Mnemonic[5]) {
            default: break;
            case 'l':	 // 1 string to match.
              Mnemonic = "cmovel";	 // "cmovzl"
              return;
            case 'q':	 // 1 string to match.
              Mnemonic = "cmoveq";	 // "cmovzq"
              return;
            case 'w':	 // 1 string to match.
              Mnemonic = "cmovew";	 // "cmovzw"
              return;
            }
            break;
          }
          break;
        case 'f':	 // 4 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(Mnemonic.data()+2, "mov", 3))
              break;
            switch (Mnemonic[5]) {
            default: break;
            case 'a':	 // 1 string to match.
              Mnemonic = "fcmovnbe";	 // "fcmova"
              return;
            case 'z':	 // 1 string to match.
              Mnemonic = "fcmove";	 // "fcmovz"
              return;
            }
            break;
          case 'i':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "stpq", 4))
              break;
            Mnemonic = "fistpll";	 // "fistpq"
            return;
          case 'l':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "dcww", 4))
              break;
            Mnemonic = "fldcw";	 // "fldcww"
            return;
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(Mnemonic.data()+1, "eave", 4))
            break;
          switch (Mnemonic[5]) {
          default: break;
          case 'l':	 // 1 string to match.
            if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)	 // "leavel"
              Mnemonic = "leave";
            return;
          case 'q':	 // 1 string to match.
            if ((Features & Feature_In64BitMode) == Feature_In64BitMode)	 // "leaveq"
              Mnemonic = "leave";
            return;
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "ushfd", 5))
            break;
          Mnemonic = "pushfl";	 // "pushfd"
          return;
        case 's':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "ysret", 5))
            break;
          Mnemonic = "sysretl";	 // "sysret"
          return;
        case 'x':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "saveq", 5))
            break;
          Mnemonic = "xsave64";	 // "xsaveq"
          return;
        }
        break;
      case 7:	 // 34 strings to match.
        switch (Mnemonic[0]) {
        default: break;
        case 'c':	 // 24 strings to match.
          if (memcmp(Mnemonic.data()+1, "mov", 3))
            break;
          switch (Mnemonic[4]) {
          default: break;
          case 'n':	 // 18 strings to match.
            switch (Mnemonic[5]) {
            default: break;
            case 'a':	 // 3 strings to match.
              switch (Mnemonic[6]) {
              default: break;
              case 'l':	 // 1 string to match.
                Mnemonic = "cmovbel";	 // "cmovnal"
                return;
              case 'q':	 // 1 string to match.
                Mnemonic = "cmovbeq";	 // "cmovnaq"
                return;
              case 'w':	 // 1 string to match.
                Mnemonic = "cmovbew";	 // "cmovnaw"
                return;
              }
              break;
            case 'b':	 // 3 strings to match.
              switch (Mnemonic[6]) {
              default: break;
              case 'l':	 // 1 string to match.
                Mnemonic = "cmovael";	 // "cmovnbl"
                return;
              case 'q':	 // 1 string to match.
                Mnemonic = "cmovaeq";	 // "cmovnbq"
                return;
              case 'w':	 // 1 string to match.
                Mnemonic = "cmovaew";	 // "cmovnbw"
                return;
              }
              break;
            case 'c':	 // 3 strings to match.
              switch (Mnemonic[6]) {
              default: break;
              case 'l':	 // 1 string to match.
                Mnemonic = "cmovael";	 // "cmovncl"
                return;
              case 'q':	 // 1 string to match.
                Mnemonic = "cmovaeq";	 // "cmovncq"
                return;
              case 'w':	 // 1 string to match.
                Mnemonic = "cmovaew";	 // "cmovncw"
                return;
              }
              break;
            case 'g':	 // 3 strings to match.
              switch (Mnemonic[6]) {
              default: break;
              case 'l':	 // 1 string to match.
                Mnemonic = "cmovlel";	 // "cmovngl"
                return;
              case 'q':	 // 1 string to match.
                Mnemonic = "cmovleq";	 // "cmovngq"
                return;
              case 'w':	 // 1 string to match.
                Mnemonic = "cmovlew";	 // "cmovngw"
                return;
              }
              break;
            case 'l':	 // 3 strings to match.
              switch (Mnemonic[6]) {
              default: break;
              case 'l':	 // 1 string to match.
                Mnemonic = "cmovgel";	 // "cmovnll"
                return;
              case 'q':	 // 1 string to match.
                Mnemonic = "cmovgeq";	 // "cmovnlq"
                return;
              case 'w':	 // 1 string to match.
                Mnemonic = "cmovgew";	 // "cmovnlw"
                return;
              }
              break;
            case 'z':	 // 3 strings to match.
              switch (Mnemonic[6]) {
              default: break;
              case 'l':	 // 1 string to match.
                Mnemonic = "cmovnel";	 // "cmovnzl"
                return;
              case 'q':	 // 1 string to match.
                Mnemonic = "cmovneq";	 // "cmovnzq"
                return;
              case 'w':	 // 1 string to match.
                Mnemonic = "cmovnew";	 // "cmovnzw"
                return;
              }
              break;
            }
            break;
          case 'p':	 // 6 strings to match.
            switch (Mnemonic[5]) {
            default: break;
            case 'e':	 // 3 strings to match.
              switch (Mnemonic[6]) {
              default: break;
              case 'l':	 // 1 string to match.
                Mnemonic = "cmovpl";	 // "cmovpel"
                return;
              case 'q':	 // 1 string to match.
                Mnemonic = "cmovpq";	 // "cmovpeq"
                return;
              case 'w':	 // 1 string to match.
                Mnemonic = "cmovpw";	 // "cmovpew"
                return;
              }
              break;
            case 'o':	 // 3 strings to match.
              switch (Mnemonic[6]) {
              default: break;
              case 'l':	 // 1 string to match.
                Mnemonic = "cmovnpl";	 // "cmovpol"
                return;
              case 'q':	 // 1 string to match.
                Mnemonic = "cmovnpq";	 // "cmovpoq"
                return;
              case 'w':	 // 1 string to match.
                Mnemonic = "cmovnpw";	 // "cmovpow"
                return;
              }
              break;
            }
            break;
          }
          break;
        case 'f':	 // 6 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(Mnemonic.data()+2, "mov", 3))
              break;
            switch (Mnemonic[5]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (Mnemonic[6] != 'e')
                break;
              Mnemonic = "fcmovnb";	 // "fcmovae"
              return;
            case 'n':	 // 1 string to match.
              if (Mnemonic[6] != 'a')
                break;
              Mnemonic = "fcmovbe";	 // "fcmovna"
              return;
            }
            break;
          case 'i':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "sttpq", 5))
              break;
            Mnemonic = "fisttpll";	 // "fisttpq"
            return;
          case 'n':	 // 2 strings to match.
            if (memcmp(Mnemonic.data()+2, "st", 2))
              break;
            switch (Mnemonic[4]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(Mnemonic.data()+5, "ww", 2))
                break;
              Mnemonic = "fnstcw";	 // "fnstcww"
              return;
            case 's':	 // 1 string to match.
              if (memcmp(Mnemonic.data()+5, "ww", 2))
                break;
              Mnemonic = "fnstsw";	 // "fnstsww"
              return;
            }
            break;
          case 'x':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "saveq", 5))
              break;
            Mnemonic = "fxsave64";	 // "fxsaveq"
            return;
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "ysexit", 6))
            break;
          Mnemonic = "sysexitl";	 // "sysexit"
          return;
        case 'x':	 // 3 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'r':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "storq", 5))
              break;
            Mnemonic = "xrstor64";	 // "xrstorq"
            return;
          case 's':	 // 2 strings to match.
            if (memcmp(Mnemonic.data()+2, "ave", 3))
              break;
            switch (Mnemonic[5]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (Mnemonic[6] != 'q')
                break;
              Mnemonic = "xsavec64";	 // "xsavecq"
              return;
            case 's':	 // 1 string to match.
              if (Mnemonic[6] != 'q')
                break;
              Mnemonic = "xsaves64";	 // "xsavesq"
              return;
            }
            break;
          }
          break;
        }
        break;
      case 8:	 // 15 strings to match.
        switch (Mnemonic[0]) {
        default: break;
        case 'c':	 // 12 strings to match.
          if (memcmp(Mnemonic.data()+1, "movn", 4))
            break;
          switch (Mnemonic[5]) {
          default: break;
          case 'a':	 // 3 strings to match.
            if (Mnemonic[6] != 'e')
              break;
            switch (Mnemonic[7]) {
            default: break;
            case 'l':	 // 1 string to match.
              Mnemonic = "cmovbl";	 // "cmovnael"
              return;
            case 'q':	 // 1 string to match.
              Mnemonic = "cmovbq";	 // "cmovnaeq"
              return;
            case 'w':	 // 1 string to match.
              Mnemonic = "cmovbw";	 // "cmovnaew"
              return;
            }
            break;
          case 'b':	 // 3 strings to match.
            if (Mnemonic[6] != 'e')
              break;
            switch (Mnemonic[7]) {
            default: break;
            case 'l':	 // 1 string to match.
              Mnemonic = "cmoval";	 // "cmovnbel"
              return;
            case 'q':	 // 1 string to match.
              Mnemonic = "cmovaq";	 // "cmovnbeq"
              return;
            case 'w':	 // 1 string to match.
              Mnemonic = "cmovaw";	 // "cmovnbew"
              return;
            }
            break;
          case 'g':	 // 3 strings to match.
            if (Mnemonic[6] != 'e')
              break;
            switch (Mnemonic[7]) {
            default: break;
            case 'l':	 // 1 string to match.
              Mnemonic = "cmovll";	 // "cmovngel"
              return;
            case 'q':	 // 1 string to match.
              Mnemonic = "cmovlq";	 // "cmovngeq"
              return;
            case 'w':	 // 1 string to match.
              Mnemonic = "cmovlw";	 // "cmovngew"
              return;
            }
            break;
          case 'l':	 // 3 strings to match.
            if (Mnemonic[6] != 'e')
              break;
            switch (Mnemonic[7]) {
            default: break;
            case 'l':	 // 1 string to match.
              Mnemonic = "cmovgl";	 // "cmovnlel"
              return;
            case 'q':	 // 1 string to match.
              Mnemonic = "cmovgq";	 // "cmovnleq"
              return;
            case 'w':	 // 1 string to match.
              Mnemonic = "cmovgw";	 // "cmovnlew"
              return;
            }
            break;
          }
          break;
        case 'f':	 // 2 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "movnae", 6))
              break;
            Mnemonic = "fcmovb";	 // "fcmovnae"
            return;
          case 'x':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "rstorq", 6))
              break;
            Mnemonic = "fxrstor64";	 // "fxrstorq"
            return;
          }
          break;
        case 'x':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "rstorsq", 7))
            break;
          Mnemonic = "xrstors64";	 // "xrstorsq"
          return;
        }
        break;
      case 9:	 // 1 string to match.
        if (memcmp(Mnemonic.data()+0, "xsaveoptq", 9))
          break;
        Mnemonic = "xsaveopt64";	 // "xsaveoptq"
        return;
      }
    break;
    case 1:
      switch (Mnemonic.size()) {
      default: break;
      case 3:	 // 1 string to match.
        if (memcmp(Mnemonic.data()+0, "sal", 3))
          break;
        Mnemonic = "shl";	 // "sal"
        return;
      case 4:	 // 1 string to match.
        if (memcmp(Mnemonic.data()+0, "popa", 4))
          break;
        if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "popa"
          Mnemonic = "popaw";
        else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
          Mnemonic = "popal";
        return;
      case 5:	 // 4 strings to match.
        switch (Mnemonic[0]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (memcmp(Mnemonic.data()+1, "mov", 3))
            break;
          switch (Mnemonic[4]) {
          default: break;
          case 'c':	 // 1 string to match.
            Mnemonic = "cmovb";	 // "cmovc"
            return;
          case 'z':	 // 1 string to match.
            Mnemonic = "cmove";	 // "cmovz"
            return;
          }
          break;
        case 'p':	 // 2 strings to match.
          switch (Mnemonic[1]) {
          default: break;
          case 'o':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "pad", 3))
              break;
            if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)	 // "popad"
              Mnemonic = "popal";
            return;
          case 'u':	 // 1 string to match.
            if (memcmp(Mnemonic.data()+2, "sha", 3))
              break;
            if ((Features & Feature_In16BitMode) == Feature_In16BitMode)	 // "pusha"
              Mnemonic = "pushaw";
            else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
              Mnemonic = "pushal";
            return;
          }
          break;
        }
        break;
      case 6:	 // 9 strings to match.
        switch (Mnemonic[0]) {
        default: break;
        case 'c':	 // 8 strings to match.
          if (memcmp(Mnemonic.data()+1, "mov", 3))
            break;
          switch (Mnemonic[4]) {
          default: break;
          case 'n':	 // 6 strings to match.
            switch (Mnemonic[5]) {
            default: break;
            case 'a':	 // 1 string to match.
              Mnemonic = "cmovbe";	 // "cmovna"
              return;
            case 'b':	 // 1 string to match.
              Mnemonic = "cmovae";	 // "cmovnb"
              return;
            case 'c':	 // 1 string to match.
              Mnemonic = "cmovae";	 // "cmovnc"
              return;
            case 'g':	 // 1 string to match.
              Mnemonic = "cmovle";	 // "cmovng"
              return;
            case 'l':	 // 1 string to match.
              Mnemonic = "cmovge";	 // "cmovnl"
              return;
            case 'z':	 // 1 string to match.
              Mnemonic = "cmovne";	 // "cmovnz"
              return;
            }
            break;
          case 'p':	 // 2 strings to match.
            switch (Mnemonic[5]) {
            default: break;
            case 'e':	 // 1 string to match.
              Mnemonic = "cmovp";	 // "cmovpe"
              return;
            case 'o':	 // 1 string to match.
              Mnemonic = "cmovnp";	 // "cmovpo"
              return;
            }
            break;
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(Mnemonic.data()+1, "ushad", 5))
            break;
          if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)	 // "pushad"
            Mnemonic = "pushal";
          return;
        }
        break;
      case 7:	 // 4 strings to match.
        if (memcmp(Mnemonic.data()+0, "cmovn", 5))
          break;
        switch (Mnemonic[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (Mnemonic[6] != 'e')
            break;
          Mnemonic = "cmovb";	 // "cmovnae"
          return;
        case 'b':	 // 1 string to match.
          if (Mnemonic[6] != 'e')
            break;
          Mnemonic = "cmova";	 // "cmovnbe"
          return;
        case 'g':	 // 1 string to match.
          if (Mnemonic[6] != 'e')
            break;
          Mnemonic = "cmovl";	 // "cmovnge"
          return;
        case 'l':	 // 1 string to match.
          if (Mnemonic[6] != 'e')
            break;
          Mnemonic = "cmovg";	 // "cmovnle"
          return;
        }
        break;
      }
    break;
  }
  switch (Mnemonic.size()) {
  default: break;
  case 2:	 // 2 strings to match.
    if (Mnemonic[0] != 'j')
      break;
    switch (Mnemonic[1]) {
    default: break;
    case 'c':	 // 1 string to match.
      Mnemonic = "jb";	 // "jc"
      return;
    case 'z':	 // 1 string to match.
      Mnemonic = "je";	 // "jz"
      return;
    }
    break;
  case 3:	 // 8 strings to match.
    if (Mnemonic[0] != 'j')
      break;
    switch (Mnemonic[1]) {
    default: break;
    case 'n':	 // 6 strings to match.
      switch (Mnemonic[2]) {
      default: break;
      case 'a':	 // 1 string to match.
        Mnemonic = "jbe";	 // "jna"
        return;
      case 'b':	 // 1 string to match.
        Mnemonic = "jae";	 // "jnb"
        return;
      case 'c':	 // 1 string to match.
        Mnemonic = "jae";	 // "jnc"
        return;
      case 'g':	 // 1 string to match.
        Mnemonic = "jle";	 // "jng"
        return;
      case 'l':	 // 1 string to match.
        Mnemonic = "jge";	 // "jnl"
        return;
      case 'z':	 // 1 string to match.
        Mnemonic = "jne";	 // "jnz"
        return;
      }
      break;
    case 'p':	 // 2 strings to match.
      switch (Mnemonic[2]) {
      default: break;
      case 'e':	 // 1 string to match.
        Mnemonic = "jp";	 // "jpe"
        return;
      case 'o':	 // 1 string to match.
        Mnemonic = "jnp";	 // "jpo"
        return;
      }
      break;
    }
    break;
  case 4:	 // 8 strings to match.
    switch (Mnemonic[0]) {
    default: break;
    case 'j':	 // 4 strings to match.
      if (Mnemonic[1] != 'n')
        break;
      switch (Mnemonic[2]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (Mnemonic[3] != 'e')
          break;
        Mnemonic = "jb";	 // "jnae"
        return;
      case 'b':	 // 1 string to match.
        if (Mnemonic[3] != 'e')
          break;
        Mnemonic = "ja";	 // "jnbe"
        return;
      case 'g':	 // 1 string to match.
        if (Mnemonic[3] != 'e')
          break;
        Mnemonic = "jl";	 // "jnge"
        return;
      case 'l':	 // 1 string to match.
        if (Mnemonic[3] != 'e')
          break;
        Mnemonic = "jg";	 // "jnle"
        return;
      }
      break;
    case 'r':	 // 2 strings to match.
      if (memcmp(Mnemonic.data()+1, "ep", 2))
        break;
      switch (Mnemonic[3]) {
      default: break;
      case 'e':	 // 1 string to match.
        Mnemonic = "rep";	 // "repe"
        return;
      case 'z':	 // 1 string to match.
        Mnemonic = "rep";	 // "repz"
        return;
      }
      break;
    case 's':	 // 2 strings to match.
      if (memcmp(Mnemonic.data()+1, "et", 2))
        break;
      switch (Mnemonic[3]) {
      default: break;
      case 'c':	 // 1 string to match.
        Mnemonic = "setb";	 // "setc"
        return;
      case 'z':	 // 1 string to match.
        Mnemonic = "sete";	 // "setz"
        return;
      }
      break;
    }
    break;
  case 5:	 // 11 strings to match.
    switch (Mnemonic[0]) {
    default: break;
    case 'f':	 // 1 string to match.
      if (memcmp(Mnemonic.data()+1, "wait", 4))
        break;
      Mnemonic = "wait";	 // "fwait"
      return;
    case 'l':	 // 1 string to match.
      if (memcmp(Mnemonic.data()+1, "oopz", 4))
        break;
      Mnemonic = "loope";	 // "loopz"
      return;
    case 'r':	 // 1 string to match.
      if (memcmp(Mnemonic.data()+1, "epnz", 4))
        break;
      Mnemonic = "repne";	 // "repnz"
      return;
    case 's':	 // 8 strings to match.
      if (memcmp(Mnemonic.data()+1, "et", 2))
        break;
      switch (Mnemonic[3]) {
      default: break;
      case 'n':	 // 6 strings to match.
        switch (Mnemonic[4]) {
        default: break;
        case 'a':	 // 1 string to match.
          Mnemonic = "setbe";	 // "setna"
          return;
        case 'b':	 // 1 string to match.
          Mnemonic = "setae";	 // "setnb"
          return;
        case 'c':	 // 1 string to match.
          Mnemonic = "setae";	 // "setnc"
          return;
        case 'g':	 // 1 string to match.
          Mnemonic = "setle";	 // "setng"
          return;
        case 'l':	 // 1 string to match.
          Mnemonic = "setge";	 // "setnl"
          return;
        case 'z':	 // 1 string to match.
          Mnemonic = "setne";	 // "setnz"
          return;
        }
        break;
      case 'p':	 // 2 strings to match.
        switch (Mnemonic[4]) {
        default: break;
        case 'e':	 // 1 string to match.
          Mnemonic = "setp";	 // "setpe"
          return;
        case 'o':	 // 1 string to match.
          Mnemonic = "setnp";	 // "setpo"
          return;
        }
        break;
      }
      break;
    }
    break;
  case 6:	 // 6 strings to match.
    switch (Mnemonic[0]) {
    default: break;
    case 'f':	 // 1 string to match.
      if (memcmp(Mnemonic.data()+1, "comip", 5))
        break;
      Mnemonic = "fcompi";	 // "fcomip"
      return;
    case 'l':	 // 1 string to match.
      if (memcmp(Mnemonic.data()+1, "oopnz", 5))
        break;
      Mnemonic = "loopne";	 // "loopnz"
      return;
    case 's':	 // 4 strings to match.
      if (memcmp(Mnemonic.data()+1, "etn", 3))
        break;
      switch (Mnemonic[4]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (Mnemonic[5] != 'e')
          break;
        Mnemonic = "setb";	 // "setnae"
        return;
      case 'b':	 // 1 string to match.
        if (Mnemonic[5] != 'e')
          break;
        Mnemonic = "seta";	 // "setnbe"
        return;
      case 'g':	 // 1 string to match.
        if (Mnemonic[5] != 'e')
          break;
        Mnemonic = "setl";	 // "setnge"
        return;
      case 'l':	 // 1 string to match.
        if (Mnemonic[5] != 'e')
          break;
        Mnemonic = "setg";	 // "setnle"
        return;
      }
      break;
    }
    break;
  case 7:	 // 1 string to match.
    if (memcmp(Mnemonic.data()+0, "fucomip", 7))
      break;
    Mnemonic = "fucompi";	 // "fucomip"
    return;
  }
}

namespace {
enum OperatorConversionKind {
  CVT_Done,
  CVT_Reg,
  CVT_Tied,
  CVT_imm_95_10,
  CVT_95_addImmOperands,
  CVT_regAX,
  CVT_regEAX,
  CVT_regRAX,
  CVT_95_Reg,
  CVT_95_addMemOperands,
  CVT_95_addAbsMemOperands,
  CVT_95_addDstIdxOperands,
  CVT_95_addSrcIdxOperands,
  CVT_95_addGR32orGR64Operands,
  CVT_regST1,
  CVT_regST0,
  CVT_95_addMemOffsOperands,
  CVT_imm_95_17,
  CVT_imm_95_1,
  CVT_imm_95_16,
  CVT_imm_95_0,
  CVT_95_addAVX512RCOperands,
  CVT_NUM_CONVERTERS
};

enum InstructionConversionKind {
  Convert_NoOperands,
  Convert__imm_95_10,
  Convert__Imm1_0,
  Convert__Imm1_1,
  Convert__regAX__Tie0__ImmSExti16i81_1,
  Convert__regEAX__Tie0__ImmSExti32i81_1,
  Convert__regRAX__Tie0__ImmSExti64i81_1,
  Convert__ImmSExti64i321_1,
  Convert__Reg1_0__Tie0__Reg1_1,
  Convert__Reg1_0__Tie0__ImmSExti16i81_1,
  Convert__Reg1_0__Tie0__Imm1_1,
  Convert__Reg1_0__Tie0__Mem165_1,
  Convert__Reg1_0__Tie0__ImmSExti32i81_1,
  Convert__Reg1_0__Tie0__Mem325_1,
  Convert__Reg1_0__Tie0__ImmSExti64i81_1,
  Convert__Reg1_0__Tie0__ImmSExti64i321_1,
  Convert__Reg1_0__Tie0__Mem645_1,
  Convert__Reg1_0__Tie0__Mem85_1,
  Convert__Mem165_0__Reg1_1,
  Convert__Mem165_0__ImmSExti16i81_1,
  Convert__Mem165_0__Imm1_1,
  Convert__Mem325_0__Reg1_1,
  Convert__Mem325_0__ImmSExti32i81_1,
  Convert__Mem325_0__Imm1_1,
  Convert__Mem645_0__Reg1_1,
  Convert__Mem645_0__ImmSExti64i81_1,
  Convert__Mem645_0__ImmSExti64i321_1,
  Convert__Mem85_0__Reg1_1,
  Convert__Mem85_0__Imm1_1,
  Convert__Reg1_1__Tie0__Reg1_0,
  Convert__Mem85_1__Reg1_0,
  Convert__Reg1_1__Tie0__Imm1_0,
  Convert__Mem85_1__Imm1_0,
  Convert__Reg1_1__Tie0__Mem85_0,
  Convert__Mem325_1__Reg1_0,
  Convert__regEAX__Tie0__ImmSExti32i81_0,
  Convert__Reg1_1__Tie0__ImmSExti32i81_0,
  Convert__Mem325_1__ImmSExti32i81_0,
  Convert__Mem325_1__Imm1_0,
  Convert__Reg1_1__Tie0__Mem325_0,
  Convert__Mem645_1__Reg1_0,
  Convert__regRAX__Tie0__ImmSExti64i81_0,
  Convert__Reg1_1__Tie0__ImmSExti64i81_0,
  Convert__Mem645_1__ImmSExti64i81_0,
  Convert__ImmSExti64i321_0,
  Convert__Reg1_1__Tie0__ImmSExti64i321_0,
  Convert__Mem645_1__ImmSExti64i321_0,
  Convert__Reg1_1__Tie0__Mem645_0,
  Convert__Mem165_1__Reg1_0,
  Convert__regAX__Tie0__ImmSExti16i81_0,
  Convert__Reg1_1__Tie0__ImmSExti16i81_0,
  Convert__Mem165_1__ImmSExti16i81_0,
  Convert__Mem165_1__Imm1_0,
  Convert__Reg1_1__Tie0__Mem165_0,
  Convert__Reg1_0__Tie0__Mem1285_1,
  Convert__Reg1_1__Tie0__Mem1285_0,
  Convert__Reg1_0__Reg1_1,
  Convert__Reg1_0__Mem325_1,
  Convert__Reg1_0__Mem645_1,
  Convert__Reg1_1__Reg1_0,
  Convert__Reg1_1__Mem325_0,
  Convert__Reg1_1__Mem645_0,
  Convert__Reg1_0__Mem1285_1,
  Convert__Reg1_1__Mem1285_0,
  Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2,
  Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_1__Reg1_2,
  Convert__Reg1_0__Reg1_1__Mem325_2,
  Convert__Reg1_0__Reg1_1__Mem645_2,
  Convert__Reg1_2__Reg1_1__Reg1_0,
  Convert__Reg1_2__Reg1_1__Mem325_0,
  Convert__Reg1_2__Reg1_1__Mem645_0,
  Convert__Reg1_0__Reg1_1__Imm1_2,
  Convert__Reg1_0__Mem325_1__Reg1_2,
  Convert__Reg1_0__Mem325_1__Imm1_2,
  Convert__Reg1_0__Reg1_1__ImmSExti64i321_2,
  Convert__Reg1_0__Mem645_1__Reg1_2,
  Convert__Reg1_0__Mem645_1__ImmSExti64i321_2,
  Convert__Reg1_2__Reg1_1__ImmSExti64i321_0,
  Convert__Reg1_2__Mem645_1__ImmSExti64i321_0,
  Convert__Reg1_2__Reg1_1__Imm1_0,
  Convert__Reg1_2__Mem325_1__Imm1_0,
  Convert__Reg1_2__Mem325_1__Reg1_0,
  Convert__Reg1_2__Mem645_1__Reg1_0,
  Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2,
  Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Tie0__Reg1_1,
  Convert__Reg1_2__Tie0__Mem1285_1,
  Convert__Mem1285_1__Reg1_0,
  Convert__Mem1285_0__Reg1_1,
  Convert__Reg1_0__Mem165_1,
  Convert__Reg1_1__Mem165_0,
  Convert__Reg1_0__Tie0,
  Convert__Reg1_0__ImmSExti16i81_1,
  Convert__Reg1_0__ImmSExti32i81_1,
  Convert__Reg1_0__ImmSExti64i81_1,
  Convert__Reg1_1__ImmSExti32i81_0,
  Convert__Reg1_1__ImmSExti64i81_0,
  Convert__Reg1_1__ImmSExti16i81_0,
  Convert__Reg1_0,
  Convert__AbsMem1_0,
  Convert__Mem165_0,
  Convert__Mem325_0,
  Convert__Mem645_0,
  Convert__Mem165_1,
  Convert__Mem325_1,
  Convert__Mem645_1,
  Convert__Imm1_2__Imm1_0,
  Convert__Reg1_1,
  Convert__Mem85_0,
  Convert__Reg1_0__Tie0__Reg1_0,
  Convert__regAX__ImmSExti16i81_1,
  Convert__regEAX__ImmSExti32i81_1,
  Convert__regRAX__ImmSExti64i81_1,
  Convert__Reg1_0__Imm1_1,
  Convert__Reg1_0__ImmSExti64i321_1,
  Convert__Reg1_0__Mem85_1,
  Convert__Reg1_3__Tie0__Reg1_2__Imm1_0,
  Convert__Reg1_2__Tie0__Reg1_3__Imm1_0,
  Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0,
  Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0,
  Convert__Reg1_2__Tie0__Mem645_3__Imm1_0,
  Convert__Reg1_3__Tie0__Mem645_2__Imm1_0,
  Convert__Reg1_2__Tie0__Mem325_3__Imm1_0,
  Convert__Reg1_3__Tie0__Mem325_2__Imm1_0,
  Convert__Reg1_1__Imm1_0,
  Convert__Reg1_1__Mem85_0,
  Convert__regEAX__ImmSExti32i81_0,
  Convert__regRAX__ImmSExti64i81_0,
  Convert__Reg1_1__ImmSExti64i321_0,
  Convert__DstIdx161_0__SrcIdx162_1,
  Convert__DstIdx321_0__SrcIdx322_1,
  Convert__DstIdx641_0__SrcIdx642_1,
  Convert__DstIdx81_0__SrcIdx82_1,
  Convert__DstIdx161_1__SrcIdx162_0,
  Convert__DstIdx321_1__SrcIdx322_0,
  Convert__DstIdx641_1__SrcIdx642_0,
  Convert__DstIdx81_1__SrcIdx82_0,
  Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0,
  Convert__regAX__ImmSExti16i81_0,
  Convert__Mem1285_0,
  Convert__Mem85_1,
  Convert__Imm1_0__Imm1_1,
  Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0,
  Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2,
  Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2,
  Convert__Reg1_0__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0,
  Convert__regST1,
  Convert__regST0,
  Convert__Mem805_0,
  Convert__Mem5_0,
  Convert__Reg1_0__Reg1_0__ImmSExti16i81_1,
  Convert__Reg1_0__Reg1_0__Imm1_1,
  Convert__Reg1_0__Reg1_0__ImmSExti32i81_1,
  Convert__Reg1_0__Reg1_0__ImmSExti64i81_1,
  Convert__Reg1_0__Reg1_0__ImmSExti64i321_1,
  Convert__Reg1_0__Reg1_1__ImmSExti16i81_2,
  Convert__Reg1_0__Mem165_1__ImmSExti16i81_2,
  Convert__Reg1_0__Mem165_1__Imm1_2,
  Convert__Reg1_0__Reg1_1__ImmSExti32i81_2,
  Convert__Reg1_0__Mem325_1__ImmSExti32i81_2,
  Convert__Reg1_0__Reg1_1__ImmSExti64i81_2,
  Convert__Reg1_0__Mem645_1__ImmSExti64i81_2,
  Convert__Reg1_1__Reg1_1__ImmSExti32i81_0,
  Convert__Reg1_1__Reg1_1__Imm1_0,
  Convert__Reg1_2__Reg1_1__ImmSExti32i81_0,
  Convert__Reg1_2__Mem325_1__ImmSExti32i81_0,
  Convert__Reg1_1__Reg1_1__ImmSExti64i81_0,
  Convert__Reg1_1__Reg1_1__ImmSExti64i321_0,
  Convert__Reg1_2__Reg1_1__ImmSExti64i81_0,
  Convert__Reg1_2__Mem645_1__ImmSExti64i81_0,
  Convert__Reg1_1__Reg1_1__ImmSExti16i81_0,
  Convert__Reg1_2__Reg1_1__ImmSExti16i81_0,
  Convert__Reg1_2__Mem165_1__ImmSExti16i81_0,
  Convert__Reg1_2__Mem165_1__Imm1_0,
  Convert__ImmUnsignedi81_1,
  Convert__ImmUnsignedi81_0,
  Convert__DstIdx161_1,
  Convert__DstIdx321_1,
  Convert__DstIdx81_1,
  Convert__DstIdx161_0,
  Convert__DstIdx321_0,
  Convert__DstIdx81_0,
  Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0,
  Convert__Mem5_1,
  Convert__Imm1_1__Imm1_0,
  Convert__Reg1_0__Mem5_1,
  Convert__Reg1_1__Mem5_0,
  Convert__SrcIdx162_0,
  Convert__SrcIdx322_0,
  Convert__SrcIdx642_0,
  Convert__SrcIdx82_0,
  Convert__SrcIdx82_1,
  Convert__SrcIdx162_1,
  Convert__SrcIdx322_1,
  Convert__SrcIdx642_1,
  Convert__MemOffs16_82_1,
  Convert__MemOffs32_82_1,
  Convert__MemOffs64_82_1,
  Convert__MemOffs16_162_1,
  Convert__MemOffs32_162_1,
  Convert__MemOffs64_162_1,
  Convert__MemOffs16_322_1,
  Convert__MemOffs32_322_1,
  Convert__MemOffs64_322_1,
  Convert__MemOffs32_642_1,
  Convert__MemOffs64_642_1,
  Convert__MemOffs16_162_0,
  Convert__MemOffs16_322_0,
  Convert__MemOffs16_82_0,
  Convert__MemOffs32_162_0,
  Convert__MemOffs32_322_0,
  Convert__MemOffs32_642_0,
  Convert__MemOffs32_82_0,
  Convert__MemOffs64_162_0,
  Convert__MemOffs64_322_0,
  Convert__MemOffs64_642_0,
  Convert__MemOffs64_82_0,
  Convert__GR32orGR641_1__Reg1_0,
  Convert__GR32orGR641_0__Reg1_1,
  Convert__Reg1_1__Tie0__Reg1_0__imm_95_17,
  Convert__Reg1_0__Tie0__Reg1_1__imm_95_17,
  Convert__Reg1_0__Tie0__Mem1285_1__imm_95_17,
  Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17,
  Convert__Reg1_1__Tie0__Reg1_0__imm_95_1,
  Convert__Reg1_0__Tie0__Reg1_1__imm_95_1,
  Convert__Reg1_0__Tie0__Mem1285_1__imm_95_1,
  Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1,
  Convert__Reg1_1__Tie0__Reg1_0__imm_95_16,
  Convert__Reg1_0__Tie0__Reg1_1__imm_95_16,
  Convert__Reg1_0__Tie0__Mem1285_1__imm_95_16,
  Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16,
  Convert__Reg1_1__Tie0__Reg1_0__imm_95_0,
  Convert__Reg1_0__Tie0__Reg1_1__imm_95_0,
  Convert__Reg1_0__Tie0__Mem1285_1__imm_95_0,
  Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0,
  Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2,
  Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2,
  Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2,
  Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2,
  Convert__Reg1_0__Tie0__Mem85_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__ImmUnsignedi81_1,
  Convert__Reg1_1__Tie0__ImmUnsignedi81_0,
  Convert__ImmSExti64i81_0,
  Convert__ImmSExti16i81_0,
  Convert__ImmSExti32i81_0,
  Convert__Mem165_0__ImmUnsignedi81_1,
  Convert__Mem325_0__ImmUnsignedi81_1,
  Convert__Mem645_0__ImmUnsignedi81_1,
  Convert__Mem85_0__ImmUnsignedi81_1,
  Convert__Reg1_1__Tie0,
  Convert__Mem85_1__ImmUnsignedi81_0,
  Convert__Mem325_1__ImmUnsignedi81_0,
  Convert__Mem645_1__ImmUnsignedi81_0,
  Convert__Mem165_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2,
  Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0,
  Convert__DstIdx641_0,
  Convert__DstIdx641_1,
  Convert__Mem325_2__Reg1_1,
  Convert__Mem645_2__Reg1_1,
  Convert__Mem165_2__Reg1_1,
  Convert__Reg1_0__Reg1_1__Mem1285_2,
  Convert__Reg1_0__Reg1_1__Mem2565_2,
  Convert__Reg1_0__Reg1_1__Mem5125_2,
  Convert__Reg1_2__Reg1_1__Mem1285_0,
  Convert__Reg1_2__Reg1_1__Mem2565_0,
  Convert__Reg1_2__Reg1_1__Mem5125_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3,
  Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0,
  Convert__Reg1_3__Reg1_2__Mem645_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5,
  Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5,
  Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0,
  Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0,
  Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5,
  Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
  Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0,
  Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0,
  Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6,
  Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
  Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
  Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0,
  Convert__Reg1_3__Reg1_2__Mem325_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6,
  Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
  Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
  Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
  Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
  Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
  Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
  Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
  Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
  Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
  Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
  Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5,
  Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
  Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3,
  Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0,
  Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3,
  Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0,
  Convert__Reg1_1__Tie0__Reg1_3__Reg1_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4,
  Convert__Reg1_0__Tie0__Reg1_2__Mem325_4,
  Convert__Reg1_1__Tie0__Reg1_3__Mem325_0,
  Convert__Reg1_1__Reg1_3__Reg1_0,
  Convert__Reg1_0__Reg1_2__Reg1_5,
  Convert__Reg1_0__Reg1_2__Mem325_5,
  Convert__Reg1_1__Reg1_3__Mem325_0,
  Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4,
  Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0,
  Convert__Reg1_0__Reg1_2__Mem1285_5,
  Convert__Reg1_1__Reg1_3__Mem1285_0,
  Convert__Reg1_0__Mem2565_1,
  Convert__Reg1_1__Mem2565_0,
  Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4,
  Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0,
  Convert__Reg1_0__Reg1_2__Mem2565_5,
  Convert__Reg1_1__Reg1_3__Mem2565_0,
  Convert__Reg1_0__Tie0__Reg1_2__Mem645_4,
  Convert__Reg1_1__Tie0__Reg1_3__Mem645_0,
  Convert__Reg1_0__Reg1_2__Mem645_5,
  Convert__Reg1_1__Reg1_3__Mem645_0,
  Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0,
  Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0,
  Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0,
  Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0,
  Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0,
  Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0,
  Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0,
  Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0,
  Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0,
  Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0,
  Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0,
  Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0,
  Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0,
  Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0,
  Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0,
  Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0,
  Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0,
  Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0,
  Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0,
  Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0,
  Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0,
  Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0,
  Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0,
  Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0,
  Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0,
  Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0,
  Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0,
  Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
  Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
  Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
  Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
  Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Reg1_1,
  Convert__Mem2565_1__Reg1_0,
  Convert__Mem5125_1__Reg1_0,
  Convert__Mem2565_0__Reg1_1,
  Convert__Mem5125_0__Reg1_1,
  Convert__Mem1285_1__Reg1_3__Reg1_0,
  Convert__Mem2565_1__Reg1_3__Reg1_0,
  Convert__Mem5125_1__Reg1_3__Reg1_0,
  Convert__Mem1285_0__Reg1_2__Reg1_4,
  Convert__Mem2565_0__Reg1_2__Reg1_4,
  Convert__Mem5125_0__Reg1_2__Reg1_4,
  Convert__Reg1_2__Mem1285_0,
  Convert__Reg1_2__Mem2565_0,
  Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0,
  Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0,
  Convert__Reg1_2__Reg1_4__Mem1285_0,
  Convert__Reg1_2__Reg1_4__Mem2565_0,
  Convert__Reg1_0__Mem5125_1,
  Convert__Reg1_1__Mem5125_0,
  Convert__Reg1_0__Reg1_1__AVX512RC1_2,
  Convert__Reg1_2__Reg1_1__AVX512RC1_0,
  Convert__Reg1_2__Mem5125_0,
  Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4,
  Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0,
  Convert__Reg1_0__Reg1_2__Mem5125_5,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5,
  Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0,
  Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0,
  Convert__Reg1_1__Reg1_3__Mem5125_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6,
  Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0,
  Convert__Reg1_2__Reg1_4__Mem5125_0,
  Convert__Reg1_2__Tie0__Reg1_4__Reg1_1,
  Convert__Reg1_2__Reg1_4__Reg1_1,
  Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2,
  Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2,
  Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
  Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
  Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
  Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
  Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0,
  Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2,
  Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1,
  Convert__Reg1_3__Reg1_2__Reg1_1,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1,
  Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1,
  Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
  Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
  Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0,
  Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
  Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
  Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
  Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
  Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Tie0__Reg1_2__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
  Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Tie0__Reg1_2__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
  Convert__Reg1_2__Tie0__Reg1_1__Reg1_0,
  Convert__Reg1_0__Tie0__Reg1_1__Reg1_2,
  Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2,
  Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2,
  Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2,
  Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0,
  Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0,
  Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0,
  Convert__Reg1_0__Tie0__Reg1_1__Mem645_2,
  Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3,
  Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0,
  Convert__Reg1_3__Tie0__Reg1_2__Mem645_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
  Convert__Reg1_0__Tie0__Reg1_1__Mem325_2,
  Convert__Reg1_3__Tie0__Reg1_2__Mem325_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6,
  Convert__Reg1_2__Tie0__Reg1_1__Mem645_0,
  Convert__Reg1_2__Tie0__Reg1_1__Mem325_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3,
  Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3,
  Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0,
  Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3,
  Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3,
  Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0,
  Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3,
  Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3,
  Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0,
  Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0,
  Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2,
  Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2,
  Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3,
  Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
  Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
  Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
  Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
  Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
  Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3,
  Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
  Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Reg1_0__Tie0__MemVX645_1__Tie1,
  Convert__Reg1_0__Reg1_2__Tie0__MemVX645_1__Tie1,
  Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX32X5_4,
  Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY32X5_4,
  Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX32X5_0,
  Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY32X5_0,
  Convert__Reg1_2__Reg1_0__Tie0__MemVX325_1__Tie1,
  Convert__Reg1_0__Reg1_2__Tie0__MemVX325_1__Tie1,
  Convert__Reg1_2__Reg1_0__Tie0__MemVY325_1__Tie1,
  Convert__Reg1_0__Reg1_2__Tie0__MemVY325_1__Tie1,
  Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ325_4,
  Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ325_0,
  Convert__Reg1_1__MemVY325_3,
  Convert__Reg1_2__MemVY325_0,
  Convert__Reg1_1__MemVZ325_3,
  Convert__Reg1_2__MemVZ325_0,
  Convert__Reg1_1__MemVZ645_3,
  Convert__Reg1_2__MemVZ645_0,
  Convert__Reg1_2__Reg1_0__Tie0__MemVY645_1__Tie1,
  Convert__Reg1_0__Reg1_2__Tie0__MemVY645_1__Tie1,
  Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX64X5_4,
  Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY64X5_4,
  Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ645_4,
  Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX64X5_0,
  Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY64X5_0,
  Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ645_0,
  Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3,
  Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
  Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
  Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
  Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
  Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
  Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6,
  Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7,
  Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7,
  Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
  Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
  Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
  Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
  Convert__Mem1285_2__Reg1_1__Reg1_0,
  Convert__Mem2565_2__Reg1_1__Reg1_0,
  Convert__Mem1285_0__Reg1_1__Reg1_2,
  Convert__Mem2565_0__Reg1_1__Reg1_2,
  Convert__Reg1_0__Reg1_2__Reg1_4,
  Convert__Mem645_1__Reg1_3__Reg1_0,
  Convert__Mem645_0__Reg1_2__Reg1_4,
  Convert__Reg1_0__Tie0__Reg1_2__Mem645_5,
  Convert__Mem325_1__Reg1_3__Reg1_0,
  Convert__Mem325_0__Reg1_2__Reg1_4,
  Convert__Reg1_0__Tie0__Reg1_2__Mem325_5,
  Convert__Reg1_2__Mem325_0,
  Convert__Reg1_2__Tie0__Reg1_4__Mem325_0,
  Convert__Reg1_2__Reg1_4__Mem325_0,
  Convert__Reg1_2__Mem645_0,
  Convert__Reg1_2__Tie0__Reg1_4__Mem645_0,
  Convert__Reg1_2__Reg1_4__Mem645_0,
  Convert__Reg1_0__Tie0__Reg1_2__Mem85_4,
  Convert__Reg1_1__Tie0__Reg1_3__Mem85_0,
  Convert__Reg1_0__Reg1_2__Mem85_5,
  Convert__Reg1_1__Reg1_3__Mem85_0,
  Convert__Reg1_0__Tie0__Reg1_2__Mem165_4,
  Convert__Reg1_1__Tie0__Reg1_3__Mem165_0,
  Convert__Reg1_0__Reg1_2__Mem165_5,
  Convert__Reg1_1__Reg1_3__Mem165_0,
  Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17,
  Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17,
  Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17,
  Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17,
  Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1,
  Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1,
  Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1,
  Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1,
  Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16,
  Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16,
  Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16,
  Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16,
  Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0,
  Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0,
  Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0,
  Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4,
  Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4,
  Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4,
  Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4,
  Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4,
  Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
  Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
  Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3,
  Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0,
  Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0,
  Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3,
  Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0,
  Convert__Mem165_1__Reg1_3__Reg1_0,
  Convert__Mem165_0__Reg1_2__Reg1_4,
  Convert__Reg1_0__Reg1_1__Mem85_2,
  Convert__Reg1_3__Reg1_2__Mem85_0,
  Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5,
  Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem85_0,
  Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6,
  Convert__Reg1_3__Reg1_5__Reg1_2__Mem85_0,
  Convert__Reg1_2__Mem1285_1__Reg1_0,
  Convert__Reg1_0__Mem1285_1__Reg1_2,
  Convert__Reg1_3__MemVX32X5_1__Tie0__Reg1_0,
  Convert__Reg1_3__MemVY32X5_1__Tie0__Reg1_0,
  Convert__Reg1_3__MemVZ325_1__Tie0__Reg1_0,
  Convert__Reg1_2__MemVX32X5_0__Tie0__Reg1_4,
  Convert__Reg1_2__MemVY32X5_0__Tie0__Reg1_4,
  Convert__Reg1_2__MemVZ325_0__Tie0__Reg1_4,
  Convert__Reg1_3__MemVX64X5_1__Tie0__Reg1_0,
  Convert__Reg1_3__MemVY64X5_1__Tie0__Reg1_0,
  Convert__Reg1_3__MemVZ645_1__Tie0__Reg1_0,
  Convert__Reg1_2__MemVX64X5_0__Tie0__Reg1_4,
  Convert__Reg1_2__MemVY64X5_0__Tie0__Reg1_4,
  Convert__Reg1_2__MemVZ645_0__Tie0__Reg1_4,
  Convert__AbsMem161_0,
  CVT_NUM_SIGNATURES
};

} // end anonymous namespace

static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = {
  // Convert_NoOperands
  { CVT_Done },
  // Convert__imm_95_10
  { CVT_imm_95_10, 0, CVT_Done },
  // Convert__Imm1_0
  { CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Imm1_1
  { CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__regAX__Tie0__ImmSExti16i81_1
  { CVT_regAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__regEAX__Tie0__ImmSExti32i81_1
  { CVT_regEAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__regRAX__Tie0__ImmSExti64i81_1
  { CVT_regRAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__ImmSExti64i321_1
  { CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__ImmSExti16i81_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__Imm1_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem165_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__ImmSExti32i81_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem325_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__ImmSExti64i81_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__ImmSExti64i321_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem645_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem85_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Mem165_0__Reg1_1
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem165_0__ImmSExti16i81_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem165_0__Imm1_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem325_0__Reg1_1
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem325_0__ImmSExti32i81_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem325_0__Imm1_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem645_0__Reg1_1
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem645_0__ImmSExti64i81_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem645_0__ImmSExti64i321_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem85_0__Reg1_1
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem85_0__Imm1_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem85_1__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__Imm1_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem85_1__Imm1_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem85_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Mem325_1__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__regEAX__Tie0__ImmSExti32i81_0
  { CVT_regEAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__ImmSExti32i81_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem325_1__ImmSExti32i81_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem325_1__Imm1_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem325_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Mem645_1__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__regRAX__Tie0__ImmSExti64i81_0
  { CVT_regRAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__ImmSExti64i81_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem645_1__ImmSExti64i81_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__ImmSExti64i321_0
  { CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__ImmSExti64i321_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem645_1__ImmSExti64i321_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem645_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Mem165_1__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__regAX__Tie0__ImmSExti16i81_0
  { CVT_regAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__ImmSExti16i81_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem165_1__ImmSExti16i81_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem165_1__Imm1_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem165_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem1285_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem1285_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_0__Mem325_1
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_0__Mem645_1
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_1__Reg1_0
  { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_1__Mem325_0
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__Mem645_0
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Mem1285_1
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_1__Mem1285_0
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem325_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem645_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Reg1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem325_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem645_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Imm1_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem325_1__Reg1_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
  // Convert__Reg1_0__Mem325_1__Imm1_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Reg1_1__ImmSExti64i321_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem645_1__Reg1_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
  // Convert__Reg1_0__Mem645_1__ImmSExti64i321_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Reg1_1__ImmSExti64i321_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem645_1__ImmSExti64i321_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem325_1__Imm1_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem325_1__Reg1_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_2__Mem645_1__Reg1_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_1
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem1285_1
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Mem1285_1__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem1285_0__Reg1_1
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_0__Mem165_1
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_1__Mem165_0
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_Done },
  // Convert__Reg1_0__ImmSExti16i81_1
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__ImmSExti32i81_1
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__ImmSExti64i81_1
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_1__ImmSExti32i81_0
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__ImmSExti64i81_0
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__ImmSExti16i81_0
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0
  { CVT_95_Reg, 1, CVT_Done },
  // Convert__AbsMem1_0
  { CVT_95_addAbsMemOperands, 1, CVT_Done },
  // Convert__Mem165_0
  { CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Mem325_0
  { CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Mem645_0
  { CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Mem165_1
  { CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Mem325_1
  { CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Mem645_1
  { CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Imm1_2__Imm1_0
  { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1
  { CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem85_0
  { CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_0
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
  // Convert__regAX__ImmSExti16i81_1
  { CVT_regAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__regEAX__ImmSExti32i81_1
  { CVT_regEAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__regRAX__ImmSExti64i81_1
  { CVT_regRAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Imm1_1
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__ImmSExti64i321_1
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Mem85_1
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Imm1_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_3__Imm1_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem645_3__Imm1_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Mem645_2__Imm1_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem325_3__Imm1_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Mem325_2__Imm1_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Imm1_0
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Mem85_0
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__regEAX__ImmSExti32i81_0
  { CVT_regEAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__regRAX__ImmSExti64i81_0
  { CVT_regRAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__ImmSExti64i321_0
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__DstIdx161_0__SrcIdx162_1
  { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
  // Convert__DstIdx321_0__SrcIdx322_1
  { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
  // Convert__DstIdx641_0__SrcIdx642_1
  { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
  // Convert__DstIdx81_0__SrcIdx82_1
  { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
  // Convert__DstIdx161_1__SrcIdx162_0
  { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
  // Convert__DstIdx321_1__SrcIdx322_0
  { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
  // Convert__DstIdx641_1__SrcIdx642_0
  { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
  // Convert__DstIdx81_1__SrcIdx82_0
  { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__regAX__ImmSExti16i81_0
  { CVT_regAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem1285_0
  { CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Mem85_1
  { CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Imm1_0__Imm1_1
  { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addGR32orGR64Operands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__regST1
  { CVT_regST1, 0, CVT_Done },
  // Convert__regST0
  { CVT_regST0, 0, CVT_Done },
  // Convert__Mem805_0
  { CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Mem5_0
  { CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_0__ImmSExti16i81_1
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Reg1_0__Imm1_1
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Reg1_0__ImmSExti32i81_1
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Reg1_0__ImmSExti64i81_1
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Reg1_0__ImmSExti64i321_1
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_0__Reg1_1__ImmSExti16i81_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem165_1__ImmSExti16i81_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem165_1__Imm1_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Reg1_1__ImmSExti32i81_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem325_1__ImmSExti32i81_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Reg1_1__ImmSExti64i81_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem645_1__ImmSExti64i81_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_1__Reg1_1__ImmSExti32i81_0
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_1__Imm1_0
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__ImmSExti32i81_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem325_1__ImmSExti32i81_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_1__ImmSExti64i81_0
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_1__ImmSExti64i321_0
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__ImmSExti64i81_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem645_1__ImmSExti64i81_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_1__ImmSExti16i81_0
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__ImmSExti16i81_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem165_1__ImmSExti16i81_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem165_1__Imm1_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__ImmUnsignedi81_1
  { CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__ImmUnsignedi81_0
  { CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__DstIdx161_1
  { CVT_95_addDstIdxOperands, 2, CVT_Done },
  // Convert__DstIdx321_1
  { CVT_95_addDstIdxOperands, 2, CVT_Done },
  // Convert__DstIdx81_1
  { CVT_95_addDstIdxOperands, 2, CVT_Done },
  // Convert__DstIdx161_0
  { CVT_95_addDstIdxOperands, 1, CVT_Done },
  // Convert__DstIdx321_0
  { CVT_95_addDstIdxOperands, 1, CVT_Done },
  // Convert__DstIdx81_0
  { CVT_95_addDstIdxOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem5_1
  { CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Imm1_1__Imm1_0
  { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Mem5_1
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_1__Mem5_0
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__SrcIdx162_0
  { CVT_95_addSrcIdxOperands, 1, CVT_Done },
  // Convert__SrcIdx322_0
  { CVT_95_addSrcIdxOperands, 1, CVT_Done },
  // Convert__SrcIdx642_0
  { CVT_95_addSrcIdxOperands, 1, CVT_Done },
  // Convert__SrcIdx82_0
  { CVT_95_addSrcIdxOperands, 1, CVT_Done },
  // Convert__SrcIdx82_1
  { CVT_95_addSrcIdxOperands, 2, CVT_Done },
  // Convert__SrcIdx162_1
  { CVT_95_addSrcIdxOperands, 2, CVT_Done },
  // Convert__SrcIdx322_1
  { CVT_95_addSrcIdxOperands, 2, CVT_Done },
  // Convert__SrcIdx642_1
  { CVT_95_addSrcIdxOperands, 2, CVT_Done },
  // Convert__MemOffs16_82_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs32_82_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs64_82_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs16_162_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs32_162_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs64_162_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs16_322_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs32_322_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs64_322_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs32_642_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs64_642_1
  { CVT_95_addMemOffsOperands, 2, CVT_Done },
  // Convert__MemOffs16_162_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs16_322_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs16_82_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs32_162_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs32_322_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs32_642_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs32_82_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs64_162_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs64_322_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs64_642_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__MemOffs64_82_0
  { CVT_95_addMemOffsOperands, 1, CVT_Done },
  // Convert__GR32orGR641_1__Reg1_0
  { CVT_95_addGR32orGR64Operands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__GR32orGR641_0__Reg1_1
  { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_0__imm_95_17
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__imm_95_17
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_17, 0, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_17
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_17, 0, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_0__imm_95_1
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__imm_95_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_0__imm_95_16
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__imm_95_16
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_16
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_16, 0, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_0__imm_95_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__imm_95_0
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_0
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
  // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
  // Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem85_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__ImmUnsignedi81_1
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_1__Tie0__ImmUnsignedi81_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__ImmSExti64i81_0
  { CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__ImmSExti16i81_0
  { CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__ImmSExti32i81_0
  { CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem165_0__ImmUnsignedi81_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem325_0__ImmUnsignedi81_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem645_0__ImmUnsignedi81_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Mem85_0__ImmUnsignedi81_1
  { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
  // Convert__Reg1_1__Tie0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_Done },
  // Convert__Mem85_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem325_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem645_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem165_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__DstIdx641_0
  { CVT_95_addDstIdxOperands, 1, CVT_Done },
  // Convert__DstIdx641_1
  { CVT_95_addDstIdxOperands, 2, CVT_Done },
  // Convert__Mem325_2__Reg1_1
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem645_2__Reg1_1
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem165_2__Reg1_1
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem1285_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem2565_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem5125_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem1285_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem2565_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem5125_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem645_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem325_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_3__Reg1_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem325_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_3__Mem325_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Reg1_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem325_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Mem325_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem1285_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Mem1285_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Mem2565_1
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_1__Mem2565_0
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem2565_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Mem2565_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem645_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_3__Mem645_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem645_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Mem645_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0
  { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0
  { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0
  { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0
  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0
  { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0
  { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0
  { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem2565_1__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem5125_1__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem2565_0__Reg1_1
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem5125_0__Reg1_1
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem1285_1__Reg1_3__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem2565_1__Reg1_3__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem5125_1__Reg1_3__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem1285_0__Reg1_2__Reg1_4
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
  // Convert__Mem2565_0__Reg1_2__Reg1_4
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
  // Convert__Mem5125_0__Reg1_2__Reg1_4
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_2__Mem1285_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem2565_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Mem1285_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Mem2565_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Mem5125_1
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
  // Convert__Reg1_1__Mem5125_0
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__AVX512RC1_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 3, CVT_Done },
  // Convert__Reg1_2__Reg1_1__AVX512RC1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem5125_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem5125_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addAVX512RCOperands, 6, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Mem5125_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Mem5125_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_1
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
  // Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addAVX512RCOperands, 3, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addAVX512RCOperands, 2, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_1
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_1__Reg1_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Mem645_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_2__Mem325_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_1__Mem645_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_1__Mem325_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
  // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_0__Tie0__MemVX645_1__Tie1
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__MemVX645_1__Tie1
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX32X5_4
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY32X5_4
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX32X5_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY32X5_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_0__Tie0__MemVX325_1__Tie1
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__MemVX325_1__Tie1
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_0__Tie0__MemVY325_1__Tie1
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__MemVY325_1__Tie1
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ325_4
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ325_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__MemVY325_3
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
  // Convert__Reg1_2__MemVY325_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__MemVZ325_3
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
  // Convert__Reg1_2__MemVZ325_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__MemVZ645_3
  { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
  // Convert__Reg1_2__MemVZ645_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_0__Tie0__MemVY645_1__Tie1
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__MemVY645_1__Tie1
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX64X5_4
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY64X5_4
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ645_4
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX64X5_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY64X5_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ645_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem1285_2__Reg1_1__Reg1_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem2565_2__Reg1_1__Reg1_0
  { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem1285_0__Reg1_1__Reg1_2
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
  // Convert__Mem2565_0__Reg1_1__Reg1_2
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_4
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
  // Convert__Mem645_1__Reg1_3__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem645_0__Reg1_2__Reg1_4
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem645_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Mem325_1__Reg1_3__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem325_0__Reg1_2__Reg1_4
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem325_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_2__Mem325_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Mem325_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Mem325_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem645_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Tie0__Reg1_4__Mem645_0
  { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_4__Mem645_0
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem85_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_3__Mem85_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem85_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Mem85_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Mem165_4
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
  // Convert__Reg1_1__Tie0__Reg1_3__Mem165_0
  { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Mem165_5
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_1__Reg1_3__Mem165_0
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_17, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
  // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
  { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addGR32orGR64Operands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
  // Convert__Mem165_1__Reg1_3__Reg1_0
  { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
  // Convert__Mem165_0__Reg1_2__Reg1_4
  { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_0__Reg1_1__Mem85_2
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
  // Convert__Reg1_3__Reg1_2__Mem85_0
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5
  { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
  // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem85_0
  { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
  // Convert__Reg1_3__Reg1_5__Reg1_2__Mem85_0
  { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
  // Convert__Reg1_2__Mem1285_1__Reg1_0
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_0__Mem1285_1__Reg1_2
  { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
  // Convert__Reg1_3__MemVX32X5_1__Tie0__Reg1_0
  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_3__MemVY32X5_1__Tie0__Reg1_0
  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_3__MemVZ325_1__Tie0__Reg1_0
  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_2__MemVX32X5_0__Tie0__Reg1_4
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_2__MemVY32X5_0__Tie0__Reg1_4
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_2__MemVZ325_0__Tie0__Reg1_4
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_3__MemVX64X5_1__Tie0__Reg1_0
  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_3__MemVY64X5_1__Tie0__Reg1_0
  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_3__MemVZ645_1__Tie0__Reg1_0
  { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
  // Convert__Reg1_2__MemVX64X5_0__Tie0__Reg1_4
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_2__MemVY64X5_0__Tie0__Reg1_4
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
  // Convert__Reg1_2__MemVZ645_0__Tie0__Reg1_4
  { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
  // Convert__AbsMem161_0
  { CVT_95_addAbsMemOperands, 1, CVT_Done },
};

void X86AsmParser::
convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
                const OperandVector &Operands) {
  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
  const uint8_t *Converter = ConversionTable[Kind];
  Inst.setOpcode(Opcode);
  for (const uint8_t *p = Converter; *p; p+= 2) {
    switch (*p) {
    default: llvm_unreachable("invalid conversion entry!");
    case CVT_Reg:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1);
      break;
    case CVT_Tied:
      Inst.addOperand(Inst.getOperand(*(p + 1)));
      break;
    case CVT_imm_95_10:
      Inst.addOperand(MCOperand::createImm(10));
      break;
    case CVT_95_addImmOperands:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addImmOperands(Inst, 1);
      break;
    case CVT_regAX:
      Inst.addOperand(MCOperand::createReg(X86::AX));
      break;
    case CVT_regEAX:
      Inst.addOperand(MCOperand::createReg(X86::EAX));
      break;
    case CVT_regRAX:
      Inst.addOperand(MCOperand::createReg(X86::RAX));
      break;
    case CVT_95_Reg:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1);
      break;
    case CVT_95_addMemOperands:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addMemOperands(Inst, 5);
      break;
    case CVT_95_addAbsMemOperands:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addAbsMemOperands(Inst, 1);
      break;
    case CVT_95_addDstIdxOperands:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addDstIdxOperands(Inst, 1);
      break;
    case CVT_95_addSrcIdxOperands:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addSrcIdxOperands(Inst, 2);
      break;
    case CVT_95_addGR32orGR64Operands:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addGR32orGR64Operands(Inst, 1);
      break;
    case CVT_regST1:
      Inst.addOperand(MCOperand::createReg(X86::ST1));
      break;
    case CVT_regST0:
      Inst.addOperand(MCOperand::createReg(X86::ST0));
      break;
    case CVT_95_addMemOffsOperands:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addMemOffsOperands(Inst, 2);
      break;
    case CVT_imm_95_17:
      Inst.addOperand(MCOperand::createImm(17));
      break;
    case CVT_imm_95_1:
      Inst.addOperand(MCOperand::createImm(1));
      break;
    case CVT_imm_95_16:
      Inst.addOperand(MCOperand::createImm(16));
      break;
    case CVT_imm_95_0:
      Inst.addOperand(MCOperand::createImm(0));
      break;
    case CVT_95_addAVX512RCOperands:
      static_cast<X86Operand&>(*Operands[*(p + 1)]).addAVX512RCOperands(Inst, 1);
      break;
    }
  }
}

void X86AsmParser::
convertToMapAndConstraints(unsigned Kind,
                           const OperandVector &Operands) {
  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
  unsigned NumMCOperands = 0;
  const uint8_t *Converter = ConversionTable[Kind];
  for (const uint8_t *p = Converter; *p; p+= 2) {
    switch (*p) {
    default: llvm_unreachable("invalid conversion entry!");
    case CVT_Reg:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("r");
      ++NumMCOperands;
      break;
    case CVT_Tied:
      ++NumMCOperands;
      break;
    case CVT_imm_95_10:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("");
      ++NumMCOperands;
      break;
    case CVT_95_addImmOperands:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      NumMCOperands += 1;
      break;
    case CVT_regAX:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      ++NumMCOperands;
      break;
    case CVT_regEAX:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      ++NumMCOperands;
      break;
    case CVT_regRAX:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      ++NumMCOperands;
      break;
    case CVT_95_Reg:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("r");
      NumMCOperands += 1;
      break;
    case CVT_95_addMemOperands:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      NumMCOperands += 5;
      break;
    case CVT_95_addAbsMemOperands:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      NumMCOperands += 1;
      break;
    case CVT_95_addDstIdxOperands:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      NumMCOperands += 1;
      break;
    case CVT_95_addSrcIdxOperands:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      NumMCOperands += 2;
      break;
    case CVT_95_addGR32orGR64Operands:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      NumMCOperands += 1;
      break;
    case CVT_regST1:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      ++NumMCOperands;
      break;
    case CVT_regST0:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      ++NumMCOperands;
      break;
    case CVT_95_addMemOffsOperands:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      NumMCOperands += 2;
      break;
    case CVT_imm_95_17:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("");
      ++NumMCOperands;
      break;
    case CVT_imm_95_1:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("");
      ++NumMCOperands;
      break;
    case CVT_imm_95_16:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("");
      ++NumMCOperands;
      break;
    case CVT_imm_95_0:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("");
      ++NumMCOperands;
      break;
    case CVT_95_addAVX512RCOperands:
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
      Operands[*(p + 1)]->setConstraint("m");
      NumMCOperands += 1;
      break;
    }
  }
}

namespace {

/// MatchClassKind - The kinds of classes which participate in
/// instruction matching.
enum MatchClassKind {
  InvalidMatchClass = 0,
  MCK__36_1, // '$1'
  MCK__STAR_, // '*'
  MCK_1, // '1'
  MCK__COLON_, // ':'
  MCK_b, // 'b'
  MCK_d, // 'd'
  MCK_pd, // 'pd'
  MCK_ps, // 'ps'
  MCK_q, // 'q'
  MCK_sd, // 'sd'
  MCK_ss, // 'ss'
  MCK_ub, // 'ub'
  MCK_ud, // 'ud'
  MCK_uq, // 'uq'
  MCK_uw, // 'uw'
  MCK_w, // 'w'
  MCK__123_, // '{'
  MCK__123_1to16_125_, // '{1to16}'
  MCK__123_1to2_125_, // '{1to2}'
  MCK__123_1to32_125_, // '{1to32}'
  MCK__123_1to4_125_, // '{1to4}'
  MCK__123_1to64_125_, // '{1to64}'
  MCK__123_1to8_125_, // '{1to8}'
  MCK__123_sae_125_, // '{sae}'
  MCK__123_z_125_, // '{z}'
  MCK__125_, // '}'
  MCK_AL, // register class 'AL'
  MCK_AX, // register class 'AX'
  MCK_CCR, // register class 'CCR'
  MCK_CL, // register class 'CL'
  MCK_CS, // register class 'CS'
  MCK_DS, // register class 'DS'
  MCK_DX, // register class 'DX'
  MCK_EAX, // register class 'EAX'
  MCK_EBX, // register class 'EBX'
  MCK_ECX, // register class 'ECX'
  MCK_EDX, // register class 'EDX'
  MCK_ES, // register class 'ES'
  MCK_FPCCR, // register class 'FPCCR'
  MCK_FS, // register class 'FS'
  MCK_GS, // register class 'GS'
  MCK_RAX, // register class 'RAX'
  MCK_RBX, // register class 'RBX'
  MCK_RCX, // register class 'RCX'
  MCK_RDX, // register class 'RDX'
  MCK_SS, // register class 'SS'
  MCK_ST0, // register class 'ST0'
  MCK_XMM0, // register class 'XMM0'
  MCK_Reg48, // derived register class
  MCK_Reg29, // derived register class
  MCK_Reg20, // derived register class
  MCK_GR32_AD, // register class 'GR32_AD'
  MCK_Reg49, // derived register class
  MCK_Reg30, // derived register class
  MCK_Reg21, // derived register class
  MCK_GR32_TC, // register class 'GR32_TC'
  MCK_Reg54, // derived register class
  MCK_Reg46, // derived register class
  MCK_BNDR, // register class 'BNDR'
  MCK_GR16_ABCD, // register class 'GR16_ABCD'
  MCK_GR32_ABCD, // register class 'GR32_ABCD'
  MCK_GR64_ABCD, // register class 'GR64_ABCD'
  MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H'
  MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L'
  MCK_Reg57, // derived register class
  MCK_Reg38, // derived register class
  MCK_Reg56, // derived register class
  MCK_Reg50, // derived register class
  MCK_Reg44, // derived register class
  MCK_Reg41, // derived register class
  MCK_Reg22, // derived register class
  MCK_SEGMENT_REG, // register class 'SEGMENT_REG'
  MCK_Reg55, // derived register class
  MCK_Reg51, // derived register class
  MCK_Reg45, // derived register class
  MCK_Reg42, // derived register class
  MCK_Reg23, // derived register class
  MCK_GR32_NOREX_NOSP, // register class 'GR32_NOREX_NOSP'
  MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP'
  MCK_RFP32, // register class 'RFP32,RFP64,RFP80'
  MCK_VK1WM, // register class 'VK1WM,VK2WM,VK4WM,VK8WM,VK16WM,VK32WM,VK64WM'
  MCK_Reg39, // derived register class
  MCK_Reg33, // derived register class
  MCK_DEBUG_REG, // register class 'DEBUG_REG'
  MCK_GR16_NOREX, // register class 'GR16_NOREX'
  MCK_GR32_NOREX, // register class 'GR32_NOREX'
  MCK_GR64_TCW64, // register class 'GR64_TCW64'
  MCK_GR8_NOREX, // register class 'GR8_NOREX'
  MCK_RST, // register class 'RST'
  MCK_VK1, // register class 'VK1,VK2,VK4,VK8,VK16,VK32,VK64'
  MCK_VR64, // register class 'VR64'
  MCK_GR64_NOREX, // register class 'GR64_NOREX'
  MCK_GR64_TC, // register class 'GR64_TC'
  MCK_Reg53, // derived register class
  MCK_Reg25, // derived register class
  MCK_Reg52, // derived register class
  MCK_GR32_NOAX, // register class 'GR32_NOAX'
  MCK_GR32_NOSP, // register class 'GR32_NOSP'
  MCK_GR64_NOSP, // register class 'GR64_NOSP'
  MCK_Reg67, // derived register class
  MCK_Reg34, // derived register class
  MCK_CONTROL_REG, // register class 'CONTROL_REG'
  MCK_FR32, // register class 'FR32,FR64,FR128,VR128'
  MCK_GR16, // register class 'GR16'
  MCK_GR32, // register class 'GR32'
  MCK_VR256, // register class 'VR256'
  MCK_GR64, // register class 'GR64'
  MCK_GR8, // register class 'GR8'
  MCK_FR32X, // register class 'FR32X,FR64X,VR128X'
  MCK_VR256X, // register class 'VR256X'
  MCK_VR512, // register class 'VR512'
  MCK_AVX512RC, // user defined class 'AVX512RCOperand'
  MCK_ImmSExti64i8, // user defined class 'ImmSExti64i8AsmOperand'
  MCK_ImmSExti16i8, // user defined class 'ImmSExti16i8AsmOperand'
  MCK_ImmSExti32i8, // user defined class 'ImmSExti32i8AsmOperand'
  MCK_ImmSExti64i32, // user defined class 'ImmSExti64i32AsmOperand'
  MCK_Imm, // user defined class 'ImmAsmOperand'
  MCK_ImmUnsignedi8, // user defined class 'ImmUnsignedi8AsmOperand'
  MCK_GR32orGR64, // user defined class 'X86GR32orGR64AsmOperand'
  MCK_AbsMem16, // user defined class 'X86AbsMem16AsmOperand'
  MCK_DstIdx16, // user defined class 'X86DstIdx16Operand'
  MCK_DstIdx32, // user defined class 'X86DstIdx32Operand'
  MCK_DstIdx64, // user defined class 'X86DstIdx64Operand'
  MCK_DstIdx8, // user defined class 'X86DstIdx8Operand'
  MCK_MemOffs16_16, // user defined class 'X86MemOffs16_16AsmOperand'
  MCK_MemOffs16_32, // user defined class 'X86MemOffs16_32AsmOperand'
  MCK_MemOffs16_8, // user defined class 'X86MemOffs16_8AsmOperand'
  MCK_MemOffs32_16, // user defined class 'X86MemOffs32_16AsmOperand'
  MCK_MemOffs32_32, // user defined class 'X86MemOffs32_32AsmOperand'
  MCK_MemOffs32_64, // user defined class 'X86MemOffs32_64AsmOperand'
  MCK_MemOffs32_8, // user defined class 'X86MemOffs32_8AsmOperand'
  MCK_MemOffs64_16, // user defined class 'X86MemOffs64_16AsmOperand'
  MCK_MemOffs64_32, // user defined class 'X86MemOffs64_32AsmOperand'
  MCK_MemOffs64_64, // user defined class 'X86MemOffs64_64AsmOperand'
  MCK_MemOffs64_8, // user defined class 'X86MemOffs64_8AsmOperand'
  MCK_SrcIdx16, // user defined class 'X86SrcIdx16Operand'
  MCK_SrcIdx32, // user defined class 'X86SrcIdx32Operand'
  MCK_SrcIdx64, // user defined class 'X86SrcIdx64Operand'
  MCK_SrcIdx8, // user defined class 'X86SrcIdx8Operand'
  MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand'
  MCK_Mem128, // user defined class 'X86Mem128AsmOperand'
  MCK_Mem16, // user defined class 'X86Mem16AsmOperand'
  MCK_Mem256, // user defined class 'X86Mem256AsmOperand'
  MCK_Mem32, // user defined class 'X86Mem32AsmOperand'
  MCK_Mem512, // user defined class 'X86Mem512AsmOperand'
  MCK_Mem64, // user defined class 'X86Mem64AsmOperand'
  MCK_Mem80, // user defined class 'X86Mem80AsmOperand'
  MCK_Mem8, // user defined class 'X86Mem8AsmOperand'
  MCK_MemVX32, // user defined class 'X86MemVX32Operand'
  MCK_MemVX32X, // user defined class 'X86MemVX32XOperand'
  MCK_MemVX64, // user defined class 'X86MemVX64Operand'
  MCK_MemVX64X, // user defined class 'X86MemVX64XOperand'
  MCK_MemVY32, // user defined class 'X86MemVY32Operand'
  MCK_MemVY32X, // user defined class 'X86MemVY32XOperand'
  MCK_MemVY64, // user defined class 'X86MemVY64Operand'
  MCK_MemVY64X, // user defined class 'X86MemVY64XOperand'
  MCK_MemVZ32, // user defined class 'X86MemVZ32Operand'
  MCK_MemVZ64, // user defined class 'X86MemVZ64Operand'
  MCK_Mem, // user defined class 'X86MemAsmOperand'
  NumMatchClassKinds
};

}

static MatchClassKind matchTokenString(StringRef Name) {
  switch (Name.size()) {
  default: break;
  case 1:	 // 9 strings to match.
    switch (Name[0]) {
    default: break;
    case '*':	 // 1 string to match.
      return MCK__STAR_;	 // "*"
    case '1':	 // 1 string to match.
      return MCK_1;	 // "1"
    case ':':	 // 1 string to match.
      return MCK__COLON_;	 // ":"
    case 'b':	 // 1 string to match.
      return MCK_b;	 // "b"
    case 'd':	 // 1 string to match.
      return MCK_d;	 // "d"
    case 'q':	 // 1 string to match.
      return MCK_q;	 // "q"
    case 'w':	 // 1 string to match.
      return MCK_w;	 // "w"
    case '{':	 // 1 string to match.
      return MCK__123_;	 // "{"
    case '}':	 // 1 string to match.
      return MCK__125_;	 // "}"
    }
    break;
  case 2:	 // 9 strings to match.
    switch (Name[0]) {
    default: break;
    case '$':	 // 1 string to match.
      if (Name[1] != '1')
        break;
      return MCK__36_1;	 // "$1"
    case 'p':	 // 2 strings to match.
      switch (Name[1]) {
      default: break;
      case 'd':	 // 1 string to match.
        return MCK_pd;	 // "pd"
      case 's':	 // 1 string to match.
        return MCK_ps;	 // "ps"
      }
      break;
    case 's':	 // 2 strings to match.
      switch (Name[1]) {
      default: break;
      case 'd':	 // 1 string to match.
        return MCK_sd;	 // "sd"
      case 's':	 // 1 string to match.
        return MCK_ss;	 // "ss"
      }
      break;
    case 'u':	 // 4 strings to match.
      switch (Name[1]) {
      default: break;
      case 'b':	 // 1 string to match.
        return MCK_ub;	 // "ub"
      case 'd':	 // 1 string to match.
        return MCK_ud;	 // "ud"
      case 'q':	 // 1 string to match.
        return MCK_uq;	 // "uq"
      case 'w':	 // 1 string to match.
        return MCK_uw;	 // "uw"
      }
      break;
    }
    break;
  case 3:	 // 1 string to match.
    if (memcmp(Name.data()+0, "{z}", 3))
      break;
    return MCK__123_z_125_;	 // "{z}"
  case 5:	 // 1 string to match.
    if (memcmp(Name.data()+0, "{sae}", 5))
      break;
    return MCK__123_sae_125_;	 // "{sae}"
  case 6:	 // 3 strings to match.
    if (memcmp(Name.data()+0, "{1to", 4))
      break;
    switch (Name[4]) {
    default: break;
    case '2':	 // 1 string to match.
      if (Name[5] != '}')
        break;
      return MCK__123_1to2_125_;	 // "{1to2}"
    case '4':	 // 1 string to match.
      if (Name[5] != '}')
        break;
      return MCK__123_1to4_125_;	 // "{1to4}"
    case '8':	 // 1 string to match.
      if (Name[5] != '}')
        break;
      return MCK__123_1to8_125_;	 // "{1to8}"
    }
    break;
  case 7:	 // 3 strings to match.
    if (memcmp(Name.data()+0, "{1to", 4))
      break;
    switch (Name[4]) {
    default: break;
    case '1':	 // 1 string to match.
      if (memcmp(Name.data()+5, "6}", 2))
        break;
      return MCK__123_1to16_125_;	 // "{1to16}"
    case '3':	 // 1 string to match.
      if (memcmp(Name.data()+5, "2}", 2))
        break;
      return MCK__123_1to32_125_;	 // "{1to32}"
    case '6':	 // 1 string to match.
      if (memcmp(Name.data()+5, "4}", 2))
        break;
      return MCK__123_1to64_125_;	 // "{1to64}"
    }
    break;
  }
  return InvalidMatchClass;
}

/// isSubclass - Compute whether \p A is a subclass of \p B.
static bool isSubclass(MatchClassKind A, MatchClassKind B) {
  if (A == B)
    return true;

  switch (A) {
  default:
    return false;

  case MCK_AL:
    switch (B) {
    default: return false;
    case MCK_GR8_ABCD_L: return true;
    case MCK_GR8_NOREX: return true;
    case MCK_GR8: return true;
    }

  case MCK_AX:
    switch (B) {
    default: return false;
    case MCK_GR16_ABCD: return true;
    case MCK_GR16_NOREX: return true;
    case MCK_GR16: return true;
    }

  case MCK_CL:
    switch (B) {
    default: return false;
    case MCK_GR8_ABCD_L: return true;
    case MCK_GR8_NOREX: return true;
    case MCK_GR8: return true;
    }

  case MCK_CS:
    return B == MCK_SEGMENT_REG;

  case MCK_DS:
    return B == MCK_SEGMENT_REG;

  case MCK_DX:
    switch (B) {
    default: return false;
    case MCK_GR16_ABCD: return true;
    case MCK_GR16_NOREX: return true;
    case MCK_GR16: return true;
    }

  case MCK_EAX:
    switch (B) {
    default: return false;
    case MCK_GR32_AD: return true;
    case MCK_GR32_TC: return true;
    case MCK_GR32_ABCD: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_EBX:
    switch (B) {
    default: return false;
    case MCK_Reg21: return true;
    case MCK_GR32_ABCD: return true;
    case MCK_Reg22: return true;
    case MCK_Reg23: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_Reg25: return true;
    case MCK_GR32_NOAX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_ECX:
    switch (B) {
    default: return false;
    case MCK_Reg20: return true;
    case MCK_Reg21: return true;
    case MCK_GR32_TC: return true;
    case MCK_GR32_ABCD: return true;
    case MCK_Reg22: return true;
    case MCK_Reg23: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_Reg25: return true;
    case MCK_GR32_NOAX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_EDX:
    switch (B) {
    default: return false;
    case MCK_Reg20: return true;
    case MCK_GR32_AD: return true;
    case MCK_Reg21: return true;
    case MCK_GR32_TC: return true;
    case MCK_GR32_ABCD: return true;
    case MCK_Reg22: return true;
    case MCK_Reg23: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_Reg25: return true;
    case MCK_GR32_NOAX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_ES:
    return B == MCK_SEGMENT_REG;

  case MCK_FS:
    return B == MCK_SEGMENT_REG;

  case MCK_GS:
    return B == MCK_SEGMENT_REG;

  case MCK_RAX:
    switch (B) {
    default: return false;
    case MCK_Reg29: return true;
    case MCK_Reg30: return true;
    case MCK_Reg46: return true;
    case MCK_GR64_ABCD: return true;
    case MCK_Reg38: return true;
    case MCK_Reg44: return true;
    case MCK_Reg41: return true;
    case MCK_Reg45: return true;
    case MCK_Reg42: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg39: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_RBX:
    switch (B) {
    default: return false;
    case MCK_Reg49: return true;
    case MCK_GR64_ABCD: return true;
    case MCK_Reg50: return true;
    case MCK_Reg51: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_RCX:
    switch (B) {
    default: return false;
    case MCK_Reg48: return true;
    case MCK_Reg49: return true;
    case MCK_Reg30: return true;
    case MCK_Reg54: return true;
    case MCK_Reg46: return true;
    case MCK_GR64_ABCD: return true;
    case MCK_Reg57: return true;
    case MCK_Reg38: return true;
    case MCK_Reg56: return true;
    case MCK_Reg50: return true;
    case MCK_Reg44: return true;
    case MCK_Reg41: return true;
    case MCK_Reg55: return true;
    case MCK_Reg51: return true;
    case MCK_Reg45: return true;
    case MCK_Reg42: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg39: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_RDX:
    switch (B) {
    default: return false;
    case MCK_Reg48: return true;
    case MCK_Reg29: return true;
    case MCK_Reg49: return true;
    case MCK_Reg30: return true;
    case MCK_Reg54: return true;
    case MCK_Reg46: return true;
    case MCK_GR64_ABCD: return true;
    case MCK_Reg57: return true;
    case MCK_Reg38: return true;
    case MCK_Reg56: return true;
    case MCK_Reg50: return true;
    case MCK_Reg44: return true;
    case MCK_Reg41: return true;
    case MCK_Reg55: return true;
    case MCK_Reg51: return true;
    case MCK_Reg45: return true;
    case MCK_Reg42: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg39: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_SS:
    return B == MCK_SEGMENT_REG;

  case MCK_ST0:
    return B == MCK_RST;

  case MCK_XMM0:
    switch (B) {
    default: return false;
    case MCK_FR32: return true;
    case MCK_FR32X: return true;
    }

  case MCK_Reg48:
    switch (B) {
    default: return false;
    case MCK_Reg49: return true;
    case MCK_Reg30: return true;
    case MCK_Reg54: return true;
    case MCK_Reg46: return true;
    case MCK_GR64_ABCD: return true;
    case MCK_Reg57: return true;
    case MCK_Reg38: return true;
    case MCK_Reg56: return true;
    case MCK_Reg50: return true;
    case MCK_Reg44: return true;
    case MCK_Reg41: return true;
    case MCK_Reg55: return true;
    case MCK_Reg51: return true;
    case MCK_Reg45: return true;
    case MCK_Reg42: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg39: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg29:
    switch (B) {
    default: return false;
    case MCK_Reg30: return true;
    case MCK_Reg46: return true;
    case MCK_GR64_ABCD: return true;
    case MCK_Reg38: return true;
    case MCK_Reg44: return true;
    case MCK_Reg41: return true;
    case MCK_Reg45: return true;
    case MCK_Reg42: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg39: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg20:
    switch (B) {
    default: return false;
    case MCK_Reg21: return true;
    case MCK_GR32_TC: return true;
    case MCK_GR32_ABCD: return true;
    case MCK_Reg22: return true;
    case MCK_Reg23: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_Reg25: return true;
    case MCK_GR32_NOAX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_GR32_AD:
    switch (B) {
    default: return false;
    case MCK_GR32_TC: return true;
    case MCK_GR32_ABCD: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_Reg49:
    switch (B) {
    default: return false;
    case MCK_GR64_ABCD: return true;
    case MCK_Reg50: return true;
    case MCK_Reg51: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg30:
    switch (B) {
    default: return false;
    case MCK_Reg46: return true;
    case MCK_GR64_ABCD: return true;
    case MCK_Reg38: return true;
    case MCK_Reg44: return true;
    case MCK_Reg41: return true;
    case MCK_Reg45: return true;
    case MCK_Reg42: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg39: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg21:
    switch (B) {
    default: return false;
    case MCK_GR32_ABCD: return true;
    case MCK_Reg22: return true;
    case MCK_Reg23: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_Reg25: return true;
    case MCK_GR32_NOAX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_GR32_TC:
    switch (B) {
    default: return false;
    case MCK_GR32_ABCD: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_Reg54:
    switch (B) {
    default: return false;
    case MCK_Reg38: return true;
    case MCK_Reg50: return true;
    case MCK_Reg41: return true;
    case MCK_Reg55: return true;
    case MCK_Reg51: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg39: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg46:
    switch (B) {
    default: return false;
    case MCK_Reg41: return true;
    case MCK_Reg45: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_GR64: return true;
    }

  case MCK_GR16_ABCD:
    switch (B) {
    default: return false;
    case MCK_GR16_NOREX: return true;
    case MCK_GR16: return true;
    }

  case MCK_GR32_ABCD:
    switch (B) {
    default: return false;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_GR64_ABCD:
    switch (B) {
    default: return false;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_GR8_ABCD_H:
    switch (B) {
    default: return false;
    case MCK_GR8_NOREX: return true;
    case MCK_GR8: return true;
    }

  case MCK_GR8_ABCD_L:
    switch (B) {
    default: return false;
    case MCK_GR8_NOREX: return true;
    case MCK_GR8: return true;
    }

  case MCK_Reg57:
    switch (B) {
    default: return false;
    case MCK_Reg56: return true;
    case MCK_Reg44: return true;
    case MCK_Reg55: return true;
    case MCK_Reg45: return true;
    case MCK_Reg42: return true;
    case MCK_Reg39: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_TC: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg38:
    switch (B) {
    default: return false;
    case MCK_Reg41: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg39: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg56:
    switch (B) {
    default: return false;
    case MCK_Reg42: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg50:
    switch (B) {
    default: return false;
    case MCK_Reg51: return true;
    case MCK_GR64_NOREX_NOSP: return true;
    case MCK_Reg33: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg44:
    switch (B) {
    default: return false;
    case MCK_Reg45: return true;
    case MCK_Reg42: return true;
    case MCK_Reg39: return true;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_TC: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg41:
    switch (B) {
    default: return false;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_TC: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg22:
    switch (B) {
    default: return false;
    case MCK_Reg23: return true;
    case MCK_GR32_NOREX_NOSP: return true;
    case MCK_GR32_NOREX: return true;
    case MCK_Reg25: return true;
    case MCK_GR32_NOAX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_Reg55:
    switch (B) {
    default: return false;
    case MCK_Reg39: return true;
    case MCK_GR64_TC: return true;
    case MCK_Reg53: return true;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg51:
    switch (B) {
    default: return false;
    case MCK_Reg33: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_Reg52: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg45:
    switch (B) {
    default: return false;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_TC: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg42:
    switch (B) {
    default: return false;
    case MCK_GR64_TCW64: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg23:
    switch (B) {
    default: return false;
    case MCK_GR32_NOREX: return true;
    case MCK_GR32_NOAX: return true;
    case MCK_GR32: return true;
    }

  case MCK_GR32_NOREX_NOSP:
    switch (B) {
    default: return false;
    case MCK_GR32_NOREX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_GR64_NOREX_NOSP:
    switch (B) {
    default: return false;
    case MCK_Reg33: return true;
    case MCK_GR64_NOREX: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_VK1WM:
    return B == MCK_VK1;

  case MCK_Reg39:
    switch (B) {
    default: return false;
    case MCK_GR64_TC: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg33:
    switch (B) {
    default: return false;
    case MCK_GR64_NOREX: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_GR16_NOREX:
    return B == MCK_GR16;

  case MCK_GR32_NOREX:
    return B == MCK_GR32;

  case MCK_GR64_TCW64:
    return B == MCK_GR64;

  case MCK_GR8_NOREX:
    return B == MCK_GR8;

  case MCK_GR64_NOREX:
    return B == MCK_GR64;

  case MCK_GR64_TC:
    return B == MCK_GR64;

  case MCK_Reg53:
    switch (B) {
    default: return false;
    case MCK_Reg52: return true;
    case MCK_GR64_NOSP: return true;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg25:
    switch (B) {
    default: return false;
    case MCK_GR32_NOAX: return true;
    case MCK_GR32_NOSP: return true;
    case MCK_GR32: return true;
    }

  case MCK_Reg52:
    switch (B) {
    default: return false;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_GR32_NOAX:
    return B == MCK_GR32;

  case MCK_GR32_NOSP:
    return B == MCK_GR32;

  case MCK_GR64_NOSP:
    switch (B) {
    default: return false;
    case MCK_Reg34: return true;
    case MCK_GR64: return true;
    }

  case MCK_Reg67:
    return B == MCK_VR512;

  case MCK_Reg34:
    return B == MCK_GR64;

  case MCK_FR32:
    return B == MCK_FR32X;

  case MCK_VR256:
    return B == MCK_VR256X;

  case MCK_ImmSExti64i8:
    switch (B) {
    default: return false;
    case MCK_ImmSExti16i8: return true;
    case MCK_ImmSExti32i8: return true;
    case MCK_ImmSExti64i32: return true;
    case MCK_Imm: return true;
    }

  case MCK_ImmSExti16i8:
    switch (B) {
    default: return false;
    case MCK_ImmSExti64i32: return true;
    case MCK_Imm: return true;
    }

  case MCK_ImmSExti32i8:
    return B == MCK_Imm;

  case MCK_ImmSExti64i32:
    return B == MCK_Imm;

  case MCK_AbsMem16:
    switch (B) {
    default: return false;
    case MCK_AbsMem: return true;
    case MCK_Mem: return true;
    }

  case MCK_DstIdx16:
    switch (B) {
    default: return false;
    case MCK_Mem16: return true;
    case MCK_Mem: return true;
    }

  case MCK_DstIdx32:
    switch (B) {
    default: return false;
    case MCK_Mem32: return true;
    case MCK_Mem: return true;
    }

  case MCK_DstIdx64:
    switch (B) {
    default: return false;
    case MCK_Mem64: return true;
    case MCK_Mem: return true;
    }

  case MCK_DstIdx8:
    switch (B) {
    default: return false;
    case MCK_Mem8: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs16_16:
    switch (B) {
    default: return false;
    case MCK_Mem16: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs16_32:
    switch (B) {
    default: return false;
    case MCK_Mem32: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs16_8:
    switch (B) {
    default: return false;
    case MCK_Mem8: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs32_16:
    switch (B) {
    default: return false;
    case MCK_Mem16: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs32_32:
    switch (B) {
    default: return false;
    case MCK_Mem32: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs32_64:
    switch (B) {
    default: return false;
    case MCK_Mem64: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs32_8:
    switch (B) {
    default: return false;
    case MCK_Mem8: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs64_16:
    switch (B) {
    default: return false;
    case MCK_Mem16: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs64_32:
    switch (B) {
    default: return false;
    case MCK_Mem32: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs64_64:
    switch (B) {
    default: return false;
    case MCK_Mem64: return true;
    case MCK_Mem: return true;
    }

  case MCK_MemOffs64_8:
    switch (B) {
    default: return false;
    case MCK_Mem8: return true;
    case MCK_Mem: return true;
    }

  case MCK_SrcIdx16:
    switch (B) {
    default: return false;
    case MCK_Mem16: return true;
    case MCK_Mem: return true;
    }

  case MCK_SrcIdx32:
    switch (B) {
    default: return false;
    case MCK_Mem32: return true;
    case MCK_Mem: return true;
    }

  case MCK_SrcIdx64:
    switch (B) {
    default: return false;
    case MCK_Mem64: return true;
    case MCK_Mem: return true;
    }

  case MCK_SrcIdx8:
    switch (B) {
    default: return false;
    case MCK_Mem8: return true;
    case MCK_Mem: return true;
    }

  case MCK_AbsMem:
    return B == MCK_Mem;

  case MCK_Mem128:
    return B == MCK_Mem;

  case MCK_Mem16:
    return B == MCK_Mem;

  case MCK_Mem256:
    return B == MCK_Mem;

  case MCK_Mem32:
    return B == MCK_Mem;

  case MCK_Mem512:
    return B == MCK_Mem;

  case MCK_Mem64:
    return B == MCK_Mem;

  case MCK_Mem80:
    return B == MCK_Mem;

  case MCK_Mem8:
    return B == MCK_Mem;

  case MCK_MemVX32:
    return B == MCK_Mem;

  case MCK_MemVX32X:
    return B == MCK_Mem;

  case MCK_MemVX64:
    return B == MCK_Mem;

  case MCK_MemVX64X:
    return B == MCK_Mem;

  case MCK_MemVY32:
    return B == MCK_Mem;

  case MCK_MemVY32X:
    return B == MCK_Mem;

  case MCK_MemVY64:
    return B == MCK_Mem;

  case MCK_MemVY64X:
    return B == MCK_Mem;

  case MCK_MemVZ32:
    return B == MCK_Mem;

  case MCK_MemVZ64:
    return B == MCK_Mem;
  }
}

static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
  X86Operand &Operand = (X86Operand&)GOp;
  if (Kind == InvalidMatchClass)
    return MCTargetAsmParser::Match_InvalidOperand;

  if (Operand.isToken())
    return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
             MCTargetAsmParser::Match_Success :
             MCTargetAsmParser::Match_InvalidOperand;

  //printf("-- validateOperandClass: Kind = %u\n", Kind);
  // 'AVX512RC' class
  if (Kind == MCK_AVX512RC) {
    if (Operand.isAVX512RC())
      return MCTargetAsmParser::Match_Success;
  }

  // 'ImmSExti64i8' class
  if (Kind == MCK_ImmSExti64i8) {
    if (Operand.isImmSExti64i8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'ImmSExti16i8' class
  if (Kind == MCK_ImmSExti16i8) {
    if (Operand.isImmSExti16i8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'ImmSExti32i8' class
  if (Kind == MCK_ImmSExti32i8) {
    if (Operand.isImmSExti32i8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'ImmSExti64i32' class
  if (Kind == MCK_ImmSExti64i32) {
    if (Operand.isImmSExti64i32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Imm' class
  if (Kind == MCK_Imm) {
    if (Operand.isImm())
      return MCTargetAsmParser::Match_Success;
  }

  // 'ImmUnsignedi8' class
  if (Kind == MCK_ImmUnsignedi8) {
    if (Operand.isImmUnsignedi8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'GR32orGR64' class
  if (Kind == MCK_GR32orGR64) {
    if (Operand.isGR32orGR64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'AbsMem16' class
  if (Kind == MCK_AbsMem16) {
    if (Operand.isAbsMem16())
      return MCTargetAsmParser::Match_Success;
  }

  // 'DstIdx16' class
  if (Kind == MCK_DstIdx16) {
    if (Operand.isDstIdx16())
      return MCTargetAsmParser::Match_Success;
  }

  // 'DstIdx32' class
  if (Kind == MCK_DstIdx32) {
    if (Operand.isDstIdx32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'DstIdx64' class
  if (Kind == MCK_DstIdx64) {
    if (Operand.isDstIdx64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'DstIdx8' class
  if (Kind == MCK_DstIdx8) {
    if (Operand.isDstIdx8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs16_16' class
  if (Kind == MCK_MemOffs16_16) {
    if (Operand.isMemOffs16_16())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs16_32' class
  if (Kind == MCK_MemOffs16_32) {
    if (Operand.isMemOffs16_32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs16_8' class
  if (Kind == MCK_MemOffs16_8) {
    if (Operand.isMemOffs16_8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs32_16' class
  if (Kind == MCK_MemOffs32_16) {
    if (Operand.isMemOffs32_16())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs32_32' class
  if (Kind == MCK_MemOffs32_32) {
    if (Operand.isMemOffs32_32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs32_64' class
  if (Kind == MCK_MemOffs32_64) {
    if (Operand.isMemOffs32_64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs32_8' class
  if (Kind == MCK_MemOffs32_8) {
    if (Operand.isMemOffs32_8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs64_16' class
  if (Kind == MCK_MemOffs64_16) {
    if (Operand.isMemOffs64_16())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs64_32' class
  if (Kind == MCK_MemOffs64_32) {
    if (Operand.isMemOffs64_32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs64_64' class
  if (Kind == MCK_MemOffs64_64) {
    if (Operand.isMemOffs64_64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemOffs64_8' class
  if (Kind == MCK_MemOffs64_8) {
    if (Operand.isMemOffs64_8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'SrcIdx16' class
  if (Kind == MCK_SrcIdx16) {
    if (Operand.isSrcIdx16())
      return MCTargetAsmParser::Match_Success;
  }

  // 'SrcIdx32' class
  if (Kind == MCK_SrcIdx32) {
    if (Operand.isSrcIdx32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'SrcIdx64' class
  if (Kind == MCK_SrcIdx64) {
    if (Operand.isSrcIdx64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'SrcIdx8' class
  if (Kind == MCK_SrcIdx8) {
    if (Operand.isSrcIdx8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'AbsMem' class
  if (Kind == MCK_AbsMem) {
    if (Operand.isAbsMem())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem128' class
  if (Kind == MCK_Mem128) {
    if (Operand.isMem128())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem16' class
  if (Kind == MCK_Mem16) {
    if (Operand.isMem16())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem256' class
  if (Kind == MCK_Mem256) {
    if (Operand.isMem256())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem32' class
  if (Kind == MCK_Mem32) {
    if (Operand.isMem32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem512' class
  if (Kind == MCK_Mem512) {
    if (Operand.isMem512())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem64' class
  if (Kind == MCK_Mem64) {
    if (Operand.isMem64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem80' class
  if (Kind == MCK_Mem80) {
    if (Operand.isMem80())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem8' class
  if (Kind == MCK_Mem8) {
    if (Operand.isMem8())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVX32' class
  if (Kind == MCK_MemVX32) {
    if (Operand.isMemVX32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVX32X' class
  if (Kind == MCK_MemVX32X) {
    if (Operand.isMemVX32X())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVX64' class
  if (Kind == MCK_MemVX64) {
    if (Operand.isMemVX64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVX64X' class
  if (Kind == MCK_MemVX64X) {
    if (Operand.isMemVX64X())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVY32' class
  if (Kind == MCK_MemVY32) {
    if (Operand.isMemVY32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVY32X' class
  if (Kind == MCK_MemVY32X) {
    if (Operand.isMemVY32X())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVY64' class
  if (Kind == MCK_MemVY64) {
    if (Operand.isMemVY64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVY64X' class
  if (Kind == MCK_MemVY64X) {
    if (Operand.isMemVY64X())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVZ32' class
  if (Kind == MCK_MemVZ32) {
    if (Operand.isMemVZ32())
      return MCTargetAsmParser::Match_Success;
  }

  // 'MemVZ64' class
  if (Kind == MCK_MemVZ64) {
    if (Operand.isMemVZ64())
      return MCTargetAsmParser::Match_Success;
  }

  // 'Mem' class
  if (Kind == MCK_Mem) {
    if (Operand.isMem())
      return MCTargetAsmParser::Match_Success;
  }

  if (Operand.isReg()) {
    MatchClassKind OpKind;
    switch (Operand.getReg()) {
    default: OpKind = InvalidMatchClass; break;
    case X86::AL: OpKind = MCK_AL; break;
    case X86::DL: OpKind = MCK_GR8_ABCD_L; break;
    case X86::CL: OpKind = MCK_CL; break;
    case X86::BL: OpKind = MCK_GR8_ABCD_L; break;
    case X86::AH: OpKind = MCK_GR8_ABCD_H; break;
    case X86::DH: OpKind = MCK_GR8_ABCD_H; break;
    case X86::CH: OpKind = MCK_GR8_ABCD_H; break;
    case X86::BH: OpKind = MCK_GR8_ABCD_H; break;
    case X86::SIL: OpKind = MCK_GR8; break;
    case X86::DIL: OpKind = MCK_GR8; break;
    case X86::BPL: OpKind = MCK_GR8; break;
    case X86::SPL: OpKind = MCK_GR8; break;
    case X86::R8B: OpKind = MCK_GR8; break;
    case X86::R9B: OpKind = MCK_GR8; break;
    case X86::R10B: OpKind = MCK_GR8; break;
    case X86::R11B: OpKind = MCK_GR8; break;
    case X86::R12B: OpKind = MCK_GR8; break;
    case X86::R13B: OpKind = MCK_GR8; break;
    case X86::R14B: OpKind = MCK_GR8; break;
    case X86::R15B: OpKind = MCK_GR8; break;
    case X86::AX: OpKind = MCK_AX; break;
    case X86::DX: OpKind = MCK_DX; break;
    case X86::CX: OpKind = MCK_GR16_ABCD; break;
    case X86::BX: OpKind = MCK_GR16_ABCD; break;
    case X86::SI: OpKind = MCK_GR16_NOREX; break;
    case X86::DI: OpKind = MCK_GR16_NOREX; break;
    case X86::BP: OpKind = MCK_GR16_NOREX; break;
    case X86::SP: OpKind = MCK_GR16_NOREX; break;
    case X86::R8W: OpKind = MCK_GR16; break;
    case X86::R9W: OpKind = MCK_GR16; break;
    case X86::R10W: OpKind = MCK_GR16; break;
    case X86::R11W: OpKind = MCK_GR16; break;
    case X86::R12W: OpKind = MCK_GR16; break;
    case X86::R13W: OpKind = MCK_GR16; break;
    case X86::R14W: OpKind = MCK_GR16; break;
    case X86::R15W: OpKind = MCK_GR16; break;
    case X86::EAX: OpKind = MCK_EAX; break;
    case X86::EDX: OpKind = MCK_EDX; break;
    case X86::ECX: OpKind = MCK_ECX; break;
    case X86::EBX: OpKind = MCK_EBX; break;
    case X86::ESI: OpKind = MCK_Reg22; break;
    case X86::EDI: OpKind = MCK_Reg22; break;
    case X86::EBP: OpKind = MCK_Reg22; break;
    case X86::ESP: OpKind = MCK_Reg23; break;
    case X86::R8D: OpKind = MCK_Reg25; break;
    case X86::R9D: OpKind = MCK_Reg25; break;
    case X86::R10D: OpKind = MCK_Reg25; break;
    case X86::R11D: OpKind = MCK_Reg25; break;
    case X86::R12D: OpKind = MCK_Reg25; break;
    case X86::R13D: OpKind = MCK_Reg25; break;
    case X86::R14D: OpKind = MCK_Reg25; break;
    case X86::R15D: OpKind = MCK_Reg25; break;
    case X86::RAX: OpKind = MCK_RAX; break;
    case X86::RDX: OpKind = MCK_RDX; break;
    case X86::RCX: OpKind = MCK_RCX; break;
    case X86::RBX: OpKind = MCK_RBX; break;
    case X86::RSI: OpKind = MCK_Reg54; break;
    case X86::RDI: OpKind = MCK_Reg54; break;
    case X86::RBP: OpKind = MCK_Reg50; break;
    case X86::RSP: OpKind = MCK_Reg51; break;
    case X86::R8: OpKind = MCK_Reg57; break;
    case X86::R9: OpKind = MCK_Reg57; break;
    case X86::R10: OpKind = MCK_Reg56; break;
    case X86::R11: OpKind = MCK_Reg57; break;
    case X86::R12: OpKind = MCK_Reg53; break;
    case X86::R13: OpKind = MCK_Reg53; break;
    case X86::R14: OpKind = MCK_Reg53; break;
    case X86::R15: OpKind = MCK_Reg53; break;
    case X86::RIP: OpKind = MCK_Reg46; break;
    case X86::MM0: OpKind = MCK_VR64; break;
    case X86::MM1: OpKind = MCK_VR64; break;
    case X86::MM2: OpKind = MCK_VR64; break;
    case X86::MM3: OpKind = MCK_VR64; break;
    case X86::MM4: OpKind = MCK_VR64; break;
    case X86::MM5: OpKind = MCK_VR64; break;
    case X86::MM6: OpKind = MCK_VR64; break;
    case X86::MM7: OpKind = MCK_VR64; break;
    case X86::FP0: OpKind = MCK_RFP32; break;
    case X86::FP1: OpKind = MCK_RFP32; break;
    case X86::FP2: OpKind = MCK_RFP32; break;
    case X86::FP3: OpKind = MCK_RFP32; break;
    case X86::FP4: OpKind = MCK_RFP32; break;
    case X86::FP5: OpKind = MCK_RFP32; break;
    case X86::FP6: OpKind = MCK_RFP32; break;
    case X86::XMM0: OpKind = MCK_XMM0; break;
    case X86::XMM1: OpKind = MCK_FR32; break;
    case X86::XMM2: OpKind = MCK_FR32; break;
    case X86::XMM3: OpKind = MCK_FR32; break;
    case X86::XMM4: OpKind = MCK_FR32; break;
    case X86::XMM5: OpKind = MCK_FR32; break;
    case X86::XMM6: OpKind = MCK_FR32; break;
    case X86::XMM7: OpKind = MCK_FR32; break;
    case X86::XMM8: OpKind = MCK_FR32; break;
    case X86::XMM9: OpKind = MCK_FR32; break;
    case X86::XMM10: OpKind = MCK_FR32; break;
    case X86::XMM11: OpKind = MCK_FR32; break;
    case X86::XMM12: OpKind = MCK_FR32; break;
    case X86::XMM13: OpKind = MCK_FR32; break;
    case X86::XMM14: OpKind = MCK_FR32; break;
    case X86::XMM15: OpKind = MCK_FR32; break;
    case X86::XMM16: OpKind = MCK_FR32X; break;
    case X86::XMM17: OpKind = MCK_FR32X; break;
    case X86::XMM18: OpKind = MCK_FR32X; break;
    case X86::XMM19: OpKind = MCK_FR32X; break;
    case X86::XMM20: OpKind = MCK_FR32X; break;
    case X86::XMM21: OpKind = MCK_FR32X; break;
    case X86::XMM22: OpKind = MCK_FR32X; break;
    case X86::XMM23: OpKind = MCK_FR32X; break;
    case X86::XMM24: OpKind = MCK_FR32X; break;
    case X86::XMM25: OpKind = MCK_FR32X; break;
    case X86::XMM26: OpKind = MCK_FR32X; break;
    case X86::XMM27: OpKind = MCK_FR32X; break;
    case X86::XMM28: OpKind = MCK_FR32X; break;
    case X86::XMM29: OpKind = MCK_FR32X; break;
    case X86::XMM30: OpKind = MCK_FR32X; break;
    case X86::XMM31: OpKind = MCK_FR32X; break;
    case X86::YMM0: OpKind = MCK_VR256; break;
    case X86::YMM1: OpKind = MCK_VR256; break;
    case X86::YMM2: OpKind = MCK_VR256; break;
    case X86::YMM3: OpKind = MCK_VR256; break;
    case X86::YMM4: OpKind = MCK_VR256; break;
    case X86::YMM5: OpKind = MCK_VR256; break;
    case X86::YMM6: OpKind = MCK_VR256; break;
    case X86::YMM7: OpKind = MCK_VR256; break;
    case X86::YMM8: OpKind = MCK_VR256; break;
    case X86::YMM9: OpKind = MCK_VR256; break;
    case X86::YMM10: OpKind = MCK_VR256; break;
    case X86::YMM11: OpKind = MCK_VR256; break;
    case X86::YMM12: OpKind = MCK_VR256; break;
    case X86::YMM13: OpKind = MCK_VR256; break;
    case X86::YMM14: OpKind = MCK_VR256; break;
    case X86::YMM15: OpKind = MCK_VR256; break;
    case X86::YMM16: OpKind = MCK_VR256X; break;
    case X86::YMM17: OpKind = MCK_VR256X; break;
    case X86::YMM18: OpKind = MCK_VR256X; break;
    case X86::YMM19: OpKind = MCK_VR256X; break;
    case X86::YMM20: OpKind = MCK_VR256X; break;
    case X86::YMM21: OpKind = MCK_VR256X; break;
    case X86::YMM22: OpKind = MCK_VR256X; break;
    case X86::YMM23: OpKind = MCK_VR256X; break;
    case X86::YMM24: OpKind = MCK_VR256X; break;
    case X86::YMM25: OpKind = MCK_VR256X; break;
    case X86::YMM26: OpKind = MCK_VR256X; break;
    case X86::YMM27: OpKind = MCK_VR256X; break;
    case X86::YMM28: OpKind = MCK_VR256X; break;
    case X86::YMM29: OpKind = MCK_VR256X; break;
    case X86::YMM30: OpKind = MCK_VR256X; break;
    case X86::YMM31: OpKind = MCK_VR256X; break;
    case X86::ZMM0: OpKind = MCK_Reg67; break;
    case X86::ZMM1: OpKind = MCK_Reg67; break;
    case X86::ZMM2: OpKind = MCK_Reg67; break;
    case X86::ZMM3: OpKind = MCK_Reg67; break;
    case X86::ZMM4: OpKind = MCK_Reg67; break;
    case X86::ZMM5: OpKind = MCK_Reg67; break;
    case X86::ZMM6: OpKind = MCK_Reg67; break;
    case X86::ZMM7: OpKind = MCK_Reg67; break;
    case X86::ZMM8: OpKind = MCK_Reg67; break;
    case X86::ZMM9: OpKind = MCK_Reg67; break;
    case X86::ZMM10: OpKind = MCK_Reg67; break;
    case X86::ZMM11: OpKind = MCK_Reg67; break;
    case X86::ZMM12: OpKind = MCK_Reg67; break;
    case X86::ZMM13: OpKind = MCK_Reg67; break;
    case X86::ZMM14: OpKind = MCK_Reg67; break;
    case X86::ZMM15: OpKind = MCK_Reg67; break;
    case X86::ZMM16: OpKind = MCK_VR512; break;
    case X86::ZMM17: OpKind = MCK_VR512; break;
    case X86::ZMM18: OpKind = MCK_VR512; break;
    case X86::ZMM19: OpKind = MCK_VR512; break;
    case X86::ZMM20: OpKind = MCK_VR512; break;
    case X86::ZMM21: OpKind = MCK_VR512; break;
    case X86::ZMM22: OpKind = MCK_VR512; break;
    case X86::ZMM23: OpKind = MCK_VR512; break;
    case X86::ZMM24: OpKind = MCK_VR512; break;
    case X86::ZMM25: OpKind = MCK_VR512; break;
    case X86::ZMM26: OpKind = MCK_VR512; break;
    case X86::ZMM27: OpKind = MCK_VR512; break;
    case X86::ZMM28: OpKind = MCK_VR512; break;
    case X86::ZMM29: OpKind = MCK_VR512; break;
    case X86::ZMM30: OpKind = MCK_VR512; break;
    case X86::ZMM31: OpKind = MCK_VR512; break;
    case X86::K0: OpKind = MCK_VK1; break;
    case X86::K1: OpKind = MCK_VK1WM; break;
    case X86::K2: OpKind = MCK_VK1WM; break;
    case X86::K3: OpKind = MCK_VK1WM; break;
    case X86::K4: OpKind = MCK_VK1WM; break;
    case X86::K5: OpKind = MCK_VK1WM; break;
    case X86::K6: OpKind = MCK_VK1WM; break;
    case X86::K7: OpKind = MCK_VK1WM; break;
    case X86::ST0: OpKind = MCK_ST0; break;
    case X86::ST1: OpKind = MCK_RST; break;
    case X86::ST2: OpKind = MCK_RST; break;
    case X86::ST3: OpKind = MCK_RST; break;
    case X86::ST4: OpKind = MCK_RST; break;
    case X86::ST5: OpKind = MCK_RST; break;
    case X86::ST6: OpKind = MCK_RST; break;
    case X86::ST7: OpKind = MCK_RST; break;
    case X86::FPSW: OpKind = MCK_FPCCR; break;
    case X86::EFLAGS: OpKind = MCK_CCR; break;
    case X86::CS: OpKind = MCK_CS; break;
    case X86::DS: OpKind = MCK_DS; break;
    case X86::SS: OpKind = MCK_SS; break;
    case X86::ES: OpKind = MCK_ES; break;
    case X86::FS: OpKind = MCK_FS; break;
    case X86::GS: OpKind = MCK_GS; break;
    case X86::DR0: OpKind = MCK_DEBUG_REG; break;
    case X86::DR1: OpKind = MCK_DEBUG_REG; break;
    case X86::DR2: OpKind = MCK_DEBUG_REG; break;
    case X86::DR3: OpKind = MCK_DEBUG_REG; break;
    case X86::DR4: OpKind = MCK_DEBUG_REG; break;
    case X86::DR5: OpKind = MCK_DEBUG_REG; break;
    case X86::DR6: OpKind = MCK_DEBUG_REG; break;
    case X86::DR7: OpKind = MCK_DEBUG_REG; break;
    case X86::CR0: OpKind = MCK_CONTROL_REG; break;
    case X86::CR1: OpKind = MCK_CONTROL_REG; break;
    case X86::CR2: OpKind = MCK_CONTROL_REG; break;
    case X86::CR3: OpKind = MCK_CONTROL_REG; break;
    case X86::CR4: OpKind = MCK_CONTROL_REG; break;
    case X86::CR5: OpKind = MCK_CONTROL_REG; break;
    case X86::CR6: OpKind = MCK_CONTROL_REG; break;
    case X86::CR7: OpKind = MCK_CONTROL_REG; break;
    case X86::CR8: OpKind = MCK_CONTROL_REG; break;
    case X86::CR9: OpKind = MCK_CONTROL_REG; break;
    case X86::CR10: OpKind = MCK_CONTROL_REG; break;
    case X86::CR11: OpKind = MCK_CONTROL_REG; break;
    case X86::CR12: OpKind = MCK_CONTROL_REG; break;
    case X86::CR13: OpKind = MCK_CONTROL_REG; break;
    case X86::CR14: OpKind = MCK_CONTROL_REG; break;
    case X86::CR15: OpKind = MCK_CONTROL_REG; break;
    case X86::BND0: OpKind = MCK_BNDR; break;
    case X86::BND1: OpKind = MCK_BNDR; break;
    case X86::BND2: OpKind = MCK_BNDR; break;
    case X86::BND3: OpKind = MCK_BNDR; break;
    }
    return isSubclass(OpKind, Kind) ? MCTargetAsmParser::Match_Success :
                                      MCTargetAsmParser::Match_InvalidOperand;
  }

  return MCTargetAsmParser::Match_InvalidOperand;
}

uint64_t X86AsmParser::
ComputeAvailableFeatures(const FeatureBitset& FB) const {
  uint64_t Features = 0;
  if ((FB[X86::FeatureAVX512]))
    Features |= Feature_HasAVX512;
  if ((FB[X86::FeatureCDI]))
    Features |= Feature_HasCDI;
  if ((FB[X86::FeaturePFI]))
    Features |= Feature_HasPFI;
  if ((FB[X86::FeatureERI]))
    Features |= Feature_HasERI;
  if ((FB[X86::FeatureDQI]))
    Features |= Feature_HasDQI;
  if ((FB[X86::FeatureBWI]))
    Features |= Feature_HasBWI;
  if ((FB[X86::FeatureVLX]))
    Features |= Feature_HasVLX;
  if ((FB[X86::FeatureVBMI]))
    Features |= Feature_HasVBMI;
  if ((FB[X86::FeatureIFMA]))
    Features |= Feature_HasIFMA;
  if ((!FB[X86::Mode64Bit]))
    Features |= Feature_Not64BitMode;
  if ((FB[X86::Mode64Bit]))
    Features |= Feature_In64BitMode;
  if ((FB[X86::Mode16Bit]))
    Features |= Feature_In16BitMode;
  if ((!FB[X86::Mode16Bit]))
    Features |= Feature_Not16BitMode;
  if ((FB[X86::Mode32Bit]))
    Features |= Feature_In32BitMode;
  return Features;
}

static const char *const MnemonicTable =
    "\003aaa\003aad\003aam\003aas\003adc\004adcb\004adcl\004adcq\004adcw\004"
    "adcx\005adcxl\005adcxq\003add\004addb\004addl\005addpd\005addps\004addq"
    "\005addsd\005addss\010addsubpd\010addsubps\004addw\004adox\005adoxl\005"
    "adoxq\006aesdec\naesdeclast\006aesenc\naesenclast\006aesimc\017aeskeyge"
    "nassist\003and\004andb\004andl\004andn\005andnl\006andnpd\006andnps\005"
    "andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bextrl\006b"
    "extrq\007blcfill\004blci\005blcic\006blcmsk\004blcs\007blendpd\007blend"
    "ps\010blendvpd\010blendvps\007blsfill\004blsi\005blsic\005blsil\005blsi"
    "q\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl\005"
    "bndcn\005bndcu\006bndldx\005bndmk\006bndmov\006bndstx\005bound\003bsf\004"
    "bsfl\004bsfq\004bsfw\003bsr\004bsrl\004bsrq\004bsrw\005bswap\006bswapl\006"
    "bswapq\002bt\003btc\004btcl\004btcq\004btcw\003btl\003btq\003btr\004btr"
    "l\004btrq\004btrw\003bts\004btsl\004btsq\004btsw\003btw\004bzhi\005bzhi"
    "l\005bzhiq\004call\005calll\005callq\005callw\004cbtw\003cbw\003cdq\004"
    "cdqe\004clac\003clc\003cld\007clflush\nclflushopt\004clgi\003cli\004clr"
    "b\004clrl\004clrq\004clrw\004cltd\004cltq\004clts\004clwb\006clzero\003"
    "cmc\005cmova\006cmovae\007cmovael\007cmovaeq\007cmovaew\006cmoval\006cm"
    "ovaq\006cmovaw\005cmovb\006cmovbe\007cmovbel\007cmovbeq\007cmovbew\006c"
    "movbl\006cmovbq\006cmovbw\005cmove\006cmovel\006cmoveq\006cmovew\005cmo"
    "vg\006cmovge\007cmovgel\007cmovgeq\007cmovgew\006cmovgl\006cmovgq\006cm"
    "ovgw\005cmovl\006cmovle\007cmovlel\007cmovleq\007cmovlew\006cmovll\006c"
    "movlq\006cmovlw\006cmovne\007cmovnel\007cmovneq\007cmovnew\006cmovno\007"
    "cmovnol\007cmovnoq\007cmovnow\006cmovnp\007cmovnpl\007cmovnpq\007cmovnp"
    "w\006cmovns\007cmovnsl\007cmovnsq\007cmovnsw\005cmovo\006cmovol\006cmov"
    "oq\006cmovow\005cmovp\006cmovpl\006cmovpq\006cmovpw\005cmovs\006cmovsl\006"
    "cmovsq\006cmovsw\003cmp\004cmpb\004cmpl\005cmppd\005cmpps\004cmpq\004cm"
    "ps\005cmpsb\005cmpsd\005cmpsl\005cmpsq\005cmpss\005cmpsw\004cmpw\007cmp"
    "xchg\ncmpxchg16b\tcmpxchg8b\010cmpxchgb\010cmpxchgl\010cmpxchgq\010cmpx"
    "chgw\006comisd\006comiss\005cpuid\003cqo\004cqto\005crc32\006crc32b\006"
    "crc32l\006crc32q\006crc32w\002cs\010cvtdq2pd\010cvtdq2ps\010cvtpd2dq\010"
    "cvtpd2pi\010cvtpd2ps\010cvtpi2pd\010cvtpi2ps\010cvtps2dq\010cvtps2pd\010"
    "cvtps2pi\010cvtsd2si\tcvtsd2sil\tcvtsd2siq\010cvtsd2ss\010cvtsi2sd\tcvt"
    "si2sdl\tcvtsi2sdq\010cvtsi2ss\tcvtsi2ssl\tcvtsi2ssq\010cvtss2sd\010cvts"
    "s2si\tcvtss2sil\tcvtss2siq\tcvttpd2dq\tcvttpd2pi\tcvttps2dq\tcvttps2pi\t"
    "cvttsd2si\ncvttsd2sil\ncvttsd2siq\tcvttss2si\ncvttss2sil\ncvttss2siq\003"
    "cwd\004cwde\004cwtd\004cwtl\003daa\003das\006data16\003dec\004decb\004d"
    "ecl\004decq\004decw\003div\004divb\004divl\005divpd\005divps\004divq\005"
    "divsd\005divss\004divw\004dppd\004dpps\002ds\004emms\005encls\005enclu\005"
    "enter\002es\textractps\005extrq\005f2xm1\004fabs\004fadd\005faddl\005fa"
    "ddp\005fadds\004fbld\005fbstp\004fchs\006fcmovb\007fcmovbe\006fcmove\007"
    "fcmovnb\010fcmovnbe\007fcmovne\007fcmovnu\006fcmovu\004fcom\005fcomi\005"
    "fcoml\005fcomp\006fcompi\006fcompl\006fcompp\006fcomps\005fcoms\004fcos"
    "\007fdecstp\015fdisi8087_nop\004fdiv\005fdivl\005fdivp\005fdivr\006fdiv"
    "rl\006fdivrp\006fdivrs\005fdivs\005femms\014feni8087_nop\005ffree\006ff"
    "reep\005fiadd\006fiaddl\006fiadds\005ficom\006ficoml\006ficomp\007ficom"
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    "4x2\014vinserti64x4\tvinsertps\006vlddqu\010vldmxcsr\013vmaskmovdqu\nvm"
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    "vmload\007vmmcall\007vmovapd\tvmovapd.s\007vmovaps\tvmovaps.s\005vmovd\010"
    "vmovddup\007vmovdqa\tvmovdqa32\013vmovdqa32.s\tvmovdqa64\013vmovdqa64.s"
    "\007vmovdqu\tvmovdqu16\013vmovdqu16.s\tvmovdqu32\013vmovdqu32.s\tvmovdq"
    "u64\013vmovdqu64.s\010vmovdqu8\nvmovdqu8.s\010vmovhlps\007vmovhpd\007vm"
    "ovhps\010vmovlhps\007vmovlpd\007vmovlps\tvmovmskpd\tvmovmskps\010vmovnt"
    "dq\tvmovntdqa\010vmovntpd\010vmovntps\005vmovq\007vmovq.s\006vmovsd\010"
    "vmovsd.s\tvmovshdup\tvmovsldup\006vmovss\010vmovss.s\007vmovupd\tvmovup"
    "d.s\007vmovups\tvmovups.s\010vmpsadbw\007vmptrld\007vmptrst\006vmread\007"
    "vmreadl\007vmreadq\010vmresume\005vmrun\006vmsave\006vmulpd\006vmulps\006"
    "vmulsd\006vmulss\007vmwrite\010vmwritel\010vmwriteq\006vmxoff\005vmxon\005"
    "vorpd\005vorps\006vpabsb\006vpabsd\006vpabsq\006vpabsw\tvpackssdw\tvpac"
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    "vpaddsw\010vpaddusb\010vpaddusw\006vpaddw\010vpalignr\005vpand\006vpand"
    "d\006vpandn\007vpandnd\007vpandnq\006vpandq\006vpavgb\006vpavgw\010vpbl"
    "endd\tvpblendmb\tvpblendmd\tvpblendmq\tvpblendmw\tvpblendvb\010vpblendw"
    "\014vpbroadcastb\014vpbroadcastd\017vpbroadcastmb2q\017vpbroadcastmw2d\014"
    "vpbroadcastq\014vpbroadcastw\015vpclmulhqhqdq\015vpclmulhqlqdq\015vpclm"
    "ullqhqdq\015vpclmullqlqdq\nvpclmulqdq\006vpcmov\005vpcmp\006vpcmpb\006v"
    "pcmpd\010vpcmpeqb\010vpcmpeqd\010vpcmpeqq\010vpcmpeqw\nvpcmpestri\nvpcm"
    "pestrm\010vpcmpgtb\010vpcmpgtd\010vpcmpgtq\010vpcmpgtw\nvpcmpistri\nvpc"
    "mpistrm\006vpcmpq\007vpcmpub\007vpcmpud\007vpcmpuq\007vpcmpuw\006vpcmpw"
    "\005vpcom\006vpcomb\006vpcomd\013vpcompressd\013vpcompressq\006vpcomq\007"
    "vpcomub\007vpcomud\007vpcomuq\007vpcomuw\006vpcomw\013vpconflictd\013vp"
    "conflictq\nvperm2f128\nvperm2i128\006vpermb\006vpermd\010vpermi2b\010vp"
    "ermi2d\tvpermi2pd\tvpermi2ps\010vpermi2q\010vpermi2w\nvpermil2pd\nvperm"
    "il2ps\tvpermilpd\tvpermilps\007vpermpd\007vpermps\006vpermq\010vpermt2b"
    "\010vpermt2d\tvpermt2pd\tvpermt2ps\010vpermt2q\010vpermt2w\006vpermw\tv"
    "pexpandd\tvpexpandq\007vpextrb\007vpextrd\007vpextrq\007vpextrw\tvpextr"
    "w.s\nvpgatherdd\nvpgatherdq\nvpgatherqd\nvpgatherqq\010vphaddbd\010vpha"
    "ddbq\010vphaddbw\007vphaddd\010vphadddq\010vphaddsw\tvphaddubd\tvphaddu"
    "bq\tvphaddubw\tvphaddudq\tvphadduwd\tvphadduwq\007vphaddw\010vphaddwd\010"
    "vphaddwq\013vphminposuw\010vphsubbw\007vphsubd\010vphsubdq\010vphsubsw\007"
    "vphsubw\010vphsubwd\007vpinsrb\007vpinsrd\007vpinsrq\007vpinsrw\010vplz"
    "cntd\010vplzcntq\010vpmacsdd\tvpmacsdqh\tvpmacsdql\tvpmacssdd\nvpmacssd"
    "qh\nvpmacssdql\tvpmacsswd\tvpmacssww\010vpmacswd\010vpmacsww\nvpmadcssw"
    "d\tvpmadcswd\013vpmadd52huq\013vpmadd52luq\nvpmaddubsw\010vpmaddwd\nvpm"
    "askmovd\nvpmaskmovq\007vpmaxsb\007vpmaxsd\007vpmaxsq\007vpmaxsw\007vpma"
    "xub\007vpmaxud\007vpmaxuq\007vpmaxuw\007vpminsb\007vpminsd\007vpminsq\007"
    "vpminsw\007vpminub\007vpminud\007vpminuq\007vpminuw\010vpmovb2m\010vpmo"
    "vd2m\007vpmovdb\007vpmovdw\010vpmovm2b\010vpmovm2d\010vpmovm2q\010vpmov"
    "m2w\tvpmovmskb\010vpmovq2m\007vpmovqb\007vpmovqd\007vpmovqw\010vpmovsdb"
    "\010vpmovsdw\010vpmovsqb\010vpmovsqd\010vpmovsqw\010vpmovswb\tvpmovsxbd"
    "\tvpmovsxbq\tvpmovsxbw\tvpmovsxdq\tvpmovsxwd\tvpmovsxwq\tvpmovusdb\tvpm"
    "ovusdw\tvpmovusqb\tvpmovusqd\tvpmovusqw\tvpmovuswb\010vpmovw2m\007vpmov"
    "wb\tvpmovzxbd\tvpmovzxbq\tvpmovzxbw\tvpmovzxdq\tvpmovzxwd\tvpmovzxwq\007"
    "vpmuldq\tvpmulhrsw\010vpmulhuw\007vpmulhw\007vpmulld\007vpmullq\007vpmu"
    "llw\016vpmultishiftqb\010vpmuludq\004vpor\005vpord\005vporq\006vpperm\006"
    "vprold\006vprolq\007vprolvd\007vprolvq\006vprord\006vprorq\007vprorvd\007"
    "vprorvq\006vprotb\006vprotd\006vprotq\006vprotw\007vpsadbw\013vpscatter"
    "dd\013vpscatterdq\013vpscatterqd\013vpscatterqq\006vpshab\006vpshad\006"
    "vpshaq\006vpshaw\006vpshlb\006vpshld\006vpshlq\006vpshlw\007vpshufb\007"
    "vpshufd\010vpshufhw\010vpshuflw\007vpsignb\007vpsignd\007vpsignw\006vps"
    "lld\007vpslldq\006vpsllq\007vpsllvd\007vpsllvq\007vpsllvw\006vpsllw\006"
    "vpsrad\006vpsraq\007vpsravd\007vpsravq\007vpsravw\006vpsraw\006vpsrld\007"
    "vpsrldq\006vpsrlq\007vpsrlvd\007vpsrlvq\007vpsrlvw\006vpsrlw\006vpsubb\006"
    "vpsubd\006vpsubq\007vpsubsb\007vpsubsw\010vpsubusb\010vpsubusw\006vpsub"
    "w\nvpternlogd\nvpternlogq\006vptest\010vptestmb\010vptestmd\010vptestmq"
    "\010vptestmw\tvptestnmb\tvptestnmd\tvptestnmq\tvptestnmw\nvpunpckhbw\nv"
    "punpckhdq\013vpunpckhqdq\nvpunpckhwd\nvpunpcklbw\nvpunpckldq\013vpunpck"
    "lqdq\nvpunpcklwd\005vpxor\006vpxord\006vpxorq\010vrangepd\010vrangeps\010"
    "vrangesd\010vrangess\010vrcp14pd\010vrcp14ps\010vrcp14sd\010vrcp14ss\010"
    "vrcp28pd\010vrcp28ps\010vrcp28sd\010vrcp28ss\006vrcpps\006vrcpss\tvredu"
    "cepd\tvreduceps\tvreducesd\tvreducess\013vrndscalepd\013vrndscaleps\013"
    "vrndscalesd\013vrndscaless\010vroundpd\010vroundps\010vroundsd\010vroun"
    "dss\nvrsqrt14pd\nvrsqrt14ps\nvrsqrt14sd\nvrsqrt14ss\nvrsqrt28pd\nvrsqrt"
    "28ps\nvrsqrt28sd\nvrsqrt28ss\010vrsqrtps\010vrsqrtss\tvscalefpd\tvscale"
    "fps\tvscalefsd\tvscalefss\013vscatterdpd\013vscatterdps\016vscatterpf0d"
    "pd\016vscatterpf0dps\016vscatterpf0qpd\016vscatterpf0qps\016vscatterpf1"
    "dpd\016vscatterpf1dps\016vscatterpf1qpd\016vscatterpf1qps\013vscatterqp"
    "d\013vscatterqps\nvshuff32x4\nvshuff64x2\nvshufi32x4\nvshufi64x2\007vsh"
    "ufpd\007vshufps\007vsqrtpd\007vsqrtps\007vsqrtsd\007vsqrtss\010vstmxcsr"
    "\006vsubpd\006vsubps\006vsubsd\006vsubss\007vtestpd\007vtestps\010vucom"
    "isd\010vucomiss\tvunpckhpd\tvunpckhps\tvunpcklpd\tvunpcklps\006vxorpd\006"
    "vxorps\010vzeroall\nvzeroupper\004wait\006wbinvd\010wrfsbase\twrfsbasel"
    "\twrfsbaseq\010wrgsbase\twrgsbasel\twrgsbaseq\005wrmsr\006wrpkru\006xab"
    "ort\010xacquire\004xadd\005xaddb\005xaddl\005xaddq\005xaddw\006xbegin\004"
    "xchg\005xchgb\005xchgl\005xchgq\005xchgw\txcryptcbc\txcryptcfb\txcryptc"
    "tr\txcryptecb\txcryptofb\004xend\006xgetbv\005xlatb\003xor\004xorb\004x"
    "orl\005xorpd\005xorps\004xorq\004xorw\010xrelease\006xrstor\010xrstor64"
    "\007xrstors\txrstors64\005xsave\007xsave64\006xsavec\010xsavec64\010xsa"
    "veopt\nxsaveopt64\006xsaves\010xsaves64\006xsetbv\005xsha1\007xsha256\006"
    "xstore\txstorerng\005xtest";

namespace {
  struct MatchEntry {
    uint16_t Mnemonic;
    uint16_t Opcode;
    uint16_t ConvertFn;
    uint16_t RequiredFeatures;
    uint8_t Classes[9];
    StringRef getMnemonic() const {
      return StringRef(MnemonicTable + Mnemonic + 1,
                       MnemonicTable[Mnemonic]);
    }
  };

  // Predicate for searching for an opcode.
  struct LessOpcode {
    bool operator()(const MatchEntry &LHS, StringRef RHS) {
      return LHS.getMnemonic() < RHS;
    }
    bool operator()(StringRef LHS, const MatchEntry &RHS) {
      return LHS < RHS.getMnemonic();
    }
    bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
      return LHS.getMnemonic() < RHS.getMnemonic();
    }
  };
} // end anonymous namespace.

static const MatchEntry MatchTable0[] = {
  { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
  { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
  { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
  { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
  { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 20 /* adcb */, X86::ADC8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 20 /* adcb */, X86::ADC8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 25 /* adcl */, X86::ADC32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
  { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 25 /* adcl */, X86::ADC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 25 /* adcl */, X86::ADC32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 25 /* adcl */, X86::ADC32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 30 /* adcq */, X86::ADC64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 30 /* adcq */, X86::ADC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 30 /* adcq */, X86::ADC64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
  { 30 /* adcq */, X86::ADC64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 30 /* adcq */, X86::ADC64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 30 /* adcq */, X86::ADC64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 30 /* adcq */, X86::ADC64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 30 /* adcq */, X86::ADC64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 30 /* adcq */, X86::ADC64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 35 /* adcw */, X86::ADC16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
  { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 35 /* adcw */, X86::ADC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 35 /* adcw */, X86::ADC16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 35 /* adcw */, X86::ADC16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 51 /* adcxq */, X86::ADCX64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 51 /* adcxq */, X86::ADCX64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 61 /* addb */, X86::ADD8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 61 /* addb */, X86::ADD8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 66 /* addl */, X86::ADD32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
  { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 66 /* addl */, X86::ADD32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 66 /* addl */, X86::ADD32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 66 /* addl */, X86::ADD32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 83 /* addq */, X86::ADD64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 83 /* addq */, X86::ADD64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 83 /* addq */, X86::ADD64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
  { 83 /* addq */, X86::ADD64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 83 /* addq */, X86::ADD64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 83 /* addq */, X86::ADD64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 83 /* addq */, X86::ADD64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 83 /* addq */, X86::ADD64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 118 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 118 /* addw */, X86::ADD16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
  { 118 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 118 /* addw */, X86::ADD16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 118 /* addw */, X86::ADD16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 118 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 118 /* addw */, X86::ADD16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 118 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 128 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 134 /* adoxq */, X86::ADOX64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 134 /* adoxq */, X86::ADOX64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 203 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 203 /* andb */, X86::AND8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 203 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 203 /* andb */, X86::AND8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 203 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 208 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 208 /* andl */, X86::AND32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
  { 208 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 208 /* andl */, X86::AND32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 208 /* andl */, X86::AND32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 208 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 208 /* andl */, X86::AND32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
  { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 238 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 238 /* andnq */, X86::ANDN64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
  { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 256 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 256 /* andq */, X86::AND64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 256 /* andq */, X86::AND64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
  { 256 /* andq */, X86::AND64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 256 /* andq */, X86::AND64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 256 /* andq */, X86::AND64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 256 /* andq */, X86::AND64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 256 /* andq */, X86::AND64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 256 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 261 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 261 /* andw */, X86::AND16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
  { 261 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 261 /* andw */, X86::AND16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 261 /* andw */, X86::AND16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 261 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 261 /* andw */, X86::AND16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
  { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
  { 271 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
  { 271 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
  { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
  { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
  { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 284 /* bextrq */, X86::BEXTR64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 284 /* bextrq */, X86::BEXTR64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 291 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 299 /* blci */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 299 /* blci */, X86::BLCI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 299 /* blci */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 299 /* blci */, X86::BLCI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 304 /* blcic */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 304 /* blcic */, X86::BLCIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 304 /* blcic */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 304 /* blcic */, X86::BLCIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 310 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 310 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 310 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 310 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 317 /* blcs */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 317 /* blcs */, X86::BLCS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 317 /* blcs */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 317 /* blcs */, X86::BLCS64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 322 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 322 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 330 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 330 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
  { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
  { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
  { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
  { 356 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 356 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 356 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 356 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 369 /* blsic */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 369 /* blsic */, X86::BLSIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 369 /* blsic */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 369 /* blsic */, X86::BLSIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 375 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 375 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 381 /* blsiq */, X86::BLSI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 381 /* blsiq */, X86::BLSI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 394 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 394 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 402 /* blsmskq */, X86::BLSMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 402 /* blsmskq */, X86::BLSMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 415 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 415 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 421 /* blsrq */, X86::BLSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 421 /* blsrq */, X86::BLSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 427 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
  { 427 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
  { 427 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
  { 427 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
  { 433 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
  { 433 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
  { 433 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
  { 433 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
  { 439 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
  { 439 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
  { 439 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
  { 439 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
  { 445 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_BNDR }, },
  { 452 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
  { 452 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
  { 458 /* bndmov */, X86::BNDMOVMRrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
  { 458 /* bndmov */, X86::BNDMOVRMrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
  { 458 /* bndmov */, X86::BNDMOVMR64mr, Convert__Mem1285_1__Reg1_0, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
  { 458 /* bndmov */, X86::BNDMOVMR32mr, Convert__Mem645_1__Reg1_0, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
  { 458 /* bndmov */, X86::BNDMOVRM64rm, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
  { 458 /* bndmov */, X86::BNDMOVRM32rm, Convert__Reg1_1__Mem645_0, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
  { 465 /* bndstx */, X86::BNDSTXmr, Convert__Mem645_1__Reg1_0, 0, { MCK_BNDR, MCK_Mem64 }, },
  { 472 /* bound */, X86::BOUNDS16rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_GR16 }, },
  { 472 /* bound */, X86::BOUNDS32rm, Convert__Reg1_1__Mem645_0, Feature_Not64BitMode, { MCK_Mem64, MCK_GR32 }, },
  { 482 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 482 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 487 /* bsfq */, X86::BSF64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 487 /* bsfq */, X86::BSF64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 492 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 492 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 501 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 501 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 506 /* bsrq */, X86::BSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 506 /* bsrq */, X86::BSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 511 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 511 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 522 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 529 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 536 /* bt */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 539 /* btc */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 543 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 543 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 543 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 543 /* btcl */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 548 /* btcq */, X86::BTC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 548 /* btcq */, X86::BTC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 548 /* btcq */, X86::BTC64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 548 /* btcq */, X86::BTC64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 553 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 553 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 553 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 553 /* btcw */, X86::BTC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 558 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 558 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 558 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 558 /* btl */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 562 /* btq */, X86::BT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 562 /* btq */, X86::BT64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 562 /* btq */, X86::BT64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 562 /* btq */, X86::BT64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 566 /* btr */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 570 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 570 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 570 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 570 /* btrl */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 575 /* btrq */, X86::BTR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 575 /* btrq */, X86::BTR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 575 /* btrq */, X86::BTR64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 575 /* btrq */, X86::BTR64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 580 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 580 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 580 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 580 /* btrw */, X86::BTR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 585 /* bts */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 589 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 589 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 589 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 589 /* btsl */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 594 /* btsq */, X86::BTS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 594 /* btsq */, X86::BTS64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 594 /* btsq */, X86::BTS64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 594 /* btsq */, X86::BTS64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 599 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 599 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 599 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 599 /* btsw */, X86::BTS16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 604 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 604 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 604 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 604 /* btw */, X86::BT16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 613 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 613 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 619 /* bzhiq */, X86::BZHI64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 619 /* bzhiq */, X86::BZHI64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 625 /* call */, X86::CALL16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
  { 625 /* call */, X86::CALL32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
  { 625 /* call */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
  { 625 /* call */, X86::FARCALL16i, Convert__Imm1_2__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 625 /* call */, X86::FARCALL32i, Convert__Imm1_2__Imm1_0, Feature_Not16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 630 /* calll */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
  { 630 /* calll */, X86::CALL32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
  { 630 /* calll */, X86::CALL32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
  { 630 /* calll */, X86::FARCALL32i, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 636 /* callq */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
  { 636 /* callq */, X86::CALL64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
  { 636 /* callq */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
  { 642 /* callw */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 642 /* callw */, X86::CALL16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
  { 642 /* callw */, X86::CALL16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
  { 642 /* callw */, X86::FARCALL16i, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 648 /* cbtw */, X86::CBW, Convert_NoOperands, 0, {  }, },
  { 666 /* clac */, X86::CLAC, Convert_NoOperands, 0, {  }, },
  { 671 /* clc */, X86::CLC, Convert_NoOperands, 0, {  }, },
  { 675 /* cld */, X86::CLD, Convert_NoOperands, 0, {  }, },
  { 679 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 687 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 698 /* clgi */, X86::CLGI, Convert_NoOperands, 0, {  }, },
  { 703 /* cli */, X86::CLI, Convert_NoOperands, 0, {  }, },
  { 707 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR8 }, },
  { 712 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR32 }, },
  { 717 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR64 }, },
  { 722 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR16 }, },
  { 727 /* cltd */, X86::CDQ, Convert_NoOperands, 0, {  }, },
  { 732 /* cltq */, X86::CDQE, Convert_NoOperands, 0, {  }, },
  { 737 /* clts */, X86::CLTS, Convert_NoOperands, 0, {  }, },
  { 742 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 747 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, {  }, },
  { 754 /* cmc */, X86::CMC, Convert_NoOperands, 0, {  }, },
  { 771 /* cmovael */, X86::CMOVAE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 771 /* cmovael */, X86::CMOVAE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 779 /* cmovaeq */, X86::CMOVAE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 779 /* cmovaeq */, X86::CMOVAE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 787 /* cmovaew */, X86::CMOVAE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 787 /* cmovaew */, X86::CMOVAE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 795 /* cmoval */, X86::CMOVA32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 795 /* cmoval */, X86::CMOVA32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 802 /* cmovaq */, X86::CMOVA64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 802 /* cmovaq */, X86::CMOVA64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 809 /* cmovaw */, X86::CMOVA16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 809 /* cmovaw */, X86::CMOVA16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 829 /* cmovbel */, X86::CMOVBE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 829 /* cmovbel */, X86::CMOVBE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 837 /* cmovbeq */, X86::CMOVBE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 837 /* cmovbeq */, X86::CMOVBE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 845 /* cmovbew */, X86::CMOVBE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 845 /* cmovbew */, X86::CMOVBE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 853 /* cmovbl */, X86::CMOVB32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 853 /* cmovbl */, X86::CMOVB32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 860 /* cmovbq */, X86::CMOVB64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 860 /* cmovbq */, X86::CMOVB64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 867 /* cmovbw */, X86::CMOVB16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 867 /* cmovbw */, X86::CMOVB16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 880 /* cmovel */, X86::CMOVE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 880 /* cmovel */, X86::CMOVE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 887 /* cmoveq */, X86::CMOVE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 887 /* cmoveq */, X86::CMOVE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 894 /* cmovew */, X86::CMOVE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 894 /* cmovew */, X86::CMOVE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 914 /* cmovgel */, X86::CMOVGE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 914 /* cmovgel */, X86::CMOVGE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 922 /* cmovgeq */, X86::CMOVGE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 922 /* cmovgeq */, X86::CMOVGE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 930 /* cmovgew */, X86::CMOVGE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 930 /* cmovgew */, X86::CMOVGE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 938 /* cmovgl */, X86::CMOVG32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 938 /* cmovgl */, X86::CMOVG32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 945 /* cmovgq */, X86::CMOVG64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 945 /* cmovgq */, X86::CMOVG64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 952 /* cmovgw */, X86::CMOVG16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 952 /* cmovgw */, X86::CMOVG16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 972 /* cmovlel */, X86::CMOVLE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 972 /* cmovlel */, X86::CMOVLE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 980 /* cmovleq */, X86::CMOVLE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 980 /* cmovleq */, X86::CMOVLE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 988 /* cmovlew */, X86::CMOVLE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 988 /* cmovlew */, X86::CMOVLE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 996 /* cmovll */, X86::CMOVL32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 996 /* cmovll */, X86::CMOVL32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1003 /* cmovlq */, X86::CMOVL64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1003 /* cmovlq */, X86::CMOVL64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1010 /* cmovlw */, X86::CMOVL16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1010 /* cmovlw */, X86::CMOVL16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1024 /* cmovnel */, X86::CMOVNE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1024 /* cmovnel */, X86::CMOVNE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1032 /* cmovneq */, X86::CMOVNE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1032 /* cmovneq */, X86::CMOVNE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1040 /* cmovnew */, X86::CMOVNE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1040 /* cmovnew */, X86::CMOVNE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1055 /* cmovnol */, X86::CMOVNO32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1055 /* cmovnol */, X86::CMOVNO32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1063 /* cmovnoq */, X86::CMOVNO64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1063 /* cmovnoq */, X86::CMOVNO64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1071 /* cmovnow */, X86::CMOVNO16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1071 /* cmovnow */, X86::CMOVNO16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1086 /* cmovnpl */, X86::CMOVNP32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1086 /* cmovnpl */, X86::CMOVNP32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1094 /* cmovnpq */, X86::CMOVNP64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1094 /* cmovnpq */, X86::CMOVNP64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1102 /* cmovnpw */, X86::CMOVNP16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1102 /* cmovnpw */, X86::CMOVNP16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1117 /* cmovnsl */, X86::CMOVNS32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1117 /* cmovnsl */, X86::CMOVNS32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1125 /* cmovnsq */, X86::CMOVNS64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1125 /* cmovnsq */, X86::CMOVNS64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1133 /* cmovnsw */, X86::CMOVNS16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1133 /* cmovnsw */, X86::CMOVNS16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1147 /* cmovol */, X86::CMOVO32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1147 /* cmovol */, X86::CMOVO32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1154 /* cmovoq */, X86::CMOVO64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1154 /* cmovoq */, X86::CMOVO64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1161 /* cmovow */, X86::CMOVO16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1161 /* cmovow */, X86::CMOVO16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1174 /* cmovpl */, X86::CMOVP32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1174 /* cmovpl */, X86::CMOVP32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1181 /* cmovpq */, X86::CMOVP64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1181 /* cmovpq */, X86::CMOVP64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1188 /* cmovpw */, X86::CMOVP16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1188 /* cmovpw */, X86::CMOVP16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1201 /* cmovsl */, X86::CMOVS32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1201 /* cmovsl */, X86::CMOVS32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1208 /* cmovsq */, X86::CMOVS64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1208 /* cmovsq */, X86::CMOVS64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1215 /* cmovsw */, X86::CMOVS16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1215 /* cmovsw */, X86::CMOVS16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1222 /* cmp */, X86::CMPPDrri, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPPDrmi, Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPPSrri, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPPSrmi, Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPSDrr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPSDrm, Convert__Reg1_3__Tie0__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPSSrr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPSSrm, Convert__Reg1_3__Tie0__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32 }, },
  { 1226 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 1226 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 1226 /* cmpb */, X86::CMP8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 1226 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 1226 /* cmpb */, X86::CMP8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 1226 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 1231 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1231 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1231 /* cmpl */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
  { 1231 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 1231 /* cmpl */, X86::CMP32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 1231 /* cmpl */, X86::CMP32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 1231 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 1231 /* cmpl */, X86::CMP32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 1231 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1236 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 1236 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 1242 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 1242 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 1248 /* cmpq */, X86::CMP64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1248 /* cmpq */, X86::CMP64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1248 /* cmpq */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
  { 1248 /* cmpq */, X86::CMP64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 1248 /* cmpq */, X86::CMP64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 1248 /* cmpq */, X86::CMP64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 1248 /* cmpq */, X86::CMP64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 1248 /* cmpq */, X86::CMP64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 1248 /* cmpq */, X86::CMP64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1253 /* cmps */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
  { 1253 /* cmps */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
  { 1253 /* cmps */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
  { 1253 /* cmps */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
  { 1258 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
  { 1264 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 1264 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
  { 1270 /* cmpsl */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
  { 1276 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, 0, { MCK_DstIdx64, MCK_SrcIdx64 }, },
  { 1282 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 1282 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
  { 1288 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
  { 1294 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1294 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1294 /* cmpw */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
  { 1294 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 1294 /* cmpw */, X86::CMP16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 1294 /* cmpw */, X86::CMP16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 1294 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 1294 /* cmpw */, X86::CMP16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 1294 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1307 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, 0, { MCK_Mem128 }, },
  { 1318 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 1328 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 1328 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 1337 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1337 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1346 /* cmpxchgq */, X86::CMPXCHG64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1346 /* cmpxchgq */, X86::CMPXCHG64rm, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1355 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 1355 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1364 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1364 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1371 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1371 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 1378 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, {  }, },
  { 1388 /* cqto */, X86::CQO, Convert_NoOperands, 0, {  }, },
  { 1399 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
  { 1399 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
  { 1399 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
  { 1399 /* crc32b */, X86::CRC32r64m8, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
  { 1406 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 1406 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1413 /* crc32q */, X86::CRC32r64r64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 1413 /* crc32q */, X86::CRC32r64m64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1420 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
  { 1420 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
  { 1427 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 1430 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1430 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1439 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1439 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 1448 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1448 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 1457 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
  { 1457 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
  { 1466 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1466 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 1475 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
  { 1475 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1484 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
  { 1484 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1493 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1493 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 1502 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1502 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1511 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
  { 1511 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1529 /* cvtsd2sil */, X86::CVTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 1529 /* cvtsd2sil */, X86::CVTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
  { 1539 /* cvtsd2siq */, X86::CVTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 1539 /* cvtsd2siq */, X86::CVTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1549 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1549 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1558 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 1567 /* cvtsi2sdl */, X86::CVTSI2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
  { 1567 /* cvtsi2sdl */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 1577 /* cvtsi2sdq */, X86::CVTSI2SD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
  { 1577 /* cvtsi2sdq */, X86::CVTSI2SD64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1587 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 1596 /* cvtsi2ssl */, X86::CVTSI2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
  { 1596 /* cvtsi2ssl */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 1606 /* cvtsi2ssq */, X86::CVTSI2SS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
  { 1606 /* cvtsi2ssq */, X86::CVTSI2SS64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1616 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1616 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
  { 1634 /* cvtss2sil */, X86::CVTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 1634 /* cvtss2sil */, X86::CVTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1644 /* cvtss2siq */, X86::CVTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 1644 /* cvtss2siq */, X86::CVTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
  { 1654 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1654 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 1664 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
  { 1664 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
  { 1674 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1674 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 1684 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
  { 1684 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1704 /* cvttsd2sil */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 1704 /* cvttsd2sil */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
  { 1715 /* cvttsd2siq */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 1715 /* cvttsd2siq */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
  { 1736 /* cvttss2sil */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 1736 /* cvttss2sil */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1747 /* cvttss2siq */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 1747 /* cvttss2siq */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
  { 1767 /* cwtd */, X86::CWD, Convert_NoOperands, 0, {  }, },
  { 1772 /* cwtl */, X86::CWDE, Convert_NoOperands, 0, {  }, },
  { 1777 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 1781 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 1785 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, 0, {  }, },
  { 1796 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
  { 1796 /* decb */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 1801 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 1801 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 1801 /* decl */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 1806 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 1806 /* decq */, X86::DEC64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 1811 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
  { 1811 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
  { 1811 /* decw */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 1820 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 1820 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 1820 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
  { 1820 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
  { 1825 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 1825 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 1825 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
  { 1825 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
  { 1830 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1830 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 1836 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1836 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 1842 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 1842 /* divq */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 1842 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
  { 1842 /* divq */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
  { 1847 /* divsd */, X86::DIVSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1847 /* divsd */, X86::DIVSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 1853 /* divss */, X86::DIVSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1853 /* divss */, X86::DIVSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 1859 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 1859 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 1859 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
  { 1859 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
  { 1864 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 1864 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 1869 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 1869 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 1874 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 1877 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, {  }, },
  { 1882 /* encls */, X86::ENCLS, Convert_NoOperands, 0, {  }, },
  { 1888 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, {  }, },
  { 1894 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
  { 1900 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, {  }, },
  { 1903 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
  { 1903 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
  { 1913 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 1913 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 1919 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, {  }, },
  { 1925 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, {  }, },
  { 1930 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
  { 1930 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 1930 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 1930 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 1930 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 1935 /* faddl */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 1947 /* fadds */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 1953 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
  { 1958 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
  { 1964 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, {  }, },
  { 1969 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 1976 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 1984 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 1991 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 1999 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2008 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2016 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2024 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2031 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, {  }, },
  { 2031 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2031 /* fcom */, X86::ST_FCOMST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2036 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, {  }, },
  { 2036 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2036 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2036 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2042 /* fcoml */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2048 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, {  }, },
  { 2048 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2048 /* fcomp */, X86::ST_FCOMPST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2048 /* fcomp */, X86::ST_FCOMPST0r_alt, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2054 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, {  }, },
  { 2054 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2054 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2054 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2061 /* fcompl */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2068 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, {  }, },
  { 2075 /* fcomps */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2082 /* fcoms */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2088 /* fcos */, X86::COS_F, Convert_NoOperands, 0, {  }, },
  { 2093 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, {  }, },
  { 2101 /* fdisi8087_nop */, X86::fdisi8087_nop, Convert_NoOperands, 0, {  }, },
  { 2115 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2115 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2115 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2115 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2120 /* fdivl */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2126 /* fdivp */, X86::DIVR_FPrST0, Convert__regST1, 0, {  }, },
  { 2126 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2126 /* fdivp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2126 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2126 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2132 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2132 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2132 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2132 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2138 /* fdivrl */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2145 /* fdivrp */, X86::DIV_FPrST0, Convert__regST1, 0, {  }, },
  { 2145 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2145 /* fdivrp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2145 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2145 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2152 /* fdivrs */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2159 /* fdivs */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2165 /* femms */, X86::FEMMS, Convert_NoOperands, 0, {  }, },
  { 2171 /* feni8087_nop */, X86::feni8087_nop, Convert_NoOperands, 0, {  }, },
  { 2184 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2190 /* ffreep */, X86::FP_FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2203 /* fiaddl */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2210 /* fiadds */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2223 /* ficoml */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2237 /* ficompl */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2245 /* ficomps */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2253 /* ficoms */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2266 /* fidivl */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2280 /* fidivrl */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2288 /* fidivrs */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2296 /* fidivs */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2308 /* fildl */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2314 /* fildll */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2321 /* filds */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2333 /* fimull */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2340 /* fimuls */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2347 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, {  }, },
  { 2360 /* fistl */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2372 /* fistpl */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2379 /* fistpll */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2387 /* fistps */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2394 /* fists */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2407 /* fisttpl */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2415 /* fisttpll */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2424 /* fisttps */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2438 /* fisubl */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2452 /* fisubrl */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2460 /* fisubrs */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2468 /* fisubs */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2475 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2479 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, {  }, },
  { 2484 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2490 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2497 /* fldl */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2502 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, {  }, },
  { 2509 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, {  }, },
  { 2516 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, {  }, },
  { 2523 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, {  }, },
  { 2530 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, {  }, },
  { 2536 /* flds */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2541 /* fldt */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
  { 2546 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, {  }, },
  { 2551 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
  { 2551 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2551 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2551 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2551 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2556 /* fmull */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2568 /* fmuls */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2574 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, {  }, },
  { 2581 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, {  }, },
  { 2588 /* fnop */, X86::FNOP, Convert_NoOperands, 0, {  }, },
  { 2593 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2600 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2607 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2615 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, {  }, },
  { 2615 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AL }, },
  { 2615 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
  { 2615 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_EAX }, },
  { 2615 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2622 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, {  }, },
  { 2629 /* fprem */, X86::FPREM, Convert_NoOperands, 0, {  }, },
  { 2635 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, {  }, },
  { 2642 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, {  }, },
  { 2648 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, {  }, },
  { 2656 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2663 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 2666 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, {  }, },
  { 2673 /* fsetpm */, X86::FSETPM, Convert_NoOperands, 0, {  }, },
  { 2680 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, {  }, },
  { 2685 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, {  }, },
  { 2693 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, {  }, },
  { 2699 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2703 /* fstl */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2708 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2708 /* fstp */, X86::ST_FPST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2708 /* fstp */, X86::ST_FPST0r_alt, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2713 /* fstpl */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2719 /* fstpnce */, X86::ST_FPNCEST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2727 /* fstps */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2733 /* fstpt */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
  { 2739 /* fsts */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2744 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2744 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2744 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2744 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2749 /* fsubl */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2755 /* fsubp */, X86::SUBR_FPrST0, Convert__regST1, 0, {  }, },
  { 2755 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2755 /* fsubp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2755 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2755 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2761 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2761 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2761 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2761 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2767 /* fsubrl */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2774 /* fsubrp */, X86::SUB_FPrST0, Convert__regST1, 0, {  }, },
  { 2774 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2774 /* fsubrp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2774 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2774 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2781 /* fsubrs */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2788 /* fsubs */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2794 /* ftst */, X86::TST_F, Convert_NoOperands, 0, {  }, },
  { 2799 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, {  }, },
  { 2799 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2805 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, {  }, },
  { 2805 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2805 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2805 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2812 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, {  }, },
  { 2812 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2819 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, {  }, },
  { 2819 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2819 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2819 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2827 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, {  }, },
  { 2835 /* fxam */, X86::FXAM, Convert_NoOperands, 0, {  }, },
  { 2840 /* fxch */, X86::XCH_F, Convert__regST1, 0, {  }, },
  { 2840 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2840 /* fxch */, X86::ST_FXCHST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2840 /* fxch */, X86::ST_FXCHST0r_alt, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2845 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 2853 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 2863 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 2870 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 2879 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, {  }, },
  { 2887 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, {  }, },
  { 2893 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, {  }, },
  { 2901 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, {  }, },
  { 2908 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 2911 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 2911 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 2918 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 2918 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 2925 /* hlt */, X86::HLT, Convert_NoOperands, 0, {  }, },
  { 2929 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 2929 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 2936 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 2936 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 2943 /* icebp */, X86::INT1, Convert_NoOperands, 0, {  }, },
  { 2954 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 2954 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 2954 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
  { 2954 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
  { 2960 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 2960 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2960 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
  { 2960 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
  { 2966 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 2966 /* idivq */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2966 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
  { 2966 /* idivq */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
  { 2972 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 2972 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2972 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
  { 2972 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
  { 2983 /* imulb */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 2983 /* imulb */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 2989 /* imull */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 2989 /* imull */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2989 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 2989 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 2989 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 2989 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 2989 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
  { 2989 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, },
  { 2989 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
  { 2989 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
  { 2995 /* imulq */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 2995 /* imulq */, X86::IMUL64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2995 /* imulq */, X86::IMUL64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 2995 /* imulq */, X86::IMUL64rri8, Convert__Reg1_1__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 2995 /* imulq */, X86::IMUL64rri32, Convert__Reg1_1__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 2995 /* imulq */, X86::IMUL64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 2995 /* imulq */, X86::IMUL64rri8, Convert__Reg1_2__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64, MCK_GR64 }, },
  { 2995 /* imulq */, X86::IMUL64rmi8, Convert__Reg1_2__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64, MCK_GR64 }, },
  { 2995 /* imulq */, X86::IMUL64rri32, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
  { 2995 /* imulq */, X86::IMUL64rmi32, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
  { 3001 /* imulw */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 3001 /* imulw */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 3001 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 3001 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 3001 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 3001 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 3001 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
  { 3001 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, },
  { 3001 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
  { 3001 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16, MCK_GR16 }, },
  { 3010 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 3010 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 3010 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
  { 3010 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
  { 3018 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
  { 3018 /* incb */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 3023 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 3023 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 3023 /* incl */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 3028 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 3028 /* incq */, X86::INC64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 3033 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
  { 3033 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
  { 3033 /* incw */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 3038 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 3038 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 3038 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
  { 3038 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
  { 3042 /* ins */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
  { 3042 /* ins */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
  { 3042 /* ins */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
  { 3046 /* insb */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
  { 3056 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 3056 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
  { 3065 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 3065 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 3073 /* insl */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
  { 3078 /* insw */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
  { 3083 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 3087 /* int1 */, X86::INT1, Convert_NoOperands, 0, {  }, },
  { 3092 /* int3 */, X86::INT3, Convert_NoOperands, 0, {  }, },
  { 3097 /* into */, X86::INTO, Convert_NoOperands, 0, {  }, },
  { 3102 /* invd */, X86::INVD, Convert_NoOperands, 0, {  }, },
  { 3107 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
  { 3107 /* invept */, X86::INVEPT64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
  { 3114 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 3121 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ECX, MCK_EAX }, },
  { 3121 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_ECX, MCK_RAX }, },
  { 3129 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
  { 3129 /* invpcid */, X86::INVPCID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
  { 3137 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
  { 3137 /* invvpid */, X86::INVVPID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
  { 3145 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 3145 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 3145 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
  { 3145 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
  { 3160 /* iretl */, X86::IRET32, Convert_NoOperands, 0, {  }, },
  { 3166 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 3172 /* iretw */, X86::IRET16, Convert_NoOperands, 0, {  }, },
  { 3178 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3181 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3185 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3188 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3192 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
  { 3197 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3200 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3206 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3209 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3213 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3216 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3220 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3220 /* jmp */, X86::JMP16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
  { 3220 /* jmp */, X86::JMP32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
  { 3220 /* jmp */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
  { 3220 /* jmp */, X86::FARJMP16i, Convert__Imm1_2__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3220 /* jmp */, X86::FARJMP32i, Convert__Imm1_2__Imm1_0, Feature_Not16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3224 /* jmpl */, X86::JMP32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
  { 3224 /* jmpl */, X86::JMP32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
  { 3224 /* jmpl */, X86::FARJMP32i, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3229 /* jmpq */, X86::JMP64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
  { 3229 /* jmpq */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
  { 3234 /* jmpw */, X86::JMP16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
  { 3234 /* jmpw */, X86::JMP16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
  { 3234 /* jmpw */, X86::FARJMP16i, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3239 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3243 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3247 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3251 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3255 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3258 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3261 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
  { 3267 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3270 /* kaddb */, X86::KADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3276 /* kaddd */, X86::KADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3282 /* kaddq */, X86::KADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3288 /* kaddw */, X86::KADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3294 /* kandb */, X86::KANDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3300 /* kandd */, X86::KANDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3306 /* kandnb */, X86::KANDNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3313 /* kandnd */, X86::KANDNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3320 /* kandnq */, X86::KANDNQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3327 /* kandnw */, X86::KANDNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3334 /* kandq */, X86::KANDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3340 /* kandw */, X86::KANDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3346 /* kmovb */, X86::KMOVBkk, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3346 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_GR32 }, },
  { 3346 /* kmovb */, X86::KMOVBmk, Convert__Mem85_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_Mem8 }, },
  { 3346 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_GR32, MCK_VK1 }, },
  { 3346 /* kmovb */, X86::KMOVBkm, Convert__Reg1_1__Mem85_0, Feature_HasDQI, { MCK_Mem8, MCK_VK1 }, },
  { 3352 /* kmovd */, X86::KMOVDkk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3352 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_GR32 }, },
  { 3352 /* kmovd */, X86::KMOVDmk, Convert__Mem325_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_Mem32 }, },
  { 3352 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VK1 }, },
  { 3352 /* kmovd */, X86::KMOVDkm, Convert__Reg1_1__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK_VK1 }, },
  { 3358 /* kmovq */, X86::KMOVQkk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3358 /* kmovq */, X86::KMOVQrk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_GR64 }, },
  { 3358 /* kmovq */, X86::KMOVQmk, Convert__Mem645_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_Mem64 }, },
  { 3358 /* kmovq */, X86::KMOVQkr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR64, MCK_VK1 }, },
  { 3358 /* kmovq */, X86::KMOVQkm, Convert__Reg1_1__Mem645_0, Feature_HasBWI, { MCK_Mem64, MCK_VK1 }, },
  { 3364 /* kmovw */, X86::KMOVWkk, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
  { 3364 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_GR32 }, },
  { 3364 /* kmovw */, X86::KMOVWmk, Convert__Mem165_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_Mem16 }, },
  { 3364 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VK1 }, },
  { 3364 /* kmovw */, X86::KMOVWkm, Convert__Reg1_1__Mem165_0, Feature_HasAVX512, { MCK_Mem16, MCK_VK1 }, },
  { 3370 /* knotb */, X86::KNOTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3376 /* knotd */, X86::KNOTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3382 /* knotq */, X86::KNOTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3388 /* knotw */, X86::KNOTWrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
  { 3394 /* korb */, X86::KORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3399 /* kord */, X86::KORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3404 /* korq */, X86::KORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3409 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3418 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3427 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3436 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
  { 3445 /* korw */, X86::KORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3450 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
  { 3459 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
  { 3468 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
  { 3477 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
  { 3486 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
  { 3495 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
  { 3504 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
  { 3513 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
  { 3522 /* ktestb */, X86::KTESTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3529 /* ktestd */, X86::KTESTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3536 /* ktestq */, X86::KTESTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3543 /* ktestw */, X86::KTESTWrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3550 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3559 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3568 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3577 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3584 /* kxnord */, X86::KXNORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3591 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3598 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3605 /* kxorb */, X86::KXORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3611 /* kxord */, X86::KXORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3617 /* kxorq */, X86::KXORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3623 /* kxorw */, X86::KXORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3629 /* lahf */, X86::LAHF, Convert_NoOperands, 0, {  }, },
  { 3638 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 3638 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
  { 3643 /* larq */, X86::LAR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
  { 3643 /* larq */, X86::LAR64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
  { 3648 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 3648 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 3653 /* lcall */, X86::FARCALL32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
  { 3653 /* lcall */, X86::FARCALL16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
  { 3653 /* lcall */, X86::FARCALL32i, Convert__Imm1_2__Imm1_0, Feature_Not16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3653 /* lcall */, X86::FARCALL16i, Convert__Imm1_2__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3659 /* lcalll */, X86::FARCALL32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
  { 3659 /* lcalll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
  { 3666 /* lcallq */, X86::FARCALL64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
  { 3673 /* lcallw */, X86::FARCALL16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
  { 3673 /* lcallw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
  { 3680 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 3686 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 3698 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
  { 3703 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
  { 3712 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
  { 3712 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_GR32 }, },
  { 3717 /* leaq */, X86::LEA64r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
  { 3722 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 3722 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 3728 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
  { 3737 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
  { 3742 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
  { 3747 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, {  }, },
  { 3758 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
  { 3763 /* lfsq */, X86::LFS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
  { 3768 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
  { 3778 /* lgdtl */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 3784 /* lgdtq */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
  { 3790 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 3800 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
  { 3805 /* lgsq */, X86::LGS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
  { 3810 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
  { 3820 /* lidtl */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 3826 /* lidtq */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
  { 3832 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP32i, Convert__Imm1_2__Imm1_0, Feature_Not16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3838 /* ljmp */, X86::FARJMP16i, Convert__Imm1_2__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3843 /* ljmpl */, X86::FARJMP32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
  { 3843 /* ljmpl */, X86::FARJMP32i, Convert__Imm1_2__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3849 /* ljmpq */, X86::FARJMP64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
  { 3855 /* ljmpw */, X86::FARJMP16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
  { 3855 /* ljmpw */, X86::FARJMP16i, Convert__Imm1_2__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3866 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 3866 /* lldtw */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 3877 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 3877 /* lmsww */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 3883 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, {  }, },
  { 3888 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
  { 3888 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
  { 3888 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
  { 3888 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
  { 3888 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
  { 3888 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
  { 3888 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
  { 3888 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
  { 3893 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
  { 3893 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
  { 3905 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
  { 3905 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
  { 3911 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
  { 3911 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, 0, { MCK_SrcIdx64, MCK_RAX }, },
  { 3917 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
  { 3917 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
  { 3923 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3928 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3934 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3941 /* lretl */, X86::LRETL, Convert_NoOperands, 0, {  }, },
  { 3941 /* lretl */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 3947 /* lretq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 3947 /* lretq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
  { 3953 /* lretw */, X86::LRETW, Convert_NoOperands, 0, {  }, },
  { 3953 /* lretw */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 3963 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 3963 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 3968 /* lslq */, X86::LSL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 3968 /* lslq */, X86::LSL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 3973 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 3973 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 3982 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
  { 3987 /* lssq */, X86::LSS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
  { 3992 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
  { 4001 /* ltrw */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4001 /* ltrw */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4012 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 4012 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 4019 /* lzcntq */, X86::LZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 4019 /* lzcntq */, X86::LZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 4026 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 4026 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 4033 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
  { 4033 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
  { 4044 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
  { 4044 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
  { 4053 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4053 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4059 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4059 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4065 /* maxsd */, X86::MAXSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4065 /* maxsd */, X86::MAXSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4071 /* maxss */, X86::MAXSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4071 /* maxss */, X86::MAXSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 4077 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, {  }, },
  { 4084 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4084 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4090 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4090 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4096 /* minsd */, X86::MINSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4096 /* minsd */, X86::MINSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4102 /* minss */, X86::MINSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4102 /* minss */, X86::MINSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 4108 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, {  }, },
  { 4108 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
  { 4108 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
  { 4116 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, {  }, },
  { 4116 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
  { 4116 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
  { 4125 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, {  }, },
  { 4133 /* mov */, X86::MOV8o64a, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
  { 4133 /* mov */, X86::MOV16o64a, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
  { 4133 /* mov */, X86::MOV32o64a, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
  { 4133 /* mov */, X86::MOV64o64a, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
  { 4133 /* mov */, X86::MOV32ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
  { 4133 /* mov */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
  { 4133 /* mov */, X86::MOV16ao64, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
  { 4133 /* mov */, X86::MOV32ao64, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
  { 4133 /* mov */, X86::MOV64ao64, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
  { 4133 /* mov */, X86::MOV8ao64, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
  { 4133 /* mov */, X86::MOV32sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
  { 4144 /* movabsb */, X86::MOV8o64a, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
  { 4144 /* movabsb */, X86::MOV8ao64, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
  { 4152 /* movabsl */, X86::MOV32o64a, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
  { 4152 /* movabsl */, X86::MOV32ao64, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
  { 4160 /* movabsq */, X86::MOV64o64a, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
  { 4160 /* movabsq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
  { 4160 /* movabsq */, X86::MOV64ao64, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
  { 4168 /* movabsw */, X86::MOV16o64a, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
  { 4168 /* movabsw */, X86::MOV16ao64, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
  { 4176 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4176 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4176 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4183 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4183 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4183 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4190 /* movb */, X86::MOV8o16a, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
  { 4190 /* movb */, X86::MOV8o32a, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
  { 4190 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 4190 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 4190 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 4190 /* movb */, X86::MOV8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 4190 /* movb */, X86::MOV8ao16, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
  { 4190 /* movb */, X86::MOV8ao32, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
  { 4190 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 4201 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 4201 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 4208 /* movbeq */, X86::MOVBE64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 4208 /* movbeq */, X86::MOVBE64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 4215 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 4215 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 4222 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR32 }, },
  { 4222 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
  { 4222 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR64, MCK_Mem32 }, },
  { 4222 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 4222 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 4222 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
  { 4222 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR64 }, },
  { 4222 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
  { 4222 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
  { 4222 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
  { 4222 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
  { 4222 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 4227 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4227 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4235 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
  { 4243 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4243 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4243 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4250 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4250 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4250 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4257 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4265 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4265 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4272 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4272 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4279 /* movl */, X86::MOV32o16a, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
  { 4279 /* movl */, X86::MOV32o32a, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
  { 4279 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
  { 4279 /* movl */, X86::MOV32ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
  { 4279 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
  { 4279 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
  { 4279 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
  { 4279 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
  { 4279 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
  { 4279 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 4279 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 4279 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 4279 /* movl */, X86::MOV32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 4279 /* movl */, X86::MOV32ao16, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
  { 4279 /* movl */, X86::MOV32ao32, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
  { 4279 /* movl */, X86::MOV32sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
  { 4279 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 4284 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4292 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4292 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4299 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4299 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4306 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
  { 4315 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
  { 4324 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4332 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4348 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 4356 /* movntiq */, X86::MOVNTI_64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 4364 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4372 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4380 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4387 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4395 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
  { 4403 /* movq */, X86::MOV64o32a, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
  { 4403 /* movq */, X86::MOV64rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
  { 4403 /* movq */, X86::MOV64ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
  { 4403 /* movq */, X86::MOV64rd, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
  { 4403 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4403 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
  { 4403 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4403 /* movq */, X86::MOV64rc, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
  { 4403 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4403 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 4403 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4403 /* movq */, X86::MOV64sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
  { 4403 /* movq */, X86::MOV64dr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
  { 4403 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
  { 4403 /* movq */, X86::MOV64cr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
  { 4403 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
  { 4403 /* movq */, X86::MOV64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 4403 /* movq */, X86::MOV64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 4403 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 4403 /* movq */, X86::MOV64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 4403 /* movq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
  { 4403 /* movq */, X86::MOV64ao32, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
  { 4403 /* movq */, X86::MOV64sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
  { 4403 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4403 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4403 /* movq */, X86::MOV64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 4408 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
  { 4416 /* movs */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
  { 4416 /* movs */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
  { 4416 /* movs */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
  { 4416 /* movs */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
  { 4421 /* movsb */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
  { 4427 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
  { 4427 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
  { 4434 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
  { 4434 /* movsbq */, X86::MOVSX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
  { 4441 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
  { 4441 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
  { 4448 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4448 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4448 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4454 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4454 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4463 /* movsl */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
  { 4469 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4469 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4478 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR32, MCK_GR64 }, },
  { 4478 /* movslq */, X86::MOVSX64rm32, Convert__Reg1_1__Mem325_0, Feature_In64BitMode, { MCK_Mem32, MCK_GR64 }, },
  { 4485 /* movsq */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, 0, { MCK_SrcIdx64, MCK_DstIdx64 }, },
  { 4491 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4491 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
  { 4491 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 4497 /* movsw */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
  { 4503 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
  { 4503 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
  { 4510 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
  { 4510 /* movswq */, X86::MOVSX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
  { 4517 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
  { 4517 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
  { 4517 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
  { 4517 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
  { 4517 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
  { 4517 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
  { 4517 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
  { 4530 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4530 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4530 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4537 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4537 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4537 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4544 /* movw */, X86::MOV16o16a, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
  { 4544 /* movw */, X86::MOV16o32a, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
  { 4544 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
  { 4544 /* movw */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
  { 4544 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
  { 4544 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 4544 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 4544 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 4544 /* movw */, X86::MOV16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 4544 /* movw */, X86::MOV16ao16, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
  { 4544 /* movw */, X86::MOV16ao32, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
  { 4544 /* movw */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
  { 4544 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 4549 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
  { 4549 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
  { 4556 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
  { 4556 /* movzbq */, X86::MOVZX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
  { 4563 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
  { 4563 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
  { 4570 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
  { 4570 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
  { 4577 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
  { 4577 /* movzwq */, X86::MOVZX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
  { 4584 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
  { 4584 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
  { 4584 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
  { 4584 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
  { 4584 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
  { 4584 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
  { 4590 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 4590 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 4602 /* mulb */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 4602 /* mulb */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 4607 /* mull */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4607 /* mull */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4612 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4612 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4618 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4618 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4624 /* mulq */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 4624 /* mulq */, X86::MUL64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 4629 /* mulsd */, X86::MULSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4629 /* mulsd */, X86::MULSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4635 /* mulss */, X86::MULSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4635 /* mulss */, X86::MULSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 4641 /* mulw */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4641 /* mulw */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4651 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 4651 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
  { 4657 /* mulxq */, X86::MULX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 4657 /* mulxq */, X86::MULX64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
  { 4663 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, {  }, },
  { 4663 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
  { 4663 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX }, },
  { 4669 /* mwaitx */, X86::MWAITXrr, Convert_NoOperands, 0, {  }, },
  { 4669 /* mwaitx */, X86::MWAITXrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EBX }, },
  { 4669 /* mwaitx */, X86::MWAITXrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RBX }, },
  { 4680 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
  { 4680 /* negb */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 4685 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 4685 /* negl */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4690 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 4690 /* negq */, X86::NEG64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 4695 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
  { 4695 /* negw */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOP, Convert_NoOperands, 0, {  }, },
  { 4700 /* nop */, X86::NOOP19rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 4704 /* nopl */, X86::NOOP18_r4, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4704 /* nopl */, X86::NOOP18_r5, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4704 /* nopl */, X86::NOOP18_r6, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4704 /* nopl */, X86::NOOP18_r7, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4704 /* nopl */, X86::NOOP18_m4, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4704 /* nopl */, X86::NOOP18_m5, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4704 /* nopl */, X86::NOOP18_m6, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4704 /* nopl */, X86::NOOP18_m7, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4704 /* nopl */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4704 /* nopl */, X86::NOOPL_19, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4704 /* nopl */, X86::NOOPL_1c, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4704 /* nopl */, X86::NOOPL_1d, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4704 /* nopl */, X86::NOOPL_1e, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4709 /* nopw */, X86::NOOP18_16r4, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4709 /* nopw */, X86::NOOP18_16r5, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4709 /* nopw */, X86::NOOP18_16r6, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4709 /* nopw */, X86::NOOP18_16r7, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4709 /* nopw */, X86::NOOP18_16m4, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4709 /* nopw */, X86::NOOP18_16m5, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4709 /* nopw */, X86::NOOP18_16m6, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4709 /* nopw */, X86::NOOP18_16m7, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4709 /* nopw */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4709 /* nopw */, X86::NOOPW_19, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4709 /* nopw */, X86::NOOPW_1c, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4709 /* nopw */, X86::NOOPW_1d, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4709 /* nopw */, X86::NOOPW_1e, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4718 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
  { 4718 /* notb */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 4723 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 4723 /* notl */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4728 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 4728 /* notq */, X86::NOT64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 4733 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
  { 4733 /* notw */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4741 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 4741 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 4741 /* orb */, X86::OR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 4741 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 4741 /* orb */, X86::OR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 4741 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 4745 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 4745 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 4745 /* orl */, X86::OR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
  { 4745 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 4745 /* orl */, X86::OR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 4745 /* orl */, X86::OR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 4745 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 4745 /* orl */, X86::OR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 4745 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 4749 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4749 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4754 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4754 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4759 /* orq */, X86::OR64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 4759 /* orq */, X86::OR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 4759 /* orq */, X86::OR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
  { 4759 /* orq */, X86::OR64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 4759 /* orq */, X86::OR64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 4759 /* orq */, X86::OR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 4759 /* orq */, X86::OR64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 4759 /* orq */, X86::OR64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 4759 /* orq */, X86::OR64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 4763 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 4763 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 4763 /* orw */, X86::OR16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
  { 4763 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 4763 /* orw */, X86::OR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 4763 /* orw */, X86::OR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 4763 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 4763 /* orw */, X86::OR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 4763 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 4771 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 4771 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 4771 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
  { 4771 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
  { 4776 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 4776 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 4776 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
  { 4776 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
  { 4781 /* outs */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
  { 4781 /* outs */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
  { 4781 /* outs */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
  { 4786 /* outsb */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
  { 4798 /* outsl */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
  { 4804 /* outsw */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
  { 4810 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 4810 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 4810 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
  { 4810 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
  { 4815 /* pabsb */, X86::MMX_PABSBrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4815 /* pabsb */, X86::PABSBrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4815 /* pabsb */, X86::PABSBrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4815 /* pabsb */, X86::MMX_PABSBrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4821 /* pabsd */, X86::MMX_PABSDrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4821 /* pabsd */, X86::PABSDrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4821 /* pabsd */, X86::PABSDrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4821 /* pabsd */, X86::MMX_PABSDrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4827 /* pabsw */, X86::MMX_PABSWrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4827 /* pabsw */, X86::PABSWrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4827 /* pabsw */, X86::PABSWrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4827 /* pabsw */, X86::MMX_PABSWrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4833 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4833 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4833 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4833 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4842 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4842 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4842 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4842 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4851 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4851 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4860 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4860 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4860 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4860 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4869 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4869 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4869 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4869 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4875 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4875 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4875 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4875 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4881 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4881 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4881 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4881 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4887 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4887 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4887 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4887 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4894 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4894 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4894 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4894 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4901 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4901 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4901 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4901 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4909 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4909 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4909 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4909 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4917 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4917 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4917 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4917 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4923 /* palignr */, X86::MMX_PALIGNR64irr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
  { 4923 /* palignr */, X86::PALIGNR128rr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 4923 /* palignr */, X86::PALIGNR128rm, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 4923 /* palignr */, X86::MMX_PALIGNR64irm, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
  { 4931 /* pand */, X86::MMX_PANDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4931 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4931 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4931 /* pand */, X86::MMX_PANDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4936 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4936 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4936 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4936 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4942 /* pause */, X86::PAUSE, Convert_NoOperands, 0, {  }, },
  { 4948 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4948 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4948 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4948 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4954 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4954 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4962 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 4962 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4962 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4962 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4968 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 4968 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4968 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
  { 4968 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
  { 4977 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 4977 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 4985 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
  { 4985 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4998 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4998 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5011 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
  { 5011 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5024 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5024 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5037 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 5037 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 5047 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5047 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5047 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5047 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5055 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5055 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5055 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5055 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5063 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5063 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5071 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5071 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5071 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5071 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5079 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 5079 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 5089 /* pcmpestrm */, X86::PCMPESTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 5089 /* pcmpestrm */, X86::PCMPESTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 5099 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5099 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5099 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5099 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5107 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5107 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5107 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5107 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5115 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5115 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5123 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5123 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5123 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5123 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5131 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 5131 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 5141 /* pcmpistrm */, X86::PCMPISTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 5141 /* pcmpistrm */, X86::PCMPISTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 5151 /* pcommit */, X86::PCOMMIT, Convert_NoOperands, 0, {  }, },
  { 5164 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 5164 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
  { 5170 /* pdepq */, X86::PDEP64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 5170 /* pdepq */, X86::PDEP64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
  { 5181 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 5181 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
  { 5187 /* pextq */, X86::PEXT64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 5187 /* pextq */, X86::PEXT64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
  { 5193 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
  { 5193 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
  { 5200 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
  { 5200 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
  { 5207 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
  { 5207 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
  { 5214 /* pextrw */, X86::MMX_PEXTRWirri, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, },
  { 5214 /* pextrw */, X86::PEXTRWri, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
  { 5214 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
  { 5221 /* pf2id */, X86::PF2IDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5221 /* pf2id */, X86::PF2IDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5227 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5227 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5233 /* pfacc */, X86::PFACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5233 /* pfacc */, X86::PFACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5239 /* pfadd */, X86::PFADDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5239 /* pfadd */, X86::PFADDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5245 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5245 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5253 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5253 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5261 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5261 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5269 /* pfmax */, X86::PFMAXrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5269 /* pfmax */, X86::PFMAXrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5275 /* pfmin */, X86::PFMINrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5275 /* pfmin */, X86::PFMINrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5281 /* pfmul */, X86::PFMULrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5281 /* pfmul */, X86::PFMULrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5287 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5287 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5294 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5294 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5302 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5302 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5308 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5308 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5317 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5317 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5326 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5326 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5335 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5335 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5343 /* pfsub */, X86::PFSUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5343 /* pfsub */, X86::PFSUBrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5349 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5349 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5356 /* phaddd */, X86::MMX_PHADDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5356 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5356 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5356 /* phaddd */, X86::MMX_PHADDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5363 /* phaddsw */, X86::MMX_PHADDSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5363 /* phaddsw */, X86::PHADDSWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5363 /* phaddsw */, X86::PHADDSWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5363 /* phaddsw */, X86::MMX_PHADDSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5371 /* phaddw */, X86::MMX_PHADDWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5371 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5371 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5371 /* phaddw */, X86::MMX_PHADDWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5378 /* phminposuw */, X86::PHMINPOSUWrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5378 /* phminposuw */, X86::PHMINPOSUWrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5389 /* phsubd */, X86::MMX_PHSUBDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5389 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5389 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5389 /* phsubd */, X86::MMX_PHSUBDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5396 /* phsubsw */, X86::MMX_PHSUBSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5396 /* phsubsw */, X86::PHSUBSWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5396 /* phsubsw */, X86::PHSUBSWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5396 /* phsubsw */, X86::MMX_PHSUBSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5404 /* phsubw */, X86::MMX_PHSUBWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5404 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5404 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5404 /* phsubw */, X86::MMX_PHSUBWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5411 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5411 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5417 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5417 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5423 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
  { 5423 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, },
  { 5430 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
  { 5430 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
  { 5437 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, },
  { 5437 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
  { 5444 /* pinsrw */, X86::MMX_PINSRWirri, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, },
  { 5444 /* pinsrw */, X86::PINSRWrri, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
  { 5444 /* pinsrw */, X86::MMX_PINSRWirmi, Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_VR64 }, },
  { 5444 /* pinsrw */, X86::PINSRWrmi, Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, },
  { 5451 /* pmaddubsw */, X86::MMX_PMADDUBSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5451 /* pmaddubsw */, X86::PMADDUBSWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5451 /* pmaddubsw */, X86::PMADDUBSWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5451 /* pmaddubsw */, X86::MMX_PMADDUBSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5461 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5461 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5461 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5461 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5469 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5469 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5476 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5476 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5483 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5483 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5483 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5483 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5490 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5490 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5490 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5490 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5497 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5497 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5504 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5504 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5511 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5511 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5518 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5518 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5525 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5525 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5525 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5525 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5532 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5532 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5532 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5532 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5539 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5539 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5546 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5546 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5553 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR64, MCK_GR32orGR64 }, },
  { 5553 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
  { 5562 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5562 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 5571 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5571 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
  { 5580 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5580 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 5589 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5589 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 5598 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5598 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 5607 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5607 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 5616 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5616 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 5625 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5625 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
  { 5634 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5634 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 5643 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5643 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 5652 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5652 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 5661 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5661 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 5670 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5670 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5677 /* pmulhrsw */, X86::MMX_PMULHRSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5677 /* pmulhrsw */, X86::PMULHRSWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5677 /* pmulhrsw */, X86::PMULHRSWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5677 /* pmulhrsw */, X86::MMX_PMULHRSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5686 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5686 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5694 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5694 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5694 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5694 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5702 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5702 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5702 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5702 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5709 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5709 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5716 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5716 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5716 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5716 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5723 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5723 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5723 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5723 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5735 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 5741 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 5754 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 5754 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 5762 /* popcntq */, X86::POPCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 5762 /* popcntq */, X86::POPCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 5770 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 5770 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 5789 /* popfl */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 5795 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 5801 /* popfw */, X86::POPF16, Convert_NoOperands, 0, {  }, },
  { 5807 /* popl */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
  { 5807 /* popl */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
  { 5807 /* popl */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
  { 5807 /* popl */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
  { 5807 /* popl */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
  { 5807 /* popl */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 5807 /* popl */, X86::POP32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 5807 /* popl */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
  { 5812 /* popq */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
  { 5812 /* popq */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
  { 5812 /* popq */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 5812 /* popq */, X86::POP64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 5812 /* popq */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
  { 5817 /* popw */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
  { 5817 /* popw */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
  { 5817 /* popw */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
  { 5817 /* popw */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
  { 5817 /* popw */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
  { 5817 /* popw */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 5817 /* popw */, X86::POP16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 5817 /* popw */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 5822 /* por */, X86::MMX_PORirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5822 /* por */, X86::PORrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5822 /* por */, X86::PORrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5822 /* por */, X86::MMX_PORirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5826 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5835 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5847 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5858 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5869 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5880 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5890 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5890 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5890 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5890 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5897 /* pshufb */, X86::MMX_PSHUFBrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5897 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5897 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5897 /* pshufb */, X86::MMX_PSHUFBrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5904 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 5904 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 5911 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 5911 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 5919 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 5919 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 5927 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
  { 5927 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
  { 5934 /* psignb */, X86::MMX_PSIGNBrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5934 /* psignb */, X86::PSIGNBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5934 /* psignb */, X86::PSIGNBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5934 /* psignb */, X86::MMX_PSIGNBrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5941 /* psignd */, X86::MMX_PSIGNDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5941 /* psignd */, X86::PSIGNDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5941 /* psignd */, X86::PSIGNDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5941 /* psignd */, X86::MMX_PSIGNDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5948 /* psignw */, X86::MMX_PSIGNWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5948 /* psignw */, X86::PSIGNWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5948 /* psignw */, X86::PSIGNWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5948 /* psignw */, X86::MMX_PSIGNWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5955 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5955 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5955 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
  { 5955 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 5955 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5955 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5961 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 5968 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5968 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5968 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
  { 5968 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 5968 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5968 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5974 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5974 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5974 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
  { 5974 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 5974 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5974 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5980 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5980 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5980 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
  { 5980 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 5980 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5980 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5986 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5986 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5986 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
  { 5986 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 5986 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5986 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5992 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 5992 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5992 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
  { 5992 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 5992 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 5992 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 5998 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 6005 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6005 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6005 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
  { 6005 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 6005 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6005 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6011 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6011 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6011 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
  { 6011 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
  { 6011 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6011 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6017 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6017 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6017 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6017 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6023 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6023 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6023 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6023 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6029 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6029 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6029 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6029 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6035 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6035 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6035 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6035 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6042 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6042 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6042 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6042 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6049 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6049 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6049 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6049 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6057 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6057 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6057 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6057 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6065 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6065 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6065 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6065 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6071 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6071 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6078 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6078 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6084 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6084 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6084 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6084 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6094 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6094 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6094 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6094 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6104 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6104 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6115 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6115 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6115 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6115 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6125 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6125 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6125 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6125 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6135 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6135 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6135 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6135 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6145 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6145 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6156 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6156 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6156 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6156 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6171 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 6178 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 6198 /* pushfl */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 6205 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 6212 /* pushfw */, X86::PUSHF16, Convert_NoOperands, 0, {  }, },
  { 6219 /* pushl */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
  { 6219 /* pushl */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
  { 6219 /* pushl */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
  { 6219 /* pushl */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
  { 6219 /* pushl */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
  { 6219 /* pushl */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
  { 6219 /* pushl */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 6219 /* pushl */, X86::PUSH32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 6219 /* pushl */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
  { 6219 /* pushl */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
  { 6219 /* pushl */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
  { 6225 /* pushq */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
  { 6225 /* pushq */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
  { 6225 /* pushq */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 6225 /* pushq */, X86::PUSH64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 6225 /* pushq */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
  { 6225 /* pushq */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
  { 6225 /* pushq */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
  { 6231 /* pushw */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
  { 6231 /* pushw */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
  { 6231 /* pushw */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
  { 6231 /* pushw */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
  { 6231 /* pushw */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
  { 6231 /* pushw */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
  { 6231 /* pushw */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 6231 /* pushw */, X86::PUSH16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 6231 /* pushw */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
  { 6231 /* pushw */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 6231 /* pushw */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 6237 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
  { 6237 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6237 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6237 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
  { 6246 /* rclb */, X86::RCL8r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR8 }, },
  { 6246 /* rclb */, X86::RCL8m1, Convert__Mem85_1, 0, { MCK__36_1, MCK_Mem8 }, },
  { 6246 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
  { 6246 /* rclb */, X86::RCL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
  { 6246 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
  { 6246 /* rclb */, X86::RCL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
  { 6251 /* rcll */, X86::RCL32r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR32 }, },
  { 6251 /* rcll */, X86::RCL32m1, Convert__Mem325_1, 0, { MCK__36_1, MCK_Mem32 }, },
  { 6251 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
  { 6251 /* rcll */, X86::RCL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
  { 6251 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
  { 6251 /* rcll */, X86::RCL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
  { 6256 /* rclq */, X86::RCL64r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR64 }, },
  { 6256 /* rclq */, X86::RCL64m1, Convert__Mem645_1, 0, { MCK__36_1, MCK_Mem64 }, },
  { 6256 /* rclq */, X86::RCL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
  { 6256 /* rclq */, X86::RCL64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
  { 6256 /* rclq */, X86::RCL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
  { 6256 /* rclq */, X86::RCL64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
  { 6261 /* rclw */, X86::RCL16r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR16 }, },
  { 6261 /* rclw */, X86::RCL16m1, Convert__Mem165_1, 0, { MCK__36_1, MCK_Mem16 }, },
  { 6261 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
  { 6261 /* rclw */, X86::RCL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
  { 6261 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
  { 6261 /* rclw */, X86::RCL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
  { 6266 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6266 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6272 /* rcpss */, X86::RCPSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6272 /* rcpss */, X86::RCPSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 6282 /* rcrb */, X86::RCR8r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR8 }, },
  { 6282 /* rcrb */, X86::RCR8m1, Convert__Mem85_1, 0, { MCK__36_1, MCK_Mem8 }, },
  { 6282 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
  { 6282 /* rcrb */, X86::RCR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
  { 6282 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
  { 6282 /* rcrb */, X86::RCR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
  { 6287 /* rcrl */, X86::RCR32r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR32 }, },
  { 6287 /* rcrl */, X86::RCR32m1, Convert__Mem325_1, 0, { MCK__36_1, MCK_Mem32 }, },
  { 6287 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
  { 6287 /* rcrl */, X86::RCR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
  { 6287 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
  { 6287 /* rcrl */, X86::RCR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
  { 6292 /* rcrq */, X86::RCR64r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR64 }, },
  { 6292 /* rcrq */, X86::RCR64m1, Convert__Mem645_1, 0, { MCK__36_1, MCK_Mem64 }, },
  { 6292 /* rcrq */, X86::RCR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
  { 6292 /* rcrq */, X86::RCR64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
  { 6292 /* rcrq */, X86::RCR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
  { 6292 /* rcrq */, X86::RCR64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
  { 6297 /* rcrw */, X86::RCR16r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR16 }, },
  { 6297 /* rcrw */, X86::RCR16m1, Convert__Mem165_1, 0, { MCK__36_1, MCK_Mem16 }, },
  { 6297 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
  { 6297 /* rcrw */, X86::RCR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
  { 6297 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
  { 6297 /* rcrw */, X86::RCR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
  { 6311 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
  { 6321 /* rdfsbaseq */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 6340 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
  { 6350 /* rdgsbaseq */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 6360 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, {  }, },
  { 6366 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, {  }, },
  { 6373 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, {  }, },
  { 6386 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 6394 /* rdrandq */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 6402 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 6417 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 6425 /* rdseedq */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 6433 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 6441 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, {  }, },
  { 6447 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, {  }, },
  { 6454 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, {  }, },
  { 6458 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, {  }, },
  { 6479 /* retl */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 6479 /* retl */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
  { 6484 /* retq */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 6484 /* retq */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
  { 6489 /* retw */, X86::RETW, Convert_NoOperands, 0, {  }, },
  { 6489 /* retw */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 6494 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 6504 /* rolb */, X86::ROL8r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR8 }, },
  { 6504 /* rolb */, X86::ROL8m1, Convert__Mem85_1, 0, { MCK__36_1, MCK_Mem8 }, },
  { 6504 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
  { 6504 /* rolb */, X86::ROL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
  { 6504 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
  { 6504 /* rolb */, X86::ROL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
  { 6509 /* roll */, X86::ROL32r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR32 }, },
  { 6509 /* roll */, X86::ROL32m1, Convert__Mem325_1, 0, { MCK__36_1, MCK_Mem32 }, },
  { 6509 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
  { 6509 /* roll */, X86::ROL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
  { 6509 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
  { 6509 /* roll */, X86::ROL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
  { 6514 /* rolq */, X86::ROL64r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR64 }, },
  { 6514 /* rolq */, X86::ROL64m1, Convert__Mem645_1, 0, { MCK__36_1, MCK_Mem64 }, },
  { 6514 /* rolq */, X86::ROL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
  { 6514 /* rolq */, X86::ROL64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
  { 6514 /* rolq */, X86::ROL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
  { 6514 /* rolq */, X86::ROL64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
  { 6519 /* rolw */, X86::ROL16r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR16 }, },
  { 6519 /* rolw */, X86::ROL16m1, Convert__Mem165_1, 0, { MCK__36_1, MCK_Mem16 }, },
  { 6519 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
  { 6519 /* rolw */, X86::ROL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
  { 6519 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
  { 6519 /* rolw */, X86::ROL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
  { 6528 /* rorb */, X86::ROR8r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR8 }, },
  { 6528 /* rorb */, X86::ROR8m1, Convert__Mem85_1, 0, { MCK__36_1, MCK_Mem8 }, },
  { 6528 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
  { 6528 /* rorb */, X86::ROR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
  { 6528 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
  { 6528 /* rorb */, X86::ROR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
  { 6533 /* rorl */, X86::ROR32r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR32 }, },
  { 6533 /* rorl */, X86::ROR32m1, Convert__Mem325_1, 0, { MCK__36_1, MCK_Mem32 }, },
  { 6533 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
  { 6533 /* rorl */, X86::ROR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
  { 6533 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
  { 6533 /* rorl */, X86::ROR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
  { 6538 /* rorq */, X86::ROR64r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR64 }, },
  { 6538 /* rorq */, X86::ROR64m1, Convert__Mem645_1, 0, { MCK__36_1, MCK_Mem64 }, },
  { 6538 /* rorq */, X86::ROR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
  { 6538 /* rorq */, X86::ROR64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
  { 6538 /* rorq */, X86::ROR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
  { 6538 /* rorq */, X86::ROR64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
  { 6543 /* rorw */, X86::ROR16r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR16 }, },
  { 6543 /* rorw */, X86::ROR16m1, Convert__Mem165_1, 0, { MCK__36_1, MCK_Mem16 }, },
  { 6543 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
  { 6543 /* rorw */, X86::ROR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
  { 6543 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
  { 6543 /* rorw */, X86::ROR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
  { 6553 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
  { 6553 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, },
  { 6559 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
  { 6559 /* rorxq */, X86::RORX64mi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_GR64 }, },
  { 6565 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 6565 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 6573 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 6573 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 6581 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 6581 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
  { 6589 /* roundss */, X86::ROUNDSSr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 6589 /* roundss */, X86::ROUNDSSm, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
  { 6597 /* rsm */, X86::RSM, Convert_NoOperands, 0, {  }, },
  { 6601 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6601 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6609 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6609 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 6617 /* sahf */, X86::SAHF, Convert_NoOperands, 0, {  }, },
  { 6622 /* salc */, X86::SALC, Convert_NoOperands, 0, {  }, },
  { 6631 /* sarb */, X86::SAR8r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR8 }, },
  { 6631 /* sarb */, X86::SAR8m1, Convert__Mem85_1, 0, { MCK__36_1, MCK_Mem8 }, },
  { 6631 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
  { 6631 /* sarb */, X86::SAR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
  { 6631 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
  { 6631 /* sarb */, X86::SAR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
  { 6636 /* sarl */, X86::SAR32r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR32 }, },
  { 6636 /* sarl */, X86::SAR32m1, Convert__Mem325_1, 0, { MCK__36_1, MCK_Mem32 }, },
  { 6636 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
  { 6636 /* sarl */, X86::SAR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
  { 6636 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
  { 6636 /* sarl */, X86::SAR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
  { 6641 /* sarq */, X86::SAR64r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR64 }, },
  { 6641 /* sarq */, X86::SAR64m1, Convert__Mem645_1, 0, { MCK__36_1, MCK_Mem64 }, },
  { 6641 /* sarq */, X86::SAR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
  { 6641 /* sarq */, X86::SAR64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
  { 6641 /* sarq */, X86::SAR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
  { 6641 /* sarq */, X86::SAR64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
  { 6646 /* sarw */, X86::SAR16r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR16 }, },
  { 6646 /* sarw */, X86::SAR16m1, Convert__Mem165_1, 0, { MCK__36_1, MCK_Mem16 }, },
  { 6646 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
  { 6646 /* sarw */, X86::SAR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
  { 6646 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
  { 6646 /* sarw */, X86::SAR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
  { 6656 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 6656 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 6662 /* sarxq */, X86::SARX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 6662 /* sarxq */, X86::SARX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 6672 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 6672 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 6672 /* sbbb */, X86::SBB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 6672 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 6672 /* sbbb */, X86::SBB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 6672 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 6677 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 6677 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 6677 /* sbbl */, X86::SBB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
  { 6677 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 6677 /* sbbl */, X86::SBB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 6677 /* sbbl */, X86::SBB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 6677 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 6677 /* sbbl */, X86::SBB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 6677 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 6682 /* sbbq */, X86::SBB64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 6682 /* sbbq */, X86::SBB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 6682 /* sbbq */, X86::SBB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
  { 6682 /* sbbq */, X86::SBB64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 6682 /* sbbq */, X86::SBB64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 6682 /* sbbq */, X86::SBB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 6682 /* sbbq */, X86::SBB64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 6682 /* sbbq */, X86::SBB64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 6682 /* sbbq */, X86::SBB64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 6687 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 6687 /* sbbw */, X86::SBB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 6687 /* sbbw */, X86::SBB16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
  { 6687 /* sbbw */, X86::SBB16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 6687 /* sbbw */, X86::SBB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 6687 /* sbbw */, X86::SBB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 6687 /* sbbw */, X86::SBB16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 6687 /* sbbw */, X86::SBB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 6687 /* sbbw */, X86::SBB16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 6692 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
  { 6692 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
  { 6692 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
  { 6692 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
  { 6692 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
  { 6692 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
  { 6692 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
  { 6692 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
  { 6697 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
  { 6697 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
  { 6709 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
  { 6709 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
  { 6715 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
  { 6715 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, 0, { MCK_DstIdx64, MCK_RAX }, },
  { 6721 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
  { 6721 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
  { 6727 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6727 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6732 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6732 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6738 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6738 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6743 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6743 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6749 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6749 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6754 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6754 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6759 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6759 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6765 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6765 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6770 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6770 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6776 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6776 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6782 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6782 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6788 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6788 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6794 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6794 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6800 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6800 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6805 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6805 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6810 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6810 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6815 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, {  }, },
  { 6827 /* sgdtl */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 6833 /* sgdtq */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
  { 6839 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 6845 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6845 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6854 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6854 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6863 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6863 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6873 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 6873 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 6883 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6883 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6894 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6894 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6905 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 6905 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 6905 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
  { 6905 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
  { 6921 /* shlb */, X86::SHL8r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR8 }, },
  { 6921 /* shlb */, X86::SHL8m1, Convert__Mem85_1, 0, { MCK__36_1, MCK_Mem8 }, },
  { 6921 /* shlb */, X86::SHL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
  { 6921 /* shlb */, X86::SHL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
  { 6921 /* shlb */, X86::SHL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
  { 6921 /* shlb */, X86::SHL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
  { 6931 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 6931 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 6931 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
  { 6931 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
  { 6931 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
  { 6931 /* shldl */, X86::SHLD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
  { 6937 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 6937 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 6937 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
  { 6937 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
  { 6937 /* shldq */, X86::SHLD64rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
  { 6937 /* shldq */, X86::SHLD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
  { 6943 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 6943 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 6943 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
  { 6943 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
  { 6943 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
  { 6943 /* shldw */, X86::SHLD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
  { 6949 /* shll */, X86::SHL32r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR32 }, },
  { 6949 /* shll */, X86::SHL32m1, Convert__Mem325_1, 0, { MCK__36_1, MCK_Mem32 }, },
  { 6949 /* shll */, X86::SHL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
  { 6949 /* shll */, X86::SHL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
  { 6949 /* shll */, X86::SHL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
  { 6949 /* shll */, X86::SHL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
  { 6954 /* shlq */, X86::SHL64r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR64 }, },
  { 6954 /* shlq */, X86::SHL64m1, Convert__Mem645_1, 0, { MCK__36_1, MCK_Mem64 }, },
  { 6954 /* shlq */, X86::SHL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
  { 6954 /* shlq */, X86::SHL64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
  { 6954 /* shlq */, X86::SHL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
  { 6954 /* shlq */, X86::SHL64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
  { 6959 /* shlw */, X86::SHL16r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR16 }, },
  { 6959 /* shlw */, X86::SHL16m1, Convert__Mem165_1, 0, { MCK__36_1, MCK_Mem16 }, },
  { 6959 /* shlw */, X86::SHL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
  { 6959 /* shlw */, X86::SHL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
  { 6959 /* shlw */, X86::SHL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
  { 6959 /* shlw */, X86::SHL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
  { 6969 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 6969 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 6975 /* shlxq */, X86::SHLX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 6975 /* shlxq */, X86::SHLX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 6985 /* shrb */, X86::SHR8r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR8 }, },
  { 6985 /* shrb */, X86::SHR8m1, Convert__Mem85_1, 0, { MCK__36_1, MCK_Mem8 }, },
  { 6985 /* shrb */, X86::SHR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
  { 6985 /* shrb */, X86::SHR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
  { 6985 /* shrb */, X86::SHR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
  { 6985 /* shrb */, X86::SHR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
  { 6995 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 6995 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 6995 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
  { 6995 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
  { 6995 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
  { 6995 /* shrdl */, X86::SHRD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
  { 7001 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 7001 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 7001 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
  { 7001 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
  { 7001 /* shrdq */, X86::SHRD64rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
  { 7001 /* shrdq */, X86::SHRD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
  { 7007 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 7007 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 7007 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
  { 7007 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
  { 7007 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
  { 7007 /* shrdw */, X86::SHRD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
  { 7013 /* shrl */, X86::SHR32r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR32 }, },
  { 7013 /* shrl */, X86::SHR32m1, Convert__Mem325_1, 0, { MCK__36_1, MCK_Mem32 }, },
  { 7013 /* shrl */, X86::SHR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
  { 7013 /* shrl */, X86::SHR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
  { 7013 /* shrl */, X86::SHR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
  { 7013 /* shrl */, X86::SHR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
  { 7018 /* shrq */, X86::SHR64r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR64 }, },
  { 7018 /* shrq */, X86::SHR64m1, Convert__Mem645_1, 0, { MCK__36_1, MCK_Mem64 }, },
  { 7018 /* shrq */, X86::SHR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
  { 7018 /* shrq */, X86::SHR64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
  { 7018 /* shrq */, X86::SHR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
  { 7018 /* shrq */, X86::SHR64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
  { 7023 /* shrw */, X86::SHR16r1, Convert__Reg1_1__Tie0, 0, { MCK__36_1, MCK_GR16 }, },
  { 7023 /* shrw */, X86::SHR16m1, Convert__Mem165_1, 0, { MCK__36_1, MCK_Mem16 }, },
  { 7023 /* shrw */, X86::SHR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
  { 7023 /* shrw */, X86::SHR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
  { 7023 /* shrw */, X86::SHR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
  { 7023 /* shrw */, X86::SHR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
  { 7033 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 7033 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 7039 /* shrxq */, X86::SHRX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 7039 /* shrxq */, X86::SHRX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 7045 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 7045 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 7052 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 7052 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 7064 /* sidtl */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 7070 /* sidtq */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
  { 7076 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 7082 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
  { 7089 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7094 /* sldtl */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 7100 /* sldtq */, X86::SLDT64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 7100 /* sldtq */, X86::SLDT64m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7106 /* sldtw */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 7106 /* sldtw */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7117 /* smswl */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 7123 /* smswq */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 7129 /* smsww */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 7129 /* smsww */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7135 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7135 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7142 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7142 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7149 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7149 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 7156 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7156 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 7163 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 7166 /* stac */, X86::STAC, Convert_NoOperands, 0, {  }, },
  { 7171 /* stc */, X86::STC, Convert_NoOperands, 0, {  }, },
  { 7175 /* std */, X86::STD, Convert_NoOperands, 0, {  }, },
  { 7179 /* stgi */, X86::STGI, Convert_NoOperands, 0, {  }, },
  { 7184 /* sti */, X86::STI, Convert_NoOperands, 0, {  }, },
  { 7188 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 7196 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
  { 7196 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
  { 7196 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
  { 7196 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
  { 7196 /* stos */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
  { 7196 /* stos */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
  { 7196 /* stos */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
  { 7196 /* stos */, X86::STOSQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
  { 7201 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
  { 7201 /* stosb */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
  { 7213 /* stosl */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
  { 7213 /* stosl */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
  { 7219 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
  { 7219 /* stosq */, X86::STOSQ, Convert__DstIdx641_1, 0, { MCK_RAX, MCK_DstIdx64 }, },
  { 7225 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
  { 7225 /* stosw */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
  { 7235 /* strl */, X86::STR32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 7240 /* strq */, X86::STR64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 7245 /* strw */, X86::STR16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 7245 /* strw */, X86::STRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7254 /* subb */, X86::SUB8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 7254 /* subb */, X86::SUB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 7254 /* subb */, X86::SUB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 7254 /* subb */, X86::SUB8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 7254 /* subb */, X86::SUB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 7254 /* subb */, X86::SUB8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 7259 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 7259 /* subl */, X86::SUB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 7259 /* subl */, X86::SUB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
  { 7259 /* subl */, X86::SUB32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 7259 /* subl */, X86::SUB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 7259 /* subl */, X86::SUB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 7259 /* subl */, X86::SUB32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 7259 /* subl */, X86::SUB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 7259 /* subl */, X86::SUB32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 7264 /* subpd */, X86::SUBPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7264 /* subpd */, X86::SUBPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7270 /* subps */, X86::SUBPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7270 /* subps */, X86::SUBPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7276 /* subq */, X86::SUB64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 7276 /* subq */, X86::SUB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 7276 /* subq */, X86::SUB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
  { 7276 /* subq */, X86::SUB64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 7276 /* subq */, X86::SUB64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 7276 /* subq */, X86::SUB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 7276 /* subq */, X86::SUB64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 7276 /* subq */, X86::SUB64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 7276 /* subq */, X86::SUB64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 7281 /* subsd */, X86::SUBSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7281 /* subsd */, X86::SUBSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 7287 /* subss */, X86::SUBSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7287 /* subss */, X86::SUBSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 7293 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 7293 /* subw */, X86::SUB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 7293 /* subw */, X86::SUB16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
  { 7293 /* subw */, X86::SUB16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 7293 /* subw */, X86::SUB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 7293 /* subw */, X86::SUB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 7293 /* subw */, X86::SUB16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 7293 /* subw */, X86::SUB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 7293 /* subw */, X86::SUB16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 7298 /* swapgs */, X86::SWAPGS, Convert_NoOperands, 0, {  }, },
  { 7305 /* syscall */, X86::SYSCALL, Convert_NoOperands, 0, {  }, },
  { 7313 /* sysenter */, X86::SYSENTER, Convert_NoOperands, 0, {  }, },
  { 7330 /* sysexitl */, X86::SYSEXIT, Convert_NoOperands, 0, {  }, },
  { 7339 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 7355 /* sysretl */, X86::SYSRET, Convert_NoOperands, 0, {  }, },
  { 7363 /* sysretq */, X86::SYSRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 7371 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 7371 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 7371 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 7371 /* t1mskc */, X86::T1MSKC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 7383 /* testb */, X86::TEST8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 7383 /* testb */, X86::TEST8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 7383 /* testb */, X86::TEST8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 7383 /* testb */, X86::TEST8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 7383 /* testb */, X86::TEST8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 7383 /* testb */, X86::TEST8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 7389 /* testl */, X86::TEST32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 7389 /* testl */, X86::TEST32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 7389 /* testl */, X86::TEST32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 7389 /* testl */, X86::TEST32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 7389 /* testl */, X86::TEST32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 7389 /* testl */, X86::TEST32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 7395 /* testq */, X86::TEST64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 7395 /* testq */, X86::TEST64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 7395 /* testq */, X86::TEST64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 7395 /* testq */, X86::TEST64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 7395 /* testq */, X86::TEST64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 7395 /* testq */, X86::TEST64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 7401 /* testw */, X86::TEST16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 7401 /* testw */, X86::TEST16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 7401 /* testw */, X86::TEST16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 7401 /* testw */, X86::TEST16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 7401 /* testw */, X86::TEST16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 7401 /* testw */, X86::TEST16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 7413 /* tzcntl */, X86::TZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 7413 /* tzcntl */, X86::TZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 7420 /* tzcntq */, X86::TZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 7420 /* tzcntq */, X86::TZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 7427 /* tzcntw */, X86::TZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 7427 /* tzcntw */, X86::TZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 7434 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 7434 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 7434 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 7434 /* tzmsk */, X86::TZMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 7440 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7440 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 7448 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7448 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 7456 /* ud2 */, X86::TRAP, Convert_NoOperands, 0, {  }, },
  { 7460 /* ud2b */, X86::UD2B, Convert_NoOperands, 0, {  }, },
  { 7465 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7465 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7474 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7474 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7483 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7483 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7492 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7492 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7501 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7501 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7501 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7501 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7501 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7501 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7508 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7508 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7508 /* vaddps */, X86::VADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7508 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7508 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7508 /* vaddps */, X86::VADDPSZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7508 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7515 /* vaddsd */, X86::VADDSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7515 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7515 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7515 /* vaddsd */, X86::VADDSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 7515 /* vaddsd */, X86::VADDSDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7515 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7515 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7515 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7515 /* vaddsd */, X86::VADDSDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7515 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7515 /* vaddsd */, X86::VADDSDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7522 /* vaddss */, X86::VADDSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7522 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7522 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7522 /* vaddss */, X86::VADDSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 7522 /* vaddss */, X86::VADDSSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7522 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7522 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7522 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7522 /* vaddss */, X86::VADDSSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7522 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7522 /* vaddss */, X86::VADDSSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7529 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7529 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7529 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7529 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7539 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7539 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7539 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7539 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7549 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7549 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7557 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7557 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7569 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7569 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7577 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7577 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7589 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7589 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 7597 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 7597 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7614 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7614 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7614 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7622 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7622 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 7622 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7622 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7630 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7630 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7638 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7638 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7638 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7638 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7638 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7646 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7646 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7646 /* vandpd */, X86::VANDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7646 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7646 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 7646 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7653 /* vandps */, X86::VANDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7653 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7653 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7653 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7653 /* vandps */, X86::VANDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7653 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7653 /* vandps */, X86::VANDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7653 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7653 /* vandps */, X86::VANDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7653 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 7653 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7680 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7680 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7680 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7680 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7689 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7689 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7689 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7689 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7698 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7698 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7698 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7698 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7708 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7708 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7708 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7708 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7718 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256r, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256m, Convert__Reg1_1__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_VR256X }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zm, Convert__Reg1_1__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK_VR512 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7765 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
  { 7765 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7765 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512 }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7797 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 7797 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7797 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7813 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128r, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256r, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128m, Convert__Reg1_1__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256m, Convert__Reg1_1__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_VR256X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zm, Convert__Reg1_1__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK_VR512 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7860 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
  { 7860 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7860 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512 }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7892 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 7892 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7892 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_1__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_VR256X }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_1__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_1__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_VR256X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPPDYrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDrmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDYrmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPPSYrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSrmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSYrmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPSDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPSDZrr_Int, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPSDZrm_Int, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPSDrm, Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPSSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPSSZrr_Int, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPSSZrm_Int, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPSSrm, Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPPDZrrib, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDZrmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSZrrib, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSZrmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPSDZrrb_Int, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPSSZrrb_Int, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPSDZrr_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPSDZrm_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPSSZrr_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPSSZrm_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZrribk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZrmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZrribk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZrmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPSDZrrb_Intk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7934 /* vcmp */, X86::VCMPSSZrrb_Intk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7939 /* vcmppd */, X86::VCMPPDYrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDYrmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrrib_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrrib_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7946 /* vcmpps */, X86::VCMPPSYrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSYrmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrrib_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrrib_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7953 /* vcmpsd */, X86::VCMPSDrr_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDrm_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrrb_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrrb_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7960 /* vcmpss */, X86::VCMPSSrr_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 7960 /* vcmpss */, X86::VCMPSSrm_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrrb_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrrb_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7967 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7967 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 7967 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 7967 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 7967 /* vcomisd */, X86::VCOMISDZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
  { 7975 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 7975 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 7975 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 7975 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 7975 /* vcomiss */, X86::VCOMISSZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_2__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8037 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8037 /* vcvtpd2dqx */, X86::VCVTPD2DQXrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 8037 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8037 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8037 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8048 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
  { 8048 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
  { 8048 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
  { 8048 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8048 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8069 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8069 /* vcvtpd2psx */, X86::VCVTPD2PSXrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 8069 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8069 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8069 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8080 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
  { 8080 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
  { 8080 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
  { 8080 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8080 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8112 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8112 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8112 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8124 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
  { 8124 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8124 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_2__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem128 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrb, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8239 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8239 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8239 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8250 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
  { 8250 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8250 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64Zrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64Zrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
  { 8271 /* vcvtsd2sil */, X86::VCVTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 8271 /* vcvtsd2sil */, X86::VCVTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
  { 8282 /* vcvtsd2siq */, X86::VCVTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 8282 /* vcvtsd2siq */, X86::VCVTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USIZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR32 }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_GR64 }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USIZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 8324 /* vcvtsi2sdl */, X86::VCVTSI2SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
  { 8324 /* vcvtsi2sdl */, X86::VCVTSI2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
  { 8324 /* vcvtsi2sdl */, X86::VCVTSI2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 8324 /* vcvtsi2sdl */, X86::VCVTSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 8324 /* vcvtsi2sdl */, X86::VCVTSI2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
  { 8335 /* vcvtsi2sdq */, X86::VCVTSI2SD64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
  { 8335 /* vcvtsi2sdq */, X86::VCVTSI642SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
  { 8335 /* vcvtsi2sdq */, X86::VCVTSI2SD64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 8335 /* vcvtsi2sdq */, X86::VCVTSI642SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 8335 /* vcvtsi2sdq */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 8356 /* vcvtsi2ssl */, X86::VCVTSI2SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
  { 8356 /* vcvtsi2ssl */, X86::VCVTSI2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
  { 8356 /* vcvtsi2ssl */, X86::VCVTSI2SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 8356 /* vcvtsi2ssl */, X86::VCVTSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 8356 /* vcvtsi2ssl */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
  { 8367 /* vcvtsi2ssq */, X86::VCVTSI2SS64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
  { 8367 /* vcvtsi2ssq */, X86::VCVTSI642SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
  { 8367 /* vcvtsi2ssq */, X86::VCVTSI2SS64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 8367 /* vcvtsi2ssq */, X86::VCVTSI642SSZrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 8367 /* vcvtsi2ssq */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64Zrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR64 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64Zrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
  { 8398 /* vcvtss2sil */, X86::VCVTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 8398 /* vcvtss2sil */, X86::VCVTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 8409 /* vcvtss2siq */, X86::VCVTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 8409 /* vcvtss2siq */, X86::VCVTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USIZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR32 }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_GR64 }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USIZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USI64Zrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8442 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8442 /* vcvttpd2dqx */, X86::VCVTTPD2DQXrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 8442 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8442 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8442 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8454 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
  { 8454 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
  { 8454 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
  { 8454 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8454 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8489 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8489 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8489 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8502 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
  { 8502 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8502 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_2__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasDQI, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_GR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_GR64 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
  { 8584 /* vcvttsd2sil */, X86::VCVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 8584 /* vcvttsd2sil */, X86::VCVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
  { 8596 /* vcvttsd2siq */, X86::VCVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 8596 /* vcvttsd2siq */, X86::VCVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_GR32 }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_GR64 }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USIZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_GR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_GR64 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64Zrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
  { 8631 /* vcvttss2sil */, X86::VCVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 8631 /* vcvttss2sil */, X86::VCVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 8643 /* vcvttss2siq */, X86::VCVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 8643 /* vcvttss2siq */, X86::VCVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USIZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_GR32 }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_GR64 }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USIZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_2__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_2__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_2__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_2__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasDQI, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8711 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8711 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8711 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8723 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X }, },
  { 8723 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8723 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8746 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
  { 8746 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 8758 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
  { 8758 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 8758 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
  { 8781 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
  { 8781 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 8781 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
  { 8793 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
  { 8793 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 8793 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, Feature_HasAVX512, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8815 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 8815 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8822 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 8822 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 8822 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 8822 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 8822 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8829 /* vdivsd */, X86::VDIVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 8829 /* vdivsd */, X86::VDIVSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8836 /* vdivss */, X86::VDIVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8836 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8836 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 8836 /* vdivss */, X86::VDIVSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 8836 /* vdivss */, X86::VDIVSSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8836 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8836 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8836 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8836 /* vdivss */, X86::VDIVSSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8836 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8836 /* vdivss */, X86::VDIVSSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8843 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8843 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 8849 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8849 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 8849 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 8849 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 8855 /* verr */, X86::VERRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 8855 /* verr */, X86::VERRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 8860 /* verw */, X86::VERWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 8860 /* verw */, X86::VERWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmb, Convert__Reg1_2__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmb, Convert__Reg1_2__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8901 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
  { 8901 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rm, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrm, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rmk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrmk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrm, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrmk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rm, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrm, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rmk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrmk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrm, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrmk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8970 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
  { 8970 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rm, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrm, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rmk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrmk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrm, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrmk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rm, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrm, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rmk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrmk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrm, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrmk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9039 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
  { 9039 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
  { 9039 /* vextractps */, X86::VEXTRACTPSzrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
  { 9039 /* vextractps */, X86::VEXTRACTPSzmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrrib, Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrribkz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrrib, Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrribkz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADDPDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADDPDr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADDPDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADDPDr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADDPSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADDPSr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADDPSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADDPSr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9122 /* vfmadd132sd */, X86::VFMADDSDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9122 /* vfmadd132sd */, X86::VFMADDSDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9134 /* vfmadd132ss */, X86::VFMADDSSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9134 /* vfmadd132ss */, X86::VFMADDSSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADDPDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADDPDr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADDPDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADDPDr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADDPSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADDPSr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADDPSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADDPSr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9170 /* vfmadd213sd */, X86::VFMADDSDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9170 /* vfmadd213sd */, X86::VFMADDSDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9182 /* vfmadd213ss */, X86::VFMADDSSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9182 /* vfmadd213ss */, X86::VFMADDSSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADDPDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADDPDr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADDPDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADDPDr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADDPSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADDPSr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADDPSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADDPSr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9218 /* vfmadd231sd */, X86::VFMADDSDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9218 /* vfmadd231sd */, X86::VFMADDSDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9230 /* vfmadd231ss */, X86::VFMADDSSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9230 /* vfmadd231ss */, X86::VFMADDSSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9260 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9260 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9260 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9269 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9269 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9269 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUBPDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUBPDr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUBPDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUBPDr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUBPSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUBPSr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUBPSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUBPSr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUBPDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUBPDr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUBPDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUBPDr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUBPSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUBPSr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUBPSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUBPSr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUBPDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUBPDr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUBPDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUBPDr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUBPSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUBPSr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUBPSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUBPSr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUBPDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUBPDr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUBPDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUBPDr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUBPSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUBPSr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUBPSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUBPSr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUBSDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUBSDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUBSSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUBSSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUBPDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUBPDr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUBPDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUBPDr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUBPSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUBPSr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUBPSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUBPSr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUBSDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUBSDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUBSSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUBSSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUBPDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUBPDr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUBPDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUBPDr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUBPSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUBPSr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUBPSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUBPSr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUBSDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUBSDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUBSSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUBSSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADDPDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADDPDr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADDPDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADDPDr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADDPSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADDPSr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADDPSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADDPSr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADDPDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADDPDr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADDPDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADDPDr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADDPSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADDPSr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADDPSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADDPSr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADDPDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADDPDr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADDPDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADDPDr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADDPSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADDPSr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADDPSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADDPSr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9668 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9668 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9668 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9677 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9677 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9677 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADDPDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADDPDr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADDPDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADDPDr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADDPSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADDPSr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADDPSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADDPSr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADDSDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADDSDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADDSSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADDSSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADDPDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADDPDr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADDPDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADDPDr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADDPSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADDPSr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADDPSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADDPSr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADDSDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADDSDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADDSSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADDSSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADDPDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADDPDr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADDPDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADDPDr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADDPSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADDPSr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADDPSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADDPSr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADDSDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADDSDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADDSSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADDSSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9862 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9862 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9862 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9872 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9872 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9872 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUBPDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUBPDr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUBPDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUBPDr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUBPSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUBPSr132rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUBPSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUBPSr132mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUBSDr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUBSDr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUBSSr132r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUBSSr132m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUBPDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUBPDr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUBPDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUBPDr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUBPSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUBPSr213rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUBPSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUBPSr213mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUBSDr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUBSDr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUBSSr213r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUBSSr213m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUBPDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUBPDr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUBPDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUBPDr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUBPSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUBPSr231rY, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUBPSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUBPSr231mY, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUBSDr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUBSDr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUBSSr231r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUBSSr231m, Convert__Reg1_2__Tie0__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSrb_Int, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Intkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSrb_Intkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4rrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4mrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4rmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10058 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10058 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 10058 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10068 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10068 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 10068 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10089 /* vfpclasspdq */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1 }, },
  { 10089 /* vfpclasspdq */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1 }, },
  { 10089 /* vfpclasspdq */, X86::VFPCLASSPDZrmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1 }, },
  { 10089 /* vfpclasspdq */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10089 /* vfpclasspdq */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10089 /* vfpclasspdq */, X86::VFPCLASSPDZrmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10101 /* vfpclasspdx */, X86::VFPCLASSPDZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
  { 10101 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10113 /* vfpclasspdy */, X86::VFPCLASSPDZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
  { 10113 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10125 /* vfpclasspdz */, X86::VFPCLASSPDZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
  { 10125 /* vfpclasspdz */, X86::VFPCLASSPDZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10148 /* vfpclasspsl */, X86::VFPCLASSPSZrmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1 }, },
  { 10148 /* vfpclasspsl */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1 }, },
  { 10148 /* vfpclasspsl */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1 }, },
  { 10148 /* vfpclasspsl */, X86::VFPCLASSPSZrmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10148 /* vfpclasspsl */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10148 /* vfpclasspsl */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10160 /* vfpclasspsx */, X86::VFPCLASSPSZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
  { 10160 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10172 /* vfpclasspsy */, X86::VFPCLASSPSZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
  { 10172 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10184 /* vfpclasspsz */, X86::VFPCLASSPSZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
  { 10184 /* vfpclasspsz */, X86::VFPCLASSPSZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10196 /* vfpclasssd */, X86::VFPCLASSSDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
  { 10196 /* vfpclasssd */, X86::VFPCLASSSDrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
  { 10196 /* vfpclasssd */, X86::VFPCLASSSDrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10196 /* vfpclasssd */, X86::VFPCLASSSDrmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10207 /* vfpclassss */, X86::VFPCLASSSSrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
  { 10207 /* vfpclassss */, X86::VFPCLASSSSrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
  { 10207 /* vfpclassss */, X86::VFPCLASSSSrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10207 /* vfpclassss */, X86::VFPCLASSSSrmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10218 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10218 /* vfrczpd */, X86::VFRCZPDrrY, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 10218 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10218 /* vfrczpd */, X86::VFRCZPDrmY, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10226 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10226 /* vfrczps */, X86::VFRCZPSrrY, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 10226 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10226 /* vfrczps */, X86::VFRCZPSrmY, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10234 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10234 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 10242 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10242 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX645_1__Tie1, 0, { MCK_FR32, MCK_MemVX64, MCK_FR32 }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX645_1__Tie1, 0, { MCK_VR256, MCK_MemVX64, MCK_VR256 }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX32X5_0, Feature_HasVLX, { MCK_MemVX32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX32X5_0, Feature_HasVLX, { MCK_MemVX32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY32X5_0, Feature_HasAVX512, { MCK_MemVY32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX325_1__Tie1, 0, { MCK_FR32, MCK_MemVX32, MCK_FR32 }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_2__Reg1_0__Tie0__MemVY325_1__Tie1, 0, { MCK_VR256, MCK_MemVY32, MCK_VR256 }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX32X5_0, Feature_HasVLX, { MCK_MemVX32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY32X5_0, Feature_HasVLX, { MCK_MemVY32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ325_0, Feature_HasAVX512, { MCK_MemVZ32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10272 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_2__MemVY325_0, Feature_HasPFI, { MCK_MemVY32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10286 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_2__MemVZ325_0, Feature_HasPFI, { MCK_MemVZ32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10300 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_2__MemVZ645_0, Feature_HasPFI, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10314 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_2__MemVZ645_0, Feature_HasPFI, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10328 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_2__MemVY325_0, Feature_HasPFI, { MCK_MemVY32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10342 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_2__MemVZ325_0, Feature_HasPFI, { MCK_MemVZ32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10356 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_2__MemVZ645_0, Feature_HasPFI, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10370 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_2__MemVZ645_0, Feature_HasPFI, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX645_1__Tie1, 0, { MCK_FR32, MCK_MemVX64, MCK_FR32 }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_2__Reg1_0__Tie0__MemVY645_1__Tie1, 0, { MCK_VR256, MCK_MemVY64, MCK_VR256 }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX64X5_0, Feature_HasVLX, { MCK_MemVX64X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY64X5_0, Feature_HasVLX, { MCK_MemVY64X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ645_0, Feature_HasAVX512, { MCK_MemVZ64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX325_1__Tie1, 0, { MCK_FR32, MCK_MemVX32, MCK_FR32 }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_2__Reg1_0__Tie0__MemVY325_1__Tie1, 0, { MCK_FR32, MCK_MemVY32, MCK_FR32 }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX64X5_0, Feature_HasVLX, { MCK_MemVX64X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY64X5_0, Feature_HasVLX, { MCK_MemVY64X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ645_0, Feature_HasAVX512, { MCK_MemVZ64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_2__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_2__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmb, Convert__Reg1_2__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmi_altk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmi_altkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmi_altk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmi_altkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10490 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10490 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10490 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10490 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10498 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10498 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10498 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10498 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10506 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10506 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10506 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10506 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10514 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10514 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10514 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10514 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10522 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 10522 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10586 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 10586 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10650 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10650 /* vinsertps */, X86::VINSERTPSzrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10650 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 10650 /* vinsertps */, X86::VINSERTPSzrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 10660 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10660 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10667 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 10676 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
  { 10676 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
  { 10688 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10688 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10688 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10688 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10699 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10699 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10699 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10699 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10717 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10717 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10724 /* vmaxsd */, X86::VMAXSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10731 /* vmaxss */, X86::VMAXSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10738 /* vmcall */, X86::VMCALL, Convert_NoOperands, 0, {  }, },
  { 10745 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 10753 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, 0, {  }, },
  { 10760 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10760 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 10760 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10760 /* vminpd */, X86::VMINPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10760 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 10760 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 10760 /* vminpd */, X86::VMINPDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 10760 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10767 /* vminps */, X86::VMINPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10767 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10767 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 10767 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10767 /* vminps */, X86::VMINPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10767 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10767 /* vminps */, X86::VMINPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10767 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 10767 /* vminps */, X86::VMINPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 10767 /* vminps */, X86::VMINPSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10767 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 10767 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10774 /* vminsd */, X86::VMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10774 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10774 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10774 /* vminsd */, X86::VMINSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 10774 /* vminsd */, X86::VMINSDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10774 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10774 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10774 /* vminsd */, X86::VMINSDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10774 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10774 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10774 /* vminsd */, X86::VMINSDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10781 /* vminss */, X86::VMINSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10781 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10781 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 10781 /* vminss */, X86::VMINSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 10781 /* vminss */, X86::VMINSSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10781 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10781 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10781 /* vminss */, X86::VMINSSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10781 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10781 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10781 /* vminss */, X86::VMINSSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10788 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, 0, {  }, },
  { 10797 /* vmload */, X86::VMLOAD32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
  { 10797 /* vmload */, X86::VMLOAD64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
  { 10804 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, 0, {  }, },
  { 10812 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10848 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
  { 10848 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 10848 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
  { 10848 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
  { 10848 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 10848 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
  { 10848 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 10848 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 10848 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 10848 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10863 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11009 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11009 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11018 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11018 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 11018 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 11018 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 11026 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11026 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 11026 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 11026 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 11034 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11034 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11043 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11043 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 11043 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 11043 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 11051 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11051 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 11051 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 11051 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 11059 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
  { 11059 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
  { 11069 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
  { 11069 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11116 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11116 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
  { 11116 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11116 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
  { 11116 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 11116 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_In64BitMode, { MCK_FR32X, MCK_GR64 }, },
  { 11116 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 11116 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512|Feature_In64BitMode, { MCK_FR32X, MCK_Mem64 }, },
  { 11116 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11116 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 11122 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 11130 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11130 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 11130 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrm_Int, Convert__Reg1_1__Tie0__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 11130 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11130 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrm_Intk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrm_Intkz, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11137 /* vmovsd.s */, X86::VMOVSSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11137 /* vmovsd.s */, X86::VMOVSSDrr_REVk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11137 /* vmovsd.s */, X86::VMOVSSDrr_REVkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11166 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
  { 11166 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 11166 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 11166 /* vmovss */, X86::VMOVSSZrm_Int, Convert__Reg1_1__Tie0__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 11166 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11166 /* vmovss */, X86::VMOVSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11166 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11166 /* vmovss */, X86::VMOVSSZrm_Intk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11166 /* vmovss */, X86::VMOVSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11166 /* vmovss */, X86::VMOVSSZrm_Intkz, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11166 /* vmovss */, X86::VMOVSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11173 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11173 /* vmovss.s */, X86::VMOVSSZrr_REVk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11173 /* vmovss.s */, X86::VMOVSSZrr_REVkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11200 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11200 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11200 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11218 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11218 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11218 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11218 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11227 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 11235 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 11250 /* vmreadl */, X86::VMREAD32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
  { 11250 /* vmreadl */, X86::VMREAD32rm, Convert__Mem325_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
  { 11258 /* vmreadq */, X86::VMREAD64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
  { 11258 /* vmreadq */, X86::VMREAD64rm, Convert__Mem645_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
  { 11266 /* vmresume */, X86::VMRESUME, Convert_NoOperands, 0, {  }, },
  { 11275 /* vmrun */, X86::VMRUN32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
  { 11275 /* vmrun */, X86::VMRUN64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
  { 11281 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
  { 11281 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
  { 11288 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11288 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11288 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11288 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11288 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11288 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11295 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11295 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11295 /* vmulps */, X86::VMULPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11295 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11295 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11295 /* vmulps */, X86::VMULPSZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11295 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11302 /* vmulsd */, X86::VMULSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11302 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11302 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11302 /* vmulsd */, X86::VMULSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 11302 /* vmulsd */, X86::VMULSDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11302 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11302 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11302 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11302 /* vmulsd */, X86::VMULSDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11302 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11302 /* vmulsd */, X86::VMULSDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11309 /* vmulss */, X86::VMULSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11309 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11309 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11309 /* vmulss */, X86::VMULSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 11309 /* vmulss */, X86::VMULSSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11309 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11309 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11309 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11309 /* vmulss */, X86::VMULSSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11309 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11309 /* vmulss */, X86::VMULSSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11324 /* vmwritel */, X86::VMWRITE32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
  { 11324 /* vmwritel */, X86::VMWRITE32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
  { 11333 /* vmwriteq */, X86::VMWRITE64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
  { 11333 /* vmwriteq */, X86::VMWRITE64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
  { 11342 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, 0, {  }, },
  { 11349 /* vmxon */, X86::VMXON, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 11355 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11355 /* vorpd */, X86::VORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11355 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11355 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11355 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11355 /* vorpd */, X86::VORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11355 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11355 /* vorpd */, X86::VORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11355 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11355 /* vorpd */, X86::VORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 11355 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 11355 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11361 /* vorps */, X86::VORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11361 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11361 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11361 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11361 /* vorps */, X86::VORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11361 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11361 /* vorps */, X86::VORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11361 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11361 /* vorps */, X86::VORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11361 /* vorps */, X86::VORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 11361 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 11361 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 11361 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11361 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11367 /* vpabsb */, X86::VPABSBrr256, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11367 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 11367 /* vpabsb */, X86::VPABSBrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11367 /* vpabsb */, X86::VPABSBrm256, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11367 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11374 /* vpabsd */, X86::VPABSDrr256, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11374 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11374 /* vpabsd */, X86::VPABSDrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11374 /* vpabsd */, X86::VPABSDrm256, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11374 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11381 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11381 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11388 /* vpabsw */, X86::VPABSWrr256, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11388 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 11388 /* vpabsw */, X86::VPABSWrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11388 /* vpabsw */, X86::VPABSWrm256, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11388 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11435 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11435 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11435 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11435 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11435 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11435 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11442 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11442 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11442 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11442 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11442 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11449 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11449 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11449 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11449 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11449 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11490 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11490 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11490 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11490 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11490 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11490 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNR128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11497 /* vpalignr */, X86::VPALIGNR256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11497 /* vpalignr */, X86::VPALIGNR128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11497 /* vpalignr */, X86::VPALIGNR256rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11506 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11506 /* vpand */, X86::VPANDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11506 /* vpand */, X86::VPANDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11506 /* vpand */, X86::VPANDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11512 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11512 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11512 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11519 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11519 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11519 /* vpandn */, X86::VPANDNrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11519 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11542 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11542 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 11542 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11549 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11549 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11549 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11556 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11556 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11556 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11563 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11563 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11563 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11563 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11612 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11612 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11612 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11612 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11622 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11622 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11622 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11622 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_FR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VR256 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_1__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_1__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_VR256X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_1__Mem85_0, Feature_HasBWI, { MCK_Mem8, MCK_VR512 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem85_0, Feature_HasBWI, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_1__Reg1_3__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_1__Reg1_3__Mem85_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_1__Reg1_3__Mem85_0, Feature_HasBWI, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_VR256X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VR512 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_1__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_1__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_VR256X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11657 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 11657 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 11657 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VK1, MCK_VR512 }, },
  { 11673 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 11673 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 11673 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VK1, MCK_VR512 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_VR256X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_VR512 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_1__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_1__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_VR256X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VR256 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_1__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_1__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_VR256X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_1__Mem165_0, Feature_HasBWI, { MCK_Mem16, MCK_VR512 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasBWI, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasBWI, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11715 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11715 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11729 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11729 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11743 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11743 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11757 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11757 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11771 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11771 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11782 /* vpcmov */, X86::VPCMOVrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11782 /* vpcmov */, X86::VPCMOVmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11782 /* vpcmov */, X86::VPCMOVrrY, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11782 /* vpcmov */, X86::VPCMOVmrY, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11782 /* vpcmov */, X86::VPCMOVrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11782 /* vpcmov */, X86::VPCMOVrmY, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPBZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPBZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPWZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPWZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11845 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 11845 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 11856 /* vpcmpestrm */, X86::VPCMPESTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 11856 /* vpcmpestrm */, X86::VPCMPESTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11903 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 11903 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 11914 /* vpcmpistrm */, X86::VPCMPISTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 11914 /* vpcmpistrm */, X86::VPCMPISTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11971 /* vpcom */, X86::VPCOMBri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMBmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMDri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMDmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMQri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMQmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUBri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUBmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUDri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUDmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUQri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUQmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUWri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUWmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMWri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMWmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11977 /* vpcomb */, X86::VPCOMBri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11977 /* vpcomb */, X86::VPCOMBmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11984 /* vpcomd */, X86::VPCOMDri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11984 /* vpcomd */, X86::VPCOMDmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12015 /* vpcomq */, X86::VPCOMQri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12015 /* vpcomq */, X86::VPCOMQmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12022 /* vpcomub */, X86::VPCOMUBri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12022 /* vpcomub */, X86::VPCOMUBmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12030 /* vpcomud */, X86::VPCOMUDri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12030 /* vpcomud */, X86::VPCOMUDmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12038 /* vpcomuq */, X86::VPCOMUQri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12038 /* vpcomuq */, X86::VPCOMUQmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12046 /* vpcomuw */, X86::VPCOMUWri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12046 /* vpcomuw */, X86::VPCOMUWmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12054 /* vpcomw */, X86::VPCOMWri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12054 /* vpcomw */, X86::VPCOMWmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12085 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12085 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12096 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12096 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12107 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12107 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12107 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12114 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12114 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12114 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12114 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDrrY, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDmrY, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDrmY, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSrrY, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSmrY, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSrmY, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12227 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12227 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12227 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVBMI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12298 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12298 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12298 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12325 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
  { 12325 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
  { 12325 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
  { 12325 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem8 }, },
  { 12333 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
  { 12333 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
  { 12333 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
  { 12333 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
  { 12341 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
  { 12341 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
  { 12341 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR64 }, },
  { 12341 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
  { 12349 /* vpextrw */, X86::VPEXTRWri, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
  { 12349 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
  { 12349 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
  { 12349 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem16 }, },
  { 12357 /* vpextrw.s */, X86::VPEXTRWZrr_REV, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX325_1__Tie1, 0, { MCK_FR32, MCK_MemVX32, MCK_FR32 }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_2__Reg1_0__Tie0__MemVY325_1__Tie1, 0, { MCK_VR256, MCK_MemVY32, MCK_VR256 }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX32X5_0, Feature_HasVLX, { MCK_MemVX32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY32X5_0, Feature_HasVLX, { MCK_MemVY32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ325_0, Feature_HasAVX512, { MCK_MemVZ32, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX645_1__Tie1, 0, { MCK_FR32, MCK_MemVX64, MCK_FR32 }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX645_1__Tie1, 0, { MCK_VR256, MCK_MemVX64, MCK_VR256 }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX32X5_0, Feature_HasVLX, { MCK_MemVX32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX32X5_0, Feature_HasVLX, { MCK_MemVX32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY32X5_0, Feature_HasAVX512, { MCK_MemVY32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX325_1__Tie1, 0, { MCK_FR32, MCK_MemVX32, MCK_FR32 }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_2__Reg1_0__Tie0__MemVY325_1__Tie1, 0, { MCK_FR32, MCK_MemVY32, MCK_FR32 }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX64X5_0, Feature_HasVLX, { MCK_MemVX64X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY64X5_0, Feature_HasVLX, { MCK_MemVY64X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ645_0, Feature_HasAVX512, { MCK_MemVZ64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_2__Reg1_0__Tie0__MemVX645_1__Tie1, 0, { MCK_FR32, MCK_MemVX64, MCK_FR32 }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_2__Reg1_0__Tie0__MemVY645_1__Tie1, 0, { MCK_VR256, MCK_MemVY64, MCK_VR256 }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVX64X5_0, Feature_HasVLX, { MCK_MemVX64X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVY64X5_0, Feature_HasVLX, { MCK_MemVY64X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_1__Reg1_3__Tie0__Tie1__MemVZ645_0, Feature_HasAVX512, { MCK_MemVZ64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12411 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12411 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12420 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12420 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12429 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12429 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12438 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12438 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12438 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12438 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12446 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12446 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12455 /* vphaddsw */, X86::VPHADDSWrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12455 /* vphaddsw */, X86::VPHADDSWrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12455 /* vphaddsw */, X86::VPHADDSWrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12455 /* vphaddsw */, X86::VPHADDSWrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12464 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12464 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12474 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12474 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12484 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12484 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12494 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12494 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12504 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12504 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12514 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12514 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12524 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12524 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12524 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12524 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12532 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12532 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12541 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12541 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12550 /* vphminposuw */, X86::VPHMINPOSUWrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12550 /* vphminposuw */, X86::VPHMINPOSUWrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12562 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12562 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12571 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12571 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12571 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12571 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12579 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12579 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12588 /* vphsubsw */, X86::VPHSUBSWrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12588 /* vphsubsw */, X86::VPHSUBSWrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12588 /* vphsubsw */, X86::VPHSUBSWrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12588 /* vphsubsw */, X86::VPHSUBSWrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12597 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12597 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12597 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12597 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12605 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 12605 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 12614 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
  { 12614 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
  { 12614 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32, MCK_FR32 }, },
  { 12614 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32X, MCK_FR32X }, },
  { 12622 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, },
  { 12622 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32X, MCK_FR32X }, },
  { 12622 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 12622 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 12630 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32, MCK_FR32 }, },
  { 12630 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32X, MCK_FR32X }, },
  { 12630 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 12630 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 12638 /* vpinsrw */, X86::VPINSRWrri, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
  { 12638 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
  { 12638 /* vpinsrw */, X86::VPINSRWrmi, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32, MCK_FR32 }, },
  { 12638 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32X, MCK_FR32X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_1__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_2__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_1__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_1__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_1__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_1__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_2__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasCDI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasCDI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasCDI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12664 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12664 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12673 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12673 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12683 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12683 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12693 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12693 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12703 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12703 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12714 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12714 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12725 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12725 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12735 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12735 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12745 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12745 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12754 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12754 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12763 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12763 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12774 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12774 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_3__Tie0__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasIFMA, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasIFMA, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasIFMA, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12828 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12828 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12828 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12828 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12839 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12839 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12839 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12839 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12914 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12914 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12914 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12922 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12922 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12938 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12938 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12938 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12946 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12946 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12946 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12946 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12946 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12946 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12954 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12954 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12954 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12954 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12954 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12970 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12970 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 12970 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12978 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 12978 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 12978 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VK1 }, },
  { 12987 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 12987 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 12987 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VK1 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13012 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 13012 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 13012 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VR512 }, },
  { 13021 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 13021 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 13021 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VR512 }, },
  { 13030 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 13030 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 13030 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VR512 }, },
  { 13039 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 13039 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 13039 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VR512 }, },
  { 13048 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
  { 13048 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
  { 13058 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 13058 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 13058 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VK1 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_1__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13265 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 13265 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 13265 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VK1 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_1__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_1__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasBWI, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasBWI, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_1__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_1__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_1__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_1__Tie0__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWrr128, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWrr256, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWrm128, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWrm256, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13377 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13377 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13393 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13393 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13393 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_3__Reg1_2__Mem85_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_3__Reg1_2__Mem85_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_3__Reg1_2__Mem85_0, Feature_HasVBMI, { MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasVBMI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem85_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem85_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem85_0, Feature_HasVBMI, { MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem85_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem85_0, Feature_HasVLX|Feature_HasVBMI, { MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem85_0, Feature_HasVBMI, { MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13425 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13425 /* vpor */, X86::VPORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13425 /* vpor */, X86::VPORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13425 /* vpor */, X86::VPORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13430 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13430 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13430 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13430 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13430 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13430 /* vpord */, X86::VPORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13430 /* vpord */, X86::VPORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13430 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13430 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13430 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13430 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13430 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13430 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13430 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13436 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13436 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13436 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13436 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13436 /* vporq */, X86::VPORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13436 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13436 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13436 /* vporq */, X86::VPORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13436 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13436 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13442 /* vpperm */, X86::VPPERMrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13442 /* vpperm */, X86::VPPERMmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13442 /* vpperm */, X86::VPPERMrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13449 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13449 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13449 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13449 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13449 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13449 /* vprold */, X86::VPROLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13449 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 13449 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 13449 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 13449 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13449 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13449 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13449 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13449 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13449 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13456 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13456 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13456 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 13456 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13456 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13479 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13479 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13479 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13479 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13479 /* vprord */, X86::VPRORDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13479 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 13479 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 13479 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 13479 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13479 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13486 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13486 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13486 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 13486 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13486 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13509 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13509 /* vprotb */, X86::VPROTBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13509 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13509 /* vprotb */, X86::VPROTBmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 13509 /* vprotb */, X86::VPROTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13516 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13516 /* vprotd */, X86::VPROTDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13516 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13516 /* vprotd */, X86::VPROTDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 13516 /* vprotd */, X86::VPROTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13523 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13523 /* vprotq */, X86::VPROTQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13523 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13523 /* vprotq */, X86::VPROTQmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 13523 /* vprotq */, X86::VPROTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13530 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13530 /* vprotw */, X86::VPROTWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13530 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13530 /* vprotw */, X86::VPROTWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 13530 /* vprotw */, X86::VPROTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ512rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13537 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ512rm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13545 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_3__MemVX32X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13545 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_3__MemVY32X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_MemVY32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13545 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_3__MemVZ325_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_MemVZ32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13557 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_3__MemVX32X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13557 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_3__MemVX32X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13557 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_3__MemVY32X5_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_MemVY32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13569 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_3__MemVX64X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVX64X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13569 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_3__MemVY64X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVY64X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13569 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_3__MemVZ645_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13581 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_3__MemVX64X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVX64X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13581 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_3__MemVY64X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_MemVY64X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13581 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_3__MemVZ645_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13593 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13593 /* vpshab */, X86::VPSHABmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13593 /* vpshab */, X86::VPSHABrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13600 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13600 /* vpshad */, X86::VPSHADmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13600 /* vpshad */, X86::VPSHADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13607 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13607 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13607 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13614 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13614 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13614 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13621 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13621 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13621 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13628 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13628 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13628 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13635 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13635 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13635 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13642 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13642 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13642 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13657 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13683 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13683 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13683 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13683 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13691 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13691 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13691 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13691 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13699 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13699 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13699 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13699 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13707 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13707 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13707 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13707 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13707 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13707 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13707 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13707 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13707 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13707 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13707 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13714 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ512rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ512rm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13722 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13722 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13722 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13722 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13722 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13722 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13753 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13753 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13753 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13753 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13753 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13760 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13760 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13760 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13760 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13760 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13760 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13760 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13760 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13760 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13760 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13798 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13798 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13798 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13798 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13798 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13805 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13805 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13805 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13805 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13805 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ512rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasBWI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ512rm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasVLX|Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13858 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13858 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13858 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13865 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13865 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13872 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13872 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13913 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13913 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13913 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 13942 /* vptest */, X86::VPTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 13942 /* vptest */, X86::VPTESTYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 13942 /* vptest */, X86::VPTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 13942 /* vptest */, X86::VPTESTYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX|Feature_HasBWI, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasBWI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14115 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14115 /* vpxor */, X86::VPXORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14115 /* vpxor */, X86::VPXORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14115 /* vpxor */, X86::VPXORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14121 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14121 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14121 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14128 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14128 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmi_altk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmi_altkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmi_altk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmi_altkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmb, Convert__Reg1_2__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmb, Convert__Reg1_2__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14243 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 14243 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 14243 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 14243 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 14250 /* vrcpss */, X86::VRCPSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14250 /* vrcpss */, X86::VRCPSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmi_altk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmi_altkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmi_altk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rribk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmi_altkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrb, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrbk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrbkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrb, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSmk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrbk, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrbkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14345 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 14345 /* vroundpd */, X86::VROUNDYPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 14345 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 14345 /* vroundpd */, X86::VROUNDYPDm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 14354 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
  { 14354 /* vroundps */, X86::VROUNDYPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
  { 14354 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
  { 14354 /* vroundps */, X86::VROUNDYPSm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
  { 14363 /* vroundsd */, X86::VROUNDSDr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14363 /* vroundsd */, X86::VROUNDSDm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 14372 /* vroundss */, X86::VROUNDSSr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14372 /* vroundss */, X86::VROUNDSSm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmb, Convert__Reg1_2__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSr, Convert__Reg1_1__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSm, Convert__Reg1_1__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrb, Convert__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmb, Convert__Reg1_2__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmbkz, Convert__Reg1_2__Reg1_4__Mem5125_0, Feature_HasERI, { MCK_Mem512, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrb, Convert__Reg1_3__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasERI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, Feature_HasERI, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14469 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 14469 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 14469 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 14469 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 14478 /* vrsqrtss */, X86::VRSQRTSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14478 /* vrsqrtss */, X86::VRSQRTSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14527 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_3__MemVX32X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14527 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_3__MemVX32X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14527 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_3__MemVY32X5_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_MemVY32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14539 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_3__MemVX32X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14539 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_3__MemVY32X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_MemVY32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14539 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_3__MemVZ325_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_MemVZ32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14551 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_2__MemVY325_0, Feature_HasPFI, { MCK_MemVY32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14566 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_2__MemVZ325_0, Feature_HasPFI, { MCK_MemVZ32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14581 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_2__MemVZ645_0, Feature_HasPFI, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14596 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_2__MemVZ645_0, Feature_HasPFI, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14611 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_2__MemVY325_0, Feature_HasPFI, { MCK_MemVY32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14626 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_2__MemVZ325_0, Feature_HasPFI, { MCK_MemVZ32, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14641 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_2__MemVZ645_0, Feature_HasPFI, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14656 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_2__MemVZ645_0, Feature_HasPFI, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14671 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_3__MemVX64X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVX64X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14671 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_3__MemVY64X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_MemVY64X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14671 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_3__MemVZ645_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14683 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_3__MemVX64X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVX64X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14683 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_3__MemVY64X5_1__Tie0__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_MemVY64X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14683 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_3__MemVZ645_1__Tie0__Reg1_0, Feature_HasAVX512, { MCK_VR256X, MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14739 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14747 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14747 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14747 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, Feature_HasAVX512|Feature_HasVLX, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_2__Tie0__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14787 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 14796 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14796 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14796 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14803 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14803 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14803 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14803 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14803 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14810 /* vsubsd */, X86::VSUBSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14810 /* vsubsd */, X86::VSUBSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14817 /* vsubss */, X86::VSUBSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14817 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14817 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14817 /* vsubss */, X86::VSUBSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
  { 14817 /* vsubss */, X86::VSUBSSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14817 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14817 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14817 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14817 /* vsubss */, X86::VSUBSSZrrbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14817 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasAVX512, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14817 /* vsubss */, X86::VSUBSSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, Feature_HasAVX512, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14824 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 14824 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 14824 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 14824 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 14832 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 14832 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
  { 14832 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 14832 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
  { 14840 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 14840 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 14840 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
  { 14840 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_1__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 14840 /* vucomisd */, X86::VUCOMISDZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
  { 14849 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 14849 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 14849 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
  { 14849 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_1__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 14849 /* vucomiss */, X86::VUCOMISSZrb, Convert__Reg1_2__Reg1_1, Feature_HasAVX512, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasVLX, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasAVX512, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasVLX, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasAVX512, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasAVX512, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasVLX, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14898 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14898 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14898 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14898 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14898 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, Feature_HasDQI, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14905 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14905 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14905 /* vxorps */, X86::VXORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
  { 14905 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
  { 14905 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
  { 14905 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, Feature_HasDQI, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, Feature_HasDQI, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, Feature_HasDQI, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, Feature_HasDQI, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_ }, },
  { 14912 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, 0, {  }, },
  { 14921 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, 0, {  }, },
  { 14932 /* wait */, X86::WAIT, Convert_NoOperands, 0, {  }, },
  { 14937 /* wbinvd */, X86::WBINVD, Convert_NoOperands, 0, {  }, },
  { 14953 /* wrfsbasel */, X86::WRFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
  { 14963 /* wrfsbaseq */, X86::WRFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 14982 /* wrgsbasel */, X86::WRGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
  { 14992 /* wrgsbaseq */, X86::WRGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 15002 /* wrmsr */, X86::WRMSR, Convert_NoOperands, 0, {  }, },
  { 15008 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, 0, {  }, },
  { 15015 /* xabort */, X86::XABORT, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 15022 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, 0, {  }, },
  { 15036 /* xaddb */, X86::XADD8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 15036 /* xaddb */, X86::XADD8rm, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 15042 /* xaddl */, X86::XADD32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 15042 /* xaddl */, X86::XADD32rm, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 15048 /* xaddq */, X86::XADD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 15048 /* xaddq */, X86::XADD64rm, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 15054 /* xaddw */, X86::XADD16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 15054 /* xaddw */, X86::XADD16rm, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 15060 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, 0, { MCK_AbsMem16 }, },
  { 15060 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 15072 /* xchgb */, X86::XCHG8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 15072 /* xchgb */, X86::XCHG8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 15072 /* xchgb */, X86::XCHG8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 15078 /* xchgl */, X86::XCHG32ar64, Convert__Reg1_1, Feature_In64BitMode, { MCK_EAX, MCK_GR32_NOAX }, },
  { 15078 /* xchgl */, X86::XCHG32ar, Convert__Reg1_1, Feature_Not64BitMode, { MCK_EAX, MCK_GR32 }, },
  { 15078 /* xchgl */, X86::XCHG32ar64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32_NOAX, MCK_EAX }, },
  { 15078 /* xchgl */, X86::XCHG32ar, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_EAX }, },
  { 15078 /* xchgl */, X86::XCHG32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 15078 /* xchgl */, X86::XCHG32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 15078 /* xchgl */, X86::XCHG32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 15084 /* xchgq */, X86::XCHG64ar, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
  { 15084 /* xchgq */, X86::XCHG64ar, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
  { 15084 /* xchgq */, X86::XCHG64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 15084 /* xchgq */, X86::XCHG64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 15084 /* xchgq */, X86::XCHG64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 15090 /* xchgw */, X86::XCHG16ar, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
  { 15090 /* xchgw */, X86::XCHG16ar, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
  { 15090 /* xchgw */, X86::XCHG16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 15090 /* xchgw */, X86::XCHG16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 15090 /* xchgw */, X86::XCHG16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 15096 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, 0, {  }, },
  { 15106 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, 0, {  }, },
  { 15116 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, 0, {  }, },
  { 15126 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, 0, {  }, },
  { 15136 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, 0, {  }, },
  { 15146 /* xend */, X86::XEND, Convert_NoOperands, 0, {  }, },
  { 15151 /* xgetbv */, X86::XGETBV, Convert_NoOperands, 0, {  }, },
  { 15158 /* xlatb */, X86::XLAT, Convert_NoOperands, 0, {  }, },
  { 15168 /* xorb */, X86::XOR8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 15168 /* xorb */, X86::XOR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
  { 15168 /* xorb */, X86::XOR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
  { 15168 /* xorb */, X86::XOR8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
  { 15168 /* xorb */, X86::XOR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
  { 15168 /* xorb */, X86::XOR8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 15173 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 15173 /* xorl */, X86::XOR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
  { 15173 /* xorl */, X86::XOR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
  { 15173 /* xorl */, X86::XOR32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
  { 15173 /* xorl */, X86::XOR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
  { 15173 /* xorl */, X86::XOR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
  { 15173 /* xorl */, X86::XOR32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
  { 15173 /* xorl */, X86::XOR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
  { 15173 /* xorl */, X86::XOR32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 15178 /* xorpd */, X86::XORPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 15178 /* xorpd */, X86::XORPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 15184 /* xorps */, X86::XORPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 15184 /* xorps */, X86::XORPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
  { 15190 /* xorq */, X86::XOR64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 15190 /* xorq */, X86::XOR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
  { 15190 /* xorq */, X86::XOR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
  { 15190 /* xorq */, X86::XOR64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
  { 15190 /* xorq */, X86::XOR64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
  { 15190 /* xorq */, X86::XOR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
  { 15190 /* xorq */, X86::XOR64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
  { 15190 /* xorq */, X86::XOR64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
  { 15190 /* xorq */, X86::XOR64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 15195 /* xorw */, X86::XOR16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 15195 /* xorw */, X86::XOR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
  { 15195 /* xorw */, X86::XOR16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
  { 15195 /* xorw */, X86::XOR16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
  { 15195 /* xorw */, X86::XOR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
  { 15195 /* xorw */, X86::XOR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
  { 15195 /* xorw */, X86::XOR16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
  { 15195 /* xorw */, X86::XOR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
  { 15195 /* xorw */, X86::XOR16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 15200 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, 0, {  }, },
  { 15209 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15216 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15225 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15233 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15243 /* xsave */, X86::XSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15249 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15257 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15264 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15273 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15282 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15293 /* xsaves */, X86::XSAVES, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15300 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15309 /* xsetbv */, X86::XSETBV, Convert_NoOperands, 0, {  }, },
  { 15316 /* xsha1 */, X86::XSHA1, Convert_NoOperands, 0, {  }, },
  { 15322 /* xsha256 */, X86::XSHA256, Convert_NoOperands, 0, {  }, },
  { 15330 /* xstore */, X86::XSTORE, Convert_NoOperands, 0, {  }, },
  { 15337 /* xstorerng */, X86::XSTORE, Convert_NoOperands, 0, {  }, },
  { 15347 /* xtest */, X86::XTEST, Convert_NoOperands, 0, {  }, },
};

static const MatchEntry MatchTable1[] = {
  { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
  { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
  { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
  { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
  { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 16 /* adc */, X86::ADC8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 16 /* adc */, X86::ADC16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
  { 16 /* adc */, X86::ADC16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 16 /* adc */, X86::ADC32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
  { 16 /* adc */, X86::ADC32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 16 /* adc */, X86::ADC64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
  { 16 /* adc */, X86::ADC64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 16 /* adc */, X86::ADC16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 16 /* adc */, X86::ADC16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 16 /* adc */, X86::ADC16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 16 /* adc */, X86::ADC32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 16 /* adc */, X86::ADC32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 16 /* adc */, X86::ADC32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 16 /* adc */, X86::ADC64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 16 /* adc */, X86::ADC64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 16 /* adc */, X86::ADC64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 16 /* adc */, X86::ADC64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 16 /* adc */, X86::ADC8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 16 /* adc */, X86::ADC8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 16 /* adc */, X86::ADC16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 16 /* adc */, X86::ADC16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 16 /* adc */, X86::ADC16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 16 /* adc */, X86::ADC32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 16 /* adc */, X86::ADC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 16 /* adc */, X86::ADC32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 16 /* adc */, X86::ADC64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 16 /* adc */, X86::ADC64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 16 /* adc */, X86::ADC64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 16 /* adc */, X86::ADC8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 16 /* adc */, X86::ADC8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 40 /* adcx */, X86::ADCX32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 40 /* adcx */, X86::ADCX64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 40 /* adcx */, X86::ADCX64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 57 /* add */, X86::ADD8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 57 /* add */, X86::ADD16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
  { 57 /* add */, X86::ADD16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 57 /* add */, X86::ADD32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
  { 57 /* add */, X86::ADD32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 57 /* add */, X86::ADD64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
  { 57 /* add */, X86::ADD64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 57 /* add */, X86::ADD16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 57 /* add */, X86::ADD16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 57 /* add */, X86::ADD16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 57 /* add */, X86::ADD32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 57 /* add */, X86::ADD32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 57 /* add */, X86::ADD32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 57 /* add */, X86::ADD64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 57 /* add */, X86::ADD64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 57 /* add */, X86::ADD64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 57 /* add */, X86::ADD64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 57 /* add */, X86::ADD8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 57 /* add */, X86::ADD8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 57 /* add */, X86::ADD16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 57 /* add */, X86::ADD16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 57 /* add */, X86::ADD16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 57 /* add */, X86::ADD32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 57 /* add */, X86::ADD32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 57 /* add */, X86::ADD32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 57 /* add */, X86::ADD64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 57 /* add */, X86::ADD64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 57 /* add */, X86::ADD64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 57 /* add */, X86::ADD8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 57 /* add */, X86::ADD8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 123 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 123 /* adox */, X86::ADOX32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 123 /* adox */, X86::ADOX64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 123 /* adox */, X86::ADOX64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 199 /* and */, X86::AND8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 199 /* and */, X86::AND16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
  { 199 /* and */, X86::AND16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 199 /* and */, X86::AND32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
  { 199 /* and */, X86::AND32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 199 /* and */, X86::AND64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
  { 199 /* and */, X86::AND64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 199 /* and */, X86::AND16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 199 /* and */, X86::AND16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 199 /* and */, X86::AND16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 199 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 199 /* and */, X86::AND32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 199 /* and */, X86::AND32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 199 /* and */, X86::AND32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 199 /* and */, X86::AND64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 199 /* and */, X86::AND64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 199 /* and */, X86::AND64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 199 /* and */, X86::AND64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 199 /* and */, X86::AND8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 199 /* and */, X86::AND8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 199 /* and */, X86::AND16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 199 /* and */, X86::AND16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 199 /* and */, X86::AND16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 199 /* and */, X86::AND32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 199 /* and */, X86::AND32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 199 /* and */, X86::AND32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 199 /* and */, X86::AND64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 199 /* and */, X86::AND64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 199 /* and */, X86::AND64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 199 /* and */, X86::AND8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 199 /* and */, X86::AND8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 213 /* andn */, X86::ANDN32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
  { 213 /* andn */, X86::ANDN64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 213 /* andn */, X86::ANDN64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
  { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
  { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem16, MCK_GR16 }, },
  { 271 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
  { 271 /* bextr */, X86::BEXTR32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
  { 271 /* bextr */, X86::BEXTR64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 271 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
  { 271 /* bextr */, X86::BEXTR64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 271 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 291 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 299 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 299 /* blci */, X86::BLCI32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 299 /* blci */, X86::BLCI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 299 /* blci */, X86::BLCI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 304 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 304 /* blcic */, X86::BLCIC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 304 /* blcic */, X86::BLCIC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 304 /* blcic */, X86::BLCIC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 310 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 310 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 310 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 310 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 317 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 317 /* blcs */, X86::BLCS32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 317 /* blcs */, X86::BLCS64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 317 /* blcs */, X86::BLCS64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 322 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 322 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 330 /* blendps */, X86::BLENDPSrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 330 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
  { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
  { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
  { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
  { 356 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 356 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 356 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 356 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 364 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 364 /* blsi */, X86::BLSI32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 364 /* blsi */, X86::BLSI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 364 /* blsi */, X86::BLSI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 369 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 369 /* blsic */, X86::BLSIC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 369 /* blsic */, X86::BLSIC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 369 /* blsic */, X86::BLSIC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 387 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 387 /* blsmsk */, X86::BLSMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 387 /* blsmsk */, X86::BLSMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 387 /* blsmsk */, X86::BLSMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 410 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 410 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 410 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 410 /* blsr */, X86::BLSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 427 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
  { 427 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
  { 427 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem32 }, },
  { 427 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem64 }, },
  { 433 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
  { 433 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
  { 433 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem32 }, },
  { 433 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem64 }, },
  { 439 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
  { 439 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
  { 439 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem32 }, },
  { 439 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem64 }, },
  { 445 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_0__Mem645_1, 0, { MCK_BNDR, MCK_Mem64 }, },
  { 452 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem32 }, },
  { 452 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem64 }, },
  { 458 /* bndmov */, X86::BNDMOVMRrr, Convert__Reg1_0__Reg1_1, 0, { MCK_BNDR, MCK_BNDR }, },
  { 458 /* bndmov */, X86::BNDMOVRMrr, Convert__Reg1_0__Reg1_1, 0, { MCK_BNDR, MCK_BNDR }, },
  { 458 /* bndmov */, X86::BNDMOVRM64rm, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
  { 458 /* bndmov */, X86::BNDMOVRM32rm, Convert__Reg1_0__Mem645_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
  { 458 /* bndmov */, X86::BNDMOVMR64mr, Convert__Mem1285_0__Reg1_1, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
  { 458 /* bndmov */, X86::BNDMOVMR32mr, Convert__Mem645_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
  { 465 /* bndstx */, X86::BNDSTXmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_BNDR }, },
  { 472 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem32 }, },
  { 472 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem645_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem64 }, },
  { 478 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 478 /* bsf */, X86::BSF16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 478 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 478 /* bsf */, X86::BSF32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 478 /* bsf */, X86::BSF64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 478 /* bsf */, X86::BSF64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 497 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 497 /* bsr */, X86::BSR16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 497 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 497 /* bsr */, X86::BSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 497 /* bsr */, X86::BSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 497 /* bsr */, X86::BSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 516 /* bswap */, X86::BSWAP32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 516 /* bswap */, X86::BSWAP64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 536 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 536 /* bt */, X86::BT16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 536 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 536 /* bt */, X86::BT32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 536 /* bt */, X86::BT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 536 /* bt */, X86::BT64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 536 /* bt */, X86::BT16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 536 /* bt */, X86::BT16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 536 /* bt */, X86::BT32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 536 /* bt */, X86::BT32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 536 /* bt */, X86::BT32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 536 /* bt */, X86::BT64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 536 /* bt */, X86::BT64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 539 /* btc */, X86::BTC16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 539 /* btc */, X86::BTC16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 539 /* btc */, X86::BTC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 539 /* btc */, X86::BTC32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 539 /* btc */, X86::BTC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 539 /* btc */, X86::BTC64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 539 /* btc */, X86::BTC16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 539 /* btc */, X86::BTC16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 539 /* btc */, X86::BTC32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 539 /* btc */, X86::BTC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 539 /* btc */, X86::BTC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 539 /* btc */, X86::BTC64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 539 /* btc */, X86::BTC64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 566 /* btr */, X86::BTR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 566 /* btr */, X86::BTR16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 566 /* btr */, X86::BTR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 566 /* btr */, X86::BTR32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 566 /* btr */, X86::BTR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 566 /* btr */, X86::BTR64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 566 /* btr */, X86::BTR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 566 /* btr */, X86::BTR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 566 /* btr */, X86::BTR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 566 /* btr */, X86::BTR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 566 /* btr */, X86::BTR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 566 /* btr */, X86::BTR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 566 /* btr */, X86::BTR64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 585 /* bts */, X86::BTS16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 585 /* bts */, X86::BTS16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 585 /* bts */, X86::BTS32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 585 /* bts */, X86::BTS32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 585 /* bts */, X86::BTS64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 585 /* bts */, X86::BTS64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 585 /* bts */, X86::BTS16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 585 /* bts */, X86::BTS16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 585 /* bts */, X86::BTS32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 585 /* bts */, X86::BTS32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 585 /* bts */, X86::BTS32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 585 /* bts */, X86::BTS64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 585 /* bts */, X86::BTS64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 608 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 608 /* bzhi */, X86::BZHI32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 608 /* bzhi */, X86::BZHI64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 608 /* bzhi */, X86::BZHI64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 625 /* call */, X86::CALL16r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
  { 625 /* call */, X86::CALL32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 625 /* call */, X86::CALL64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 625 /* call */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
  { 625 /* call */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
  { 625 /* call */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 625 /* call */, X86::CALL16m, Convert__Mem165_0, Feature_Not64BitMode, { MCK_Mem16 }, },
  { 625 /* call */, X86::CALL16m, Convert__Mem165_0, Feature_In16BitMode, { MCK_Mem16 }, },
  { 625 /* call */, X86::CALL32m, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
  { 625 /* call */, X86::CALL32m, Convert__Mem325_0, Feature_In32BitMode, { MCK_Mem32 }, },
  { 625 /* call */, X86::CALL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
  { 625 /* call */, X86::CALL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
  { 625 /* call */, X86::FARCALL16i, Convert__Imm1_2__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 625 /* call */, X86::FARCALL32i, Convert__Imm1_2__Imm1_0, Feature_Not16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 630 /* calll */, X86::FARCALL32i, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 642 /* callw */, X86::FARCALL16i, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 653 /* cbw */, X86::CBW, Convert_NoOperands, 0, {  }, },
  { 657 /* cdq */, X86::CDQ, Convert_NoOperands, 0, {  }, },
  { 661 /* cdqe */, X86::CDQE, Convert_NoOperands, 0, {  }, },
  { 666 /* clac */, X86::CLAC, Convert_NoOperands, 0, {  }, },
  { 671 /* clc */, X86::CLC, Convert_NoOperands, 0, {  }, },
  { 675 /* cld */, X86::CLD, Convert_NoOperands, 0, {  }, },
  { 679 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 687 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 698 /* clgi */, X86::CLGI, Convert_NoOperands, 0, {  }, },
  { 703 /* cli */, X86::CLI, Convert_NoOperands, 0, {  }, },
  { 707 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR8 }, },
  { 712 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR32 }, },
  { 717 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR64 }, },
  { 722 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR16 }, },
  { 737 /* clts */, X86::CLTS, Convert_NoOperands, 0, {  }, },
  { 742 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 747 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, {  }, },
  { 754 /* cmc */, X86::CMC, Convert_NoOperands, 0, {  }, },
  { 758 /* cmova */, X86::CMOVA16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 758 /* cmova */, X86::CMOVA16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 758 /* cmova */, X86::CMOVA32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 758 /* cmova */, X86::CMOVA32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 758 /* cmova */, X86::CMOVA64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 758 /* cmova */, X86::CMOVA64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 764 /* cmovae */, X86::CMOVAE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 764 /* cmovae */, X86::CMOVAE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 764 /* cmovae */, X86::CMOVAE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 764 /* cmovae */, X86::CMOVAE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 764 /* cmovae */, X86::CMOVAE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 764 /* cmovae */, X86::CMOVAE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 816 /* cmovb */, X86::CMOVB16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 816 /* cmovb */, X86::CMOVB16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 816 /* cmovb */, X86::CMOVB32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 816 /* cmovb */, X86::CMOVB32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 816 /* cmovb */, X86::CMOVB64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 816 /* cmovb */, X86::CMOVB64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 822 /* cmovbe */, X86::CMOVBE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 822 /* cmovbe */, X86::CMOVBE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 822 /* cmovbe */, X86::CMOVBE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 822 /* cmovbe */, X86::CMOVBE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 822 /* cmovbe */, X86::CMOVBE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 822 /* cmovbe */, X86::CMOVBE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 874 /* cmove */, X86::CMOVE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 874 /* cmove */, X86::CMOVE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 874 /* cmove */, X86::CMOVE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 874 /* cmove */, X86::CMOVE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 874 /* cmove */, X86::CMOVE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 874 /* cmove */, X86::CMOVE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 901 /* cmovg */, X86::CMOVG16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 901 /* cmovg */, X86::CMOVG16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 901 /* cmovg */, X86::CMOVG32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 901 /* cmovg */, X86::CMOVG32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 901 /* cmovg */, X86::CMOVG64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 901 /* cmovg */, X86::CMOVG64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 907 /* cmovge */, X86::CMOVGE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 907 /* cmovge */, X86::CMOVGE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 907 /* cmovge */, X86::CMOVGE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 907 /* cmovge */, X86::CMOVGE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 907 /* cmovge */, X86::CMOVGE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 907 /* cmovge */, X86::CMOVGE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 959 /* cmovl */, X86::CMOVL16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 959 /* cmovl */, X86::CMOVL16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 959 /* cmovl */, X86::CMOVL32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 959 /* cmovl */, X86::CMOVL32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 959 /* cmovl */, X86::CMOVL64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 959 /* cmovl */, X86::CMOVL64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 965 /* cmovle */, X86::CMOVLE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 965 /* cmovle */, X86::CMOVLE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 965 /* cmovle */, X86::CMOVLE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 965 /* cmovle */, X86::CMOVLE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 965 /* cmovle */, X86::CMOVLE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 965 /* cmovle */, X86::CMOVLE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1017 /* cmovne */, X86::CMOVNE16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1017 /* cmovne */, X86::CMOVNE16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1017 /* cmovne */, X86::CMOVNE32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1017 /* cmovne */, X86::CMOVNE32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1017 /* cmovne */, X86::CMOVNE64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1017 /* cmovne */, X86::CMOVNE64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1048 /* cmovno */, X86::CMOVNO16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1048 /* cmovno */, X86::CMOVNO16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1048 /* cmovno */, X86::CMOVNO32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1048 /* cmovno */, X86::CMOVNO32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1048 /* cmovno */, X86::CMOVNO64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1048 /* cmovno */, X86::CMOVNO64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1079 /* cmovnp */, X86::CMOVNP16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1079 /* cmovnp */, X86::CMOVNP16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1079 /* cmovnp */, X86::CMOVNP32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1079 /* cmovnp */, X86::CMOVNP32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1079 /* cmovnp */, X86::CMOVNP64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1079 /* cmovnp */, X86::CMOVNP64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1110 /* cmovns */, X86::CMOVNS16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1110 /* cmovns */, X86::CMOVNS16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1110 /* cmovns */, X86::CMOVNS32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1110 /* cmovns */, X86::CMOVNS32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1110 /* cmovns */, X86::CMOVNS64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1110 /* cmovns */, X86::CMOVNS64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1141 /* cmovo */, X86::CMOVO16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1141 /* cmovo */, X86::CMOVO16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1141 /* cmovo */, X86::CMOVO32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1141 /* cmovo */, X86::CMOVO32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1141 /* cmovo */, X86::CMOVO64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1141 /* cmovo */, X86::CMOVO64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1168 /* cmovp */, X86::CMOVP16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1168 /* cmovp */, X86::CMOVP16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1168 /* cmovp */, X86::CMOVP32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1168 /* cmovp */, X86::CMOVP32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1168 /* cmovp */, X86::CMOVP64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1168 /* cmovp */, X86::CMOVP64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1195 /* cmovs */, X86::CMOVS16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1195 /* cmovs */, X86::CMOVS16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1195 /* cmovs */, X86::CMOVS32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1195 /* cmovs */, X86::CMOVS32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1195 /* cmovs */, X86::CMOVS64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1195 /* cmovs */, X86::CMOVS64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1222 /* cmp */, X86::CMP8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
  { 1222 /* cmp */, X86::CMP16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
  { 1222 /* cmp */, X86::CMP32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
  { 1222 /* cmp */, X86::CMP64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 1222 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1222 /* cmp */, X86::CMP16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 1222 /* cmp */, X86::CMP16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMP16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 1222 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1222 /* cmp */, X86::CMP32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 1222 /* cmp */, X86::CMP32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMP32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1222 /* cmp */, X86::CMP64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1222 /* cmp */, X86::CMP64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 1222 /* cmp */, X86::CMP64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 1222 /* cmp */, X86::CMP64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1222 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 1222 /* cmp */, X86::CMP8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMP8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 1222 /* cmp */, X86::CMP16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1222 /* cmp */, X86::CMP16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 1222 /* cmp */, X86::CMP16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMP32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1222 /* cmp */, X86::CMP32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 1222 /* cmp */, X86::CMP32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMP64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1222 /* cmp */, X86::CMP64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 1222 /* cmp */, X86::CMP64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 1222 /* cmp */, X86::CMP8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 1222 /* cmp */, X86::CMP8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 1222 /* cmp */, X86::CMPPDrri, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPPDrmi, Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_Mem128 }, },
  { 1222 /* cmp */, X86::CMPPSrri, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPPSrmi, Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_Mem128 }, },
  { 1222 /* cmp */, X86::CMPSDrr, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPSDrm, Convert__Reg1_2__Tie0__Mem645_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_Mem64 }, },
  { 1222 /* cmp */, X86::CMPSSrr, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
  { 1222 /* cmp */, X86::CMPSSrm, Convert__Reg1_2__Tie0__Mem325_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_Mem32 }, },
  { 1236 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 1236 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 1242 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 1242 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 1253 /* cmps */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
  { 1253 /* cmps */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
  { 1253 /* cmps */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
  { 1253 /* cmps */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
  { 1258 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
  { 1264 /* cmpsd */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
  { 1264 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 1264 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 1276 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, 0, { MCK_SrcIdx64, MCK_DstIdx64 }, },
  { 1282 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 1282 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 1288 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
  { 1299 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 1299 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1299 /* cmpxchg */, X86::CMPXCHG64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1299 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 1299 /* cmpxchg */, X86::CMPXCHG16rm, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 1299 /* cmpxchg */, X86::CMPXCHG32rm, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 1299 /* cmpxchg */, X86::CMPXCHG64rm, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 1299 /* cmpxchg */, X86::CMPXCHG8rm, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 1307 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, 0, { MCK_Mem128 }, },
  { 1318 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 1364 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1364 /* comisd */, X86::COMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1371 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1371 /* comiss */, X86::COMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 1378 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, {  }, },
  { 1384 /* cqo */, X86::CQO, Convert_NoOperands, 0, {  }, },
  { 1393 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
  { 1393 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 1393 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
  { 1393 /* crc32 */, X86::CRC32r32m16, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
  { 1393 /* crc32 */, X86::CRC32r32m32, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1393 /* crc32 */, X86::CRC32r32m8, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
  { 1393 /* crc32 */, X86::CRC32r64r64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 1393 /* crc32 */, X86::CRC32r64r8, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
  { 1393 /* crc32 */, X86::CRC32r64m64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1393 /* crc32 */, X86::CRC32r64m8, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
  { 1427 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 1430 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1430 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1439 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1439 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 1448 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1448 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 1457 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
  { 1457 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR64, MCK_Mem128 }, },
  { 1466 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1466 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 1475 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
  { 1475 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1484 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
  { 1484 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1493 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1493 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 1502 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1502 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1511 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
  { 1511 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1520 /* cvtsd2si */, X86::CVTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1549 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1549 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1558 /* cvtsi2sd */, X86::CVTSI2SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
  { 1558 /* cvtsi2sd */, X86::CVTSI2SD64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
  { 1558 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 1558 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 1558 /* cvtsi2sd */, X86::CVTSI2SD64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1587 /* cvtsi2ss */, X86::CVTSI2SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
  { 1587 /* cvtsi2ss */, X86::CVTSI2SS64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
  { 1587 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 1587 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 1587 /* cvtsi2ss */, X86::CVTSI2SS64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1616 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1616 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
  { 1625 /* cvtss2si */, X86::CVTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
  { 1654 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1654 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 1664 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
  { 1664 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR64, MCK_Mem128 }, },
  { 1674 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1674 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 1684 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
  { 1684 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1694 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
  { 1726 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
  { 1758 /* cwd */, X86::CWD, Convert_NoOperands, 0, {  }, },
  { 1762 /* cwde */, X86::CWDE, Convert_NoOperands, 0, {  }, },
  { 1777 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 1781 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 1785 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, 0, {  }, },
  { 1792 /* dec */, X86::DEC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
  { 1792 /* dec */, X86::DEC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
  { 1792 /* dec */, X86::DEC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 1792 /* dec */, X86::DEC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 1792 /* dec */, X86::DEC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 1792 /* dec */, X86::DEC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
  { 1792 /* dec */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 1792 /* dec */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 1792 /* dec */, X86::DEC64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 1792 /* dec */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 1816 /* div */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 1816 /* div */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 1816 /* div */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 1816 /* div */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 1816 /* div */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 1816 /* div */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 1816 /* div */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 1816 /* div */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 1816 /* div */, X86::DIV8r, Convert__Reg1_1, 0, { MCK_AL, MCK_GR8 }, },
  { 1816 /* div */, X86::DIV8m, Convert__Mem85_1, 0, { MCK_AL, MCK_Mem8 }, },
  { 1816 /* div */, X86::DIV16r, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
  { 1816 /* div */, X86::DIV16m, Convert__Mem165_1, 0, { MCK_AX, MCK_Mem16 }, },
  { 1816 /* div */, X86::DIV32r, Convert__Reg1_1, 0, { MCK_EAX, MCK_GR32 }, },
  { 1816 /* div */, X86::DIV32m, Convert__Mem325_1, 0, { MCK_EAX, MCK_Mem32 }, },
  { 1816 /* div */, X86::DIV64r, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
  { 1816 /* div */, X86::DIV64m, Convert__Mem645_1, 0, { MCK_RAX, MCK_Mem64 }, },
  { 1830 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1830 /* divpd */, X86::DIVPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 1836 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1836 /* divps */, X86::DIVPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 1847 /* divsd */, X86::DIVSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1847 /* divsd */, X86::DIVSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 1853 /* divss */, X86::DIVSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1853 /* divss */, X86::DIVSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 1864 /* dppd */, X86::DPPDrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 1864 /* dppd */, X86::DPPDrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 1869 /* dpps */, X86::DPPSrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 1869 /* dpps */, X86::DPPSrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 1874 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 1877 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, {  }, },
  { 1882 /* encls */, X86::ENCLS, Convert_NoOperands, 0, {  }, },
  { 1888 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, {  }, },
  { 1894 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
  { 1900 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, {  }, },
  { 1903 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 1903 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 1913 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 1913 /* extrq */, X86::EXTRQI, Convert__Reg1_0__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
  { 1919 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, {  }, },
  { 1925 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, {  }, },
  { 1930 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
  { 1930 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 1930 /* fadd */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 1930 /* fadd */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 1930 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 1930 /* fadd */, X86::ADD_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 1930 /* fadd */, X86::ADD_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 1941 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 1953 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
  { 1958 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
  { 1964 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, {  }, },
  { 1969 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 1976 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 1984 /* fcmove */, X86::CMOVE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 1991 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 1999 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2008 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2016 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2024 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2031 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, {  }, },
  { 2031 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2031 /* fcom */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2031 /* fcom */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2031 /* fcom */, X86::ST_FCOMST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2036 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, {  }, },
  { 2036 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2036 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2036 /* fcomi */, X86::COM_FIr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2048 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, {  }, },
  { 2048 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2048 /* fcomp */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2048 /* fcomp */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2048 /* fcomp */, X86::ST_FCOMPST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2048 /* fcomp */, X86::ST_FCOMPST0r_alt, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2054 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, {  }, },
  { 2054 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2054 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2054 /* fcompi */, X86::COM_FIPr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2068 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, {  }, },
  { 2088 /* fcos */, X86::COS_F, Convert_NoOperands, 0, {  }, },
  { 2093 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, {  }, },
  { 2101 /* fdisi8087_nop */, X86::fdisi8087_nop, Convert_NoOperands, 0, {  }, },
  { 2115 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2115 /* fdiv */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2115 /* fdiv */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2115 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2115 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2115 /* fdiv */, X86::DIV_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2126 /* fdivp */, X86::DIV_FPrST0, Convert__regST1, 0, {  }, },
  { 2126 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2126 /* fdivp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2126 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2126 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2132 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2132 /* fdivr */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2132 /* fdivr */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2132 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2132 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2132 /* fdivr */, X86::DIVR_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2145 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST1, 0, {  }, },
  { 2145 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2145 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2145 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2145 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2165 /* femms */, X86::FEMMS, Convert_NoOperands, 0, {  }, },
  { 2171 /* feni8087_nop */, X86::feni8087_nop, Convert_NoOperands, 0, {  }, },
  { 2184 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2190 /* ffreep */, X86::FP_FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2197 /* fiadd */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2197 /* fiadd */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2217 /* ficom */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2217 /* ficom */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2230 /* ficomp */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2230 /* ficomp */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2260 /* fidiv */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2260 /* fidiv */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2273 /* fidivr */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2273 /* fidivr */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2303 /* fild */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2303 /* fild */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2303 /* fild */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2327 /* fimul */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2327 /* fimul */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2347 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, {  }, },
  { 2355 /* fist */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2355 /* fist */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2366 /* fistp */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2366 /* fistp */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2366 /* fistp */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2400 /* fisttp */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2400 /* fisttp */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2400 /* fisttp */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2432 /* fisub */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2432 /* fisub */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2445 /* fisubr */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2445 /* fisubr */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2475 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2475 /* fld */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2475 /* fld */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2475 /* fld */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
  { 2479 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, {  }, },
  { 2484 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2490 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2502 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, {  }, },
  { 2509 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, {  }, },
  { 2516 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, {  }, },
  { 2523 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, {  }, },
  { 2530 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, {  }, },
  { 2546 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, {  }, },
  { 2551 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
  { 2551 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2551 /* fmul */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2551 /* fmul */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2551 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2551 /* fmul */, X86::MUL_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2551 /* fmul */, X86::MUL_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2562 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2574 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, {  }, },
  { 2581 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, {  }, },
  { 2588 /* fnop */, X86::FNOP, Convert_NoOperands, 0, {  }, },
  { 2593 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2600 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2607 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2615 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, {  }, },
  { 2615 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AL }, },
  { 2615 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
  { 2615 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_EAX }, },
  { 2615 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2622 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, {  }, },
  { 2629 /* fprem */, X86::FPREM, Convert_NoOperands, 0, {  }, },
  { 2635 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, {  }, },
  { 2642 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, {  }, },
  { 2648 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, {  }, },
  { 2656 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2663 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 2666 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, {  }, },
  { 2673 /* fsetpm */, X86::FSETPM, Convert_NoOperands, 0, {  }, },
  { 2680 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, {  }, },
  { 2685 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, {  }, },
  { 2693 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, {  }, },
  { 2699 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2699 /* fst */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2699 /* fst */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2708 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2708 /* fstp */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2708 /* fstp */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2708 /* fstp */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
  { 2708 /* fstp */, X86::ST_FPST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2708 /* fstp */, X86::ST_FPST0r_alt, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2719 /* fstpnce */, X86::ST_FPNCEST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2744 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2744 /* fsub */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2744 /* fsub */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2744 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2744 /* fsub */, X86::SUB_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2744 /* fsub */, X86::SUB_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2755 /* fsubp */, X86::SUB_FPrST0, Convert__regST1, 0, {  }, },
  { 2755 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2755 /* fsubp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2755 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2755 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2761 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2761 /* fsubr */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2761 /* fsubr */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2761 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2761 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2761 /* fsubr */, X86::SUBR_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2774 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST1, 0, {  }, },
  { 2774 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2774 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2774 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2774 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
  { 2794 /* ftst */, X86::TST_F, Convert_NoOperands, 0, {  }, },
  { 2799 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, {  }, },
  { 2799 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2805 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, {  }, },
  { 2805 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2805 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2805 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2812 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, {  }, },
  { 2812 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2819 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, {  }, },
  { 2819 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2819 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
  { 2819 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2827 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, {  }, },
  { 2835 /* fxam */, X86::FXAM, Convert_NoOperands, 0, {  }, },
  { 2840 /* fxch */, X86::XCH_F, Convert__regST1, 0, {  }, },
  { 2840 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
  { 2840 /* fxch */, X86::ST_FXCHST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2840 /* fxch */, X86::ST_FXCHST0r_alt, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
  { 2845 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 2853 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 2863 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 2870 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 2879 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, {  }, },
  { 2887 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, {  }, },
  { 2893 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, {  }, },
  { 2901 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, {  }, },
  { 2908 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 2911 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 2911 /* haddpd */, X86::HADDPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 2918 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 2918 /* haddps */, X86::HADDPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 2925 /* hlt */, X86::HLT, Convert_NoOperands, 0, {  }, },
  { 2929 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 2929 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 2936 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 2936 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 2943 /* icebp */, X86::INT1, Convert_NoOperands, 0, {  }, },
  { 2949 /* idiv */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 2949 /* idiv */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 2949 /* idiv */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 2949 /* idiv */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 2949 /* idiv */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2949 /* idiv */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2949 /* idiv */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2949 /* idiv */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 2949 /* idiv */, X86::IDIV8r, Convert__Reg1_1, 0, { MCK_AL, MCK_GR8 }, },
  { 2949 /* idiv */, X86::IDIV8m, Convert__Mem85_1, 0, { MCK_AL, MCK_Mem8 }, },
  { 2949 /* idiv */, X86::IDIV16r, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
  { 2949 /* idiv */, X86::IDIV16m, Convert__Mem165_1, 0, { MCK_AX, MCK_Mem16 }, },
  { 2949 /* idiv */, X86::IDIV32r, Convert__Reg1_1, 0, { MCK_EAX, MCK_GR32 }, },
  { 2949 /* idiv */, X86::IDIV32m, Convert__Mem325_1, 0, { MCK_EAX, MCK_Mem32 }, },
  { 2949 /* idiv */, X86::IDIV64r, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
  { 2949 /* idiv */, X86::IDIV64m, Convert__Mem645_1, 0, { MCK_RAX, MCK_Mem64 }, },
  { 2978 /* imul */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 2978 /* imul */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 2978 /* imul */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 2978 /* imul */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 2978 /* imul */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 2978 /* imul */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 2978 /* imul */, X86::IMUL64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 2978 /* imul */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 2978 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 2978 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 2978 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 2978 /* imul */, X86::IMUL16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 2978 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 2978 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 2978 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 2978 /* imul */, X86::IMUL32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 2978 /* imul */, X86::IMUL64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 2978 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 2978 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 2978 /* imul */, X86::IMUL64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 2978 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_1__ImmSExti16i81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmSExti16i8 }, },
  { 2978 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR16, MCK_GR16, MCK_Imm }, },
  { 2978 /* imul */, X86::IMUL16rmi8, Convert__Reg1_0__Mem165_1__ImmSExti16i81_2, 0, { MCK_GR16, MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 2978 /* imul */, X86::IMUL16rmi, Convert__Reg1_0__Mem165_1__Imm1_2, 0, { MCK_GR16, MCK_Mem16, MCK_Imm }, },
  { 2978 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_1__ImmSExti32i81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmSExti32i8 }, },
  { 2978 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
  { 2978 /* imul */, X86::IMUL32rmi8, Convert__Reg1_0__Mem325_1__ImmSExti32i81_2, 0, { MCK_GR32, MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 2978 /* imul */, X86::IMUL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
  { 2978 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_1__ImmSExti64i81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i8 }, },
  { 2978 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
  { 2978 /* imul */, X86::IMUL64rmi8, Convert__Reg1_0__Mem645_1__ImmSExti64i81_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 2978 /* imul */, X86::IMUL64rmi32, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 3007 /* in */, X86::IN8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
  { 3007 /* in */, X86::IN8ri, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
  { 3007 /* in */, X86::IN16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
  { 3007 /* in */, X86::IN16ri, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
  { 3007 /* in */, X86::IN32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
  { 3007 /* in */, X86::IN32ri, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
  { 3010 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 3010 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 3014 /* inc */, X86::INC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
  { 3014 /* inc */, X86::INC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
  { 3014 /* inc */, X86::INC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 3014 /* inc */, X86::INC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 3014 /* inc */, X86::INC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 3014 /* inc */, X86::INC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
  { 3014 /* inc */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 3014 /* inc */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 3014 /* inc */, X86::INC64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 3014 /* inc */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 3038 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 3038 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 3042 /* ins */, X86::INSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_DX }, },
  { 3042 /* ins */, X86::INSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_DX }, },
  { 3042 /* ins */, X86::INSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_DX }, },
  { 3046 /* insb */, X86::INSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_DX }, },
  { 3051 /* insd */, X86::INSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_DX }, },
  { 3056 /* insertps */, X86::INSERTPSrr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 3056 /* insertps */, X86::INSERTPSrm, Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 3065 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 3065 /* insertq */, X86::INSERTQI, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
  { 3078 /* insw */, X86::INSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_DX }, },
  { 3083 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 3087 /* int1 */, X86::INT1, Convert_NoOperands, 0, {  }, },
  { 3092 /* int3 */, X86::INT3, Convert_NoOperands, 0, {  }, },
  { 3097 /* into */, X86::INTO, Convert_NoOperands, 0, {  }, },
  { 3102 /* invd */, X86::INVD, Convert_NoOperands, 0, {  }, },
  { 3107 /* invept */, X86::INVEPT32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
  { 3107 /* invept */, X86::INVEPT64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
  { 3114 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 3121 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
  { 3121 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_ECX }, },
  { 3129 /* invpcid */, X86::INVPCID32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
  { 3129 /* invpcid */, X86::INVPCID64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
  { 3137 /* invvpid */, X86::INVVPID32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
  { 3137 /* invvpid */, X86::INVVPID64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
  { 3145 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 3145 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 3149 /* iret */, X86::IRET16, Convert_NoOperands, 0, {  }, },
  { 3154 /* iretd */, X86::IRET32, Convert_NoOperands, 0, {  }, },
  { 3166 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 3178 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3181 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3185 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3188 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3192 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
  { 3197 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3200 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3206 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3209 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3213 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3216 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3220 /* jmp */, X86::JMP16r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
  { 3220 /* jmp */, X86::JMP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 3220 /* jmp */, X86::JMP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 3220 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3220 /* jmp */, X86::JMP16m, Convert__Mem165_0, Feature_Not64BitMode, { MCK_Mem16 }, },
  { 3220 /* jmp */, X86::JMP16m, Convert__Mem165_0, Feature_In16BitMode, { MCK_Mem16 }, },
  { 3220 /* jmp */, X86::JMP32m, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
  { 3220 /* jmp */, X86::JMP32m, Convert__Mem325_0, Feature_In32BitMode, { MCK_Mem32 }, },
  { 3220 /* jmp */, X86::JMP64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
  { 3220 /* jmp */, X86::JMP64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
  { 3220 /* jmp */, X86::FARJMP16i, Convert__Imm1_2__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3220 /* jmp */, X86::FARJMP32i, Convert__Imm1_2__Imm1_0, Feature_Not16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3224 /* jmpl */, X86::FARJMP32i, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3234 /* jmpw */, X86::FARJMP16i, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3239 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3243 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3247 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3251 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3255 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3258 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3261 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
  { 3267 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3270 /* kaddb */, X86::KADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3276 /* kaddd */, X86::KADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3282 /* kaddq */, X86::KADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3288 /* kaddw */, X86::KADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3294 /* kandb */, X86::KANDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3300 /* kandd */, X86::KANDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3306 /* kandnb */, X86::KANDNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3313 /* kandnd */, X86::KANDNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3320 /* kandnq */, X86::KANDNQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3327 /* kandnw */, X86::KANDNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3334 /* kandq */, X86::KANDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3340 /* kandw */, X86::KANDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3346 /* kmovb */, X86::KMOVBkk, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3346 /* kmovb */, X86::KMOVBkr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_GR32 }, },
  { 3346 /* kmovb */, X86::KMOVBkm, Convert__Reg1_0__Mem85_1, Feature_HasDQI, { MCK_VK1, MCK_Mem8 }, },
  { 3346 /* kmovb */, X86::KMOVBrk, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_GR32, MCK_VK1 }, },
  { 3346 /* kmovb */, X86::KMOVBmk, Convert__Mem85_0__Reg1_1, Feature_HasDQI, { MCK_Mem8, MCK_VK1 }, },
  { 3352 /* kmovd */, X86::KMOVDkk, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3352 /* kmovd */, X86::KMOVDkr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_GR32 }, },
  { 3352 /* kmovd */, X86::KMOVDkm, Convert__Reg1_0__Mem325_1, Feature_HasBWI, { MCK_VK1, MCK_Mem32 }, },
  { 3352 /* kmovd */, X86::KMOVDrk, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_GR32, MCK_VK1 }, },
  { 3352 /* kmovd */, X86::KMOVDmk, Convert__Mem325_0__Reg1_1, Feature_HasBWI, { MCK_Mem32, MCK_VK1 }, },
  { 3358 /* kmovq */, X86::KMOVQkk, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3358 /* kmovq */, X86::KMOVQkr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_GR64 }, },
  { 3358 /* kmovq */, X86::KMOVQkm, Convert__Reg1_0__Mem645_1, Feature_HasBWI, { MCK_VK1, MCK_Mem64 }, },
  { 3358 /* kmovq */, X86::KMOVQrk, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_GR64, MCK_VK1 }, },
  { 3358 /* kmovq */, X86::KMOVQmk, Convert__Mem645_0__Reg1_1, Feature_HasBWI, { MCK_Mem64, MCK_VK1 }, },
  { 3364 /* kmovw */, X86::KMOVWkk, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
  { 3364 /* kmovw */, X86::KMOVWkr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VK1, MCK_GR32 }, },
  { 3364 /* kmovw */, X86::KMOVWkm, Convert__Reg1_0__Mem165_1, Feature_HasAVX512, { MCK_VK1, MCK_Mem16 }, },
  { 3364 /* kmovw */, X86::KMOVWrk, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_VK1 }, },
  { 3364 /* kmovw */, X86::KMOVWmk, Convert__Mem165_0__Reg1_1, Feature_HasAVX512, { MCK_Mem16, MCK_VK1 }, },
  { 3370 /* knotb */, X86::KNOTBrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3376 /* knotd */, X86::KNOTDrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3382 /* knotq */, X86::KNOTQrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3388 /* knotw */, X86::KNOTWrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
  { 3394 /* korb */, X86::KORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3399 /* kord */, X86::KORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3404 /* korq */, X86::KORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3409 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3418 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3427 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3436 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
  { 3445 /* korw */, X86::KORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3450 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
  { 3459 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
  { 3468 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
  { 3477 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
  { 3486 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
  { 3495 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
  { 3504 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
  { 3513 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
  { 3522 /* ktestb */, X86::KTESTBrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3529 /* ktestd */, X86::KTESTDrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3536 /* ktestq */, X86::KTESTQrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
  { 3543 /* ktestw */, X86::KTESTWrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
  { 3550 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3559 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3568 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3577 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3584 /* kxnord */, X86::KXNORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3591 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3598 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3605 /* kxorb */, X86::KXORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3611 /* kxord */, X86::KXORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3617 /* kxorq */, X86::KXORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3623 /* kxorw */, X86::KXORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
  { 3629 /* lahf */, X86::LAHF, Convert_NoOperands, 0, {  }, },
  { 3634 /* lar */, X86::LAR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 3634 /* lar */, X86::LAR16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 3634 /* lar */, X86::LAR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 3634 /* lar */, X86::LAR32rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
  { 3634 /* lar */, X86::LAR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR32 }, },
  { 3634 /* lar */, X86::LAR64rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
  { 3653 /* lcall */, X86::FARCALL32m, Convert__Mem5_0, Feature_Not16BitMode, { MCK_Mem }, },
  { 3653 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, Feature_In16BitMode, { MCK_Mem }, },
  { 3653 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 3653 /* lcall */, X86::FARCALL32m, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 3653 /* lcall */, X86::FARCALL64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 3653 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
  { 3653 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
  { 3653 /* lcall */, X86::FARCALL32i, Convert__Imm1_2__Imm1_0, Feature_Not16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3653 /* lcall */, X86::FARCALL16i, Convert__Imm1_2__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3680 /* lddqu */, X86::LDDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 3686 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 3694 /* lds */, X86::LDS16rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem }, },
  { 3694 /* lds */, X86::LDS32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
  { 3708 /* lea */, X86::LEA16r, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
  { 3708 /* lea */, X86::LEA32r, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
  { 3708 /* lea */, X86::LEA64_32r, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_GR32, MCK_Mem }, },
  { 3708 /* lea */, X86::LEA64r, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
  { 3722 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 3722 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 3733 /* les */, X86::LES16rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem }, },
  { 3733 /* les */, X86::LES32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
  { 3747 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, {  }, },
  { 3754 /* lfs */, X86::LFS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
  { 3754 /* lfs */, X86::LFS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
  { 3754 /* lfs */, X86::LFS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
  { 3773 /* lgdt */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 3773 /* lgdt */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 3773 /* lgdt */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
  { 3796 /* lgs */, X86::LGS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
  { 3796 /* lgs */, X86::LGS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
  { 3796 /* lgs */, X86::LGS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
  { 3815 /* lidt */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 3815 /* lidt */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 3815 /* lidt */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP32m, Convert__Mem5_0, Feature_Not16BitMode, { MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP16m, Convert__Mem5_0, Feature_In16BitMode, { MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP16m, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP32m, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 3838 /* ljmp */, X86::FARJMP16i, Convert__Imm1_2__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3838 /* ljmp */, X86::FARJMP32i, Convert__Imm1_2__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3838 /* ljmp */, X86::FARJMP32i, Convert__Imm1_2__Imm1_0, Feature_Not16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3838 /* ljmp */, X86::FARJMP16i, Convert__Imm1_2__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK__COLON_, MCK_Imm }, },
  { 3861 /* lldt */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 3861 /* lldt */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 3872 /* lmsw */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 3872 /* lmsw */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 3883 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, {  }, },
  { 3888 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
  { 3888 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
  { 3888 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
  { 3888 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
  { 3888 /* lods */, X86::LODSB, Convert__SrcIdx82_1, 0, { MCK_AL, MCK_SrcIdx8 }, },
  { 3888 /* lods */, X86::LODSW, Convert__SrcIdx162_1, 0, { MCK_AX, MCK_SrcIdx16 }, },
  { 3888 /* lods */, X86::LODSL, Convert__SrcIdx322_1, 0, { MCK_EAX, MCK_SrcIdx32 }, },
  { 3888 /* lods */, X86::LODSQ, Convert__SrcIdx642_1, Feature_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, },
  { 3893 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
  { 3893 /* lodsb */, X86::LODSB, Convert__SrcIdx82_1, 0, { MCK_AL, MCK_SrcIdx8 }, },
  { 3899 /* lodsd */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
  { 3899 /* lodsd */, X86::LODSL, Convert__SrcIdx322_1, 0, { MCK_EAX, MCK_SrcIdx32 }, },
  { 3911 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
  { 3911 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_1, 0, { MCK_RAX, MCK_SrcIdx64 }, },
  { 3917 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
  { 3917 /* lodsw */, X86::LODSW, Convert__SrcIdx162_1, 0, { MCK_AX, MCK_SrcIdx16 }, },
  { 3923 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3928 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3934 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 3959 /* lsl */, X86::LSL16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 3959 /* lsl */, X86::LSL16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 3959 /* lsl */, X86::LSL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 3959 /* lsl */, X86::LSL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 3959 /* lsl */, X86::LSL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 3959 /* lsl */, X86::LSL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 3978 /* lss */, X86::LSS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
  { 3978 /* lss */, X86::LSS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
  { 3978 /* lss */, X86::LSS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
  { 3997 /* ltr */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 3997 /* ltr */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4006 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 4006 /* lzcnt */, X86::LZCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 4006 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 4006 /* lzcnt */, X86::LZCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 4006 /* lzcnt */, X86::LZCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 4006 /* lzcnt */, X86::LZCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 4033 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
  { 4033 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
  { 4044 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
  { 4044 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
  { 4053 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4053 /* maxpd */, X86::MAXPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4059 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4059 /* maxps */, X86::MAXPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4065 /* maxsd */, X86::MAXSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4065 /* maxsd */, X86::MAXSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4071 /* maxss */, X86::MAXSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4071 /* maxss */, X86::MAXSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 4077 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, {  }, },
  { 4084 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4084 /* minpd */, X86::MINPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4090 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4090 /* minps */, X86::MINPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4096 /* minsd */, X86::MINSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4096 /* minsd */, X86::MINSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4102 /* minss */, X86::MINSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4102 /* minss */, X86::MINSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 4108 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, {  }, },
  { 4108 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
  { 4108 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
  { 4116 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, {  }, },
  { 4116 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
  { 4116 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
  { 4125 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, {  }, },
  { 4133 /* mov */, X86::MOV8ao16, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
  { 4133 /* mov */, X86::MOV8ao32, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
  { 4133 /* mov */, X86::MOV8ao64, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
  { 4133 /* mov */, X86::MOV16ao16, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
  { 4133 /* mov */, X86::MOV16ao32, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
  { 4133 /* mov */, X86::MOV16ao64, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
  { 4133 /* mov */, X86::MOV32ao16, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
  { 4133 /* mov */, X86::MOV32ao32, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
  { 4133 /* mov */, X86::MOV32ao64, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
  { 4133 /* mov */, X86::MOV64ao32, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
  { 4133 /* mov */, X86::MOV64ao64, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
  { 4133 /* mov */, X86::MOV16sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
  { 4133 /* mov */, X86::MOV32sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
  { 4133 /* mov */, X86::MOV64sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
  { 4133 /* mov */, X86::MOV16sm, Convert__Reg1_0__Mem165_1, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
  { 4133 /* mov */, X86::MOV32sm, Convert__Reg1_0__Mem165_1, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
  { 4133 /* mov */, X86::MOV64sm, Convert__Reg1_0__Mem165_1, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
  { 4133 /* mov */, X86::MOV32sm, Convert__Reg1_0__Mem165_1, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
  { 4133 /* mov */, X86::MOV32dr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
  { 4133 /* mov */, X86::MOV64dr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
  { 4133 /* mov */, X86::MOV32cr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
  { 4133 /* mov */, X86::MOV64cr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
  { 4133 /* mov */, X86::MOV16rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
  { 4133 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 4133 /* mov */, X86::MOV16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 4133 /* mov */, X86::MOV16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 4133 /* mov */, X86::MOV32rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
  { 4133 /* mov */, X86::MOV32rd, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
  { 4133 /* mov */, X86::MOV32rc, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
  { 4133 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 4133 /* mov */, X86::MOV32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 4133 /* mov */, X86::MOV32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 4133 /* mov */, X86::MOV64rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
  { 4133 /* mov */, X86::MOV64rd, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
  { 4133 /* mov */, X86::MOV64rc, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
  { 4133 /* mov */, X86::MOV64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 4133 /* mov */, X86::MOV64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 4133 /* mov */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
  { 4133 /* mov */, X86::MOV64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 4133 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 4133 /* mov */, X86::MOV8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 4133 /* mov */, X86::MOV8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 4133 /* mov */, X86::MOV16o16a, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
  { 4133 /* mov */, X86::MOV32o16a, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
  { 4133 /* mov */, X86::MOV8o16a, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
  { 4133 /* mov */, X86::MOV16o32a, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
  { 4133 /* mov */, X86::MOV32o32a, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
  { 4133 /* mov */, X86::MOV64o32a, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
  { 4133 /* mov */, X86::MOV8o32a, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
  { 4133 /* mov */, X86::MOV16o64a, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
  { 4133 /* mov */, X86::MOV32o64a, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
  { 4133 /* mov */, X86::MOV64o64a, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
  { 4133 /* mov */, X86::MOV8o64a, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
  { 4133 /* mov */, X86::MOV16ms, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
  { 4133 /* mov */, X86::MOV32ms, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
  { 4133 /* mov */, X86::MOV64ms, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
  { 4133 /* mov */, X86::MOV32ms, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
  { 4133 /* mov */, X86::MOV16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 4133 /* mov */, X86::MOV16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 4133 /* mov */, X86::MOV32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 4133 /* mov */, X86::MOV32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 4133 /* mov */, X86::MOV64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 4133 /* mov */, X86::MOV64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 4133 /* mov */, X86::MOV8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 4133 /* mov */, X86::MOV8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 4137 /* movabs */, X86::MOV8ao64, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
  { 4137 /* movabs */, X86::MOV16ao64, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
  { 4137 /* movabs */, X86::MOV32ao64, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
  { 4137 /* movabs */, X86::MOV64ao64, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
  { 4137 /* movabs */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
  { 4137 /* movabs */, X86::MOV16o64a, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
  { 4137 /* movabs */, X86::MOV32o64a, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
  { 4137 /* movabs */, X86::MOV64o64a, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
  { 4137 /* movabs */, X86::MOV8o64a, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
  { 4176 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4176 /* movapd */, X86::MOVAPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4176 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4183 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4183 /* movaps */, X86::MOVAPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4183 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4195 /* movbe */, X86::MOVBE16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 4195 /* movbe */, X86::MOVBE32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 4195 /* movbe */, X86::MOVBE64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 4195 /* movbe */, X86::MOVBE16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 4195 /* movbe */, X86::MOVBE32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 4195 /* movbe */, X86::MOVBE64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 4222 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR32 }, },
  { 4222 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR64 }, },
  { 4222 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
  { 4222 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
  { 4222 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 4222 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VR64 }, },
  { 4222 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 4222 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VR64 }, },
  { 4222 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR64 }, },
  { 4222 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
  { 4227 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4227 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4235 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
  { 4243 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4243 /* movdqa */, X86::MOVDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4243 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4250 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4250 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4250 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4257 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4265 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4265 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4272 /* movhps */, X86::MOVHPSrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4272 /* movhps */, X86::MOVHPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4284 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4292 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4292 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4299 /* movlps */, X86::MOVLPSrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4299 /* movlps */, X86::MOVLPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4306 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
  { 4315 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
  { 4324 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4332 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4341 /* movnti */, X86::MOVNTImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 4341 /* movnti */, X86::MOVNTI_64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 4364 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4372 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4380 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4387 /* movntsd */, X86::MOVNTSD, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4395 /* movntss */, X86::MOVNTSS, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
  { 4403 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4403 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR64 }, },
  { 4403 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4403 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4403 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
  { 4403 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
  { 4403 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4403 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VR64 }, },
  { 4403 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 4403 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 4403 /* movq */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
  { 4403 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR64 }, },
  { 4403 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4408 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
  { 4416 /* movs */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
  { 4416 /* movs */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
  { 4416 /* movs */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
  { 4416 /* movs */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
  { 4421 /* movsb */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
  { 4448 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4448 /* movsd */, X86::MOVSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4448 /* movsd */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
  { 4448 /* movsd */, X86::MOVSDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 4454 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4454 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4469 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4469 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4485 /* movsq */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, 0, { MCK_DstIdx64, MCK_SrcIdx64 }, },
  { 4491 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4491 /* movss */, X86::MOVSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 4491 /* movss */, X86::MOVSSmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
  { 4497 /* movsw */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
  { 4517 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
  { 4517 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
  { 4517 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
  { 4517 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
  { 4517 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
  { 4517 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
  { 4517 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
  { 4517 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
  { 4517 /* movsx */, X86::MOVSX32rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
  { 4517 /* movsx */, X86::MOVSX32rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
  { 4517 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
  { 4517 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
  { 4517 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR32 }, },
  { 4517 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
  { 4517 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
  { 4517 /* movsx */, X86::MOVSX64rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
  { 4517 /* movsx */, X86::MOVSX64rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
  { 4523 /* movsxd */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR32 }, },
  { 4523 /* movsxd */, X86::MOVSX64rm32, Convert__Reg1_0__Mem325_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem32 }, },
  { 4530 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4530 /* movupd */, X86::MOVUPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4530 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4537 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4537 /* movups */, X86::MOVUPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4537 /* movups */, X86::MOVUPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 4584 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
  { 4584 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
  { 4584 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
  { 4584 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
  { 4584 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
  { 4584 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
  { 4584 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
  { 4584 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
  { 4584 /* movzx */, X86::MOVZX32rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
  { 4584 /* movzx */, X86::MOVZX32rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
  { 4584 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
  { 4584 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
  { 4584 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
  { 4584 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
  { 4584 /* movzx */, X86::MOVZX64rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
  { 4584 /* movzx */, X86::MOVZX64rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
  { 4590 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 4590 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 4598 /* mul */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4598 /* mul */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4598 /* mul */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 4598 /* mul */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 4598 /* mul */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4598 /* mul */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4598 /* mul */, X86::MUL64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 4598 /* mul */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 4612 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4612 /* mulpd */, X86::MULPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4618 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4618 /* mulps */, X86::MULPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4629 /* mulsd */, X86::MULSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4629 /* mulsd */, X86::MULSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 4635 /* mulss */, X86::MULSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4635 /* mulss */, X86::MULSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 4646 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 4646 /* mulx */, X86::MULX32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
  { 4646 /* mulx */, X86::MULX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 4646 /* mulx */, X86::MULX64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
  { 4663 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, {  }, },
  { 4663 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_ECX, MCK_EAX }, },
  { 4663 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RCX, MCK_RAX }, },
  { 4669 /* mwaitx */, X86::MWAITXrr, Convert_NoOperands, 0, {  }, },
  { 4669 /* mwaitx */, X86::MWAITXrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EBX, MCK_ECX, MCK_EAX }, },
  { 4669 /* mwaitx */, X86::MWAITXrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RBX, MCK_RCX, MCK_RAX }, },
  { 4676 /* neg */, X86::NEG16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
  { 4676 /* neg */, X86::NEG32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 4676 /* neg */, X86::NEG64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 4676 /* neg */, X86::NEG8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
  { 4676 /* neg */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4676 /* neg */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4676 /* neg */, X86::NEG64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 4676 /* neg */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 4700 /* nop */, X86::NOOP, Convert_NoOperands, 0, {  }, },
  { 4700 /* nop */, X86::NOOP18_16r4, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4700 /* nop */, X86::NOOP18_16r5, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4700 /* nop */, X86::NOOP18_16r6, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4700 /* nop */, X86::NOOP18_16r7, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 4700 /* nop */, X86::NOOP18_r4, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4700 /* nop */, X86::NOOP18_r5, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4700 /* nop */, X86::NOOP18_r6, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4700 /* nop */, X86::NOOP18_r7, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 4700 /* nop */, X86::NOOP18_16m4, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOP18_16m5, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOP18_16m6, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOP18_16m7, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOPW_19, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOPW_1c, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOPW_1d, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOPW_1e, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4700 /* nop */, X86::NOOP18_m4, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOP18_m5, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOP18_m6, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOP18_m7, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOPL_19, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOPL_1c, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOPL_1d, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOPL_1e, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4700 /* nop */, X86::NOOP19rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 4714 /* not */, X86::NOT16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
  { 4714 /* not */, X86::NOT32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
  { 4714 /* not */, X86::NOT64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
  { 4714 /* not */, X86::NOT8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
  { 4714 /* not */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 4714 /* not */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 4714 /* not */, X86::NOT64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 4714 /* not */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 4738 /* or */, X86::OR8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 4738 /* or */, X86::OR16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
  { 4738 /* or */, X86::OR16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 4738 /* or */, X86::OR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
  { 4738 /* or */, X86::OR32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 4738 /* or */, X86::OR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
  { 4738 /* or */, X86::OR64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 4738 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 4738 /* or */, X86::OR16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 4738 /* or */, X86::OR16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 4738 /* or */, X86::OR16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 4738 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 4738 /* or */, X86::OR32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 4738 /* or */, X86::OR32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 4738 /* or */, X86::OR32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 4738 /* or */, X86::OR64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 4738 /* or */, X86::OR64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 4738 /* or */, X86::OR64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 4738 /* or */, X86::OR64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 4738 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 4738 /* or */, X86::OR8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 4738 /* or */, X86::OR8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 4738 /* or */, X86::OR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 4738 /* or */, X86::OR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 4738 /* or */, X86::OR16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 4738 /* or */, X86::OR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 4738 /* or */, X86::OR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 4738 /* or */, X86::OR32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 4738 /* or */, X86::OR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 4738 /* or */, X86::OR64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 4738 /* or */, X86::OR64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 4738 /* or */, X86::OR8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 4738 /* or */, X86::OR8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 4749 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4749 /* orpd */, X86::ORPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4754 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4754 /* orps */, X86::ORPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4767 /* out */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
  { 4767 /* out */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
  { 4767 /* out */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
  { 4767 /* out */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
  { 4767 /* out */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
  { 4767 /* out */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
  { 4771 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 4771 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 4776 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 4776 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 4781 /* outs */, X86::OUTSW, Convert__SrcIdx162_1, 0, { MCK_DX, MCK_SrcIdx16 }, },
  { 4781 /* outs */, X86::OUTSL, Convert__SrcIdx322_1, 0, { MCK_DX, MCK_SrcIdx32 }, },
  { 4781 /* outs */, X86::OUTSB, Convert__SrcIdx82_1, 0, { MCK_DX, MCK_SrcIdx8 }, },
  { 4786 /* outsb */, X86::OUTSB, Convert__SrcIdx82_1, 0, { MCK_DX, MCK_SrcIdx8 }, },
  { 4792 /* outsd */, X86::OUTSL, Convert__SrcIdx322_1, 0, { MCK_DX, MCK_SrcIdx32 }, },
  { 4804 /* outsw */, X86::OUTSW, Convert__SrcIdx162_1, 0, { MCK_DX, MCK_SrcIdx16 }, },
  { 4810 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
  { 4810 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
  { 4815 /* pabsb */, X86::MMX_PABSBrr64, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4815 /* pabsb */, X86::MMX_PABSBrm64, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4815 /* pabsb */, X86::PABSBrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4815 /* pabsb */, X86::PABSBrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4821 /* pabsd */, X86::MMX_PABSDrr64, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4821 /* pabsd */, X86::MMX_PABSDrm64, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4821 /* pabsd */, X86::PABSDrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4821 /* pabsd */, X86::PABSDrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4827 /* pabsw */, X86::MMX_PABSWrr64, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4827 /* pabsw */, X86::MMX_PABSWrm64, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4827 /* pabsw */, X86::PABSWrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4827 /* pabsw */, X86::PABSWrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4833 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4833 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4833 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4833 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4842 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4842 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4842 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4842 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4851 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4851 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4860 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4860 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4860 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4860 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4869 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4869 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4869 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4869 /* paddb */, X86::PADDBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4875 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4875 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4875 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4875 /* paddd */, X86::PADDDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4881 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4881 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4881 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4881 /* paddq */, X86::PADDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4887 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4887 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4887 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4887 /* paddsb */, X86::PADDSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4894 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4894 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4894 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4894 /* paddsw */, X86::PADDSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4901 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4901 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4901 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4901 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4909 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4909 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4909 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4909 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4917 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4917 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4917 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4917 /* paddw */, X86::PADDWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4923 /* palignr */, X86::MMX_PALIGNR64irr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 4923 /* palignr */, X86::MMX_PALIGNR64irm, Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 4923 /* palignr */, X86::PALIGNR128rr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 4923 /* palignr */, X86::PALIGNR128rm, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 4931 /* pand */, X86::MMX_PANDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4931 /* pand */, X86::MMX_PANDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4931 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4931 /* pand */, X86::PANDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4936 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4936 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4936 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4936 /* pandn */, X86::PANDNrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4942 /* pause */, X86::PAUSE, Convert_NoOperands, 0, {  }, },
  { 4948 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4948 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4948 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4948 /* pavgb */, X86::PAVGBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4954 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4954 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4962 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 4962 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 4962 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4962 /* pavgw */, X86::PAVGWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4968 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4968 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4968 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
  { 4968 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
  { 4977 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 4977 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 4985 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
  { 4985 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__imm_95_17, 0, { MCK_FR32, MCK_Mem128 }, },
  { 4998 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 4998 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__imm_95_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5011 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
  { 5011 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__imm_95_16, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5024 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
  { 5024 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__imm_95_0, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5037 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5037 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 5047 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5047 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5047 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5047 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5055 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5055 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5055 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5055 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5063 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5063 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5071 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5071 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5071 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5071 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5079 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5079 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 5089 /* pcmpestrm */, X86::PCMPESTRM128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5089 /* pcmpestrm */, X86::PCMPESTRM128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 5099 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5099 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5099 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5099 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5107 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5107 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5107 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5107 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5115 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5115 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5123 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5123 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5123 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5123 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5131 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5131 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 5141 /* pcmpistrm */, X86::PCMPISTRM128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5141 /* pcmpistrm */, X86::PCMPISTRM128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 5151 /* pcommit */, X86::PCOMMIT, Convert_NoOperands, 0, {  }, },
  { 5159 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 5159 /* pdep */, X86::PDEP32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
  { 5159 /* pdep */, X86::PDEP64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 5159 /* pdep */, X86::PDEP64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
  { 5176 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 5176 /* pext */, X86::PEXT32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
  { 5176 /* pext */, X86::PEXT64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 5176 /* pext */, X86::PEXT64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
  { 5193 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5193 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5200 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5200 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5207 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5207 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5214 /* pextrw */, X86::MMX_PEXTRWirri, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 5214 /* pextrw */, X86::PEXTRWri, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5214 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5221 /* pf2id */, X86::PF2IDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5221 /* pf2id */, X86::PF2IDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5227 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5227 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5233 /* pfacc */, X86::PFACCrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5233 /* pfacc */, X86::PFACCrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5239 /* pfadd */, X86::PFADDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5239 /* pfadd */, X86::PFADDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5245 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5245 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5253 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5253 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5261 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5261 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5269 /* pfmax */, X86::PFMAXrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5269 /* pfmax */, X86::PFMAXrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5275 /* pfmin */, X86::PFMINrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5275 /* pfmin */, X86::PFMINrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5281 /* pfmul */, X86::PFMULrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5281 /* pfmul */, X86::PFMULrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5287 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5287 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5294 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5294 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5302 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5302 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5308 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5308 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5317 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5317 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5326 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5326 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5335 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5335 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5343 /* pfsub */, X86::PFSUBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5343 /* pfsub */, X86::PFSUBrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5349 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5349 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5356 /* phaddd */, X86::MMX_PHADDrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5356 /* phaddd */, X86::MMX_PHADDrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5356 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5356 /* phaddd */, X86::PHADDDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5363 /* phaddsw */, X86::MMX_PHADDSWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5363 /* phaddsw */, X86::MMX_PHADDSWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5363 /* phaddsw */, X86::PHADDSWrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5363 /* phaddsw */, X86::PHADDSWrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5371 /* phaddw */, X86::MMX_PHADDWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5371 /* phaddw */, X86::MMX_PHADDWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5371 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5371 /* phaddw */, X86::PHADDWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5378 /* phminposuw */, X86::PHMINPOSUWrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5378 /* phminposuw */, X86::PHMINPOSUWrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5389 /* phsubd */, X86::MMX_PHSUBDrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5389 /* phsubd */, X86::MMX_PHSUBDrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5389 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5389 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5396 /* phsubsw */, X86::MMX_PHSUBSWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5396 /* phsubsw */, X86::MMX_PHSUBSWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5396 /* phsubsw */, X86::PHSUBSWrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5396 /* phsubsw */, X86::PHSUBSWrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5404 /* phsubw */, X86::MMX_PHSUBWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5404 /* phsubw */, X86::MMX_PHSUBWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5404 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5404 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5411 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5411 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5417 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5417 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5423 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
  { 5423 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_0__Tie0__Mem85_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 5430 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 5430 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 5437 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 5437 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 5444 /* pinsrw */, X86::MMX_PINSRWirri, Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
  { 5444 /* pinsrw */, X86::MMX_PINSRWirmi, Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 5444 /* pinsrw */, X86::PINSRWrri, Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
  { 5444 /* pinsrw */, X86::PINSRWrmi, Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 5451 /* pmaddubsw */, X86::MMX_PMADDUBSWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5451 /* pmaddubsw */, X86::MMX_PMADDUBSWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5451 /* pmaddubsw */, X86::PMADDUBSWrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5451 /* pmaddubsw */, X86::PMADDUBSWrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5461 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5461 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5461 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5461 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5469 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5469 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5476 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5476 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5483 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5483 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5483 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5483 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5490 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5490 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5490 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5490 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5497 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5497 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5504 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5504 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5511 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5511 /* pminsb */, X86::PMINSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5518 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5518 /* pminsd */, X86::PMINSDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5525 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5525 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5525 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5525 /* pminsw */, X86::PMINSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5532 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5532 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5532 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5532 /* pminub */, X86::PMINUBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5539 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5539 /* pminud */, X86::PMINUDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5546 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5546 /* pminuw */, X86::PMINUWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5553 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR64 }, },
  { 5553 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
  { 5562 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5562 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 5571 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5571 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
  { 5580 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5580 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 5589 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5589 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 5598 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5598 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 5607 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5607 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 5616 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5616 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 5625 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5625 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
  { 5634 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5634 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 5643 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5643 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 5652 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5652 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 5661 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5661 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 5670 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5670 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5677 /* pmulhrsw */, X86::MMX_PMULHRSWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5677 /* pmulhrsw */, X86::MMX_PMULHRSWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5677 /* pmulhrsw */, X86::PMULHRSWrr128, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5677 /* pmulhrsw */, X86::PMULHRSWrm128, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5686 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5686 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5694 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5694 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5694 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5694 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5702 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5702 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5702 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5702 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5709 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5709 /* pmulld */, X86::PMULLDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5716 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5716 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5716 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5716 /* pmullw */, X86::PMULLWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5723 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5723 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5723 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5723 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5731 /* pop */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
  { 5731 /* pop */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
  { 5731 /* pop */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
  { 5731 /* pop */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
  { 5731 /* pop */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
  { 5731 /* pop */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
  { 5731 /* pop */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
  { 5731 /* pop */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
  { 5731 /* pop */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
  { 5731 /* pop */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
  { 5731 /* pop */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
  { 5731 /* pop */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
  { 5731 /* pop */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 5731 /* pop */, X86::POP16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 5731 /* pop */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 5731 /* pop */, X86::POP32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 5731 /* pop */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 5731 /* pop */, X86::POP64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 5731 /* pop */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 5731 /* pop */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
  { 5731 /* pop */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
  { 5735 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 5741 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 5747 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 5747 /* popcnt */, X86::POPCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 5747 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 5747 /* popcnt */, X86::POPCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 5747 /* popcnt */, X86::POPCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 5747 /* popcnt */, X86::POPCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 5778 /* popf */, X86::POPF16, Convert_NoOperands, 0, {  }, },
  { 5783 /* popfd */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 5795 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 5822 /* por */, X86::MMX_PORirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5822 /* por */, X86::MMX_PORirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5822 /* por */, X86::PORrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5822 /* por */, X86::PORrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5826 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5835 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5847 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5858 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5869 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5880 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 5890 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5890 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5890 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5890 /* psadbw */, X86::PSADBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5897 /* pshufb */, X86::MMX_PSHUFBrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5897 /* pshufb */, X86::MMX_PSHUFBrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5897 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5897 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5904 /* pshufd */, X86::PSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5904 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 5911 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5911 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 5919 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5919 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 5927 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 5927 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 5934 /* psignb */, X86::MMX_PSIGNBrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5934 /* psignb */, X86::MMX_PSIGNBrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5934 /* psignb */, X86::PSIGNBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5934 /* psignb */, X86::PSIGNBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5941 /* psignd */, X86::MMX_PSIGNDrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5941 /* psignd */, X86::MMX_PSIGNDrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5941 /* psignd */, X86::PSIGNDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5941 /* psignd */, X86::PSIGNDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5948 /* psignw */, X86::MMX_PSIGNWrr64, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5948 /* psignw */, X86::MMX_PSIGNWrm64, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5948 /* psignw */, X86::PSIGNWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5948 /* psignw */, X86::PSIGNWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5955 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5955 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 5955 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5955 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5955 /* pslld */, X86::PSLLDri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5955 /* pslld */, X86::PSLLDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5961 /* pslldq */, X86::PSLLDQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5968 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5968 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 5968 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5968 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5968 /* psllq */, X86::PSLLQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5968 /* psllq */, X86::PSLLQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5974 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5974 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 5974 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5974 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5974 /* psllw */, X86::PSLLWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5974 /* psllw */, X86::PSLLWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5980 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5980 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 5980 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5980 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5980 /* psrad */, X86::PSRADri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5980 /* psrad */, X86::PSRADrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5986 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5986 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 5986 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5986 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5986 /* psraw */, X86::PSRAWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5986 /* psraw */, X86::PSRAWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5992 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 5992 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 5992 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 5992 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 5992 /* psrld */, X86::PSRLDri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 5992 /* psrld */, X86::PSRLDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 5998 /* psrldq */, X86::PSRLDQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 6005 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6005 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 6005 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6005 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6005 /* psrlq */, X86::PSRLQri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 6005 /* psrlq */, X86::PSRLQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6011 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6011 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
  { 6011 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6011 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6011 /* psrlw */, X86::PSRLWri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 6011 /* psrlw */, X86::PSRLWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6017 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6017 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6017 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6017 /* psubb */, X86::PSUBBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6023 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6023 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6023 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6023 /* psubd */, X86::PSUBDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6029 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6029 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6029 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6029 /* psubq */, X86::PSUBQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6035 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6035 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6035 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6035 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6042 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6042 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6042 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6042 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6049 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6049 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6049 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6049 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6057 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6057 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6057 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6057 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6065 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6065 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6065 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6065 /* psubw */, X86::PSUBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6071 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6071 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6078 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6078 /* ptest */, X86::PTESTrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6084 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6084 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6084 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6084 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6094 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6094 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6094 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6094 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6104 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6104 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6115 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6115 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6115 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6115 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6125 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6125 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6125 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6125 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6135 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6135 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6135 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6135 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6145 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6145 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6156 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6156 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6156 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6156 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6166 /* push */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
  { 6166 /* push */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
  { 6166 /* push */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
  { 6166 /* push */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
  { 6166 /* push */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
  { 6166 /* push */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
  { 6166 /* push */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
  { 6166 /* push */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
  { 6166 /* push */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
  { 6166 /* push */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
  { 6166 /* push */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
  { 6166 /* push */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
  { 6166 /* push */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
  { 6166 /* push */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
  { 6166 /* push */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 6166 /* push */, X86::PUSH16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 6166 /* push */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 6166 /* push */, X86::PUSH32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
  { 6166 /* push */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 6166 /* push */, X86::PUSH64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 6166 /* push */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
  { 6166 /* push */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
  { 6166 /* push */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
  { 6166 /* push */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
  { 6166 /* push */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
  { 6166 /* push */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 6166 /* push */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 6166 /* push */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
  { 6166 /* push */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
  { 6171 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 6178 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 6185 /* pushf */, X86::PUSHF16, Convert_NoOperands, 0, {  }, },
  { 6191 /* pushfd */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 6205 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 6237 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
  { 6237 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
  { 6237 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6237 /* pxor */, X86::PXORrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6242 /* rcl */, X86::RCL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_1 }, },
  { 6242 /* rcl */, X86::RCL16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
  { 6242 /* rcl */, X86::RCL16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6242 /* rcl */, X86::RCL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_1 }, },
  { 6242 /* rcl */, X86::RCL32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
  { 6242 /* rcl */, X86::RCL32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6242 /* rcl */, X86::RCL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_1 }, },
  { 6242 /* rcl */, X86::RCL64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
  { 6242 /* rcl */, X86::RCL64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6242 /* rcl */, X86::RCL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_1 }, },
  { 6242 /* rcl */, X86::RCL8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
  { 6242 /* rcl */, X86::RCL8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
  { 6242 /* rcl */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16, MCK_1 }, },
  { 6242 /* rcl */, X86::RCL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
  { 6242 /* rcl */, X86::RCL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 6242 /* rcl */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32, MCK_1 }, },
  { 6242 /* rcl */, X86::RCL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
  { 6242 /* rcl */, X86::RCL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6242 /* rcl */, X86::RCL64m1, Convert__Mem645_0, 0, { MCK_Mem64, MCK_1 }, },
  { 6242 /* rcl */, X86::RCL64mCL, Convert__Mem645_0, 0, { MCK_Mem64, MCK_CL }, },
  { 6242 /* rcl */, X86::RCL64mi, Convert__Mem645_0__ImmUnsignedi81_1, 0, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6242 /* rcl */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8, MCK_1 }, },
  { 6242 /* rcl */, X86::RCL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
  { 6242 /* rcl */, X86::RCL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 6266 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6266 /* rcpps */, X86::RCPPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6272 /* rcpss */, X86::RCPSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6272 /* rcpss */, X86::RCPSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 6278 /* rcr */, X86::RCR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_1 }, },
  { 6278 /* rcr */, X86::RCR16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
  { 6278 /* rcr */, X86::RCR16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6278 /* rcr */, X86::RCR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_1 }, },
  { 6278 /* rcr */, X86::RCR32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
  { 6278 /* rcr */, X86::RCR32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6278 /* rcr */, X86::RCR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_1 }, },
  { 6278 /* rcr */, X86::RCR64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
  { 6278 /* rcr */, X86::RCR64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6278 /* rcr */, X86::RCR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_1 }, },
  { 6278 /* rcr */, X86::RCR8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
  { 6278 /* rcr */, X86::RCR8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
  { 6278 /* rcr */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16, MCK_1 }, },
  { 6278 /* rcr */, X86::RCR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
  { 6278 /* rcr */, X86::RCR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 6278 /* rcr */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32, MCK_1 }, },
  { 6278 /* rcr */, X86::RCR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
  { 6278 /* rcr */, X86::RCR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6278 /* rcr */, X86::RCR64m1, Convert__Mem645_0, 0, { MCK_Mem64, MCK_1 }, },
  { 6278 /* rcr */, X86::RCR64mCL, Convert__Mem645_0, 0, { MCK_Mem64, MCK_CL }, },
  { 6278 /* rcr */, X86::RCR64mi, Convert__Mem645_0__ImmUnsignedi81_1, 0, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6278 /* rcr */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8, MCK_1 }, },
  { 6278 /* rcr */, X86::RCR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
  { 6278 /* rcr */, X86::RCR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 6302 /* rdfsbase */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
  { 6302 /* rdfsbase */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 6331 /* rdgsbase */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
  { 6331 /* rdgsbase */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 6360 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, {  }, },
  { 6366 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, {  }, },
  { 6373 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, {  }, },
  { 6379 /* rdrand */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 6379 /* rdrand */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 6379 /* rdrand */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 6410 /* rdseed */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 6410 /* rdseed */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 6410 /* rdseed */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 6441 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, {  }, },
  { 6447 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, {  }, },
  { 6454 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, {  }, },
  { 6458 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, {  }, },
  { 6464 /* ret */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, {  }, },
  { 6464 /* ret */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 6464 /* ret */, X86::RETW, Convert_NoOperands, 0, {  }, },
  { 6464 /* ret */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
  { 6464 /* ret */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
  { 6464 /* ret */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 6468 /* retf */, X86::LRETL, Convert_NoOperands, 0, {  }, },
  { 6468 /* retf */, X86::LRETW, Convert_NoOperands, 0, {  }, },
  { 6468 /* retf */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 6468 /* retf */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 6473 /* retfq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 6473 /* retfq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
  { 6494 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 6500 /* rol */, X86::ROL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_1 }, },
  { 6500 /* rol */, X86::ROL16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
  { 6500 /* rol */, X86::ROL16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6500 /* rol */, X86::ROL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_1 }, },
  { 6500 /* rol */, X86::ROL32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
  { 6500 /* rol */, X86::ROL32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6500 /* rol */, X86::ROL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_1 }, },
  { 6500 /* rol */, X86::ROL64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
  { 6500 /* rol */, X86::ROL64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6500 /* rol */, X86::ROL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_1 }, },
  { 6500 /* rol */, X86::ROL8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
  { 6500 /* rol */, X86::ROL8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
  { 6500 /* rol */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16, MCK_1 }, },
  { 6500 /* rol */, X86::ROL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
  { 6500 /* rol */, X86::ROL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 6500 /* rol */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32, MCK_1 }, },
  { 6500 /* rol */, X86::ROL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
  { 6500 /* rol */, X86::ROL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6500 /* rol */, X86::ROL64m1, Convert__Mem645_0, 0, { MCK_Mem64, MCK_1 }, },
  { 6500 /* rol */, X86::ROL64mCL, Convert__Mem645_0, 0, { MCK_Mem64, MCK_CL }, },
  { 6500 /* rol */, X86::ROL64mi, Convert__Mem645_0__ImmUnsignedi81_1, 0, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6500 /* rol */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8, MCK_1 }, },
  { 6500 /* rol */, X86::ROL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
  { 6500 /* rol */, X86::ROL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 6524 /* ror */, X86::ROR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_1 }, },
  { 6524 /* ror */, X86::ROR16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
  { 6524 /* ror */, X86::ROR16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6524 /* ror */, X86::ROR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_1 }, },
  { 6524 /* ror */, X86::ROR32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
  { 6524 /* ror */, X86::ROR32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6524 /* ror */, X86::ROR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_1 }, },
  { 6524 /* ror */, X86::ROR64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
  { 6524 /* ror */, X86::ROR64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6524 /* ror */, X86::ROR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_1 }, },
  { 6524 /* ror */, X86::ROR8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
  { 6524 /* ror */, X86::ROR8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
  { 6524 /* ror */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16, MCK_1 }, },
  { 6524 /* ror */, X86::ROR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
  { 6524 /* ror */, X86::ROR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 6524 /* ror */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32, MCK_1 }, },
  { 6524 /* ror */, X86::ROR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
  { 6524 /* ror */, X86::ROR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6524 /* ror */, X86::ROR64m1, Convert__Mem645_0, 0, { MCK_Mem64, MCK_1 }, },
  { 6524 /* ror */, X86::ROR64mCL, Convert__Mem645_0, 0, { MCK_Mem64, MCK_CL }, },
  { 6524 /* ror */, X86::ROR64mi, Convert__Mem645_0__ImmUnsignedi81_1, 0, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6524 /* ror */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8, MCK_1 }, },
  { 6524 /* ror */, X86::ROR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
  { 6524 /* ror */, X86::ROR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 6548 /* rorx */, X86::RORX32ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6548 /* rorx */, X86::RORX32mi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6548 /* rorx */, X86::RORX64ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6548 /* rorx */, X86::RORX64mi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6565 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 6565 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 6573 /* roundps */, X86::ROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 6573 /* roundps */, X86::ROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 6581 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 6581 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6589 /* roundss */, X86::ROUNDSSr, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 6589 /* roundss */, X86::ROUNDSSm, Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6597 /* rsm */, X86::RSM, Convert_NoOperands, 0, {  }, },
  { 6601 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6601 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6609 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6609 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 6617 /* sahf */, X86::SAHF, Convert_NoOperands, 0, {  }, },
  { 6622 /* salc */, X86::SALC, Convert_NoOperands, 0, {  }, },
  { 6627 /* sar */, X86::SAR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_1 }, },
  { 6627 /* sar */, X86::SAR16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
  { 6627 /* sar */, X86::SAR16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6627 /* sar */, X86::SAR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_1 }, },
  { 6627 /* sar */, X86::SAR32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
  { 6627 /* sar */, X86::SAR32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6627 /* sar */, X86::SAR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_1 }, },
  { 6627 /* sar */, X86::SAR64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
  { 6627 /* sar */, X86::SAR64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6627 /* sar */, X86::SAR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_1 }, },
  { 6627 /* sar */, X86::SAR8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
  { 6627 /* sar */, X86::SAR8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
  { 6627 /* sar */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16, MCK_1 }, },
  { 6627 /* sar */, X86::SAR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
  { 6627 /* sar */, X86::SAR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 6627 /* sar */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32, MCK_1 }, },
  { 6627 /* sar */, X86::SAR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
  { 6627 /* sar */, X86::SAR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6627 /* sar */, X86::SAR64m1, Convert__Mem645_0, 0, { MCK_Mem64, MCK_1 }, },
  { 6627 /* sar */, X86::SAR64mCL, Convert__Mem645_0, 0, { MCK_Mem64, MCK_CL }, },
  { 6627 /* sar */, X86::SAR64mi, Convert__Mem645_0__ImmUnsignedi81_1, 0, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6627 /* sar */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8, MCK_1 }, },
  { 6627 /* sar */, X86::SAR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
  { 6627 /* sar */, X86::SAR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 6651 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 6651 /* sarx */, X86::SARX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 6651 /* sarx */, X86::SARX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 6651 /* sarx */, X86::SARX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 6668 /* sbb */, X86::SBB8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 6668 /* sbb */, X86::SBB16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
  { 6668 /* sbb */, X86::SBB16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 6668 /* sbb */, X86::SBB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
  { 6668 /* sbb */, X86::SBB32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 6668 /* sbb */, X86::SBB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
  { 6668 /* sbb */, X86::SBB64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 6668 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 6668 /* sbb */, X86::SBB16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 6668 /* sbb */, X86::SBB16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 6668 /* sbb */, X86::SBB16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 6668 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 6668 /* sbb */, X86::SBB32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 6668 /* sbb */, X86::SBB32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 6668 /* sbb */, X86::SBB32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 6668 /* sbb */, X86::SBB64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 6668 /* sbb */, X86::SBB64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 6668 /* sbb */, X86::SBB64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 6668 /* sbb */, X86::SBB64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 6668 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 6668 /* sbb */, X86::SBB8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 6668 /* sbb */, X86::SBB8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 6668 /* sbb */, X86::SBB16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 6668 /* sbb */, X86::SBB16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 6668 /* sbb */, X86::SBB16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 6668 /* sbb */, X86::SBB32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 6668 /* sbb */, X86::SBB32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 6668 /* sbb */, X86::SBB32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 6668 /* sbb */, X86::SBB64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 6668 /* sbb */, X86::SBB64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 6668 /* sbb */, X86::SBB64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 6668 /* sbb */, X86::SBB8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 6668 /* sbb */, X86::SBB8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 6692 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
  { 6692 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
  { 6692 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
  { 6692 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
  { 6692 /* scas */, X86::SCASB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
  { 6692 /* scas */, X86::SCASW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
  { 6692 /* scas */, X86::SCASL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
  { 6692 /* scas */, X86::SCASQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
  { 6697 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
  { 6697 /* scasb */, X86::SCASB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
  { 6703 /* scasd */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
  { 6703 /* scasd */, X86::SCASL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
  { 6715 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
  { 6715 /* scasq */, X86::SCASQ, Convert__DstIdx641_1, 0, { MCK_RAX, MCK_DstIdx64 }, },
  { 6721 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
  { 6721 /* scasw */, X86::SCASW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
  { 6727 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6727 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6732 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6732 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6738 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6738 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6743 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6743 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6749 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6749 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6754 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6754 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6759 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6759 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6765 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6765 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6770 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6770 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6776 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6776 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6782 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6782 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6788 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6788 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6794 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6794 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6800 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6800 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6805 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6805 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6810 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
  { 6810 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
  { 6815 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, {  }, },
  { 6822 /* sgdt */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 6822 /* sgdt */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 6822 /* sgdt */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
  { 6845 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6845 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6854 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6854 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6863 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6863 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6873 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 6873 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 6883 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6883 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6894 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6894 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6905 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 6905 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 6905 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
  { 6905 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
  { 6917 /* shl */, X86::SHL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_1 }, },
  { 6917 /* shl */, X86::SHL16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
  { 6917 /* shl */, X86::SHL16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6917 /* shl */, X86::SHL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_1 }, },
  { 6917 /* shl */, X86::SHL32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
  { 6917 /* shl */, X86::SHL32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6917 /* shl */, X86::SHL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_1 }, },
  { 6917 /* shl */, X86::SHL64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
  { 6917 /* shl */, X86::SHL64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6917 /* shl */, X86::SHL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_1 }, },
  { 6917 /* shl */, X86::SHL8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
  { 6917 /* shl */, X86::SHL8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
  { 6917 /* shl */, X86::SHL16m1, Convert__Mem165_0, 0, { MCK_Mem16, MCK_1 }, },
  { 6917 /* shl */, X86::SHL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
  { 6917 /* shl */, X86::SHL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 6917 /* shl */, X86::SHL32m1, Convert__Mem325_0, 0, { MCK_Mem32, MCK_1 }, },
  { 6917 /* shl */, X86::SHL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
  { 6917 /* shl */, X86::SHL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6917 /* shl */, X86::SHL64m1, Convert__Mem645_0, 0, { MCK_Mem64, MCK_1 }, },
  { 6917 /* shl */, X86::SHL64mCL, Convert__Mem645_0, 0, { MCK_Mem64, MCK_CL }, },
  { 6917 /* shl */, X86::SHL64mi, Convert__Mem645_0__ImmUnsignedi81_1, 0, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6917 /* shl */, X86::SHL8m1, Convert__Mem85_0, 0, { MCK_Mem8, MCK_1 }, },
  { 6917 /* shl */, X86::SHL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
  { 6917 /* shl */, X86::SHL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 6926 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 6926 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 6926 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 6926 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 6926 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 6926 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 6926 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16, MCK_CL }, },
  { 6926 /* shld */, X86::SHLD16rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6926 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32, MCK_CL }, },
  { 6926 /* shld */, X86::SHLD32rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6926 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64, MCK_CL }, },
  { 6926 /* shld */, X86::SHLD64rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6926 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16, MCK_CL }, },
  { 6926 /* shld */, X86::SHLD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6926 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32, MCK_CL }, },
  { 6926 /* shld */, X86::SHLD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6926 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64, MCK_CL }, },
  { 6926 /* shld */, X86::SHLD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6964 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 6964 /* shlx */, X86::SHLX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 6964 /* shlx */, X86::SHLX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 6964 /* shlx */, X86::SHLX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 6981 /* shr */, X86::SHR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_1 }, },
  { 6981 /* shr */, X86::SHR16rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR16, MCK_CL }, },
  { 6981 /* shr */, X86::SHR16ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6981 /* shr */, X86::SHR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_1 }, },
  { 6981 /* shr */, X86::SHR32rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR32, MCK_CL }, },
  { 6981 /* shr */, X86::SHR32ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6981 /* shr */, X86::SHR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_1 }, },
  { 6981 /* shr */, X86::SHR64rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR64, MCK_CL }, },
  { 6981 /* shr */, X86::SHR64ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6981 /* shr */, X86::SHR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_1 }, },
  { 6981 /* shr */, X86::SHR8rCL, Convert__Reg1_0__Tie0, 0, { MCK_GR8, MCK_CL }, },
  { 6981 /* shr */, X86::SHR8ri, Convert__Reg1_0__Tie0__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
  { 6981 /* shr */, X86::SHR16m1, Convert__Mem165_0, 0, { MCK_Mem16, MCK_1 }, },
  { 6981 /* shr */, X86::SHR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
  { 6981 /* shr */, X86::SHR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 6981 /* shr */, X86::SHR32m1, Convert__Mem325_0, 0, { MCK_Mem32, MCK_1 }, },
  { 6981 /* shr */, X86::SHR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
  { 6981 /* shr */, X86::SHR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 6981 /* shr */, X86::SHR64m1, Convert__Mem645_0, 0, { MCK_Mem64, MCK_1 }, },
  { 6981 /* shr */, X86::SHR64mCL, Convert__Mem645_0, 0, { MCK_Mem64, MCK_CL }, },
  { 6981 /* shr */, X86::SHR64mi, Convert__Mem645_0__ImmUnsignedi81_1, 0, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 6981 /* shr */, X86::SHR8m1, Convert__Mem85_0, 0, { MCK_Mem8, MCK_1 }, },
  { 6981 /* shr */, X86::SHR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
  { 6981 /* shr */, X86::SHR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 6990 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 6990 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 6990 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 6990 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 6990 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 6990 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 6990 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16, MCK_CL }, },
  { 6990 /* shrd */, X86::SHRD16rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6990 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32, MCK_CL }, },
  { 6990 /* shrd */, X86::SHRD32rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6990 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64, MCK_CL }, },
  { 6990 /* shrd */, X86::SHRD64rri8, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 6990 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16, MCK_CL }, },
  { 6990 /* shrd */, X86::SHRD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
  { 6990 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32, MCK_CL }, },
  { 6990 /* shrd */, X86::SHRD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 6990 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64, MCK_CL }, },
  { 6990 /* shrd */, X86::SHRD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 7028 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
  { 7028 /* shrx */, X86::SHRX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
  { 7028 /* shrx */, X86::SHRX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
  { 7028 /* shrx */, X86::SHRX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
  { 7045 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7045 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7052 /* shufps */, X86::SHUFPSrri, Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7052 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7059 /* sidt */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 7059 /* sidt */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
  { 7059 /* sidt */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
  { 7082 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
  { 7089 /* sldt */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 7089 /* sldt */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 7089 /* sldt */, X86::SLDT64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 7089 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7089 /* sldt */, X86::SLDT64m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7089 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7112 /* smsw */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 7112 /* smsw */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 7112 /* smsw */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 7112 /* smsw */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7135 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7135 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7142 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7142 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7149 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7149 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 7156 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7156 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 7163 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, {  }, },
  { 7166 /* stac */, X86::STAC, Convert_NoOperands, 0, {  }, },
  { 7171 /* stc */, X86::STC, Convert_NoOperands, 0, {  }, },
  { 7175 /* std */, X86::STD, Convert_NoOperands, 0, {  }, },
  { 7179 /* stgi */, X86::STGI, Convert_NoOperands, 0, {  }, },
  { 7184 /* sti */, X86::STI, Convert_NoOperands, 0, {  }, },
  { 7188 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 7196 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
  { 7196 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
  { 7196 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
  { 7196 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
  { 7196 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
  { 7196 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
  { 7196 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
  { 7196 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
  { 7201 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
  { 7201 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
  { 7207 /* stosd */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
  { 7207 /* stosd */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
  { 7219 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
  { 7219 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, 0, { MCK_DstIdx64, MCK_RAX }, },
  { 7225 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
  { 7225 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
  { 7231 /* str */, X86::STR16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 7231 /* str */, X86::STR32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
  { 7231 /* str */, X86::STR64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
  { 7231 /* str */, X86::STRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 7250 /* sub */, X86::SUB8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 7250 /* sub */, X86::SUB16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
  { 7250 /* sub */, X86::SUB16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 7250 /* sub */, X86::SUB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
  { 7250 /* sub */, X86::SUB32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 7250 /* sub */, X86::SUB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
  { 7250 /* sub */, X86::SUB64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 7250 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 7250 /* sub */, X86::SUB16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 7250 /* sub */, X86::SUB16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 7250 /* sub */, X86::SUB16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 7250 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 7250 /* sub */, X86::SUB32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 7250 /* sub */, X86::SUB32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 7250 /* sub */, X86::SUB32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 7250 /* sub */, X86::SUB64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 7250 /* sub */, X86::SUB64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 7250 /* sub */, X86::SUB64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 7250 /* sub */, X86::SUB64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 7250 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 7250 /* sub */, X86::SUB8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 7250 /* sub */, X86::SUB8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 7250 /* sub */, X86::SUB16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 7250 /* sub */, X86::SUB16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 7250 /* sub */, X86::SUB16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 7250 /* sub */, X86::SUB32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 7250 /* sub */, X86::SUB32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 7250 /* sub */, X86::SUB32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 7250 /* sub */, X86::SUB64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 7250 /* sub */, X86::SUB64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 7250 /* sub */, X86::SUB64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 7250 /* sub */, X86::SUB8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 7250 /* sub */, X86::SUB8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 7264 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7264 /* subpd */, X86::SUBPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7270 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7270 /* subps */, X86::SUBPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7281 /* subsd */, X86::SUBSDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7281 /* subsd */, X86::SUBSDrm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 7287 /* subss */, X86::SUBSSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7287 /* subss */, X86::SUBSSrm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 7298 /* swapgs */, X86::SWAPGS, Convert_NoOperands, 0, {  }, },
  { 7305 /* syscall */, X86::SYSCALL, Convert_NoOperands, 0, {  }, },
  { 7313 /* sysenter */, X86::SYSENTER, Convert_NoOperands, 0, {  }, },
  { 7322 /* sysexit */, X86::SYSEXIT64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 7322 /* sysexit */, X86::SYSEXIT, Convert_NoOperands, 0, {  }, },
  { 7348 /* sysret */, X86::SYSRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
  { 7348 /* sysret */, X86::SYSRET, Convert_NoOperands, 0, {  }, },
  { 7371 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 7371 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 7371 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 7371 /* t1mskc */, X86::T1MSKC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 7378 /* test */, X86::TEST8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 7378 /* test */, X86::TEST16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 7378 /* test */, X86::TEST32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 7378 /* test */, X86::TEST64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 7378 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 7378 /* test */, X86::TEST16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 7378 /* test */, X86::TEST16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 7378 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 7378 /* test */, X86::TEST32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 7378 /* test */, X86::TEST32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 7378 /* test */, X86::TEST64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 7378 /* test */, X86::TEST64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 7378 /* test */, X86::TEST64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 7378 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 7378 /* test */, X86::TEST8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 7378 /* test */, X86::TEST8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 7378 /* test */, X86::TEST16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 7378 /* test */, X86::TEST16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 7378 /* test */, X86::TEST32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 7378 /* test */, X86::TEST32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 7378 /* test */, X86::TEST64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 7378 /* test */, X86::TEST64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 7378 /* test */, X86::TEST8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 7378 /* test */, X86::TEST8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 7407 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 7407 /* tzcnt */, X86::TZCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 7407 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 7407 /* tzcnt */, X86::TZCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 7407 /* tzcnt */, X86::TZCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 7407 /* tzcnt */, X86::TZCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 7434 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 7434 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 7434 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 7434 /* tzmsk */, X86::TZMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 7440 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7440 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 7448 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7448 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 7456 /* ud2 */, X86::TRAP, Convert_NoOperands, 0, {  }, },
  { 7460 /* ud2b */, X86::UD2B, Convert_NoOperands, 0, {  }, },
  { 7465 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7465 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7474 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7474 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7483 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7483 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7492 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7492 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7501 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7501 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7501 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7501 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 7501 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7501 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 7501 /* vaddpd */, X86::VADDPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7501 /* vaddpd */, X86::VADDPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 7501 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7508 /* vaddps */, X86::VADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7508 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7508 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 7508 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7508 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 7508 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7508 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7508 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 7508 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 7508 /* vaddps */, X86::VADDPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 7508 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7508 /* vaddps */, X86::VADDPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 7508 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7515 /* vaddsd */, X86::VADDSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7515 /* vaddsd */, X86::VADDSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 7515 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7515 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7515 /* vaddsd */, X86::VADDSDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 7515 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7515 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7515 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7515 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7515 /* vaddsd */, X86::VADDSDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 7515 /* vaddsd */, X86::VADDSDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 7522 /* vaddss */, X86::VADDSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7522 /* vaddss */, X86::VADDSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 7522 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7522 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7522 /* vaddss */, X86::VADDSSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 7522 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7522 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7522 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7522 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7522 /* vaddss */, X86::VADDSSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 7522 /* vaddss */, X86::VADDSSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 7529 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7529 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7529 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7529 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7539 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7539 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7539 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7539 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7549 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7549 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7557 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7557 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7569 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7569 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7577 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7577 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7589 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7589 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 7597 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7597 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7614 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7622 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7630 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7630 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7630 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7630 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7630 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7638 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7638 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7638 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 7638 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7638 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7638 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7638 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7646 /* vandpd */, X86::VANDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7646 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7646 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 7646 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7646 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7646 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7646 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 7646 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 7646 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7646 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7653 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7653 /* vandps */, X86::VANDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7653 /* vandps */, X86::VANDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7653 /* vandps */, X86::VANDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7653 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7653 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7653 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7653 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 7653 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7653 /* vandps */, X86::VANDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7653 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7653 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7653 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7653 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 7653 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 7653 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7653 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 7660 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 7670 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7680 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7680 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7680 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 7680 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7689 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7689 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7689 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 7689 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7698 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7698 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 7698 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7698 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 7708 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7708 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 7708 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7708 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 7718 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256r, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256m, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_FR32X }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zm, Convert__Reg1_0__Mem325_1, Feature_HasDQI, { MCK_VR512, MCK_Mem32 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7733 /* vbroadcastf32x2 */, X86::VPBROADCASTF32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 7749 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 7765 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
  { 7765 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 7765 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_Mem128 }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI, { MCK_VR512, MCK_Mem128 }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 7781 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 7797 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 7797 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 7797 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 7813 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128r, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128m, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256r, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256m, Convert__Reg1_0__Mem325_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zm, Convert__Reg1_0__Mem325_1, Feature_HasDQI, { MCK_VR512, MCK_Mem32 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7828 /* vbroadcasti32x2 */, X86::VPBROADCASTI32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 7844 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 7860 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
  { 7860 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 7860 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_Mem128 }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI, { MCK_VR512, MCK_Mem128 }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 7876 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 7892 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 7892 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 7892 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7908 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7921 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 7934 /* vcmp */, X86::VCMPPDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 7934 /* vcmp */, X86::VCMPPDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 7934 /* vcmp */, X86::VCMPPDrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPPDrmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPPDYrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7934 /* vcmp */, X86::VCMPPDYrmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 7934 /* vcmp */, X86::VCMPPSZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 7934 /* vcmp */, X86::VCMPPSZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 7934 /* vcmp */, X86::VCMPPSrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPPSrmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPPSYrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 7934 /* vcmp */, X86::VCMPPSYrmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 7934 /* vcmp */, X86::VCMPSDZrr_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 7934 /* vcmp */, X86::VCMPSDZrm_Int, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPSDrr, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPSDrm, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 7934 /* vcmp */, X86::VCMPSSZrr_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 7934 /* vcmp */, X86::VCMPSSZrm_Int, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPSSrr, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 7934 /* vcmp */, X86::VCMPSSrm, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZrrib, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZrmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZrrib, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZrmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7934 /* vcmp */, X86::VCMPSDZrrb_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 7934 /* vcmp */, X86::VCMPSSZrrb_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7934 /* vcmp */, X86::VCMPPDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7934 /* vcmp */, X86::VCMPPDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 7934 /* vcmp */, X86::VCMPPSZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 7934 /* vcmp */, X86::VCMPPSZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 7934 /* vcmp */, X86::VCMPSDZrr_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7934 /* vcmp */, X86::VCMPSDZrm_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPSSZrr_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 7934 /* vcmp */, X86::VCMPSSZrm_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 7934 /* vcmp */, X86::VCMPPDZ128rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZ256rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZrribk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPDZrmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ128rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZ256rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZrribk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 7934 /* vcmp */, X86::VCMPPSZrmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 7934 /* vcmp */, X86::VCMPSDZrrb_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 7934 /* vcmp */, X86::VCMPSSZrrb_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDYrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDYrmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrrib_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ128rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZ256rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrrib_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 7939 /* vcmppd */, X86::VCMPPDZrmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSYrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSYrmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrrib_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ128rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZ256rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrrib_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 7946 /* vcmpps */, X86::VCMPPSZrmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDrr_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDrm_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrrb_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7953 /* vcmpsd */, X86::VCMPSDZrrb_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7960 /* vcmpss */, X86::VCMPSSrr_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 7960 /* vcmpss */, X86::VCMPSSrm_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrrb_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 7960 /* vcmpss */, X86::VCMPSSZrrb_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 7967 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7967 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 7967 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 7967 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 7967 /* vcomisd */, X86::VCOMISDZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 7975 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 7975 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 7975 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 7975 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 7975 /* vcomiss */, X86::VCOMISSZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 7983 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 7995 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8007 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8017 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8027 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8037 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8037 /* vcvtpd2dqx */, X86::VCVTPD2DQXrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8059 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8069 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8069 /* vcvtpd2psx */, X86::VCVTPD2PSXrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8091 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8101 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8136 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8147 /* vcvtph2ps */, X86::VCVTPH2PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8157 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8167 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_Mem128, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrb, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8, MCK__123_sae_125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8, MCK__123_sae_125_ }, },
  { 8177 /* vcvtps2ph */, X86::VCVTPS2PHZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8, MCK__123_sae_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
  { 8187 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8197 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
  { 8208 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8219 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR256X, MCK_Mem512 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR256X, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8229 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64Zrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SIZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
  { 8261 /* vcvtsd2si */, X86::VCVTSD2SI64Zrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8293 /* vcvtsd2ss */, X86::VCVTSD2SSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USIZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem64 }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem64 }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USIZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
  { 8303 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SD64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SD64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI642SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI642SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
  { 8314 /* vcvtsi2sd */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SS64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SS64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI642SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI642SSZrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
  { 8346 /* vcvtsi2ss */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8378 /* vcvtss2sd */, X86::VCVTSS2SDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64Zrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SIZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
  { 8388 /* vcvtss2si */, X86::VCVTSS2SI64Zrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USIZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem32 }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem32 }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USIZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
  { 8420 /* vcvtss2usi */, X86::VCVTSS2USI64Zrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8431 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8442 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8442 /* vcvttpd2dqx */, X86::VCVTTPD2DQXrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8466 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR256X, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8477 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8515 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8527 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8538 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8549 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI, { MCK_VR512, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
  { 8561 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem128 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem128 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SIZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8573 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem128 }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem128 }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USIZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8608 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem128 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem128 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SIZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8620 /* vcvttss2si */, X86::VCVTTSS2SI64Zrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USIZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_GR32, MCK_Mem128 }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_GR64, MCK_Mem128 }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USIZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8655 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8667 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8678 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VR512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8689 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VR256X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem256 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR256X, MCK_VR512 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR256X, MCK_Mem512 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_0__Mem1285_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_0__Mem2565_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_0__Mem5125_1, Feature_HasDQI, { MCK_VR256X, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 8700 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8735 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
  { 8735 /* vcvtusi2sd */, X86::VCVTUSI642SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
  { 8735 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
  { 8735 /* vcvtusi2sd */, X86::VCVTUSI642SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
  { 8735 /* vcvtusi2sd */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
  { 8770 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
  { 8770 /* vcvtusi2ss */, X86::VCVTUSI642SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
  { 8770 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
  { 8770 /* vcvtusi2ss */, X86::VCVTUSI642SSZrm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
  { 8770 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
  { 8770 /* vcvtusi2ss */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8805 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 8815 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8815 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 8815 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 8815 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8815 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8822 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 8822 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 8822 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 8822 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 8822 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 8822 /* vdivps */, X86::VDIVPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 8822 /* vdivps */, X86::VDIVPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 8822 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 8829 /* vdivsd */, X86::VDIVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8829 /* vdivsd */, X86::VDIVSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8829 /* vdivsd */, X86::VDIVSDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8836 /* vdivss */, X86::VDIVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 8836 /* vdivss */, X86::VDIVSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 8836 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 8836 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 8836 /* vdivss */, X86::VDIVSSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8836 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 8836 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 8836 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 8836 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 8836 /* vdivss */, X86::VDIVSSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8836 /* vdivss */, X86::VDIVSSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 8843 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 8843 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 8849 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 8849 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 8849 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 8849 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 8855 /* verr */, X86::VERRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 8855 /* verr */, X86::VERRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 8860 /* verw */, X86::VERWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
  { 8860 /* verw */, X86::VERWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmb, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8865 /* vexp2pd */, X86::VEXP2PDmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmb, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 8873 /* vexp2ps */, X86::VEXP2PSmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8881 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 8891 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 8901 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 8901 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rm, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrm, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rmk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrmk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8914 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrm, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrmk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8928 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rm, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrm, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rmk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrmk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8942 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrm, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrmk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8956 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8970 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 8970 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rm, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrm, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rmk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrmk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 8983 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrm, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrmk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 8997 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rm, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrm, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rmk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasDQI, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrmk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9011 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrm, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrmk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9025 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9039 /* vextractps */, X86::VEXTRACTPSzrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9039 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 9039 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 9039 /* vextractps */, X86::VEXTRACTPSzmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9050 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9062 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrmi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrrib, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9074 /* vfixupimmsd */, X86::VFIXUPIMMSDrribkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrri, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrmi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrrib, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrrikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrmikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9086 /* vfixupimmss */, X86::VFIXUPIMMSSrribkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADDPDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADDPDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADDPDr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADDPDr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9098 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADDPSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADDPSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADDPSr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADDPSr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9110 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9122 /* vfmadd132sd */, X86::VFMADDSDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9122 /* vfmadd132sd */, X86::VFMADDSDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9122 /* vfmadd132sd */, X86::VFMADD132SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9134 /* vfmadd132ss */, X86::VFMADDSSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9134 /* vfmadd132ss */, X86::VFMADDSSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9134 /* vfmadd132ss */, X86::VFMADD132SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9146 /* vfmadd213pd */, X86::VFMADDPDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADDPDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADDPDr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADDPDr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9146 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADDPSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADDPSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADDPSr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADDPSr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9158 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9170 /* vfmadd213sd */, X86::VFMADDSDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9170 /* vfmadd213sd */, X86::VFMADDSDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9170 /* vfmadd213sd */, X86::VFMADD213SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9182 /* vfmadd213ss */, X86::VFMADDSSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9182 /* vfmadd213ss */, X86::VFMADDSSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9182 /* vfmadd213ss */, X86::VFMADD213SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9194 /* vfmadd231pd */, X86::VFMADDPDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADDPDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADDPDr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADDPDr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9194 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADDPSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADDPSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADDPSr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADDPSr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9206 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9218 /* vfmadd231sd */, X86::VFMADDSDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9218 /* vfmadd231sd */, X86::VFMADDSDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9218 /* vfmadd231sd */, X86::VFMADD231SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9230 /* vfmadd231ss */, X86::VFMADDSSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9230 /* vfmadd231ss */, X86::VFMADDSSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9230 /* vfmadd231ss */, X86::VFMADD231SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9242 /* vfmaddpd */, X86::VFMADDPD4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9251 /* vfmaddps */, X86::VFMADDPS4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9260 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9260 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9260 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
  { 9269 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9269 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9269 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUBPDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUBPDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUBPDr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUBPDr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9278 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUBPSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUBPSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUBPSr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUBPSr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9293 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUBPDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUBPDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUBPDr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUBPDr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9308 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUBPSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUBPSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUBPSr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUBPSr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9323 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUBPDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUBPDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUBPDr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUBPDr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9338 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUBPSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUBPSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUBPSr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUBPSr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9353 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9368 /* vfmaddsubpd */, X86::VFMADDSUBPD4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9380 /* vfmaddsubps */, X86::VFMADDSUBPS4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUBPDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUBPDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUBPDr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUBPDr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9392 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUBPSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUBPSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUBPSr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUBPSr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9404 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUBSDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUBSDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9416 /* vfmsub132sd */, X86::VFMSUB132SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUBSSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUBSSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9428 /* vfmsub132ss */, X86::VFMSUB132SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUBPDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUBPDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUBPDr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUBPDr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9440 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUBPSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUBPSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUBPSr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUBPSr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9452 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUBSDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUBSDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9464 /* vfmsub213sd */, X86::VFMSUB213SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUBSSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUBSSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9476 /* vfmsub213ss */, X86::VFMSUB213SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUBPDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUBPDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUBPDr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUBPDr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9488 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUBPSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUBPSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUBPSr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUBPSr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9500 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUBSDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUBSDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9512 /* vfmsub231sd */, X86::VFMSUB231SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUBSSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUBSSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9524 /* vfmsub231ss */, X86::VFMSUB231SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADDPDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADDPDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADDPDr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADDPDr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9536 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADDPSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADDPSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADDPSr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADDPSr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9551 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADDPDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADDPDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADDPDr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADDPDr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9566 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADDPSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADDPSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADDPSr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADDPSr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9581 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADDPDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADDPDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADDPDr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADDPDr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9596 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADDPSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADDPSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADDPSr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADDPSr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9611 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9626 /* vfmsubaddpd */, X86::VFMSUBADDPD4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9638 /* vfmsubaddps */, X86::VFMSUBADDPS4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9650 /* vfmsubpd */, X86::VFMSUBPD4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9659 /* vfmsubps */, X86::VFMSUBPS4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9668 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9668 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9668 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
  { 9677 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9677 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9677 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADDPDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADDPDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADDPDr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADDPDr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9686 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADDPSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADDPSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADDPSr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADDPSr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9699 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADDSDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADDSDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9712 /* vfnmadd132sd */, X86::VFNMADD132SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADDSSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADDSSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9725 /* vfnmadd132ss */, X86::VFNMADD132SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADDPDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADDPDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADDPDr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADDPDr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9738 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADDPSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADDPSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADDPSr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADDPSr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9751 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADDSDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADDSDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9764 /* vfnmadd213sd */, X86::VFNMADD213SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADDSSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADDSSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9777 /* vfnmadd213ss */, X86::VFNMADD213SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADDPDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADDPDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADDPDr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADDPDr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9790 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADDPSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADDPSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADDPSr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADDPSr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9803 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADDSDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADDSDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9816 /* vfnmadd231sd */, X86::VFNMADD231SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADDSSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADDSSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9829 /* vfnmadd231ss */, X86::VFNMADD231SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9842 /* vfnmaddpd */, X86::VFNMADDPD4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9852 /* vfnmaddps */, X86::VFNMADDPS4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 9862 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9862 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9862 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
  { 9872 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9872 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9872 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUBPDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUBPDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUBPDr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUBPDr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9882 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUBPSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUBPSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUBPSr132rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUBPSr132mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9895 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUBSDr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUBSDr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9908 /* vfnmsub132sd */, X86::VFNMSUB132SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUBSSr132r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUBSSr132m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9921 /* vfnmsub132ss */, X86::VFNMSUB132SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUBPDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUBPDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUBPDr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUBPDr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9934 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUBPSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUBPSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUBPSr213rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUBPSr213mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9947 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUBSDr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUBSDr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9960 /* vfnmsub213sd */, X86::VFNMSUB213SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUBSSr213r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUBSSr213m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9973 /* vfnmsub213ss */, X86::VFNMSUB213SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUBPDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUBPDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUBPDr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUBPDr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9986 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUBPSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUBPSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUBPSr231rY, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUBPSr231mY, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 9999 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUBSDr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUBSDr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 10012 /* vfnmsub231sd */, X86::VFNMSUB231SDrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUBSSr231r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUBSSr231m, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSrb_Int, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 10025 /* vfnmsub231ss */, X86::VFNMSUB231SSrb_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10038 /* vfnmsubpd */, X86::VFNMSUBPD4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4rrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4rmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10048 /* vfnmsubps */, X86::VFNMSUBPS4mrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 10058 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10058 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 10058 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
  { 10068 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10068 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 10068 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZrmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VK1, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10078 /* vfpclasspd */, X86::VFPCLASSPDZrmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZrmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VK1, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZrmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10137 /* vfpclassps */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10196 /* vfpclasssd */, X86::VFPCLASSSDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10196 /* vfpclasssd */, X86::VFPCLASSSDrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10196 /* vfpclasssd */, X86::VFPCLASSSDrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10196 /* vfpclasssd */, X86::VFPCLASSSDrmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10207 /* vfpclassss */, X86::VFPCLASSSSrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10207 /* vfpclassss */, X86::VFPCLASSSSrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10207 /* vfpclassss */, X86::VFPCLASSSSrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10207 /* vfpclassss */, X86::VFPCLASSSSrmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10218 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10218 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10218 /* vfrczpd */, X86::VFRCZPDrrY, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 10218 /* vfrczpd */, X86::VFRCZPDrmY, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10226 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10226 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10226 /* vfrczps */, X86::VFRCZPSrrY, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 10226 /* vfrczps */, X86::VFRCZPSrmY, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10234 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10234 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 10242 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10242 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX645_1__Tie1, 0, { MCK_FR32, MCK_MemVX64, MCK_FR32 }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX645_1__Tie1, 0, { MCK_VR256, MCK_MemVX64, MCK_VR256 }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX32X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX32X }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX32X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX32X }, },
  { 10250 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY32X5_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY32X }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX325_1__Tie1, 0, { MCK_FR32, MCK_MemVX32, MCK_FR32 }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_0__Reg1_2__Tie0__MemVY325_1__Tie1, 0, { MCK_VR256, MCK_MemVY32, MCK_VR256 }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX32X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX32X }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY32X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY32X }, },
  { 10261 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ32 }, },
  { 10272 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_1__MemVY325_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY32 }, },
  { 10286 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_1__MemVZ325_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ32 }, },
  { 10300 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_1__MemVZ645_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 10314 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_1__MemVZ645_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 10328 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_1__MemVY325_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY32 }, },
  { 10342 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_1__MemVZ325_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ32 }, },
  { 10356 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_1__MemVZ645_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 10370 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_1__MemVZ645_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX645_1__Tie1, 0, { MCK_FR32, MCK_MemVX64, MCK_FR32 }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_0__Reg1_2__Tie0__MemVY645_1__Tie1, 0, { MCK_VR256, MCK_MemVY64, MCK_VR256 }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX64X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX64X }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY64X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY64X }, },
  { 10384 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX325_1__Tie1, 0, { MCK_FR32, MCK_MemVX32, MCK_FR32 }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_0__Reg1_2__Tie0__MemVY325_1__Tie1, 0, { MCK_FR32, MCK_MemVY32, MCK_FR32 }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX64X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX64X }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY64X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY64X }, },
  { 10395 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ645_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to2_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to4_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 10406 /* vgetexppd */, X86::VGETEXPPDmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmb, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK__123_1to4_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK__123_1to8_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 10416 /* vgetexpps */, X86::VGETEXPPSmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10426 /* vgetexpsd */, X86::VGETEXPSDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10436 /* vgetexpss */, X86::VGETEXPSSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10446 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10457 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmi_altk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rmi_altkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10468 /* vgetmantsd */, X86::VGETMANTSDZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmi_altk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rmi_altkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10479 /* vgetmantss */, X86::VGETMANTSSZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 10490 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10490 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10490 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10490 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10498 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10498 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10498 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10498 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10506 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10506 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10506 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10506 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10514 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10514 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10514 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10514 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10522 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 10522 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10534 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10547 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10560 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10573 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10586 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 10586 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10598 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10611 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasVLX|Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10624 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 10637 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 10650 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 10650 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 10650 /* vinsertps */, X86::VINSERTPSzrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 10650 /* vinsertps */, X86::VINSERTPSzrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 10660 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10660 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10667 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 10676 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
  { 10676 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
  { 10688 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10688 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10688 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10688 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10699 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10699 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10699 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 10699 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10710 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10717 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10717 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10717 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10717 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10724 /* vmaxsd */, X86::VMAXSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10724 /* vmaxsd */, X86::VMAXSDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10731 /* vmaxss */, X86::VMAXSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10731 /* vmaxss */, X86::VMAXSSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10738 /* vmcall */, X86::VMCALL, Convert_NoOperands, 0, {  }, },
  { 10745 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 10753 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, 0, {  }, },
  { 10760 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10760 /* vminpd */, X86::VMINPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10760 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10760 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 10760 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10760 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 10760 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 10760 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 10760 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 10760 /* vminpd */, X86::VMINPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10760 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 10767 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10767 /* vminps */, X86::VMINPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 10767 /* vminps */, X86::VMINPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 10767 /* vminps */, X86::VMINPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 10767 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10767 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10767 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 10767 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 10767 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 10767 /* vminps */, X86::VMINPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10767 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 10767 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 10767 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 10767 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 10767 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 10767 /* vminps */, X86::VMINPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 10767 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 10774 /* vminsd */, X86::VMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10774 /* vminsd */, X86::VMINSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 10774 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10774 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10774 /* vminsd */, X86::VMINSDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10774 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10774 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10774 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10774 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10774 /* vminsd */, X86::VMINSDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10774 /* vminsd */, X86::VMINSDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10781 /* vminss */, X86::VMINSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 10781 /* vminss */, X86::VMINSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 10781 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 10781 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 10781 /* vminss */, X86::VMINSSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10781 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 10781 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 10781 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 10781 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 10781 /* vminss */, X86::VMINSSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10781 /* vminss */, X86::VMINSSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 10788 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, 0, {  }, },
  { 10797 /* vmload */, X86::VMLOAD32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
  { 10797 /* vmload */, X86::VMLOAD64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
  { 10804 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, 0, {  }, },
  { 10812 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10812 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10820 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10830 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10838 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10848 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
  { 10848 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
  { 10848 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 10848 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
  { 10848 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_GR32, MCK_FR32X }, },
  { 10848 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 10848 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_GR32 }, },
  { 10848 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 10848 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
  { 10848 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_0__Reg1_1, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10854 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10863 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10871 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10881 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10893 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10903 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 10915 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10923 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10933 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10945 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10955 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10967 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10977 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_0__Mem5125_1, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_0__Reg1_1, Feature_HasBWI, { MCK_Mem512, MCK_VR512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 10989 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 10998 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11009 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11009 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11018 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11018 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 11018 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 11018 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
  { 11026 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11026 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 11026 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 11026 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
  { 11034 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11034 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11043 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11043 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 11043 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 11043 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
  { 11051 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11051 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 11051 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 11051 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
  { 11059 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
  { 11059 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
  { 11069 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
  { 11069 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11079 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11088 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11098 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11107 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11116 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11116 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
  { 11116 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11116 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
  { 11116 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_In64BitMode, { MCK_GR64, MCK_FR32X }, },
  { 11116 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_GR64 }, },
  { 11116 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 11116 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 11116 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11116 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512|Feature_In64BitMode, { MCK_Mem64, MCK_FR32X }, },
  { 11122 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 11130 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrm_Int, Convert__Reg1_0__Tie0__Mem645_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 11130 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
  { 11130 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 11130 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 11130 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11130 /* vmovsd */, X86::VMOVSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11137 /* vmovsd.s */, X86::VMOVSSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11137 /* vmovsd.s */, X86::VMOVSSDrr_REVk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11137 /* vmovsd.s */, X86::VMOVSSDrr_REVkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11146 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11156 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 11166 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 11166 /* vmovss */, X86::VMOVSSZrm_Int, Convert__Reg1_0__Tie0__Mem325_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 11166 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
  { 11166 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_0__Reg1_1, Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 11166 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11166 /* vmovss */, X86::VMOVSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11166 /* vmovss */, X86::VMOVSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 11166 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11166 /* vmovss */, X86::VMOVSSZrm_Intkz, Convert__Reg1_0__Tie0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 11166 /* vmovss */, X86::VMOVSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11166 /* vmovss */, X86::VMOVSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11173 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11173 /* vmovss.s */, X86::VMOVSSZrr_REVk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11173 /* vmovss.s */, X86::VMOVSSZrr_REVkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11182 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11190 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11200 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11200 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11200 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11200 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11200 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11208 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11218 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11218 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11218 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 11218 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11227 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 11235 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 11243 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
  { 11243 /* vmread */, X86::VMREAD64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
  { 11243 /* vmread */, X86::VMREAD32rm, Convert__Mem325_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
  { 11243 /* vmread */, X86::VMREAD64rm, Convert__Mem645_0__Reg1_1, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
  { 11266 /* vmresume */, X86::VMRESUME, Convert_NoOperands, 0, {  }, },
  { 11275 /* vmrun */, X86::VMRUN32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
  { 11275 /* vmrun */, X86::VMRUN64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
  { 11281 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
  { 11281 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
  { 11288 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11288 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11288 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11288 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11288 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11288 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11288 /* vmulpd */, X86::VMULPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11288 /* vmulpd */, X86::VMULPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 11288 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11295 /* vmulps */, X86::VMULPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11295 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11295 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11295 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11295 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 11295 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11295 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11295 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11295 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11295 /* vmulps */, X86::VMULPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 11295 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11295 /* vmulps */, X86::VMULPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 11295 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11302 /* vmulsd */, X86::VMULSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11302 /* vmulsd */, X86::VMULSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 11302 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11302 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11302 /* vmulsd */, X86::VMULSDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 11302 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11302 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11302 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11302 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11302 /* vmulsd */, X86::VMULSDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 11302 /* vmulsd */, X86::VMULSDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 11309 /* vmulss */, X86::VMULSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11309 /* vmulss */, X86::VMULSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 11309 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11309 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11309 /* vmulss */, X86::VMULSSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 11309 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11309 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11309 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11309 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11309 /* vmulss */, X86::VMULSSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 11309 /* vmulss */, X86::VMULSSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 11316 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
  { 11316 /* vmwrite */, X86::VMWRITE32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
  { 11316 /* vmwrite */, X86::VMWRITE64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
  { 11316 /* vmwrite */, X86::VMWRITE64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
  { 11342 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, 0, {  }, },
  { 11349 /* vmxon */, X86::VMXON, Convert__Mem645_0, 0, { MCK_Mem64 }, },
  { 11355 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11355 /* vorpd */, X86::VORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11355 /* vorpd */, X86::VORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11355 /* vorpd */, X86::VORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11355 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11355 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11355 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11355 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11355 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11355 /* vorpd */, X86::VORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11355 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11355 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11355 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11355 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11355 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11355 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11355 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11361 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11361 /* vorps */, X86::VORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11361 /* vorps */, X86::VORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11361 /* vorps */, X86::VORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11361 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11361 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11361 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11361 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11361 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11361 /* vorps */, X86::VORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11361 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11361 /* vorps */, X86::VORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11361 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11361 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11361 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11361 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11361 /* vorps */, X86::VORPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11361 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11361 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11361 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11361 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11361 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11361 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11361 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11361 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11361 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11361 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11367 /* vpabsb */, X86::VPABSBrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11367 /* vpabsb */, X86::VPABSBrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11367 /* vpabsb */, X86::VPABSBrr256, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 11367 /* vpabsb */, X86::VPABSBrm256, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11367 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 11367 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_0__Mem5125_1, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 11367 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11367 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11367 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11367 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 11367 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11367 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 11374 /* vpabsd */, X86::VPABSDrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11374 /* vpabsd */, X86::VPABSDrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11374 /* vpabsd */, X86::VPABSDrr256, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 11374 /* vpabsd */, X86::VPABSDrm256, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11374 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11374 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 11374 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11374 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11381 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 11381 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11381 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11388 /* vpabsw */, X86::VPABSWrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11388 /* vpabsw */, X86::VPABSWrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 11388 /* vpabsw */, X86::VPABSWrr256, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 11388 /* vpabsw */, X86::VPABSWrm256, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 11388 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR512 }, },
  { 11388 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_0__Mem5125_1, Feature_HasBWI, { MCK_VR512, MCK_Mem512 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 11388 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11388 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11388 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11388 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 11388 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 11388 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11395 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11405 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11415 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11425 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11435 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11435 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11435 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11435 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11435 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11435 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11435 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11435 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11435 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11435 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11435 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11435 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11442 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11442 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11442 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11442 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11442 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11442 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11442 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11442 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11449 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11449 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11449 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11449 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11449 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11449 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11449 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11456 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11456 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11464 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11472 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11481 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11490 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11490 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11490 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11490 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11490 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11490 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11490 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11490 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11490 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11490 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11490 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11490 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11497 /* vpalignr */, X86::VPALIGNR128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNR128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNR256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNR256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11497 /* vpalignr */, X86::VPALIGNZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11506 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11506 /* vpand */, X86::VPANDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11506 /* vpand */, X86::VPANDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11506 /* vpand */, X86::VPANDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11512 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11512 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11512 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11512 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11512 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11512 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11512 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11519 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11519 /* vpandn */, X86::VPANDNrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11519 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11519 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11526 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11534 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11542 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11542 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11542 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11542 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11542 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11542 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11542 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11549 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11549 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11549 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11549 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11549 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11549 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11556 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11556 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11556 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11556 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11556 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11556 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11563 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11563 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11563 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 11563 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11572 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11582 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11592 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 11602 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 11612 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11612 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 11612 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11612 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 11622 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11622 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11622 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 11622 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_0__Mem85_1, 0, { MCK_FR32, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_0__Mem85_1, 0, { MCK_VR256, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_0__Mem85_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_0__Mem85_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_0__Mem85_1, Feature_HasBWI, { MCK_VR512, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem85_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem85_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem85_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_0__Reg1_2__Mem85_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_0__Reg1_2__Mem85_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11631 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_0__Reg1_2__Mem85_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_0__Mem325_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_0__Mem325_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11644 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 11657 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 11657 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 11657 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VK1 }, },
  { 11673 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 11673 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 11673 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VK1 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_0__Reg1_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_0__Mem645_1, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11689 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_0__Mem165_1, 0, { MCK_VR256, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_0__Mem165_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_0__Mem165_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_0__Mem165_1, Feature_HasBWI, { MCK_VR512, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11702 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
  { 11715 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11715 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11729 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11729 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11743 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11743 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11757 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11757 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11771 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11771 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11782 /* vpcmov */, X86::VPCMOVrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11782 /* vpcmov */, X86::VPCMOVrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11782 /* vpcmov */, X86::VPCMOVmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 11782 /* vpcmov */, X86::VPCMOVrrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11782 /* vpcmov */, X86::VPCMOVrmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11782 /* vpcmov */, X86::VPCMOVmrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPBZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPBZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUBZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPUWZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11789 /* vpcmp */, X86::VPCMPWZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, Feature_HasBWI|Feature_HasVLX, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11789 /* vpcmp */, X86::VPCMPWZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, Feature_HasBWI, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPDZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPQZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUDZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512|Feature_HasVLX, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11789 /* vpcmp */, X86::VPCMPUQZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, Feature_HasAVX512, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11795 /* vpcmpb */, X86::VPCMPBZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 11802 /* vpcmpd */, X86::VPCMPDZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11809 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11818 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11827 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11836 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11845 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11845 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11856 /* vpcmpestrm */, X86::VPCMPESTRM128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11856 /* vpcmpestrm */, X86::VPCMPESTRM128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11867 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 11876 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 11885 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 11894 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 11903 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11903 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11914 /* vpcmpistrm */, X86::VPCMPISTRM128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11914 /* vpcmpistrm */, X86::VPCMPISTRM128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 11925 /* vpcmpq */, X86::VPCMPQZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11932 /* vpcmpub */, X86::VPCMPUBZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 11940 /* vpcmpud */, X86::VPCMPUDZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 11948 /* vpcmpuq */, X86::VPCMPUQZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11956 /* vpcmpuw */, X86::VPCMPUWZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 11964 /* vpcmpw */, X86::VPCMPWZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 11971 /* vpcom */, X86::VPCOMBri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMBmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11971 /* vpcom */, X86::VPCOMDri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMDmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11971 /* vpcom */, X86::VPCOMQri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMQmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11971 /* vpcom */, X86::VPCOMUBri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUBmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11971 /* vpcom */, X86::VPCOMUDri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUDmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11971 /* vpcom */, X86::VPCOMUQri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUQmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11971 /* vpcom */, X86::VPCOMUWri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMUWmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11971 /* vpcom */, X86::VPCOMWri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 11971 /* vpcom */, X86::VPCOMWmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 11977 /* vpcomb */, X86::VPCOMBri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11977 /* vpcomb */, X86::VPCOMBmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11984 /* vpcomd */, X86::VPCOMDri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 11984 /* vpcomd */, X86::VPCOMDmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 11991 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX, { MCK_Mem128, MCK_FR32X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_0__Reg1_1, Feature_HasVLX, { MCK_Mem256, MCK_VR256X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_0__Reg1_1, Feature_HasAVX512, { MCK_Mem512, MCK_VR512 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 12003 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 12015 /* vpcomq */, X86::VPCOMQri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12015 /* vpcomq */, X86::VPCOMQmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12022 /* vpcomub */, X86::VPCOMUBri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12022 /* vpcomub */, X86::VPCOMUBmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12030 /* vpcomud */, X86::VPCOMUDri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12030 /* vpcomud */, X86::VPCOMUDmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12038 /* vpcomuq */, X86::VPCOMUQri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12038 /* vpcomuq */, X86::VPCOMUQmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12046 /* vpcomuw */, X86::VPCOMUWri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12046 /* vpcomuw */, X86::VPCOMUWmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12054 /* vpcomw */, X86::VPCOMWri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12054 /* vpcomw */, X86::VPCOMWmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasCDI, { MCK_VR512, MCK_Mem512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12061 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasCDI, { MCK_VR512, MCK_Mem512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12073 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12085 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12085 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12096 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12096 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12107 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12107 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12107 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12107 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12107 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12107 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12107 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12107 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12114 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12114 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12114 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12114 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12114 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12114 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12114 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12114 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12114 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12121 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12121 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12130 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12139 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12149 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12159 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12168 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12168 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDrrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDrmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12177 /* vpermil2pd */, X86::VPERMIL2PDmrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSrrY, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSrmY, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12188 /* vpermil2ps */, X86::VPERMIL2PSmrY, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12199 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12209 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12219 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12219 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12227 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12227 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12227 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12227 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12227 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12227 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12235 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12235 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12235 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12235 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 12235 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12235 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVBMI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12242 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVBMI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12242 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12251 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12260 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12270 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12280 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12289 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12289 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12298 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12298 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12298 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12298 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12298 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12298 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12298 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12298 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 12305 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 12315 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 12325 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12325 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12325 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12325 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_Mem8, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12333 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12333 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12333 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12333 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12341 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12341 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_GR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12341 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12341 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12349 /* vpextrw */, X86::VPEXTRWri, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12349 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12349 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 12349 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_Mem16, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12357 /* vpextrw.s */, X86::VPEXTRWZrr_REV, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX325_1__Tie1, 0, { MCK_FR32, MCK_MemVX32, MCK_FR32 }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_0__Reg1_2__Tie0__MemVY325_1__Tie1, 0, { MCK_VR256, MCK_MemVY32, MCK_VR256 }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX32X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX32X }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY32X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY32X }, },
  { 12367 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ32 }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX645_1__Tie1, 0, { MCK_FR32, MCK_MemVX64, MCK_FR32 }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX645_1__Tie1, 0, { MCK_VR256, MCK_MemVX64, MCK_VR256 }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX32X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX32X }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX32X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX32X }, },
  { 12378 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY32X5_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY32X }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX325_1__Tie1, 0, { MCK_FR32, MCK_MemVX32, MCK_FR32 }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_0__Reg1_2__Tie0__MemVY325_1__Tie1, 0, { MCK_FR32, MCK_MemVY32, MCK_FR32 }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX64X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX64X }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY64X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY64X }, },
  { 12389 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ645_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_0__Reg1_2__Tie0__MemVX645_1__Tie1, 0, { MCK_FR32, MCK_MemVX64, MCK_FR32 }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_0__Reg1_2__Tie0__MemVY645_1__Tie1, 0, { MCK_VR256, MCK_MemVY64, MCK_VR256 }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVX64X5_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVX64X }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVY64X5_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY64X }, },
  { 12400 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_0__Reg1_2__Tie0__Tie1__MemVZ645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 12411 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12411 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12420 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12420 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12429 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12429 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12438 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12438 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12438 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12438 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12446 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12446 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12455 /* vphaddsw */, X86::VPHADDSWrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12455 /* vphaddsw */, X86::VPHADDSWrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12455 /* vphaddsw */, X86::VPHADDSWrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12455 /* vphaddsw */, X86::VPHADDSWrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12464 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12464 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12474 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12474 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12484 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12484 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12494 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12494 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12504 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12504 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12514 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12514 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12524 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12524 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12524 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12524 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12532 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12532 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12541 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12541 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12550 /* vphminposuw */, X86::VPHMINPOSUWrr128, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12550 /* vphminposuw */, X86::VPHMINPOSUWrm128, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12562 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12562 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12571 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12571 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12571 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12571 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12579 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12579 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12588 /* vphsubsw */, X86::VPHSUBSWrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12588 /* vphsubsw */, X86::VPHSUBSWrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12588 /* vphsubsw */, X86::VPHSUBSWrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12588 /* vphsubsw */, X86::VPHSUBSWrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12597 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12597 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12597 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12597 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12605 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 12605 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 12614 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
  { 12614 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 12614 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
  { 12614 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK_ImmUnsignedi8 }, },
  { 12622 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 12622 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 12622 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_GR32, MCK_ImmUnsignedi8 }, },
  { 12622 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 12630 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 12630 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 12630 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_GR64, MCK_ImmUnsignedi8 }, },
  { 12630 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 12638 /* vpinsrw */, X86::VPINSRWrri, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
  { 12638 /* vpinsrw */, X86::VPINSRWrmi, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 12638 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
  { 12638 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem16, MCK_ImmUnsignedi8 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_0__Mem5125_1, Feature_HasCDI, { MCK_VR512, MCK_Mem512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_0__Mem325_1, Feature_HasCDI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12646 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_0__Mem1285_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_0__Mem2565_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, Feature_HasCDI, { MCK_VR512, MCK_VR512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_0__Mem5125_1, Feature_HasCDI, { MCK_VR512, MCK_Mem512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_0__Mem645_1, Feature_HasCDI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12655 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasCDI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12664 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12664 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12673 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12673 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12683 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12683 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12693 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12693 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12703 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12703 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12714 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12714 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12725 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12725 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12735 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12735 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12745 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12745 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12754 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12754 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12763 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12763 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12774 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12774 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12784 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2, Feature_HasIFMA, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasIFMA, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasIFMA, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12796 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6, Feature_HasIFMA, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12808 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12819 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12828 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12828 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12828 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12828 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12839 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12839 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12839 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
  { 12839 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12850 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12858 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12866 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12874 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12882 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12890 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12898 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12906 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12914 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12914 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12914 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12914 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12914 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12914 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12922 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12922 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12922 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12922 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12930 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12938 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12938 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12938 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12938 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12938 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12938 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12946 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12946 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12946 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12946 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12946 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12946 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12946 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12946 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12946 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12946 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12946 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12946 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12954 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12954 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12954 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12954 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12954 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12954 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12954 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 12954 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 12962 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 12970 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 12970 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 12970 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 12970 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 12970 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 12970 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 12978 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 12978 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 12978 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VR512 }, },
  { 12987 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 12987 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 12987 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VR512 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 12996 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13004 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13012 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 13012 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 13012 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VK1 }, },
  { 13021 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 13021 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 13021 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VK1 }, },
  { 13030 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 13030 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 13030 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VR512, MCK_VK1 }, },
  { 13039 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_VK1 }, },
  { 13039 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VK1 }, },
  { 13039 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VK1 }, },
  { 13048 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
  { 13048 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
  { 13058 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 13058 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasDQI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 13058 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_0__Reg1_1, Feature_HasDQI, { MCK_VK1, MCK_VR512 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13067 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13075 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13083 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13091 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13100 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13109 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13118 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13127 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13136 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13145 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_0__Mem165_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem16 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13155 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13165 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13175 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13185 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13195 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13205 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13215 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK_FR32X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_VR256X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_0__Reg1_1, Feature_HasAVX512, { MCK_Mem64, MCK_VR512 }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem16, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13225 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR256X, MCK_VR512 }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK_VR256X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_0__Reg1_1, Feature_HasAVX512, { MCK_Mem256, MCK_VR512 }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_FR32X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13235 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_VR256X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_VR512 }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_0__Reg1_1, Feature_HasAVX512, { MCK_Mem128, MCK_VR512 }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK_FR32X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK_VR256X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13245 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13255 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13265 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_FR32X }, },
  { 13265 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasBWI|Feature_HasVLX, { MCK_VK1, MCK_VR256X }, },
  { 13265 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VK1, MCK_VR512 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_VR256X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR256X, MCK_VR512 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK_VR256X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_0__Reg1_1, Feature_HasBWI, { MCK_Mem256, MCK_VR512 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK_FR32X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem128, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_Mem256, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_Mem64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13274 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13282 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_0__Mem165_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem16 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem32 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem165_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem16 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13292 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem64 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_FR32X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem128 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_0__Reg1_1, Feature_HasBWI, { MCK_VR512, MCK_VR256X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_0__Mem2565_1, Feature_HasBWI, { MCK_VR512, MCK_Mem256 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13302 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13312 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_0__Mem1285_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem128 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR256X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_0__Mem2565_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem256 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 13322 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_0__Mem325_1, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_0__Reg1_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_0__Mem645_1, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_Mem64 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_0__Mem1285_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem128 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 13332 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13342 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWrr128, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWrm128, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWrr256, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWrm256, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13350 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13360 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13369 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13377 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13377 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13377 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13377 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13385 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13393 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13393 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13393 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13393 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13393 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13393 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_0__Reg1_1__Mem85_2, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to16_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_0__Reg1_1__Mem85_2, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to32_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_0__Reg1_1__Mem85_2, Feature_HasVBMI, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to64_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to16_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to32_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem85_5, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to64_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6, Feature_HasVLX|Feature_HasVBMI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to16_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6, Feature_HasVLX|Feature_HasVBMI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to32_125_ }, },
  { 13401 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6, Feature_HasVBMI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to64_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX|Feature_HasAVX512, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13416 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13425 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13425 /* vpor */, X86::VPORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13425 /* vpor */, X86::VPORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13425 /* vpor */, X86::VPORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13430 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13430 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13430 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13430 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13430 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13430 /* vpord */, X86::VPORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13430 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13430 /* vpord */, X86::VPORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13430 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13430 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13430 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13430 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13430 /* vpord */, X86::VPORDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13430 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13430 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13430 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13430 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13430 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13430 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13430 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13430 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13430 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13430 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13436 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13436 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13436 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13436 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13436 /* vporq */, X86::VPORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13436 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13436 /* vporq */, X86::VPORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13436 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13436 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13436 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13436 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13436 /* vporq */, X86::VPORQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13436 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13436 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13436 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13436 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13436 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13436 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13436 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13436 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13436 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13436 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13442 /* vpperm */, X86::VPPERMrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13442 /* vpperm */, X86::VPPERMrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13442 /* vpperm */, X86::VPPERMmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13449 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13449 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13456 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13463 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13471 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13479 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13479 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13486 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13493 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13501 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13509 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13509 /* vprotb */, X86::VPROTBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13509 /* vprotb */, X86::VPROTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13509 /* vprotb */, X86::VPROTBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13509 /* vprotb */, X86::VPROTBmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13516 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13516 /* vprotd */, X86::VPROTDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13516 /* vprotd */, X86::VPROTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13516 /* vprotd */, X86::VPROTDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13516 /* vprotd */, X86::VPROTDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13523 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13523 /* vprotq */, X86::VPROTQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13523 /* vprotq */, X86::VPROTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13523 /* vprotq */, X86::VPROTQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13523 /* vprotq */, X86::VPROTQmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13530 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13530 /* vprotw */, X86::VPROTWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13530 /* vprotw */, X86::VPROTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13530 /* vprotw */, X86::VPROTWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13530 /* vprotw */, X86::VPROTWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ512rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13537 /* vpsadbw */, X86::VPSADBWZ512rm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13545 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_2__MemVX32X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13545 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_2__MemVY32X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVY32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13545 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_2__MemVZ325_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_MemVZ32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13557 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_2__MemVX32X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13557 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_2__MemVX32X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13557 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_2__MemVY32X5_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_MemVY32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13569 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_2__MemVX64X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX64X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13569 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_2__MemVY64X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVY64X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13569 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_2__MemVZ645_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13581 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_2__MemVX64X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX64X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 13581 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_2__MemVY64X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVY64X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 13581 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_2__MemVZ645_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 13593 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13593 /* vpshab */, X86::VPSHABrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13593 /* vpshab */, X86::VPSHABmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13600 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13600 /* vpshad */, X86::VPSHADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13600 /* vpshad */, X86::VPSHADmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13607 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13607 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13607 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13614 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13614 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13614 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13621 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13621 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13621 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13628 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13628 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13628 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13635 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13635 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13635 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13642 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13642 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13642 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13649 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13657 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13665 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13674 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13683 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13683 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13683 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13683 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13691 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13691 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13691 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13691 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13699 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13699 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13699 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13699 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13707 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13707 /* vpslld */, X86::VPSLLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
  { 13707 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13707 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13707 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13707 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ512rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13714 /* vpslldq */, X86::VPSLLDQZ512rm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13722 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
  { 13722 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13722 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13729 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13737 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13745 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13753 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13753 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
  { 13753 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13753 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13760 /* vpsrad */, X86::VPSRADri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
  { 13760 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13760 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13760 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13760 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13767 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13774 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13782 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13790 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13798 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13798 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
  { 13798 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13798 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13805 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
  { 13805 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13805 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ512rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13812 /* vpsrldq */, X86::VPSRLDQZ512rm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13820 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13827 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13835 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13843 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasBWI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasVLX|Feature_HasBWI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
  { 13851 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 13858 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13858 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13858 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13858 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13858 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13858 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13865 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13865 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13865 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13865 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13872 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13872 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13872 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13872 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13879 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13887 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13895 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13904 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13913 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 13913 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 13913 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 13913 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 13913 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 13913 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13920 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 13931 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 13942 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 13942 /* vptest */, X86::VPTESTrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 13942 /* vptest */, X86::VPTESTYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 13942 /* vptest */, X86::VPTESTYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13949 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13958 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 13967 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13976 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13985 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 13995 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14005 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX|Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14015 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VK1, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14025 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14036 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14047 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14059 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14070 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14081 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14092 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasBWI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasBWI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasBWI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14104 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasBWI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14115 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14115 /* vpxor */, X86::VPXORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14115 /* vpxor */, X86::VPXORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14115 /* vpxor */, X86::VPXORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14121 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14121 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14121 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14121 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14121 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14121 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14121 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14128 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14128 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14128 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14135 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14144 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmi_altk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rmi_altkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14153 /* vrangesd */, X86::VRANGESDZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmi_altk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rmi_altkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14162 /* vrangess */, X86::VRANGESSZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14171 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14180 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14189 /* vrcp14sd */, X86::VRCP14SDrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14198 /* vrcp14ss */, X86::VRCP14SSrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmb, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 14207 /* vrcp28pd */, X86::VRCP28PDmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmb, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 14216 /* vrcp28ps */, X86::VRCP28PSmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14225 /* vrcp28sd */, X86::VRCP28SDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14234 /* vrcp28ss */, X86::VRCP28SSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14243 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 14243 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 14243 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 14243 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 14250 /* vrcpss */, X86::VRCPSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14250 /* vrcpss */, X86::VRCPSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14257 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasDQI, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasDQI, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14267 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmi_altk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rmi_altkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14277 /* vreducesd */, X86::VREDUCESDZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmi_altk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rmi_altkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14287 /* vreducess */, X86::VREDUCESSZ128rribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14297 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, Feature_HasAVX512, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14309 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrb, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14321 /* vrndscalesd */, X86::VRNDSCALESDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrb, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14333 /* vrndscaless */, X86::VRNDSCALESSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
  { 14345 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 14345 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14345 /* vroundpd */, X86::VROUNDYPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 14345 /* vroundpd */, X86::VROUNDYPDm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14354 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 14354 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14354 /* vroundps */, X86::VROUNDYPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 14354 /* vroundps */, X86::VROUNDYPSm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14363 /* vroundsd */, X86::VROUNDSDr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 14363 /* vroundsd */, X86::VROUNDSDm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
  { 14372 /* vroundss */, X86::VROUNDSSr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 14372 /* vroundss */, X86::VROUNDSSm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14381 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14392 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14403 /* vrsqrt14sd */, X86::VRSQRT14SDrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14414 /* vrsqrt14ss */, X86::VRSQRT14SSrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmb, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 14425 /* vrsqrt28pd */, X86::VRSQRT28PDmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to8_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSr, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSm, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrb, Convert__Reg1_0__Reg1_1, Feature_HasERI, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmb, Convert__Reg1_0__Mem5125_1, Feature_HasERI, { MCK_VR512, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
  { 14436 /* vrsqrt28ps */, X86::VRSQRT28PSmbkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasERI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK__123_1to16_125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14447 /* vrsqrt28sd */, X86::VRSQRT28SDrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrb, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasERI, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14458 /* vrsqrt28ss */, X86::VRSQRT28SSrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasERI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14469 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 14469 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 14469 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 14469 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 14478 /* vrsqrtss */, X86::VRSQRTSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14478 /* vrsqrtss */, X86::VRSQRTSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14487 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14497 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14507 /* vscalefsd */, X86::VSCALEFSDZ128rrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14517 /* vscalefss */, X86::VSCALEFSSZ128rrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14527 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_2__MemVX32X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14527 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_2__MemVX32X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14527 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_2__MemVY32X5_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_MemVY32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14539 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_2__MemVX32X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14539 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_2__MemVY32X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVY32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14539 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_2__MemVZ325_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_MemVZ32, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14551 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_1__MemVY325_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY32 }, },
  { 14566 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_1__MemVZ325_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ32 }, },
  { 14581 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_1__MemVZ645_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 14596 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_1__MemVZ645_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 14611 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_1__MemVY325_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVY32 }, },
  { 14626 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_1__MemVZ325_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ32 }, },
  { 14641 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_1__MemVZ645_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 14656 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_1__MemVZ645_3, Feature_HasPFI, { MCK__123_, MCK_VK1WM, MCK__125_, MCK_MemVZ64 }, },
  { 14671 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_2__MemVX64X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX64X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14671 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_2__MemVY64X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVY64X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14671 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_2__MemVZ645_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14683 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_2__MemVX64X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVX64X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14683 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_2__MemVY64X5_0__Tie0__Reg1_4, Feature_HasVLX, { MCK_MemVY64X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14683 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_2__MemVZ645_0__Tie0__Reg1_4, Feature_HasAVX512, { MCK_MemVZ64, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14695 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14706 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14717 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14728 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14739 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512|Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
  { 14747 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_0__Mem645_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem645_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 14755 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_FR32X, MCK_FR32X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_0__Mem1285_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem128 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_0__Reg1_1, Feature_HasVLX, { MCK_VR256X, MCK_VR256X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_0__Mem2565_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem256 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_VR512, MCK_VR512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_0__Mem5125_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_0__Mem325_1, Feature_HasVLX, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem128 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem256 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_0__Tie0__Reg1_2__Mem325_4, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
  { 14763 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14771 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14779 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14787 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
  { 14796 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14796 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14796 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14796 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14796 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14803 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14803 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14803 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14803 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14803 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14803 /* vsubps */, X86::VSUBPSZrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14803 /* vsubps */, X86::VSUBPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
  { 14803 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14810 /* vsubsd */, X86::VSUBSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14810 /* vsubsd */, X86::VSUBSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14810 /* vsubsd */, X86::VSUBSDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14817 /* vsubss */, X86::VSUBSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14817 /* vsubss */, X86::VSUBSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
  { 14817 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14817 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14817 /* vsubss */, X86::VSUBSSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14817 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14817 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14817 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14817 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14817 /* vsubss */, X86::VSUBSSZrrbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14817 /* vsubss */, X86::VSUBSSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, Feature_HasAVX512, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
  { 14824 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 14824 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 14824 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 14824 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 14832 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 14832 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 14832 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
  { 14832 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
  { 14840 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 14840 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
  { 14840 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 14840 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_0__Mem645_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem64 }, },
  { 14840 /* vucomisd */, X86::VUCOMISDZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14849 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 14849 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
  { 14849 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X }, },
  { 14849 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_0__Mem325_1, Feature_HasAVX512, { MCK_FR32X, MCK_Mem32 }, },
  { 14849 /* vucomiss */, X86::VUCOMISSZrb, Convert__Reg1_0__Reg1_1, Feature_HasAVX512, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14858 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14868 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14878 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasVLX, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasAVX512, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasVLX, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14888 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasAVX512, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14898 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14898 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14898 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14898 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14898 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14898 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
  { 14898 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
  { 14905 /* vxorps */, X86::VXORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
  { 14905 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
  { 14905 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
  { 14905 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
  { 14905 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, Feature_HasDQI, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
  { 14905 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
  { 14905 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
  { 14905 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
  { 14905 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_FR32X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR256X, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
  { 14905 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, Feature_HasDQI, { MCK_VR512, MCK__123_, MCK_VK1WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
  { 14912 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, 0, {  }, },
  { 14921 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, 0, {  }, },
  { 14932 /* wait */, X86::WAIT, Convert_NoOperands, 0, {  }, },
  { 14937 /* wbinvd */, X86::WBINVD, Convert_NoOperands, 0, {  }, },
  { 14944 /* wrfsbase */, X86::WRFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
  { 14944 /* wrfsbase */, X86::WRFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 14973 /* wrgsbase */, X86::WRGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
  { 14973 /* wrgsbase */, X86::WRGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
  { 15002 /* wrmsr */, X86::WRMSR, Convert_NoOperands, 0, {  }, },
  { 15008 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, 0, {  }, },
  { 15015 /* xabort */, X86::XABORT, Convert__Imm1_0, 0, { MCK_Imm }, },
  { 15022 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, 0, {  }, },
  { 15031 /* xadd */, X86::XADD16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 15031 /* xadd */, X86::XADD32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 15031 /* xadd */, X86::XADD64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 15031 /* xadd */, X86::XADD8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 15031 /* xadd */, X86::XADD16rm, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 15031 /* xadd */, X86::XADD32rm, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 15031 /* xadd */, X86::XADD64rm, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 15031 /* xadd */, X86::XADD8rm, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 15060 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, 0, { MCK_AbsMem16 }, },
  { 15060 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
  { 15067 /* xchg */, X86::XCHG16ar, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
  { 15067 /* xchg */, X86::XCHG32ar64, Convert__Reg1_1, Feature_In64BitMode, { MCK_EAX, MCK_GR32_NOAX }, },
  { 15067 /* xchg */, X86::XCHG32ar, Convert__Reg1_1, Feature_Not64BitMode, { MCK_EAX, MCK_GR32 }, },
  { 15067 /* xchg */, X86::XCHG64ar, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
  { 15067 /* xchg */, X86::XCHG32ar64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32_NOAX, MCK_EAX }, },
  { 15067 /* xchg */, X86::XCHG16ar, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
  { 15067 /* xchg */, X86::XCHG16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
  { 15067 /* xchg */, X86::XCHG16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 15067 /* xchg */, X86::XCHG32ar, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_EAX }, },
  { 15067 /* xchg */, X86::XCHG32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
  { 15067 /* xchg */, X86::XCHG32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 15067 /* xchg */, X86::XCHG64ar, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
  { 15067 /* xchg */, X86::XCHG64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
  { 15067 /* xchg */, X86::XCHG64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 15067 /* xchg */, X86::XCHG8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
  { 15067 /* xchg */, X86::XCHG8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 15067 /* xchg */, X86::XCHG16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
  { 15067 /* xchg */, X86::XCHG32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
  { 15067 /* xchg */, X86::XCHG64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
  { 15067 /* xchg */, X86::XCHG8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
  { 15096 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, 0, {  }, },
  { 15106 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, 0, {  }, },
  { 15116 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, 0, {  }, },
  { 15126 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, 0, {  }, },
  { 15136 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, 0, {  }, },
  { 15146 /* xend */, X86::XEND, Convert_NoOperands, 0, {  }, },
  { 15151 /* xgetbv */, X86::XGETBV, Convert_NoOperands, 0, {  }, },
  { 15158 /* xlatb */, X86::XLAT, Convert_NoOperands, 0, {  }, },
  { 15164 /* xor */, X86::XOR8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
  { 15164 /* xor */, X86::XOR16ri8, Convert__regAX__Tie0__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
  { 15164 /* xor */, X86::XOR16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
  { 15164 /* xor */, X86::XOR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
  { 15164 /* xor */, X86::XOR32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
  { 15164 /* xor */, X86::XOR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
  { 15164 /* xor */, X86::XOR64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
  { 15164 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
  { 15164 /* xor */, X86::XOR16ri8, Convert__Reg1_0__Tie0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
  { 15164 /* xor */, X86::XOR16ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
  { 15164 /* xor */, X86::XOR16rm, Convert__Reg1_0__Tie0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
  { 15164 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
  { 15164 /* xor */, X86::XOR32ri8, Convert__Reg1_0__Tie0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
  { 15164 /* xor */, X86::XOR32ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
  { 15164 /* xor */, X86::XOR32rm, Convert__Reg1_0__Tie0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
  { 15164 /* xor */, X86::XOR64rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
  { 15164 /* xor */, X86::XOR64ri8, Convert__Reg1_0__Tie0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
  { 15164 /* xor */, X86::XOR64ri32, Convert__Reg1_0__Tie0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
  { 15164 /* xor */, X86::XOR64rm, Convert__Reg1_0__Tie0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
  { 15164 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
  { 15164 /* xor */, X86::XOR8ri, Convert__Reg1_0__Tie0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
  { 15164 /* xor */, X86::XOR8rm, Convert__Reg1_0__Tie0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
  { 15164 /* xor */, X86::XOR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
  { 15164 /* xor */, X86::XOR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
  { 15164 /* xor */, X86::XOR16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
  { 15164 /* xor */, X86::XOR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
  { 15164 /* xor */, X86::XOR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
  { 15164 /* xor */, X86::XOR32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
  { 15164 /* xor */, X86::XOR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
  { 15164 /* xor */, X86::XOR64mi8, Convert__Mem645_0__ImmSExti64i81_1, 0, { MCK_Mem64, MCK_ImmSExti64i8 }, },
  { 15164 /* xor */, X86::XOR64mi32, Convert__Mem645_0__ImmSExti64i321_1, 0, { MCK_Mem64, MCK_ImmSExti64i32 }, },
  { 15164 /* xor */, X86::XOR8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
  { 15164 /* xor */, X86::XOR8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
  { 15178 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 15178 /* xorpd */, X86::XORPDrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 15184 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
  { 15184 /* xorps */, X86::XORPSrm, Convert__Reg1_0__Tie0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
  { 15200 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, 0, {  }, },
  { 15209 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15216 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15225 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15233 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15243 /* xsave */, X86::XSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15249 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15257 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15264 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15273 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15282 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15293 /* xsaves */, X86::XSAVES, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15300 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, 0, { MCK_Mem }, },
  { 15309 /* xsetbv */, X86::XSETBV, Convert_NoOperands, 0, {  }, },
  { 15316 /* xsha1 */, X86::XSHA1, Convert_NoOperands, 0, {  }, },
  { 15322 /* xsha256 */, X86::XSHA256, Convert_NoOperands, 0, {  }, },
  { 15330 /* xstore */, X86::XSTORE, Convert_NoOperands, 0, {  }, },
  { 15337 /* xstorerng */, X86::XSTORE, Convert_NoOperands, 0, {  }, },
  { 15347 /* xtest */, X86::XTEST, Convert_NoOperands, 0, {  }, },
};

unsigned X86AsmParser::
MatchInstructionImpl(const OperandVector &Operands,
                     MCInst &Inst, uint64_t &ErrorInfo,
                     bool matchingInlineAsm, unsigned VariantID) {
  // Eliminate obvious mismatches.
  if (Operands.size() > 10) {
    ErrorInfo = 10;
    return Match_InvalidOperand;
  }

  // Get the current feature set.
  uint64_t AvailableFeatures = getAvailableFeatures();

  // Get the instruction mnemonic, which is the first token.
  StringRef Mnemonic = ((X86Operand&)*Operands[0]).getToken();

  // Process all MnemonicAliases to remap the mnemonic.
  applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);

  // Some state to try to produce better error messages.
  bool HadMatchOtherThanFeatures = false;
  bool HadMatchOtherThanPredicate = false;
  unsigned RetCode = Match_InvalidOperand;
  uint64_t MissingFeatures = ~0ULL;
  // Set ErrorInfo to the operand that mismatches if it is
  // wrong for all instances of the instruction.
  ErrorInfo = ~0ULL;
  // Find the appropriate table for this asm variant.
  const MatchEntry *Start, *End;
  switch (VariantID) {
  default: llvm_unreachable("invalid variant!");
  case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
  case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
  }
  // Search the table.
  auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());

  // Return a more specific error code if no mnemonics match.
  if (MnemonicRange.first == MnemonicRange.second)
    return Match_MnemonicFail;

  for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
       it != ie; ++it) {
    // equal_range guarantees that instruction mnemonic matches.
    assert(Mnemonic == it->getMnemonic());
    bool OperandsValid = true;
    for (unsigned i = 0; i != 9; ++i) {
      auto Formal = static_cast<MatchClassKind>(it->Classes[i]);
      if (i+1 >= Operands.size()) {
        OperandsValid = (Formal == InvalidMatchClass);
        if (!OperandsValid) ErrorInfo = i+1;
        break;
      }
      MCParsedAsmOperand &Actual = *Operands[i+1];
      unsigned Diag = validateOperandClass(Actual, Formal);
      if (Diag == Match_Success)
        continue;
      // If the generic handler indicates an invalid operand
      // failure, check for a special case.
      if (Diag == Match_InvalidOperand) {
        Diag = validateTargetOperandClass(Actual, Formal);
        if (Diag == Match_Success)
          continue;
      }
      // If this operand is broken for all of the instances of this
      // mnemonic, keep track of it so we can report loc info.
      // If we already had a match that only failed due to a
      // target predicate, that diagnostic is preferred.
      if (!HadMatchOtherThanPredicate &&
          (it == MnemonicRange.first || ErrorInfo <= i+1)) {
        ErrorInfo = i+1;
        // InvalidOperand is the default. Prefer specificity.
        if (Diag != Match_InvalidOperand)
          RetCode = Diag;
      }
      // Otherwise, just reject this instance of the mnemonic.
      OperandsValid = false;
      break;
    }

    if (!OperandsValid) continue;
    if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) {
      HadMatchOtherThanFeatures = true;
      uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
      if (countPopulation(NewMissingFeatures) <=
          countPopulation(MissingFeatures))
        MissingFeatures = NewMissingFeatures;
      continue;
    }

    Inst.clear();

    if (matchingInlineAsm) {
      Inst.setOpcode(it->Opcode);
      convertToMapAndConstraints(it->ConvertFn, Operands);
      return Match_Success;
    }

    // We have selected a definite instruction, convert the parsed
    // operands into the appropriate MCInst.
    convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);

    // We have a potential match. Check the target predicate to
    // handle any context sensitive constraints.
    unsigned MatchResult;
    if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
      Inst.clear();
      RetCode = MatchResult;
      HadMatchOtherThanPredicate = true;
      continue;
    }

    return Match_Success;
  }

  // Okay, we had no match.  Try to return a useful error code.
  if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
    return RetCode;

  // Missing feature matches return which features were missing
  ErrorInfo = MissingFeatures;
  return Match_MissingFeature;
}

#endif // GET_MATCHER_IMPLEMENTATION

