The Blackwell generation supposedly comes with new hardware for native TEE I/O compatibility and encrypted NVLink. The most recent release notes (575TRD1) introduce the first CC implementation on a singe B200, still relying on bouncing.

My questions:

1. It appears that the firmware for CC on multi-GPU Blackwell systems (DGX, NVL72) is not ready yet. Is this on the agenda?
2. What features will be enabled by the new hardware-enabled encryption? TDISP for PCIe? Co-processors for encrypted NVlink and HBM with minimal bandwidth/latency overhead?
3. More general question: How scalable can CC become on Blackwell? Single DGX server? NVL72 rack?

Would be great if you can comment on the technical details. If not, maybe you can answer the general question:

What can we expect for scalable CC on Blackwell, this year?