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Published June 26, 2023 | Version v2
Conference paper Open

CTD2022: ATLAS ITk Track Reconstruction with a GNN-based Pipeline

  • 1. Laboratoire des 2 Infinis - Toulouse, CNRS / Univ. Paul Sabatier (FR)
  • 2. Lawrence Berkeley National Lab. (US)
  • 3. Lawrence Berkeley National Laboratory
  • 4. CNRS

Description

Graph Neural Networks (GNNs) have been shown to produce high accuracy performance on track reconstruction in the TrackML challenge. However, GNNs are less explored in applications with noisy, heterogeneous or ambiguous data. These elements are expected from HL-LHC ATLAS Inner Tracker (ITk) detector data, when it is reformulated as a graph. We present the first comprehensive studies of a GNN-based track reconstruction pipeline on ATLAS-generated ITk data. Significant challenges exist in translating graph methods to this dataset, including processing shared spacepoints, and cluster-to-spacepoint mapping. We analyze several approaches to low-latency and high-efficiency graph construction from this processed data. Further, innovations in GNN training are required for ITk, for example memory management for the very large ITk point clouds, and novel constructions of loss for noisy spacepoints and background tracks. Following these upgrades to the earlier ExaTrkx pipeline, we are able to present the shared state-of-the-art physics performance on full-detector, full-pileup ITk events. We show that a GNN-based pipeline maintains tracking efficiency that is robust to the significant backgrounds and volume-to-volume variation within the detector, across a wide range of pseudorapidity and transverse momenta. We present a set of reconstruction cuts adapted to the GNN pipeline, and see competitive performance compared to the current ATLAS reconstruction chain. Several methods for post-processing GNN output are explored, for either very fast triplet seeding on GPU, or for recovering efficiency with learned embeddings of tracklets and with Kalman Filters. Finally, the performance of different configurations of GNN architecture are considered, for several possible hardware and latency configurations.

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