BibTeX record conf/smacd/VarmaSA16

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@inproceedings{DBLP:conf/smacd/VarmaSA16,
  author       = {Sayyaparaju Sagar Varma and
                  Arvind Kumar Sharma and
                  Bulusu Anand},
  title        = {An efficient methodology to characterize the {TSPC} flip flop setup
                  time for static timing analysis},
  booktitle    = {13th International Conference on Synthesis, Modeling, Analysis and
                  Simulation Methods and Applications to Circuit Design, {SMACD} 2016,
                  Lisbon, Portugal, June 27-30, 2016},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/SMACD.2016.7520724},
  doi          = {10.1109/SMACD.2016.7520724},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/smacd/VarmaSA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}