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"A 40MS/s 12-bit Zero-Crossing Based SAR-Assisted Two-Stage Pipelined ADC ..."

Yung-Te Chang, Min-Rui Wu, Chih-Cheng Hsieh (2019)

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DOI: 10.1109/ISCAS.2019.8702449

access: closed

type: Conference or Workshop Paper

metadata version: 2019-07-14

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Yung-Te Chang, Min-Rui Wu, Chih-Cheng Hsieh:
A 40MS/s 12-bit Zero-Crossing Based SAR-Assisted Two-Stage Pipelined ADC with Adaptive Level Shifting. ISCAS 2019: 1-4

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