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Volkan Kursun
- > Home > Persons > Volkan Kursun
Publications
- 2020
- [j41]Yanan Sun
, Weifeng He
Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(7): 2431-2441 (2020) - 2019
- [c71]Jiachen Jiang, Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun
Carbon-Based Three-Dimensional SRAM Cell with Minimum Inter-Layer Area Skew Considering Process imperfections. ASICON 2019: 1-4 - [c70]Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
Statistical Modeling and Design of a 16nm 9T SRAM Cell Considering Post-Synthesis Removal of Metallic Carbon-Nanotubes. ICEIC 2019: 1-2 - 2017
- [j38]Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun
Variable strength keeper for high-speed and low-leakage carbon nanotube domino logic. Microelectron. J. 62: 12-20 (2017) - [c68]Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistors. ASICON 2017: 908-911 - 2015
- [j34]Yanan Sun, Hailong Jiao, Volkan Kursun
A Novel Robust and Low-Leakage SRAM Cell With Nine Carbon Nanotube Transistors. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1729-1739 (2015) - [c66]Yanan Sun, Volkan Kursun
Carbon-based sleep switch dynamic logic circuits with variable strength keeper for lower-leakage currents and higher-speed. ISCAS 2015: 2720-2723 - 2014
- [j32]Yanan Sun, Volkan Kursun
Carbon Nanotubes Blowing New Life Into NP Dynamic CMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(2): 420-428 (2014) - [c64]Yanan Sun, Hailong Jiao, Volkan Kursun
Low-leakage 9-CN-MOSFET SRAM cell with enhanced read and write voltage margins. ICM 2014: 164-167 - 2013
- [c59]Yanan Sun, Volkan Kursun
Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors. ISCAS 2013: 2119-2122 - 2012
- [c50]Yanan Sun, Volkan Kursun
NP dynamic CMOS resurrection with carbon nanotube field effect transistors. ISOCC 2012: 13-16 - 2011
- [c48]Yanan Sun, Volkan Kursun
Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors. ISCAS 2011: 2513-2516 - [c45]Yanan Sun, Volkan Kursun
Uniform carbon nanotube diameter and nanoarray pitch for VLSI of 16nm P-channel MOSFETs. VLSI-SoC 2011: 226-231
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