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BibTeX records: Xinmiao Zhang 0001
@article{DBLP:journals/tcasI/ZhangGYLALL25,
author = {Xinmiao Zhang and
Chongyan Gu and
Mengmei Ye and
Qiang Liu and
Reza Azarderakhsh and
Weiqiang Liu and
Yang Li},
title = {Guest Editorial Special Issue on Emerging Hardware Security and Trust
Technologies - AsianHOST 2023},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {72},
number = {2},
pages = {482},
year = {2025},
url = {https://doi.org/10.1109/TCSI.2024.3521308},
doi = {10.1109/TCSI.2024.3521308},
timestamp = {Fri, 07 Mar 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/ZhangGYLALL25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/Zhang25,
author = {Xinmiao Zhang},
title = {Guest Editorial Special Issue on the International Symposium on Integrated
Circuits and Systems - {ISICAS} 2025},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {72},
number = {11},
pages = {6279},
year = {2025},
url = {https://doi.org/10.1109/TCSI.2025.3613806},
doi = {10.1109/TCSI.2025.3613806},
timestamp = {Thu, 06 Nov 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/Zhang25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/AkheratiCZ25,
author = {Sajjad Akherati and
Jiaxuan Cai and
Xinmiao Zhang},
title = {Efficient Generalized Integer Division and Modular Reduction Architectures
for Homomorphic Encryption},
journal = {J. Signal Process. Syst.},
volume = {97},
number = {2},
pages = {157--171},
year = {2025},
url = {https://doi.org/10.1007/s11265-025-01959-6},
doi = {10.1007/S11265-025-01959-6},
timestamp = {Tue, 14 Oct 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/AkheratiCZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/CaiZ25,
author = {Jiaxuan Cai and
Xinmiao Zhang},
title = {Low-Latency Parallel Row-Layered Min-Sum Decoders with Scheduling
Optimization for {MDPC} Code-Based Post-Quantum Cryptography},
journal = {J. Signal Process. Syst.},
volume = {97},
number = {5},
pages = {257--268},
year = {2025},
url = {https://doi.org/10.1007/s11265-025-01964-9},
doi = {10.1007/S11265-025-01964-9},
timestamp = {Sat, 15 Nov 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/CaiZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AkheratiT025,
author = {Sajjad Akherati and
Yok Jye Tang and
Xinmiao Zhang},
title = {Three-Input Ciphertext Multiplication for Homomorphic Encryption},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2025,
London, United Kingdom, May 25-28, 2025},
pages = {1--5},
publisher = {{IEEE}},
year = {2025},
url = {https://doi.org/10.1109/ISCAS56072.2025.11043334},
doi = {10.1109/ISCAS56072.2025.11043334},
timestamp = {Sun, 02 Nov 2025 21:27:44 +0100},
biburl = {https://dblp.org/rec/conf/iscas/AkheratiT025.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Cai025,
author = {Jiaxuan Cai and
Xinmiao Zhang},
title = {Efficient Layered New Bit-Flipping {QC-MDPC} Decoder for {BIKE} Post-Quantum
Cryptography},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2025,
London, United Kingdom, May 25-28, 2025},
pages = {1--5},
publisher = {{IEEE}},
year = {2025},
url = {https://doi.org/10.1109/ISCAS56072.2025.11043849},
doi = {10.1109/ISCAS56072.2025.11043849},
timestamp = {Tue, 08 Jul 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Cai025.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TangC025,
author = {Yok Jye Tang and
Jiaxuan Cai and
Xinmiao Zhang},
title = {Low-Complexity Linear Feedback Shift Register Architecture For {CRC}
En/Decoding},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2025,
London, United Kingdom, May 25-28, 2025},
pages = {1--5},
publisher = {{IEEE}},
year = {2025},
url = {https://doi.org/10.1109/ISCAS56072.2025.11044123},
doi = {10.1109/ISCAS56072.2025.11044123},
timestamp = {Tue, 08 Jul 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TangC025.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/icl/TangZ24,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {Modified Extended Integrated Interleaved Codes},
journal = {{IEEE} Commun. Lett.},
volume = {28},
number = {5},
pages = {989--993},
year = {2024},
url = {https://doi.org/10.1109/LCOMM.2024.3372972},
doi = {10.1109/LCOMM.2024.3372972},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/icl/TangZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/Zhang24,
author = {Xinmiao Zhang},
title = {Guest Editorial Special Issue on the International Symposium on Integrated
Circuits and Systems - {ISICAS} 2024},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {71},
number = {11},
pages = {4899},
year = {2024},
url = {https://doi.org/10.1109/TCSI.2024.3471029},
doi = {10.1109/TCSI.2024.3471029},
timestamp = {Sat, 30 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/Zhang24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/Zhang24a,
author = {Xinmiao Zhang},
title = {Guest Editorial Special Issue on the International Symposium on Circuits
and Systems - {ISCAS} 2024},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {71},
number = {12},
pages = {5375},
year = {2024},
url = {https://doi.org/10.1109/TCSI.2024.3494892},
doi = {10.1109/TCSI.2024.3494892},
timestamp = {Wed, 08 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/Zhang24a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/TangZ24,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {Generalized Integrated Interleaved Codes for High-Density DRAMs},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {71},
number = {1},
pages = {410--414},
year = {2024},
url = {https://doi.org/10.1109/TCSII.2023.3307502},
doi = {10.1109/TCSII.2023.3307502},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasII/TangZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/AkheratiZ24,
author = {Sajjad Akherati and
Xinmiao Zhang},
title = {Low-Complexity Ciphertext Multiplication for {CKKS} Homomorphic Encryption},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {71},
number = {3},
pages = {1396--1400},
year = {2024},
url = {https://doi.org/10.1109/TCSII.2023.3318859},
doi = {10.1109/TCSII.2023.3318859},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasII/AkheratiZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/XieZLRZ24,
author = {Jiafeng Xie and
Wenfeng Zhao and
Hanho Lee and
Debapriya Basu Roy and
Xinmiao Zhang},
title = {Hardware Circuits and Systems Design for Post-Quantum Cryptography
- {A} Tutorial Brief},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {71},
number = {3},
pages = {1670--1676},
year = {2024},
url = {https://doi.org/10.1109/TCSII.2024.3357836},
doi = {10.1109/TCSII.2024.3357836},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasII/XieZLRZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/TangZ24,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {Low-Complexity Parallel Chien Search Architecture Based on Vandermonde
Matrix Decomposition},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {32},
number = {9},
pages = {1744--1748},
year = {2024},
url = {https://doi.org/10.1109/TVLSI.2024.3394396},
doi = {10.1109/TVLSI.2024.3394396},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/TangZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/AkheratiC024,
author = {Sajjad Akherati and
Jiaxuan Cai and
Xinmiao Zhang},
title = {Low-Complexity Integer Divider Architecture for Homomorphic Encryption},
booktitle = {{IEEE} Workshop on Signal Processing Systemsm, SiPS 2024, Cambridge,
MA, USA, November 4-6, 2024},
pages = {131--135},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/SiPS62058.2024.00031},
doi = {10.1109/SIPS62058.2024.00031},
timestamp = {Tue, 17 Dec 2024 17:05:34 +0100},
biburl = {https://dblp.org/rec/conf/sips/AkheratiC024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/Akherati024,
author = {Sajjad Akherati and
Xinmiao Zhang},
title = {Improved Ciphertext Multiplication for {RNS-CKKS} Homomorphic Encryption},
booktitle = {{IEEE} Workshop on Signal Processing Systemsm, SiPS 2024, Cambridge,
MA, USA, November 4-6, 2024},
pages = {136--140},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/SiPS62058.2024.00032},
doi = {10.1109/SIPS62058.2024.00032},
timestamp = {Tue, 17 Dec 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/Akherati024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/Cai024,
author = {Jiaxuan Cai and
Xinmiao Zhang},
title = {Low-Latency Parallel Row-Layered Min-sum {MDPC} Decoder for McEliece
Cryptosystem},
booktitle = {{IEEE} Workshop on Signal Processing Systemsm, SiPS 2024, Cambridge,
MA, USA, November 4-6, 2024},
pages = {147--152},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/SiPS62058.2024.00034},
doi = {10.1109/SIPS62058.2024.00034},
timestamp = {Tue, 17 Dec 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/Cai024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2401-11064,
author = {Sajjad Akherati and
Jiaxuan Cai and
Xinmiao Zhang},
title = {Low-Complexity Integer Divider Architecture for Homomorphic Encryption},
journal = {CoRR},
volume = {abs/2401.11064},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2401.11064},
doi = {10.48550/ARXIV.2401.11064},
eprinttype = {arXiv},
eprint = {2401.11064},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2401-11064.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2407-12695,
author = {Jiaxuan Cai and
Xinmiao Zhang},
title = {Highly Efficient Parallel Row-Layered Min-Sum {MDPC} Decoder for McEliece
Cryptosystem},
journal = {CoRR},
volume = {abs/2407.12695},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2407.12695},
doi = {10.48550/ARXIV.2407.12695},
eprinttype = {arXiv},
eprint = {2407.12695},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2407-12695.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2409-05205,
author = {Sajjad Akherati and
Xinmiao Zhang},
title = {Efficient Homomorphically Encrypted Convolutional Neural Network Without
Rotation},
journal = {CoRR},
volume = {abs/2409.05205},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2409.05205},
doi = {10.48550/ARXIV.2409.05205},
eprinttype = {arXiv},
eprint = {2409.05205},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2409-05205.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2410-13545,
author = {Sajjad Akherati and
Yok Jye Tang and
Xinmiao Zhang},
title = {Three-Input Ciphertext Multiplication for Homomorphic Encryption},
journal = {CoRR},
volume = {abs/2410.13545},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2410.13545},
doi = {10.48550/ARXIV.2410.13545},
eprinttype = {arXiv},
eprint = {2410.13545},
timestamp = {Sun, 24 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2410-13545.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2412-11997,
author = {Jiaxuan Cai and
Xinmiao Zhang},
title = {Efficient Layered New Bit-Flipping {QC-MDPC} Decoder for {BIKE} Post-Quantum
Cryptography},
journal = {CoRR},
volume = {abs/2412.11997},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2412.11997},
doi = {10.48550/ARXIV.2412.11997},
eprinttype = {arXiv},
eprint = {2412.11997},
timestamp = {Tue, 21 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2412-11997.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsait/TangZ23,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {Fast and Low-Complexity Soft-Decision Generalized Integrated Interleaved
Decoder},
journal = {{IEEE} J. Sel. Areas Inf. Theory},
volume = {4},
pages = {174--189},
year = {2023},
url = {https://doi.org/10.1109/JSAIT.2023.3296419},
doi = {10.1109/JSAIT.2023.3296419},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jsait/TangZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsait/EtzionSKMPSTYZ23,
author = {Tuvi Etzion and
Paul H. Siegel and
Han Mao Kiah and
Hessam Mahdavifar and
Farzad Parvaresh and
Moshe Schwartz and
Ido Tal and
Eitan Yaakobi and
Xinmiao Zhang},
title = {Dimensions of Channel Coding: From Theory to Algorithms to Applications},
journal = {{IEEE} J. Sel. Areas Inf. Theory},
volume = {4},
pages = {v--xiii},
year = {2023},
url = {https://doi.org/10.1109/JSAIT.2023.3338326},
doi = {10.1109/JSAIT.2023.3338326},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jsait/EtzionSKMPSTYZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/TanWZLP23,
author = {Weihang Tan and
Antian Wang and
Xinmiao Zhang and
Yingjie Lao and
Keshab K. Parhi},
title = {High-Speed {VLSI} Architectures for Modular Polynomial Multiplication
via Fast Filtering and Applications to Lattice-Based Cryptography},
journal = {{IEEE} Trans. Computers},
volume = {72},
number = {9},
pages = {2454--2466},
year = {2023},
url = {https://doi.org/10.1109/TC.2023.3251847},
doi = {10.1109/TC.2023.3251847},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/TanWZLP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhouZ23,
author = {Jingbo Zhou and
Xinmiao Zhang},
title = {Algorithmic Obfuscation for {LDPC} Decoders},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {42},
number = {2},
pages = {371--383},
year = {2023},
url = {https://doi.org/10.1109/TCAD.2022.3175051},
doi = {10.1109/TCAD.2022.3175051},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhouZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhouZ23a,
author = {Jingbo Zhou and
Xinmiao Zhang},
title = {Joint Protection Scheme for Deep Neural Network Hardware Accelerators
and Models},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {42},
number = {12},
pages = {4518--4527},
year = {2023},
url = {https://doi.org/10.1109/TCAD.2023.3282897},
doi = {10.1109/TCAD.2023.3282897},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhouZ23a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/CaiZ23,
author = {Jiaxuan Cai and
Xinmiao Zhang},
title = {Low-Complexity Parallel Min-Sum Medium-Density Parity-Check Decoder
for McEliece Cryptosystem},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {70},
number = {12},
pages = {5328--5338},
year = {2023},
url = {https://doi.org/10.1109/TCSI.2023.3319358},
doi = {10.1109/TCSI.2023.3319358},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/CaiZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/ZhangX23,
author = {Xinmiao Zhang and
Zhenshan Xie},
title = {Sparsity-Aware Medium-Density Parity-Check Decoder for McEliece Cryptosystems},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {70},
number = {9},
pages = {3343--3347},
year = {2023},
url = {https://doi.org/10.1109/TCSII.2023.3264578},
doi = {10.1109/TCSII.2023.3264578},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasII/ZhangX23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/comsur/FerrazSCACNSZPF22,
author = {Oscar Ferraz and
Srinivasan Subramaniyan and
Ramesh Chinthala and
Jo{\~{a}}o Andrade and
Joseph R. Cavallaro and
Soumitra Kumar Nandy and
V{\'{\i}}tor Silva and
Xinmiao Zhang and
Madhura Purnaprajna and
Gabriel Falc{\~{a}}o},
title = {A Survey on High-Throughput Non-Binary {LDPC} Decoders: ASIC, FPGA,
and {GPU} Architectures},
journal = {{IEEE} Commun. Surv. Tutorials},
volume = {24},
number = {1},
pages = {524--556},
year = {2022},
url = {https://doi.org/10.1109/COMST.2021.3126127},
doi = {10.1109/COMST.2021.3126127},
timestamp = {Sat, 30 Aug 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/comsur/FerrazSCACNSZPF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/TangZ22,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {Fast En/Decoding of Reed-Solomon Codes for Failure Recovery},
journal = {{IEEE} Trans. Computers},
volume = {71},
number = {3},
pages = {724--735},
year = {2022},
url = {https://doi.org/10.1109/TC.2021.3060701},
doi = {10.1109/TC.2021.3060701},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/TangZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/TangZ22,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {Low-Complexity Resource-Shareable Parallel Generalized Integrated
Interleaved Encoder},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {69},
number = {2},
pages = {694--706},
year = {2022},
url = {https://doi.org/10.1109/TCSI.2021.3118301},
doi = {10.1109/TCSI.2021.3118301},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/TangZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/XieZ22,
author = {Zhenshan Xie and
Xinmiao Zhang},
title = {Efficient Sub-Codeword Key Equation Solver for Generalized Integrated
Interleaved {BCH} Decoder},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {69},
number = {1},
pages = {85--89},
year = {2022},
url = {https://doi.org/10.1109/TCSII.2021.3090325},
doi = {10.1109/TCSII.2021.3090325},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasII/XieZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/XieTZ22,
author = {Zhenshan Xie and
Yok Jye Tang and
Xinmiao Zhang},
title = {Low-Latency Nested Decoding for Short Generalized Integrated Interleaved
{BCH} Codes},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {30},
number = {10},
pages = {1563--1567},
year = {2022},
url = {https://doi.org/10.1109/TVLSI.2022.3179944},
doi = {10.1109/TVLSI.2022.3179944},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/XieTZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ZhangHP22,
author = {Xinmiao Zhang and
Zheang Huai and
Keshab K. Parhi},
title = {Polynomial Multiplication Architecture with Integrated Modular Reduction
for {R-LWE} Cryptosystems},
journal = {J. Signal Process. Syst.},
volume = {94},
number = {8},
pages = {799--809},
year = {2022},
url = {https://doi.org/10.1007/s11265-022-01746-7},
doi = {10.1007/S11265-022-01746-7},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/ZhangHP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/HuaiZZ22,
author = {Zheang Huai and
Jingbo Zhou and
Xinmiao Zhang},
title = {Efficient Hardware Implementation Architectures for Long Integer Modular
Multiplication over General Solinas Prime},
journal = {J. Signal Process. Syst.},
volume = {94},
number = {10},
pages = {1067--1082},
year = {2022},
url = {https://doi.org/10.1007/s11265-022-01794-z},
doi = {10.1007/S11265-022-01794-Z},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/HuaiZZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icc/XieZ22,
author = {Zhenshan Xie and
Xinmiao Zhang},
title = {Improved Miscorrection Detection for Generalized Integrated Interleaved
{BCH} Codes},
booktitle = {{IEEE} International Conference on Communications, {ICC} 2022, Seoul,
Korea, May 16-20, 2022},
pages = {3442--3447},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICC45855.2022.9839067},
doi = {10.1109/ICC45855.2022.9839067},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icc/XieZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhouETZ22,
author = {Jingbo Zhou and
Elsayed Elgendy and
Eslam Yahya Tawfik and
Xinmiao Zhang},
title = {Low-Complexity {AES} Architectures Resilient to Power Analysis Attacks},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2022,
Austin, TX, USA, May 27 - June 1, 2022},
pages = {165--169},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISCAS48785.2022.9937692},
doi = {10.1109/ISCAS48785.2022.9937692},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhouETZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Zhang22,
author = {Xinmiao Zhang},
title = {Efficient Check Node Processing for Min-Max {NB-LDPC} Decoding over
Lower-Order Finite Fields},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2022,
Austin, TX, USA, May 27 - June 1, 2022},
pages = {2062--2066},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISCAS48785.2022.9937813},
doi = {10.1109/ISCAS48785.2022.9937813},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/Zhang22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XieZ22,
author = {Zhenshan Xie and
Xinmiao Zhang},
title = {Efficient Nested Key Equation Solver for Short Generalized Integrated
Interleaved {BCH} Codes},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2022,
Austin, TX, USA, May 27 - June 1, 2022},
pages = {2067--2071},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISCAS48785.2022.9937668},
doi = {10.1109/ISCAS48785.2022.9937668},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/XieZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/TangZ22,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {Efficient Reconfigurable Vandermonde Matrix Inverter for Erasure-Correcting
Generalized Integrated Interleaved Decoding},
booktitle = {{IEEE} Workshop on Signal Processing Systems, SiPS 2022, Rennes, France,
November 2-4, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/SiPS55645.2022.9919241},
doi = {10.1109/SIPS55645.2022.9919241},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/TangZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-03249,
author = {Jingbo Zhou and
Xinmiao Zhang},
title = {Joint Protection Scheme for Deep Neural Network Hardware Accelerators
and Models},
journal = {CoRR},
volume = {abs/2210.03249},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.03249},
doi = {10.48550/ARXIV.2210.03249},
eprinttype = {arXiv},
eprint = {2210.03249},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-03249.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/icl/XieZ21,
author = {Zhenshan Xie and
Xinmiao Zhang},
title = {Miscorrection Mitigation for Generalized Integrated Interleaved {BCH}
Codes},
journal = {{IEEE} Commun. Lett.},
volume = {25},
number = {7},
pages = {2118--2122},
year = {2021},
url = {https://doi.org/10.1109/LCOMM.2021.3074461},
doi = {10.1109/LCOMM.2021.3074461},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/icl/XieZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ojcands/JohnLZ21,
author = {Deepu John and
Yongfu Li and
Xinmiao Zhang},
title = {Special Section on Edge {AI} and Accelerators},
journal = {{IEEE} Open J. Circuits Syst.},
volume = {2},
pages = {128--130},
year = {2021},
url = {https://doi.org/10.1109/OJCAS.2020.3047505},
doi = {10.1109/OJCAS.2020.3047505},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ojcands/JohnLZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/XieZ21,
author = {Zhenshan Xie and
Xinmiao Zhang},
title = {Fast Nested Key Equation Solvers for Generalized Integrated Interleaved
Decoder},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {68},
number = {1},
pages = {483--495},
year = {2021},
url = {https://doi.org/10.1109/TCSI.2020.3025847},
doi = {10.1109/TCSI.2020.3025847},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/XieZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tifs/ZhouZ21,
author = {Jingbo Zhou and
Xinmiao Zhang},
title = {Generalized SAT-Attack-Resistant Logic Locking},
journal = {{IEEE} Trans. Inf. Forensics Secur.},
volume = {16},
pages = {2581--2592},
year = {2021},
url = {https://doi.org/10.1109/TIFS.2021.3059271},
doi = {10.1109/TIFS.2021.3059271},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tifs/ZhouZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asianhost/TanWLZP21,
author = {Weihang Tan and
Antian Wang and
Yingjie Lao and
Xinmiao Zhang and
Keshab K. Parhi},
title = {Pipelined High-Throughput {NTT} Architecture for Lattice-Based Cryptography},
booktitle = {Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2021,
Shanghai, China, December 16-18, 2021},
pages = {1--4},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/AsianHOST53231.2021.9699608},
doi = {10.1109/ASIANHOST53231.2021.9699608},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asianhost/TanWLZP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/ZhangP21,
author = {Xinmiao Zhang and
Keshab K. Parhi},
title = {Reduced-Complexity Modular Polynomial Multiplication for {R-LWE} Cryptosystems},
booktitle = {{IEEE} International Conference on Acoustics, Speech and Signal Processing,
{ICASSP} 2021, Toronto, ON, Canada, June 6-11, 2021},
pages = {7853--7857},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICASSP39728.2021.9414005},
doi = {10.1109/ICASSP39728.2021.9414005},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/ZhangP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/XieZ21,
author = {Zhenshan Xie and
Xinmiao Zhang},
title = {Scaled Fast Nested Key Equation Solver for Generalized Integrated
Interleaved {BCH} Decoders},
booktitle = {{IEEE} International Conference on Acoustics, Speech and Signal Processing,
{ICASSP} 2021, Toronto, ON, Canada, June 6-11, 2021},
pages = {7883--7887},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICASSP39728.2021.9414846},
doi = {10.1109/ICASSP39728.2021.9414846},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/XieZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangT21,
author = {Xinmiao Zhang and
Yok Jye Tang},
title = {Low-Complexity Parallel Cyclic Redundancy Check},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401679},
doi = {10.1109/ISCAS51556.2021.9401679},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/ZhouZ21,
author = {Jingbo Zhou and
Xinmiao Zhang},
title = {A Low-Complexity Flexible Logic-Locking Scheme Resisting Removal Attacks},
booktitle = {64th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2021, Lansing, MI, USA, August 9-11, 2021},
pages = {869--873},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MWSCAS47672.2021.9531796},
doi = {10.1109/MWSCAS47672.2021.9531796},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mwscas/ZhouZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/HuaiPZ21,
author = {Zheang Huai and
Keshab K. Parhi and
Xinmiao Zhang},
title = {Efficient Architecture for Long Integer Modular Multiplication over
Solinas Prime},
booktitle = {{IEEE} Workshop on Signal Processing Systems, SiPS 2021, Coimbra,
Portugal, October 19-21, 2021},
pages = {146--151},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/SiPS52927.2021.00034},
doi = {10.1109/SIPS52927.2021.00034},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/HuaiPZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/TangZ21,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {An Efficient Parallel Architecture for Resource-Shareable Reed-Solomon
Encoder},
booktitle = {{IEEE} Workshop on Signal Processing Systems, SiPS 2021, Coimbra,
Portugal, October 19-21, 2021},
pages = {152--157},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/SiPS52927.2021.00035},
doi = {10.1109/SIPS52927.2021.00035},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/TangZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2104-03814,
author = {Jingbo Zhou and
Xinmiao Zhang},
title = {Algorithmic Obfuscation for {LDPC} Decoders},
journal = {CoRR},
volume = {abs/2104.03814},
year = {2021},
url = {https://arxiv.org/abs/2104.03814},
eprinttype = {arXiv},
eprint = {2104.03814},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2104-03814.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2110-12127,
author = {Weihang Tan and
Antian Wang and
Yingjie Lao and
Xinmiao Zhang and
Keshab K. Parhi},
title = {Low-Latency {VLSI} Architectures for Modular Polynomial Multiplication
via Fast Filtering and Applications to Lattice-Based Cryptography},
journal = {CoRR},
volume = {abs/2110.12127},
year = {2021},
url = {https://arxiv.org/abs/2110.12127},
eprinttype = {arXiv},
eprint = {2110.12127},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2110-12127.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ojcands/Zhang20,
author = {Xinmiao Zhang},
title = {{VLSI} Architectures for Reed-Solomon Codes: Classic, Nested, Coupled,
and Beyond},
journal = {{IEEE} Open J. Circuits Syst.},
volume = {1},
pages = {157--169},
year = {2020},
url = {https://doi.org/10.1109/OJCAS.2020.3019403},
doi = {10.1109/OJCAS.2020.3019403},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ojcands/Zhang20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangX20,
author = {Xinmiao Zhang and
Zhenshan Xie},
title = {Efficient {VLSI} Architectures for Coupled-Layered Regenerating Codes},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {67-II},
number = {10},
pages = {1869--1873},
year = {2020},
url = {https://doi.org/10.1109/TCSII.2019.2953207},
doi = {10.1109/TCSII.2019.2953207},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/XieZ20,
author = {Zhenshan Xie and
Xinmiao Zhang},
title = {Scaled Nested Key Equation Solver for Generalized Integrated Interleaved
Decoder},
journal = {{IEEE} Trans. Circuits Syst.},
volume = {67-II},
number = {11},
pages = {2457--2461},
year = {2020},
url = {https://doi.org/10.1109/TCSII.2020.2970970},
doi = {10.1109/TCSII.2020.2970970},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/XieZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/XieZ20a,
author = {Zhenshan Xie and
Xinmiao Zhang},
title = {Reduced-Complexity Key Equation Solvers for Generalized Integrated
Interleaved {BCH} Decoders},
journal = {{IEEE} Trans. Circuits Syst.},
volume = {67-I},
number = {12},
pages = {5520--5529},
year = {2020},
url = {https://doi.org/10.1109/TCSI.2020.2999823},
doi = {10.1109/TCSI.2020.2999823},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/XieZ20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Zhang20,
author = {Xinmiao Zhang},
title = {High-Speed and Low-Complexity Parallel Long {BCH} Encoder},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180783},
doi = {10.1109/ISCAS45731.2020.9180783},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/Zhang20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangX20,
author = {Xinmiao Zhang and
Zhenshan Xie},
title = {Efficient Architectures for Generalized Integrated Interleaved Decoder},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180996},
doi = {10.1109/ISCAS45731.2020.9180996},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhouZ20,
author = {Jingbo Zhou and
Xinmiao Zhang},
title = {A New Logic-Locking Scheme Resilient to Gate Removal Attack},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180709},
doi = {10.1109/ISCAS45731.2020.9180709},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhouZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ita/Zhang20,
author = {Xinmiao Zhang},
title = {Efficient Nested Key Equation Solver Architectures for Generalized
Integrated Interleaved Codes},
booktitle = {Information Theory and Applications Workshop, {ITA} 2020, San Diego,
CA, USA, February 2-7, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ITA50056.2020.9245015},
doi = {10.1109/ITA50056.2020.9245015},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ita/Zhang20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/TangZ20,
author = {Yok Jye Tang and
Xinmiao Zhang},
title = {Low-Complexity Architectures for Parallel Long {BCH} Encoders},
booktitle = {{IEEE} Workshop on Signal Processing Systems, SiPS 2020, Coimbra,
Portugal, October 20-22, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/SiPS50750.2020.9195232},
doi = {10.1109/SIPS50750.2020.9195232},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/TangZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/icl/ZhangX19,
author = {Xinmiao Zhang and
Zhenshan Xie},
title = {Relaxing the Constraints on Locally Recoverable Erasure Codes by Finite
Field Element Variation},
journal = {{IEEE} Commun. Lett.},
volume = {23},
number = {10},
pages = {1680--1683},
year = {2019},
url = {https://doi.org/10.1109/LCOMM.2019.2927668},
doi = {10.1109/LCOMM.2019.2927668},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/icl/ZhangX19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ZhangL19,
author = {Xinmiao Zhang and
Yingjie Lao},
title = {On the Construction of Composite Finite Fields for Hardware Obfuscation},
journal = {{IEEE} Trans. Computers},
volume = {68},
number = {9},
pages = {1353--1364},
year = {2019},
url = {https://doi.org/10.1109/TC.2019.2901483},
doi = {10.1109/TC.2019.2901483},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/ZhangL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Zhang19,
author = {Xinmiao Zhang},
title = {A Low-Power Parallel Architecture for Linear Feedback Shift Registers},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {66-II},
number = {2},
pages = {412--416},
year = {2019},
url = {https://doi.org/10.1109/TCSII.2018.2860934},
doi = {10.1109/TCSII.2018.2860934},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/Zhang19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangX19,
author = {Xinmiao Zhang and
Zhenshan Xie},
title = {Efficient Architectures for Generalized Integrated Interleaved Decoder},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {66-I},
number = {10},
pages = {4018--4031},
year = {2019},
url = {https://doi.org/10.1109/TCSI.2019.2916698},
doi = {10.1109/TCSI.2019.2916698},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangX19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icc/Zhang19a,
author = {Xinmiao Zhang},
title = {Systematic Encoder of Generalized Three-Layer Integrated Interleaved
Codes},
booktitle = {2019 {IEEE} International Conference on Communications, {ICC} 2019,
Shanghai, China, May 20-24, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ICC.2019.8762035},
doi = {10.1109/ICC.2019.8762035},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icc/Zhang19a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SharmaZL19,
author = {Ankur A Sharma and
Xinmiao Zhang and
Yingjie Lao},
title = {Hardware Obfuscation Through Reconfiguration Finite Field Arithmetic
Units},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702342},
doi = {10.1109/ISCAS.2019.8702342},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/SharmaZL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangSZT19,
author = {Xinmiao Zhang and
Phillip Shvartsman and
Jingbo Zhou and
Eslam Yahya Tawfik},
title = {Hardware Obfuscation of {AES} through Finite Field Construction Variation},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702285},
doi = {10.1109/ISCAS.2019.8702285},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangSZT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangT19,
author = {Xinmiao Zhang and
Yok Jye Tang},
title = {Reducing Parallel Linear Feedback Shift Register Complexity Through
Input Tap Modification},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702081},
doi = {10.1109/ISCAS.2019.8702081},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isit/Zhang19a,
author = {Xinmiao Zhang},
title = {Decoding of Generalized Three-Layer Integrated Interleaved Codes},
booktitle = {{IEEE} International Symposium on Information Theory, {ISIT} 2019,
Paris, France, July 7-12, 2019},
pages = {2424--2428},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISIT.2019.8849285},
doi = {10.1109/ISIT.2019.8849285},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isit/Zhang19a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/ShvartsmanZ19,
author = {Phillip Shvartsman and
Xinmiao Zhang},
title = {Side Channel Attack Resistant {AES} Design Based on Finite Field Construction
Variation},
booktitle = {2019 {IEEE} International Workshop on Signal Processing Systems, SiPS
2019, Nanjing, China, October 20-23, 2019},
pages = {67--72},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/SiPS47522.2019.9020535},
doi = {10.1109/SIPS47522.2019.9020535},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/ShvartsmanZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1910-12142,
author = {Jingbo Zhou and
Xinmiao Zhang},
title = {Generalized SAT-Attack-Resistant Logic Locking},
journal = {CoRR},
volume = {abs/1910.12142},
year = {2019},
url = {http://arxiv.org/abs/1910.12142},
eprinttype = {arXiv},
eprint = {1910.12142},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1910-12142.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/icl/Zhang18,
author = {Xinmiao Zhang},
title = {Generalized Three-Layer Integrated Interleaved Codes},
journal = {{IEEE} Commun. Lett.},
volume = {22},
number = {3},
pages = {442--445},
year = {2018},
url = {https://doi.org/10.1109/LCOMM.2017.2780132},
doi = {10.1109/LCOMM.2017.2780132},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/icl/Zhang18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangB18,
author = {Xinmiao Zhang and
Alexander Bazarsky},
title = {Perfect Column-Layered Two-Bit Message-Passing {LDPC} Decoder and
Architectures},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351684},
doi = {10.1109/ISCAS.2018.8351684},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangO18,
author = {Xinmiao Zhang and
Michael O'Sullivan},
title = {Ultra-Compressed Three-Error-Correcting {BCH} Decoder},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8350969},
doi = {10.1109/ISCAS.2018.8350969},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/icl/Zhang17,
author = {Xinmiao Zhang},
title = {Modified Generalized Integrated Interleaved Codes for Local Erasure
Recovery},
journal = {{IEEE} Commun. Lett.},
volume = {21},
number = {6},
pages = {1241--1244},
year = {2017},
url = {https://doi.org/10.1109/LCOMM.2017.2675905},
doi = {10.1109/LCOMM.2017.2675905},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/icl/Zhang17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangT17,
author = {Xinmiao Zhang and
Ying Tai},
title = {Low-Complexity Transformed Encoder Architectures for Quasi-Cyclic
Nonbinary {LDPC} Codes Over Subfields},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {25},
number = {4},
pages = {1342--1351},
year = {2017},
url = {https://doi.org/10.1109/TVLSI.2016.2630055},
doi = {10.1109/TVLSI.2016.2630055},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/icl/ZhangSI16,
author = {Xinmiao Zhang and
Steven Sprouse and
Ishai Ilani},
title = {A Flexible and Low-Complexity Local Erasure Recovery Scheme},
journal = {{IEEE} Commun. Lett.},
volume = {20},
number = {11},
pages = {2129--2132},
year = {2016},
url = {https://doi.org/10.1109/LCOMM.2016.2604307},
doi = {10.1109/LCOMM.2016.2604307},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/icl/ZhangSI16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangDA16,
author = {Xinmiao Zhang and
Itai Dror and
Sanel Alterman},
title = {Low-power partial-parallel Chien search architecture with polynomial
degree reduction},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2016,
Montr{\'{e}}al, QC, Canada, May 22-25, 2016},
pages = {2459--2462},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISCAS.2016.7539090},
doi = {10.1109/ISCAS.2016.7539090},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangDA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcm/Zhang15,
author = {Xinmiao Zhang},
title = {Low-Complexity Modified Trellis-Based Min-Max Non- Binary {LDPC} Decoders},
journal = {J. Commun.},
volume = {10},
number = {11},
pages = {836--842},
year = {2015},
url = {https://doi.org/10.12720/jcm.10.11.836-842},
doi = {10.12720/JCM.10.11.836-842},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcm/Zhang15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccnc/Zhang15,
author = {Xinmiao Zhang},
title = {Modified trellis-based Min-max decoder for non-binary {LDPC} codes},
booktitle = {International Conference on Computing, Networking and Communications,
{ICNC} 2015, Garden Grove, CA, USA, February 16-19, 2015},
pages = {613--617},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICCNC.2015.7069415},
doi = {10.1109/ICCNC.2015.7069415},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccnc/Zhang15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/CaiZDPV14,
author = {Fang Cai and
Xinmiao Zhang and
David Declercq and
Shiva Kumar Planjery and
Bane Vasic},
title = {Finite Alphabet Iterative Decoders for {LDPC} Codes: Optimization,
Architecture and Analysis},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {61-I},
number = {5},
pages = {1366--1375},
year = {2014},
url = {https://doi.org/10.1109/TCSI.2014.2309896},
doi = {10.1109/TCSI.2014.2309896},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/CaiZDPV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/CaiZ14,
author = {Fang Cai and
Xinmiao Zhang},
title = {Efficient Check Node Processing Architectures for Non-binary {LDPC}
Decoding Using Power Representation},
journal = {J. Signal Process. Syst.},
volume = {76},
number = {2},
pages = {211--222},
year = {2014},
url = {https://doi.org/10.1007/s11265-013-0864-x},
doi = {10.1007/S11265-013-0864-X},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/CaiZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/globalsip/ZhangT14,
author = {Xinmiao Zhang and
Ying Tai},
title = {High-speed multi-block-row layered decoding for Quasi-cyclic {LDPC}
codes},
booktitle = {2014 {IEEE} Global Conference on Signal and Information Processing,
GlobalSIP 2014, Atlanta, GA, USA, December 3-5, 2014},
pages = {11--14},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/GlobalSIP.2014.7032068},
doi = {10.1109/GLOBALSIP.2014.7032068},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/globalsip/ZhangT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ita/Zhang14,
author = {Xinmiao Zhang},
title = {Interpolation-based Chase {BCH} decoder},
booktitle = {2014 Information Theory and Applications Workshop, {ITA} 2014, San
Diego, CA, USA, February 9-14, 2014},
pages = {1--5},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ITA.2014.6804245},
doi = {10.1109/ITA.2014.6804245},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ita/Zhang14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Zhang13,
author = {Xinmiao Zhang},
title = {An Efficient Interpolation-Based Chase {BCH} Decoder},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {60-II},
number = {4},
pages = {212--216},
year = {2013},
url = {https://doi.org/10.1109/TCSII.2013.2251941},
doi = {10.1109/TCSII.2013.2251941},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/Zhang13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcom/ZhangZ13,
author = {Xinmiao Zhang and
Yu Zheng},
title = {Generalized Backward Interpolation for Algebraic Soft-Decision Decoding
of Reed-Solomon Codes},
journal = {{IEEE} Trans. Commun.},
volume = {61},
number = {1},
pages = {13--23},
year = {2013},
url = {https://doi.org/10.1109/TCOMM.2012.100912.110834},
doi = {10.1109/TCOMM.2012.100912.110834},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcom/ZhangZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/CaiZ13,
author = {Fang Cai and
Xinmiao Zhang},
title = {Relaxed Min-Max Decoder Architectures for Nonbinary Low-Density Parity-Check
Codes},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {11},
pages = {2010--2023},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2226920},
doi = {10.1109/TVLSI.2012.2226920},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/CaiZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangCA13,
author = {Xinmiao Zhang and
Fang Cai and
M. P. Anantram},
title = {Low-energy and low-latency error-correction for phase change memory},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {1236--1239},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6572076},
doi = {10.1109/ISCAS.2013.6572076},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangCA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CaiZDVNP13,
author = {Fang Cai and
Xinmiao Zhang and
David Declercq and
Bane Vasic and
Dung Viet Nguyen and
Shiva Kumar Planjery},
title = {Low-complexity finite alphabet iterative decoders for {LDPC} codes},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {1332--1335},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6572100},
doi = {10.1109/ISCAS.2013.6572100},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/CaiZDVNP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangWZ13,
author = {Wei Zhang and
Jing Wang and
Xinmiao Zhang},
title = {Low-power design of Reed-Solomon encoders},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {1560--1563},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6572157},
doi = {10.1109/ISCAS.2013.6572157},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangWZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ita/ZhangSR13,
author = {Xinmiao Zhang and
Richard Shi and
James A. Ritcey},
title = {Reducing the latency of Lee-O'Sullivan interpolation through modified
initialization},
booktitle = {2013 Information Theory and Applications Workshop, {ITA} 2013, San
Diego, CA, USA, February 10-15, 2013},
pages = {1--5},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ITA.2013.6502992},
doi = {10.1109/ITA.2013.6502992},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ita/ZhangSR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangZZ12,
author = {Xinmiao Zhang and
Jiangli Zhu and
Wei Zhang},
title = {Efficient Reencoder Architectures for Algebraic Soft-Decision Reed-Solomon
Decoding},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {59-II},
number = {3},
pages = {163--167},
year = {2012},
url = {https://doi.org/10.1109/TCSII.2012.2184376},
doi = {10.1109/TCSII.2012.2184376},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangZZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangZ12,
author = {Xinmiao Zhang and
Yu Zheng},
title = {Systematically Re-encoded Algebraic Soft-Decision Reed-Solomon Decoder},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {59-II},
number = {6},
pages = {376--380},
year = {2012},
url = {https://doi.org/10.1109/TCSII.2012.2195066},
doi = {10.1109/TCSII.2012.2195066},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangW12,
author = {Xinmiao Zhang and
Zhongfeng Wang},
title = {A Low-Complexity Three-Error-Correcting {BCH} Decoder for Optical
Transport Network},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {59-II},
number = {10},
pages = {663--667},
year = {2012},
url = {https://doi.org/10.1109/TCSII.2012.2208678},
doi = {10.1109/TCSII.2012.2208678},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangWZZ12,
author = {Xinmiao Zhang and
Yingquan Wu and
Jiangli Zhu and
Yu Zheng},
title = {Novel Interpolation and Polynomial Selection for Low-Complexity Chase
Soft-Decision Reed-Solomon Decoding},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {7},
pages = {1318--1322},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2150254},
doi = {10.1109/TVLSI.2011.2150254},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangWZZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangCL12,
author = {Xinmiao Zhang and
Fang Cai and
Shu Lin},
title = {Low-Complexity Reliability-Based Message-Passing Decoder Architectures
for Non-Binary {LDPC} Codes},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {11},
pages = {1938--1950},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2164951},
doi = {10.1109/TVLSI.2011.2164951},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangCL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ZhangZZ12,
author = {Xinmiao Zhang and
Jiangli Zhu and
Wei Zhang},
title = {Modified Low-Complexity Chase Soft-Decision Decoder of Reed-Solomon
Codes},
journal = {J. Signal Process. Syst.},
volume = {66},
number = {1},
pages = {3--13},
year = {2012},
url = {https://doi.org/10.1007/s11265-010-0522-5},
doi = {10.1007/S11265-010-0522-5},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/ZhangZZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ZhuZ12,
author = {Jiangli Zhu and
Xinmiao Zhang},
title = {Efficient Generalized Minimum-distance Decoders of Reed-Solomon Codes},
journal = {J. Signal Process. Syst.},
volume = {66},
number = {3},
pages = {245--257},
year = {2012},
url = {https://doi.org/10.1007/s11265-011-0600-3},
doi = {10.1007/S11265-011-0600-3},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/ZhuZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/ZhangZW12,
author = {Wei Zhang and
Xinmiao Zhang and
Hao Wang},
title = {Increasing the energy efficiency of WSNs using algebraic soft-decision
reed-solomon decoders},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2012,
Kaohsiung, Taiwan, December 2-5, 2012},
pages = {49--52},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/APCCAS.2012.6418968},
doi = {10.1109/APCCAS.2012.6418968},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/ZhangZW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccnc/ZhangZW12,
author = {Xinmiao Zhang and
Yu Zheng and
Yingquan Wu},
title = {A Chase-type Koetter-Vardy algorithm for soft-decision Reed-Solomon
decoding},
booktitle = {International Conference on Computing, Networking and Communications,
{ICNC} 2012, Maui, HI, USA, January 30 - February 2, 2012},
pages = {466--470},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ICCNC.2012.6167466},
doi = {10.1109/ICCNC.2012.6167466},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccnc/ZhangZW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icuimc/ZhangLS12,
author = {Xinmiao Zhang and
Jea Hack Lee and
Myung Hoon Sunwoo},
editor = {Suk{-}Han Lee and
Lajos Hanzo and
Roslan Ismail and
Dongsoo S. Kim and
Min Young Chung and
Sang{-}Won Lee},
title = {Phase recovery for {QPSK} transmission without using complex multipliers},
booktitle = {The 6th International Conference on Ubiquitous Information Management
and Communication, {ICUIMC} '12, Kuala Lumpur, Malaysia, February
20-22, 2012},
pages = {125:1--125:4},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2184751.2184893},
doi = {10.1145/2184751.2184893},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icuimc/ZhangLS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangCS12,
author = {Xinmiao Zhang and
Fang Cai and
Richard Shi},
title = {Low-power {LDPC} decoding based on iteration prediction},
booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2012, Seoul, Korea (South), May 20-23, 2012},
pages = {3041--3044},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCAS.2012.6271960},
doi = {10.1109/ISCAS.2012.6271960},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangCS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/ChoiLSZ12,
author = {Byung Jun Choi and
Jae Do Lee and
Myung Hoon Sunwoo and
Xinmiao Zhang},
title = {Low complexity full parallel Multi-Split {LDPC} decoder reusing sign
wire of row processor},
booktitle = {International SoC Design Conference, {ISOCC} 2012, Jeju Island, South
Korea, November 4-7, 2012},
pages = {219--222},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISOCC.2012.6407079},
doi = {10.1109/ISOCC.2012.6407079},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isocc/ChoiLSZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ita/ZhangSR12,
author = {Xinmiao Zhang and
Richard Shi and
James A. Ritcey},
title = {On the implementation of modified fuzzy vault for biometric encryption},
booktitle = {2012 Information Theory and Applications Workshop, {ITA} 2012, San
Diego, CA, USA, February 5-10, 2012},
pages = {56--61},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ITA.2012.6181819},
doi = {10.1109/ITA.2012.6181819},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ita/ZhangSR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/CaiZ12,
author = {Fang Cai and
Xinmiao Zhang},
title = {Efficient Check Node Processing Architectures for Non-binary {LDPC}
Decoding Using Power Representation},
booktitle = {2012 {IEEE} Workshop on Signal Processing Systems, Quebec City, QC,
Canada, October 17-19, 2012},
pages = {137--142},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/SiPS.2012.12},
doi = {10.1109/SIPS.2012.12},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/CaiZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1204-2577,
author = {Zhiqiang Cui and
Zhongfeng Wang and
Xinmiao Zhang},
title = {Reduced-Complexity Column-Layered Decoding and Implementation for
{LDPC} Codes},
journal = {CoRR},
volume = {abs/1204.2577},
year = {2012},
url = {http://arxiv.org/abs/1204.2577},
eprinttype = {arXiv},
eprint = {1204.2577},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1204-2577.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-com/CuiWZ11,
author = {Zhiqiang Cui and
Zhongfeng Wang and
Xinmiao Zhang},
title = {Reduced-complexity column-layered decoding and implementation for
{LDPC} codes},
journal = {{IET} Commun.},
volume = {5},
number = {15},
pages = {2177--2186},
year = {2011},
url = {https://doi.org/10.1049/iet-com.2010.1002},
doi = {10.1049/IET-COM.2010.1002},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iet-com/CuiWZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PaulCZB11,
author = {Somnath Paul and
Fang Cai and
Xinmiao Zhang and
Swarup Bhunia},
title = {Reliability-Driven {ECC} Allocation for Multiple Bit Error Resilience
in Processor Cache},
journal = {{IEEE} Trans. Computers},
volume = {60},
number = {1},
pages = {20--34},
year = {2011},
url = {https://doi.org/10.1109/TC.2010.203},
doi = {10.1109/TC.2010.203},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/PaulCZB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangC11,
author = {Xinmiao Zhang and
Fang Cai},
title = {Efficient Partial-Parallel Decoder Architecture for Quasi-Cyclic Nonbinary
{LDPC} Codes},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {58-I},
number = {2},
pages = {402--414},
year = {2011},
url = {https://doi.org/10.1109/TCSI.2010.2071830},
doi = {10.1109/TCSI.2010.2071830},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangC11,
author = {Xinmiao Zhang and
Fang Cai},
title = {Reduced-Complexity Decoder Architecture for Non-Binary {LDPC} Codes},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {7},
pages = {1229--1238},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2047956},
doi = {10.1109/TVLSI.2010.2047956},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acssc/ZhangC11,
author = {Xinmiao Zhang and
Fang Cai},
editor = {Michael B. Matthews},
title = {An efficient architecture for iterative soft reliability-based majority-logic
non-binary {LDPC} decoding},
booktitle = {Conference Record of the Forty Fifth Asilomar Conference on Signals,
Systems and Computers, {ACSCC} 2011, Pacific Grove, CA, USA, November
6-9, 2011},
pages = {885--888},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ACSSC.2011.6190136},
doi = {10.1109/ACSSC.2011.6190136},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acssc/ZhangC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangC11,
author = {Xinmiao Zhang and
Fang Cai},
title = {Low-complexity architectures for reliability-based message-passing
non-binary {LDPC} decoding},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {1303--1306},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937810},
doi = {10.1109/ISCAS.2011.5937810},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangWZ11,
author = {Xinmiao Zhang and
Yingquan Wu and
Jiangli Zhu},
title = {A novel polynomial selection scheme for low-complexity chase algebraic
soft-decision reed-solomon decoding},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {2689--2692},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5938159},
doi = {10.1109/ISCAS.2011.5938159},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangWZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ita/ZhangZ11,
author = {Xinmiao Zhang and
Yu Zheng},
title = {Efficient codeword recovery architecture for low-complexity Chase
Reed-Solomon decoding},
booktitle = {Information Theory and Applications Workshop, {ITA} 2011, San Diego,
California, USA, February 6-11, 2011},
pages = {510--513},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ITA.2011.5743627},
doi = {10.1109/ITA.2011.5743627},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ita/ZhangZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangZ10,
author = {Xinmiao Zhang and
Jiangli Zhu},
title = {High-Throughput Interpolation Architecture for Algebraic Soft-Decision
Reed-Solomon Decoding},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {57-I},
number = {3},
pages = {581--591},
year = {2010},
url = {https://doi.org/10.1109/TCSI.2009.2023935},
doi = {10.1109/TCSI.2009.2023935},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangZ10a,
author = {Xinmiao Zhang and
Jiangli Zhu},
title = {Algebraic Soft-Decision Decoder Architectures for Long Reed-Solomon
Codes},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {57-II},
number = {10},
pages = {787--792},
year = {2010},
url = {https://doi.org/10.1109/TCSII.2010.2067812},
doi = {10.1109/TCSII.2010.2067812},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangZ10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/ZhangC10,
author = {Xinmiao Zhang and
Fang Cai},
title = {Reduced-latency scheduling scheme for min-max non-binary {LDPC} decoding},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2010,
Kuala Lumpur, Malaysia, December 6-9, 2010},
pages = {414--417},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/APCCAS.2010.5774734},
doi = {10.1109/APCCAS.2010.5774734},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/ZhangC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/ZhuZ10,
author = {Jiangli Zhu and
Xinmiao Zhang},
title = {Efficient architecture for generalized minimum-distance decoder of
Reed-Solomon codes},
booktitle = {Proceedings of the {IEEE} International Conference on Acoustics, Speech,
and Signal Processing, {ICASSP} 2010, 14-19 March 2010, Sheraton Dallas
Hotel, Dallas, Texas, {USA}},
pages = {1502--1505},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICASSP.2010.5495501},
doi = {10.1109/ICASSP.2010.5495501},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/ZhuZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/ZhangC10,
author = {Xinmiao Zhang and
Fang Cai},
title = {Partial-parallel decoder architecture for quasi-cyclic non-binary
{LDPC} codes},
booktitle = {Proceedings of the {IEEE} International Conference on Acoustics, Speech,
and Signal Processing, {ICASSP} 2010, 14-19 March 2010, Sheraton Dallas
Hotel, Dallas, Texas, {USA}},
pages = {1506--1509},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICASSP.2010.5495502},
doi = {10.1109/ICASSP.2010.5495502},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/ZhangC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/ChenZ10,
author = {Yang Chen and
Xinmiao Zhang},
title = {High-speed architecture for image reconstruction based on compressive
sensing},
booktitle = {Proceedings of the {IEEE} International Conference on Acoustics, Speech,
and Signal Processing, {ICASSP} 2010, 14-19 March 2010, Sheraton Dallas
Hotel, Dallas, Texas, {USA}},
pages = {1574--1577},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICASSP.2010.5495528},
doi = {10.1109/ICASSP.2010.5495528},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/ChenZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhuZ10,
author = {Jiangli Zhu and
Xinmiao Zhang},
title = {High-speed re-encoder design for algebraic soft-decision Reed-Solomon
decoding},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
30 - June 2, 2010, Paris, France},
pages = {465--468},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISCAS.2010.5537648},
doi = {10.1109/ISCAS.2010.5537648},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhuZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ita/ZhangZ10,
author = {Xinmiao Zhang and
Jiangli Zhu},
title = {Hardware complexities of algebraic soft-decision Reed-Solomon decoders
and comparisons},
booktitle = {Information Theory and Applications Workshop, {ITA} 2010, San Diego,
California, USA, January 31 - February 5, 2010},
pages = {558--567},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ITA.2010.5454070},
doi = {10.1109/ITA.2010.5454070},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ita/ZhangZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhuZW09,
author = {Jiangli Zhu and
Xinmiao Zhang and
Zhongfeng Wang},
title = {Backward Interpolation Architecture for Algebraic Soft-Decision Reed-Solomon
Decoding},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {11},
pages = {1602--1615},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2005575},
doi = {10.1109/TVLSI.2008.2005575},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhuZW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhuZ09,
author = {Jiangli Zhu and
Xinmiao Zhang},
title = {Factorization-free Low-complexity Chase Soft-decision Decoding of
Reed-Solomon Codes},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {2677--2680},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5118353},
doi = {10.1109/ISCAS.2009.5118353},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhuZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhuZ08,
author = {Jiangli Zhu and
Xinmiao Zhang},
title = {Efficient {VLSI} Architecture for Soft-Decision Decoding of Reed-Solomon
Codes},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {55-I},
number = {10},
pages = {3050--3062},
year = {2008},
url = {https://doi.org/10.1109/TCSI.2008.923169},
doi = {10.1109/TCSI.2008.923169},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhuZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acssc/Zhang08,
author = {Xinmiao Zhang},
title = {VLSi architecture design for algebraic soft-decision Reed-Solomon
decoding},
booktitle = {42nd Asilomar Conference on Signals, Systems and Computers, {ACSSC}
2008, Pacific Grove, CA, USA, October 26-29, 2008},
pages = {1518--1522},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ACSSC.2008.5074675},
doi = {10.1109/ACSSC.2008.5074675},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/acssc/Zhang08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/ZhuZ08,
author = {Jiangli Zhu and
Xinmiao Zhang},
title = {Scalable interpolation architecture for soft-decision Reed-Solomon
decoding},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
Macao, China, November 30 2008 - December 3, 2008},
pages = {41--44},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/APCCAS.2008.4745955},
doi = {10.1109/APCCAS.2008.4745955},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/ZhuZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/LiWZL08,
author = {Qingwei Li and
Zhongfeng Wang and
Xinmiao Zhang and
Xingcheng Liu},
title = {Efficient architecture for the Tate pairing in characteristic three},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
Macao, China, November 30 2008 - December 3, 2008},
pages = {1111--1115},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/APCCAS.2008.4746219},
doi = {10.1109/APCCAS.2008.4746219},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/LiWZL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/CuiWZJ08,
author = {Zhiqiang Cui and
Zhongfeng Wang and
Xinmiao Zhang and
Qingwei Jia},
title = {Efficient decoder design for high-throughput {LDPC} decoding},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008,
Macao, China, November 30 2008 - December 3, 2008},
pages = {1640--1643},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/APCCAS.2008.4746351},
doi = {10.1109/APCCAS.2008.4746351},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/CuiWZJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ZhuZW08,
author = {Jiangli Zhu and
Xinmiao Zhang and
Zhongfeng Wang},
title = {Combined interpolation architecture for soft-decision decoding of
Reed-Solomon codes},
booktitle = {26th International Conference on Computer Design, {ICCD} 2008, 12-15
October 2008, Lake Tahoe, CA, USA, Proceedings},
pages = {526--531},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICCD.2008.4751911},
doi = {10.1109/ICCD.2008.4751911},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ZhuZW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenZ08,
author = {Bainan Chen and
Xinmiao Zhang},
title = {{FPGA} implementation of a factorization processor for soft-decision
reed-solomon decoding},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
pages = {944--947},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISCAS.2008.4541575},
doi = {10.1109/ISCAS.2008.4541575},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ChenZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhuZW08,
author = {Jiangli Zhu and
Xinmiao Zhang and
Zhongfeng Wang},
title = {Novel interpolation architecture for Low-Complexity Chase soft-decision
decoding of Reed-Solomon codes},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
pages = {3078--3081},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISCAS.2008.4542108},
doi = {10.1109/ISCAS.2008.4542108},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhuZW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/ZhangZ08,
author = {Xinmiao Zhang and
Jiangli Zhu},
title = {Efficient interpolration architecture for soft-decision Reed-Solomon
decoding by applying slow-down},
booktitle = {Proceedings of the {IEEE} Workshop on Signal Processing Systems, SiPS
2008, October 8-10, 2008, Washington, {D.C.} Metro Area, {USA}},
pages = {19--24},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SIPS.2008.4671731},
doi = {10.1109/SIPS.2008.4671731},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/ZhangZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/ChenZW08,
author = {Bainan Chen and
Xinmiao Zhang and
Zhongfeng Wang},
title = {Error correction for multi-level {NAND} flash memory using Reed-Solomon
codes},
booktitle = {Proceedings of the {IEEE} Workshop on Signal Processing Systems, SiPS
2008, October 8-10, 2008, Washington, {D.C.} Metro Area, {USA}},
pages = {94--99},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SIPS.2008.4671744},
doi = {10.1109/SIPS.2008.4671744},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/ChenZW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/monet/SklavosMZ07,
author = {Nicolas Sklavos and
M{\'{a}}ire McLoone and
Xinmiao Zhang},
title = {{MONET} Special Issue on Next Generation Hardware Architectures for
Secure Mobile Computing},
journal = {Mob. Networks Appl.},
volume = {12},
number = {4},
pages = {229--230},
year = {2007},
url = {https://doi.org/10.1007/s11036-007-0023-3},
doi = {10.1007/S11036-007-0023-3},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/monet/SklavosMZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Zhang07,
author = {Xinmiao Zhang},
title = {Further Exploring the Strength of Prediction in the Factorization
of Soft-Decision Reed-Solomon Decoding},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {15},
number = {7},
pages = {811--820},
year = {2007},
url = {https://doi.org/10.1109/TVLSI.2007.899238},
doi = {10.1109/TVLSI.2007.899238},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Zhang07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangZ07,
author = {Xinmiao Zhang and
Jiangli Zhu},
title = {Low-complexity Interpolation Architecture for Soft-decision Reed-Solomon
Decoding},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
May 2007, New Orleans, Louisiana, {USA}},
pages = {1413--1416},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISCAS.2007.378493},
doi = {10.1109/ISCAS.2007.378493},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhangZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sips/ZhuZ07,
author = {Jiangli Zhu and
Xinmiao Zhang},
title = {Efficient Interpolation Architecture for Soft-Decision Reed-Solomon
Decoding},
booktitle = {Proceedings of the {IEEE} Workshop on Signal Processing Systems, SiPS
2007, Proceedings, October 17-19, 2007, Eton Hotel, Shanghai, China},
pages = {663--668},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/SIPS.2007.4387628},
doi = {10.1109/SIPS.2007.4387628},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sips/ZhuZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZhangP06,
author = {Xinmiao Zhang and
Keshab K. Parhi},
title = {On the Optimum Constructions of Composite Field for the {AES} Algorithm},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {53-II},
number = {10},
pages = {1153--1157},
year = {2006},
url = {https://doi.org/10.1109/TCSII.2006.882217},
doi = {10.1109/TCSII.2006.882217},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/ZhangP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Zhang06,
author = {Xinmiao Zhang},
title = {Reduced Complexity Interpolation Architecture for Soft-Decision Reed-Solomon
Decoding},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {14},
number = {10},
pages = {1156--1161},
year = {2006},
url = {https://doi.org/10.1109/TVLSI.2006.884177},
doi = {10.1109/TVLSI.2006.884177},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Zhang06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Zhang06,
author = {Xinmiao Zhang},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Partial parallel factorization in soft-decision Reed-Solomon decoding},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {272--277},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127971},
doi = {10.1145/1127908.1127971},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Zhang06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Zhang06a,
author = {Xinmiao Zhang},
title = {High-speed Factorization Architecture for Soft-decision Reed-Solomon
Decoding},
booktitle = {24th International Conference on Computer Design {(ICCD} 2006), 1-4
October 2006, San Jose, CA, {USA}},
pages = {370--375},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICCD.2006.4380843},
doi = {10.1109/ICCD.2006.4380843},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Zhang06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangP05,
author = {Xinmiao Zhang and
Keshab K. Parhi},
title = {Fast factorization architecture in soft-decision Reed-Solomon decoding},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {13},
number = {4},
pages = {413--426},
year = {2005},
url = {https://doi.org/10.1109/TVLSI.2004.842914},
doi = {10.1109/TVLSI.2004.842914},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangP05a,
author = {Xinmiao Zhang and
Keshab K. Parhi},
title = {High-Speed Architectures for Parallel Long {BCH} Encoders},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {13},
number = {7},
pages = {872--877},
year = {2005},
url = {https://doi.org/10.1109/TVLSI.2005.850125},
doi = {10.1109/TVLSI.2005.850125},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangP05a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangP04,
author = {Xinmiao Zhang and
Keshab K. Parhi},
title = {High-speed {VLSI} architectures for the {AES} algorithm},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {9},
pages = {957--967},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2004.832943},
doi = {10.1109/TVLSI.2004.832943},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangP04,
author = {Xinmiao Zhang and
Keshab K. Parhi},
editor = {David Garrett and
John C. Lach and
Charles A. Zukowski},
title = {High-speed architectures for parallel long {BCH} encoders},
booktitle = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004,
Boston, MA, USA, April 26-28, 2004},
pages = {1--6},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/988952.988954},
doi = {10.1145/988952.988954},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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