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IEEE Transactions on Circuits and Systems I: Regular Papers, Volume 72
Volume 72, Number 1, January 2025
- José M. de la Rosa:
Guest Editorial A New Exciting Year Ahead for TCAS-I. 1 - Sahibia Kaur Vohra
, Mahendra Sakare, Alex Pappachen James
SpiMAM: CMOS Implementation of Bio-Inspired Spiking Multidirectional Associative Memory Featuring In-Situ Learning. 2-13 - Jafar Shamsi
Implementation of Linear Differential Equations Using Pulse-Coupled Oscillators With an Ultra-Low Power Neuromorphic Realization. 14-24 - Keonhee Park
A 701.7 TOPS/W Compute-in-Memory Processor With Time-Domain Computing for Spiking Neural Network. 25-35 - Rubén Gómez-Merchán
Dynamic Vision With Single Photon Detectors: A Discrete DVS Architecture Using Asynchronous Sensor Front-Ends. 36-49 - Chenggong Wan
A SPAD Image Sensor With Main-Sub-TDC-Based Coincidence Detection. 50-60 - Aasish Boora
A dB-Linear Programmable Gain Amplifier With Mixed-Signal Control for Wide-Gain Range and Low-Power Applications. 61-70 - Ahmed Abdelaal
ΔΣ Modulators Employing MASH DSM DAC-Based Dual Quantization. 71-84 - Guoxiao Cheng
Analysis and Design of Wideband Active Single-Sideband Time Modulator in 0.13- μm CMOS. 85-98 - Xiaojie Zhang
A 4-22 GHz Ultra-Wideband Low-Noise Amplifier With 0.8-1.5 dB NF and 28-31 dB Gain Enhanced by the Negative Load Impedance. 99-110 - Jingyuan Zhang
Design and Analysis of a Coupled-Line-Based Load-Modulated Balanced Amplifier MMIC With Enhanced Bandwidth Performance. 111-124 - Hui-Yang Li
Compact On-Chip mm-wave Reconfigurable Wideband Filtering Switch in 28-nm Bulk CMOS for Integrated Sensing and Communication System Applications. 125-134 - Fanfan Meng
Benchmarking of Scaled Majority-Logic-Synthesized Spintronic Circuits Based on Magnetic Tunnel Junction Transducers. 135-142 - Bai Hua Zeng
An Efficient Asymmetric Outphasing Power Amplifier With Extended Back-Off Range for 5G Applications. 143-154 - Long Wang
A 24-29.5-GHz Scalable 2 × 2 I-Q TX/RX Chipset With Streamlined IF Interfaces for DBF Systems. 155-168 - Mohammad Mudakir Fazili
A Half-Schmitt Trigger-Based 9T1R Nonvolatile Robust SRAM Cell for Instant On-Off Application. 169-179 - Brunno Alves de Abreu
On the Efficacy and Vulnerabilities of Logic Locking in Tree-Based Machine Learning. 180-191 - Jiaxin Yang
A High-Speed, Low-Power, High-Reliability and Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory. 192-202 - Mario Garrido
Advanced Quantization Schemes to Increase Accuracy, Reduce Area, and Lower Power Consumption in FFT Architectures. 203-213 - Xu Zhang
HRCIM-NTT: An Efficient Compute-in-Memory NTT Accelerator With Hybrid-Redundant Numbers. 214-227 - Esfandiar Esmaieli
Fanout-Based Reliability Model for SER Estimation in Combinational Circuits. 228-240 - Majed Alsharari
Efficient Integer-Only-Inference of Gradient Boosting Decision Trees on Low-Power Devices. 241-253 - Wenhao Liu
Inverse Proportional Chaotification Model for Image Encryption in IoT Scenarios. 254-264 - Haotian Liu
A 3-D Multi-Precision Scalable Systolic FMA Architecture. 265-276 - Luis E. Rueda G.
A-Connect: An Ex Situ Training Methodology to Mitigate Stochasticity in Neural Network Analog Accelerators. 277-290 - Yongxin Li
Various Dynamics of Amplitude Regulation Within a Class of 3D Rulkov Neurons. 291-299 - Quanli Deng
Memristive Tabu Learning Neuron Generated Multi-Wing Attractor With FPGA Implementation and Application in Encryption. 300-311 - Meixuan Jade Li
Interdependence Among Voltage-Unstable Buses During Cascading Failure in Power Systems. 312-322 - Zhongyun Hua
Two-Dimensional Cyclic Chaotic System for Noise-Reduced OFDM-DCSK Communication. 323-336 - Xingxin Wang, Wei Hu, Shibo Tang, Xinxin Wang, Huisi Zhou:
An Automated Fault Attack Framework for Block Ciphers Through Property Mining and Verification. 337-350 - Joschua Conrad
Differentiable Cost Model for Neural-Network Accelerator Regarding Memory Hierarchy. 351-364 - Philex Ming-Yan Fan
A 36-Gb/s 1.6-pJ/b PAM-3 Transmitter Leveraging Digital Logic Cells and 4-Tap FFE in 22-nm CMOS. 365-373 - Hui-Ping Yin
NOMA System Performance Improvement Using Chaos and Deep Learning. 374-382 - Wei Chen
High-Throughput LDPC Decoder for Multiple Wireless Standards. 383-396 - Peng Cao
A 55nA Quiescent Current Power-Wise Buck Converter With 1μA-600mA Load Range and 0.5V-1.8V Flexible Output Voltage Options. 397-407 - Khanh Hieu Nguyen
Saturated Sampled-Data Control of DAB DC-DC Converters via LPV Approach With Consideration of Mismatched Time-Varying Parameters. 408-419 - Tz-Wun Wang
Monolithic GaN-Based Multiple-Phase Bidirectional Energy Transfer With Seamless Control Applied on High-Voltage and Low-Voltage Batteries. 420-432 - Houxuan Liu
Powerless Fractional-Order Tuning Wireless Power Transfer System With Zero Phase Angle Input. 433-442 - Loganathan Ponnarasi, P. B. Pankajavalli
Secure State Estimation-Based Stabilization of IoT-Enabled Wireless Power Transfer Systems. 443-452 - Fan Guo
A Buck Converter Using Auxiliary-Stage With Multiple-Single-Cycle Non-Linear Control (MSCNLC) for Fast Load Transient Response. 453-466 - Kai Wang
Power System Frequency Estimation With Zero Response Time Under Abrupt Transients. 467-480
Volume 72, Number 2, February 2025
- Xinmiao Zhang
Guest Editorial Special Issue on Emerging Hardware Security and Trust Technologies - AsianHOST 2023. 482 - Riccardo Della Sala
Exploiting Body-Driven Feedbacks in Physical Unclonable Functions for Ultra Low Voltage, Ultra Low Power Applications: A 0.3 V Weak-PUF. 483-496 - Raphaële Milan
Efficient Adaptive Multi-Level Privilege Partitioning With RTrustSoC. 497-509 - Ya Gao
EO-Shield: A Shield-Based Protection Scheme Against Both Invasive and Non-Invasive Attacks. 510-520 - Massimo Vatalaro
Highly Stable PUFs Based on Stacked Voltage Divider for Near-Zero BER Native Sensitivity to Voltage Variations. 521-534 - Janusz Rajski
A Nonlinear Stream Cipher for Encryption of Test Patterns in Streaming Scan Networks. 535-547 - Matthias Probst
Side-Channel Analysis of Integrate-and-Fire Neurons Within Spiking Neural Networks. 548-560 - Fanny Spagnolo
C4TERO: Configurable Cascaded Carry Chains for High Reliability TERO PUFs on FPGAs. 561-572 - Yao Wang
A High-Reliability, Non-CRP-Discard Arbiter PUF Based on Delay Difference Quantization. 573-585 - Sneha Agarwal
Detection and Localization of Hardware-Assisted Intermittent Power Attacks in Mixed-Critical Systems. 586-599 - Monalisa Das
Area and Delay Trade-Offs in Three-Way Toom-Cook Large Integer Multipliers Implemented on FPGAs. 600-609 - Trong-Hung Nguyen
Efficient Hardware Implementation of the Lightweight CRYSTALS-Kyber. 610-622 - Weimin Fu
A Generalize Hardware Debugging Approach for Large Language Models Semi-Synthetic, Datasets. 623-636 - Nico Mexis
Achieving Error-Free Lightweight Authentication With DRAM-Based Physical Unclonable Functions. 637-646 - Yan Xu
Meta: A Memory-Efficient Tri-Stage Polynomial Multiplication Accelerator Using 2D Coupled-BFUs. 647-660 - F. de Los Santos-Prieto
A Comprehensive Approach to Improving the Thermal Reliability of RTN-Based PUFs. 661-670 - Lilian Bossuet
Power and Frequency Intrinsic Channels on gem5. 671-684 - Philex Ming-Yan Fan
A 1.1 V-Programmable Metal-Fuse Technology With Current-Mode Programming and Program-Guarantee Technique in 28 nm CMOS Technology. 685-693 - Brendan Saux
A 3.5 GS/s 1-1 MASH VCO ADC With Second-Order Noise Shaping. 694-707 - Xu Wang
Method to Determine Quantization-Related Parameters of the Digital-to-Time Converter in a Fractional-N Frequency Synthesizer. 708-718 - Bomin Joo
A Bio-Inspired Energy- and Area-Efficient Sound Localization Neural Network. 719-729 - Xinchi Xu
A 12 ps Precision Two-Step Time-to-Digital Converter Consuming 434 μW at 1 MS/s in 180 nm CMOS With a Dual-Slope Time Amplifier. 730-740 - Xiaowei Wang
A 2-6 GHz Reconfigurable High Dynamic Range Receiver With Wideband Variable Gain LNA. 741-752 - Lucas Nyssens
Analysis of Back-Gate Bias Control on EVM Measurements of a Dual-Band Power Amplifier in 22 nm FD-SOI for 5G 28 and 39 GHz Applications. 753-762 - Yo-Sheng Lin
Design and Analysis of Divide-by-4 Injection-Locked Frequency Divider Using Gain-Boosting Injection Balun and Dual Linear Mixer Techniques. 763-775 - Dixian Zhao
Q/V-Band CMOS Beamforming ICs and Integrated Phased-Array Antennas. 776-789 - Gianluca Leone
SYNtzulu: A Tiny RISC-V-Controlled SNN Processor for Real-Time Sensor Data Analysis on Low-Power FPGAs. 790-801 - Hao Zhou
ReZK: A Highly Reconfigurable Accelerator for Zero-Knowledge Proof. 802-815 - Yishuo Meng, Junfeng Wu, Siwei Xiang, Jianfei Wang
A High-Throughput and Flexible CNN Accelerator Based on Mixed-Radix FFT Method. 816-829 - Svein Anders Tunheim
Tsetlin Machine-Based Image Classification FPGA Accelerator With On-Device Training. 830-843 - Sohrab Majidifar
Exploring Hybrid FitzHugh-Rinzel (FHR) Neuron Model Behavior: Cost-Effective FPGA Implementation for High-Frequency and High-Precision Matching by Electromagnetic Flux Effects. 844-853 - Anupam Kumari
Design and Analysis of Energy Efficient Approximate Multipliers for Image Processing and Deep Neural Network. 854-867 - Dedong Zhao
ImSTDP: Implicit Timing On-Chip STDP Learning. 868-881 - Gennaro Di Meo
Low-Power High Precision Floating-Point Divider With Bidimensional Linear Approximation. 882-895 - Fuhong Min
Hybrid-Diode-Based Shinriki Circuit: Coexisting Oscillations and Bifurcation Trees. 896-906 - Junwei Sun
Memristor-Based Parallel Computing Circuit Optimization for LSTM Network Fault Diagnosis. 907-917 - Yongxin Li
Offset Boosting-Oriented Construction of Multi-Scroll Attractor via a Memristor Model. 918-931 - Lin Fu
Semiglobal Finite-Time Stability of Impulsive Systems. 932-940 - Adou Sangbone Assoa
MDS-DOA: Fusing Model-Based and Data-Driven Approaches for Modular, Distributed, and Scalable Direction-of-Arrival Estimation. 941-952 - Yu-En Wu
A Novel Single-Switch High Step-Up DC-DC Converter With High-Voltage Conversion Ratio. 953-962 - Peng Gu
A Wide Air Gap IPT System for Distribution Insulator Applications Based on Reconfigurable Autotransformer Coupling Structure. 963-975
Volume 72, Number 3, March 2025
- William Kolodziejski
FastGW: A Machine Learning-Based Early Skip for the AV1 Global Warped Motion Compensation. 977-988 - Léopold Van Brandt
Modeling and Predicting Noise-Induced Failure Rates in Ultra-Low-Voltage SRAM Bitcells Affected by Process Variations. 989-1002 - Donggyu Minn, Kiseo Kang, Jaeho Lee, Seongchan Bae, Byungjun Kim, Jaehoon Lee, Jae-Yoon Sim:
A 40 nm Cryo-CMOS Homodyne-Demodulation Readout SoC for Superconducting Qubits. 1003-1016 - Hyuk Sun
Detection and Mitigation of nBTI Aging of a High Precision Current Comparator in 16 nm FinFET Technology. 1017-1028 - Xu Yan
Compact Reconfigurable Dual-Band MMIC SPDT/SP4T Switches With On-Chip Coupled-Line Structure in GaN-on-SiC HEMT Technology. 1029-1041 - Xu Wang
Analysis and Mitigation of Excess Phase Noise and Spurs in Digital-to-Time-Converter-Enhanced Fractional- N Frequency Synthesizers. 1042-1055 - Ankur Singh
A High-Frequency CMOS Meminductor Emulator for Spiking Neuron. 1056-1067 - Yuke Shen
A 36.8-μW 66 nV/√Hz 85.7 dB-System-SNDR Reconfigurable Single-Channel ExG Acquisition System for Bio-Sensor Modules. 1068-1080 - Donghwan Seo
Analysis of Pixel Noise in Dynamic Vision Sensors. 1081-1092 - Jonah Van Assche
FREYA: A 0.023-mm²/Channel, 20.8- μW/Channel, Event-Driven 8-Channel SoC for Spiking End-to-End Sensing of Time-Sparse Biosignals. 1093-1104 - Yoichi Iizuka
A Low Noise 8.3-Mpixel CMOS Image Sensor With Selectable Multiple Sampling Technique by 5.36 GHz Global Counter and Dual Latch Skew Canceler. 1105-1113 - Alvaro Urain
Area-Efficient SiGe BiCMOS LNA With Wideband Frequency Tuning Capability Across D and G Bands. 1114-1125 - Shuai Wu
An Automated Circuit Topology Generation and Optimization Method for CMOS Low-Noise Amplifiers. 1126-1139 - Leilei Xiao
A Novel Design Method for CML Frequency Divider Based on C/Id and G/Id and Application for Quadrature-Injection CML Frequency Dividers. 1140-1151 - Gaurav Srivastava, Darshak Bhatt
A 16-20 GHz Mixer First Receiver Architecture With Active Inductor-Based Low-Pass Elliptic Filter With High OOB-IIP3 in 180 nm CMOS. 1152-1164 - Zhizhan Yang
An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up Identification. 1165-1177 - Sengjun Jo, Hyeonjun Kim, Kuduck Kwon
IIP2-Calibration-Free 5G NR Cellular Receiver Front-End With Mixer-Sharing Global N-Path Notch Filter Feedback Achieving +72 dBm IIP2. 1178-1190 - Prema Kumar Govindaswamy
A 0.0375-pJ/bit Charge-Steering Based Hybrid for 8-Gb/s/pin Full-Duplex Chip-to-Chip Interconnects in 65-nm CMOS. 1191-1203 - Wen Zhou
Phase Modulated Bistatic Radar With an Analog Correlator: A Systematic Study. 1204-1217 - Shao Fei Bo
Battery-Free Hybrid Ambient RF and Wind Energy Harvester for Outdoor IoTs. 1218-1228 - Dengfeng Wang
Robust Monolithic 3D Carbon-Based Computing-in-SRAM With Variation-Aware Bit-Wise Data-Mapping for High-Performance and Integration Density. 1229-1242 - Yuhao Chen
Recoding Hybrid Stochastic Numbers for Preventing Bit Width Accumulation and Fault Tolerance. 1243-1255 - Yao Qin
CINOC: Computing in Network-On-Chip With Tiled Many-Core Architectures for Large-Scale General Matrix Multiplications. 1256-1268 - Zhengzhe Wei
A 2.793 μW Near-Threshold Neuronal Population Dynamics Trajectory Filter for Reliable Simultaneous Localization and Mapping. 1269-1281 - Siyu Zhang
A Unified Accelerator for All-in-One Image Restoration Based on Prompt Degradation Learning. 1282-1295 - Huihong Shi
Trio-ViT: Post-Training Quantization and Acceleration for Softmax-Free Efficient Vision Transformer. 1296-1307 - Yu Wang, Jin Zhang, Youlong Wu, Fei Lyu
A Universal Methodology of Complex Number Computation for Low-Complexity and High-Speed Implementation. 1308-1320 - Haochen Zhang
Fast Hardware Architecture With Efficient Matrix Computations for the Key Generation of Classic McEliece. 1321-1331 - Pradeep Kumar Gopalakrishnan
HAST: A Hardware-Efficient Spatio-Temporal Correlation Near-Sensor Noise Filter for Dynamic Vision Sensors. 1332-1345 - Zhengzhe Wei
A Graph-Based Accelerator of Retinex Model With Bit-Serial Computing for Image Enhancements. 1346-1357 - Jianfei Wang
A Reconfigurable and Area-Efficient Polynomial Multiplier Using a Novel In-Place Constant-Geometry NTT/INTT and Conflict-Free Memory Mapping Scheme. 1358-1371 - Pattimi Hari, Kota Naga Srinivasarao Batta
Fast Coding Unit Depth Identification Using Texture and Multiple Deep Learning Architectures. 1372-1382 - Qiqiao Wu
A Novel Neuromorphic Hardware Using Area-Efficient Chain RRAM-Based Synapses and Compact Neurons With (Anti-) Integration Scheme. 1383-1396 - Peng Zhang
A Thermal and Power Integrity Co-Optimization Framework for 2.5-D Integrated Microsystem. 1397-1410 - Mohamed A. Nadeem
Polynomial Formal Verification of Multi-Valued Approximate Circuits Within Constant Cutwidth. 1411-1424 - Shanlin Liu
Adaptive Event-Triggered Control for PDE-ODE Cascade Systems via Hierarchical Sliding Mode. 1425-1437 - Tian Zhou
Gauss Hermite Fourier Features Based on Maximum Correntropy Criterion for Adaptive Filtering. 1438-1451 - Jun Cheng
Space-Time Sampled-Data Control for Memristor- Based Reaction-Diffusion Neural Networks With Nonhomogeneous Sojourn Probabilities. 1452-1461 - Shan Jiang
A Noise-Tolerant Proximal Neurodynamic Algorithm for Solving MVIPs in Fixed-Time With Circuit Implementations and Applications. 1462-1471 - Shan Cao
A Critical-Set-Based Multi-Bit Successive Cancellation List Decoder for Polar Codes: Algorithm and Implementation. 1472-1485 - Zhaowei Liu
A Wide-Range Self-Powered Current Measurement Method Based on Induced Current Multiplexing for Online Monitoring Devices in Transmission Lines. 1486-1494
Volume 72, Number 4, April 2025
- Prashansa Mukim
Cryogenic Front-End ASICs for Low-Noise Readout of Charge Signals. 1496-1509 - Shan Zhang
An 871 nW 96.2 dB SNDR Pipelined Second-Order Noise-Shaping SAR ADC Employing Charge-Efficient CLS-Assisted Residue Amplifier. 1510-1521 - Pin-Yuan Chiu
A 0.07 pJ/b/dB 36-Gb/s PAM-3 Receiver Using Inductor-Reused CTLE and One-Tap Loop-Unrolled DFE in 22-nm CMOS. 1522-1532 - Chen Deng
A Systematic Review of Voltage Reference Circuits: Spanning Room Temperature to Cryogenic Applications. 1533-1546 - Arka Chakraborty
Ferroelectric FET-Based Bayesian Inference Engine for Disease Diagnosis. 1547-1559 - Shuai Deng
A "2 + 1" Cores Triple-Mode Oscillator. 1560-1573 - Zhixia Ding
Memristor-Based Neural Network Circuit of Full-Function Pavlov Associative Memory With Unconditioned Response Mechanisms. 1574-1586 - Jiapeng Wan
A 136-GHz Compact Gain-Boosted Mixer With Wideband Balance-Compensated Baluns for 42-Gbps Communications. 1587-1597 - Jincheol Sim
A 50 Gb/s PAM-4 Transceiver With High-Swing Driver, Dual-Loop Analog Equalizer, and Integrator-Based Baud-Rate Linear CDR for Short-Reach Links. 1598-1608 - Junyi Wang
Multiasynchronous Extended Dissipative Sliding Mode Control of LC Circuits in Grid-Connected System Under Actuator Attacks. 1609-1620 - Shin-Chi Lai
VLSI Architecture Design for Compact Shortcut Denoising Autoencoder Neural Network of ECG Signal. 1621-1633 - Bowen Yao
Eyelet: A Cross-Mesh NoC-Based Fine-Grained Sparse CNN Accelerator for Spatio-Temporal Parallel Computing Optimization. 1634-1647 - MHD Anas Alsakkal
Spiketrum: An FPGA-Based Implementation of a Neuromorphic Cochlea. 1648-1656 - Yi Zhan
GSLP-CIM: A 28-nm Globally Systolic and Locally Parallel CNN/Transformer Accelerator With Scalable and Reconfigurable eDRAM Compute-in-Memory Macro for Flexible Dataflow. 1657-1667 - Lida Xu
RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification. 1668-1678 - Morgana Macedo Azevedo da Rosa
FALSAx: An Integrated Framework for Accuracy and Logic Synthesis Estimation of Approximate Adders. 1679-1692 - Zili Zhou
Predicting Higher-Order Dynamics With Unknown Hypergraph Topology. 1693-1706 - Xuandi Sun
Noise-Assisted Graph Multivariate Empirical Mode Decomposition With Non-Uniform Projections. 1707-1717 - Chandan Kumar Jha
Correct and Verify - CAV: Exploiting Binary Decision Diagrams to Enable Formal Verification of Approximate Adders With Correct Carry Bits. 1718-1730 - Linghuan Kong
Adaptive Tracking Control of Constrained Nonlinear Systems and Its Application to Circuit Systems. 1731-1740 - Zhongding Zhang
Universal Finite-Time Observer-Based ITSMC for Converter-Driven Motor Systems With Disturbances. 1741-1750 - Wei Zhang
Bipartite Consensus for Quantization Communication Multi-Agents Systems With Event-Triggered Random Delayed Impulse Control. 1751-1762 - Dat-Thuc Nguyen
Lipschitz Stability Estimate for an Initial Wave Reconstruction Problem of Telegraph Type With Gaussian Noise. 1763-1772 - Hao Sun
Fault Tolerant Observer Design for a Class of Re-Entrant Manufacturing Systems. 1773-1786 - Hongyu Ji
Bearing-Based Adaptive Cooperative Elliptical Circumnavigation Control for Multi-Agent Systems. 1787-1799 - Ai-Guo Wu
Predictor Feedback Control for Discrete-Time Systems With Input Delays and Multiple State Delays via Bivariant Fundamental Matrices. 1800-1812 - Linying Xiang
Average Controllability of Complex Networks With Exponential Degree Distribution. 1813-1821 - Xiaoning Shen
Finite-Time Sliding Mode Control for NPC Converters With Enhanced Disturbance Compensation. 1822-1831 - Jun Zhang
Finite-Time Stabilization of Semi-Markov Reaction-Diffusion Memristive NNs With Unbounded Time-Varying Delays. 1832-1842 - Yaning Guo, Qi Sun
Cloud-Edge Model Predictive Control of Cyber-Physical Systems Under Cyber Attacks. 1843-1851 - Alireza Akbarpour Bazargani
MMSE Equalizer Design Optimization for Wireline SerDes Applications. 1852-1865 - Mingche Lai
An Adaptive 56-Gb/s Duo-PAM4 Detector Using Reduced Branch Maximum Likelihood Sequence Detection in a 28-nm CMOS Wireline Receiver. 1866-1877 - Jianhang Yang
A -79 dBm 7.56 nW 433 MHz Wake-Up Receiver With Interference Suppression for IoT Application. 1878-1887 - Zhuo Chen
Statistical Post-FEC BER Estimation of High-Speed Serial Links Subject to DFE Error Propagation. 1888-1901 - Jifeng Zhao
Power Losses Optimization of MMCs Based on Quantum Genetic Algorithm for HVdc Transmission Application. 1902-1915 - Yifan Li
Transient Stability Enhancement Control for Virtual Synchronous Generator Controlled Isolated Power Grid. 1916-1925 - Naveed Ishraq
Small Signal Modeling of a Four-Level Flying Capacitor Multilevel Totem-Pole PFC Converter. 1926-1938 - Ting Yang
A Privacy-Preserving Federated Reinforcement Learning Method for Multiple Virtual Power Plants Scheduling. 1939-1950 - Deyu Wang
Structure-Reconfigurable Wide Gain Series Resonant Converter for On-Board Charger. 1951-1961 - Shuran Jia
Modeling, Analysis, and Design of Phase Synchronization Loop for BIPT System Considering Operating Point Parameters Variation. 1962-1974
Volume 72, Number 5, May 2025
- Xinjie Wu
A Sub-1 V 90 dB-SNDR Power/BW Scalable DTDSM Using Low-Voltage Cascoded Floating Inverter Amplifiers in 130 nm CMOS. 1976-1986 - Shaoyu Meng
A Single-Ended Phase and Impedance Invariant mm-Wave VGPA Based on Shunt CS-CG Topology. 1987-2000 - Antonio Serino
On the Fulfilment of the Gain and Matching Specifications in the Design of a Single-Stage High-Frequency Amplifier. 2001-2014 - Li-Wei Zhao
A Collaborative Design of Broadband, High Linearity, and Flat Gain GaAs On-Chip Limiting LNA With Filtering Characteristic. 2015-2028 - Leon Brackmann
Experimental Verification and Evaluation of Non-Stateful Logic Gates in Resistive RAM. 2029-2038 - Yuhang Wang
First Demonstration of Power-Linear Regulator for Thermo-Optic Phase Tuning. 2039-2047 - Jiachen Guo
Theory and Design of Pseudo-Doherty Load-Modulated Double Balanced Amplifier With Intrinsic Insensitivity to Antenna VSWR. 2048-2060 - Sayan Sarkar
Hysteresis-Dependent Synchronized Load Shift Keying and Reconfigurable Class-D Power Amplifier-Based Fully Integrated Adaptive Control in Wireless Power Transfer System. 2061-2074 - Xu Lu
Reconciliation of Statistical Approaches to Predicting Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers. 2075-2088 - Yifan Wu, Miao Sun
An Adaptive Beam-Steering dToF LiDAR System Using Addressable Multi-Channel VCSEL Transmitter, 128 × 80 SPAD Sensor, and ML-Based Edge-Computing Object Detection. 2089-2102 - Sangwan Lee, Hyeongmin Seo, Wookjin Shin, Dongju Yang, Gaeryun Sung, Sanghun Lee, Dong-Ho Choi, Young-Ho Kwak, Soon-Jae Won, Ickhyun Song, Jaeduk Han:
A Variation-Robust 20-Gb/s Wireline Transceiver With Real-Time Calibration in 28-nm CMOS. 2103-2113 - Peyman Dehghanzadeh
MBM PUF: A Multi-Bit Memory-Based Physical Unclonable Function. 2114-2127 - Vijaya Lakshmi
In-Memory Implementation of an Approximate Adder With Reduced Latency and Error. 2128-2138 - Samiya A. Alkhairy
Rational-Exponent Filters with Applications to Generalized Exponent Filters. 2139-2152 - Kasem Khalil
Accurate Hardware Predictor for Epileptic Seizure. 2153-2166 - Vijay Joshi
An On-Board Satellite Multispectral and Hyperspectral Compressor (MHyC): An Efficient Architecture of a Simple Lossless Algorithm. 2167-2177 - Sen Lin, Songjie Xiang, Rui Chen, Liyuan Li, Yisu Ge
Digital Low-Cost FPGA Implementation of Two-Coupled and Grid-Based Network of 2D Artificial Cochlea Using the Hopf Resonator Approach. 2178-2188 - Tang Hu, Chunling Hao, Xier Wang, Zhiwei Liu, Songnan Ren, Zhiwei Xu, Shiqiang Zhu:
Efficient FPGA Implementation of Multi-Channel Pipelined Large FFT Architectures Based on SA-MDF Algorithm. 2189-2201 - Junjun Wang
An Ultrahigh-Throughput and FPGA-Compatible TRNG Based on Dynamic Hybrid Metastability and Jitter Entropy Cells. 2202-2215 - Xujiang Xiang
Dyn-Bitpool: A 28 nm 27 TOPS/W Two-Sided Sparse CIM Accelerator Featuring a Balanced Workload Scheme and High CIM Macro Utilization. 2216-2228 - Zhiwei Zhou
ArPCIM: An Arbitrary-Precision Analog Computing-in-Memory Accelerator With Unified INT/FP Arithmetic. 2229-2242 - Pramod Kumar Meher
Efficient Design and Implementation of Scale-Free CORDIC With Mutually Exclusive Micro-Rotations. 2243-2251 - Tianze Huang
An Efficient and Reconfigurable Post-Quantum Crypto-Processor for SPHINCS+. 2252-2262 - Cristian Sestito
TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Architecture and Hardware Implementation. 2263-2273 - Tongxin Shi
Distributed Composite Learning Dynamic Event-Triggered Control for Nonlinear Multi-Agent Power Systems. 2274-2287 - Runan Guo
Non-Reduced Order Method to Parameterized Sampled-Data Stabilization of Inertial Neural Networks With Actuator Saturation. 2288-2301 - Xiaoyang Ma
Robust Practical Stability Region Partition Considering Parameter Uncertainty and Volatility for Direct-Drive Wind Power System. 2302-2313 - Alberto Bernardini
Wave Digital Extended Fixed-Point Solvers for Circuits With Multiple One-Port Nonlinearities. 2314-2326 - Chao Wang
Technically Feasible Robust Complementary SOT-MRAM Design for Improving the Area and Energy Efficiency. 2327-2340 - Xiongtao Shi
Filter-Based Fully Distributed Output Regulation of Heterogeneous Learning Agents. 2341-2353 - Yanpeng Shi, Jiangping Hu
Resilient Output Containment Over Heterogeneous Wide-Area Networks: Mitigating Intermittent Communication and Unknown Cyber-Attacks. 2354-2365 - Joel Fernandez
Over-the-Air Linearization of Phased Array Transmitters Affected by Load Modulation. 2366-2379 - Meng Guo
A RISC-V Domain-Specific Processor for Deep Learning-Based Channel Estimation. 2380-2393 - Yijun Cui
Instruction-Based High-Performance Hardware Controller of CRYSTALS-Kyber With Balanced Resource Utilization. 2394-2407 - Georgios I. Orfanoudakis
Dynamic Self-Reconfiguration of a Buck-Boost PV Inverter for Maximum Energy Harvesting. 2408-2418 - Marian K. Kazimierczuk
Power Quality in Class-D High-Frequency Power Inverter: Input and Resonant Tank Distortion Power, Total Harmonic Distortion, and Power Factor. 2419-2431 - Guigang Cai
A Resonant Switched-Capacitor Parallel Inductor Hybrid Buck Converter. 2432-2443 - Ho-Chan Ahn
A 2 A Dual Loop LDO With Dynamic Negative Feedback Loop and Gm Boosting Error Amplifier for Off-Chip and Cap-Less Applications. 2444-2455 - Zhong Zhao
A VCO-Based Modulation Low Ripple PFM-PWM Buck Converter With Seamless Mode Transition. 2456-2466 - Xuecheng Li, Changbin Hu, Shannan Luo, Heng Lu, ZhengGuo Piao, Liuming Jing:
Distributed Hybrid-Triggered Observer-Based Secondary Control of Multi-Bus DC Microgrids Over Directed Networks. 2467-2480 - Retraction Notice: Robustness Margins for Attainable Consensusability of Unstable Multi-Agent Systems: Output Consensus Protocols Over Directed Network Topology. 2481
Volume 72, Number 6, June 2025
- Shuai Liu, Yechen Tian
Systematic Design of a 3.5 GS/s 11-bit Time-Interleaved SAR ADC in 28 nm CMOS Achieving 54 dB SNDR at Nyquist Frequency. 2483-2496 - Yutao Peng
Kolmogorov-Arnold Networks-Based Calibration for Single-Channel ADCs: High-Precision Nonlinear Code Synthesis With Low Power Consumption. 2497-2508 - Shuai Dong
Topkima-Former: Low-Energy, Low-Latency Inference for Transformers Using Top-k In-Memory ADC. 2509-2519 - Yongjuan Shi, Xun Liu
A Dual Slope Boosted Relaxation Oscillator With 2.93 μJ/Cycle Energy Efficiency and 0.068% Period Jitter in 180 nm CMOS. 2520-2528 - Youngwoo Ji, Yuyang Li
Low-Power Subthreshold Voltage References for High-Temperature Applications. 2529-2542 - Dong Liang, Hui Zhang, Yetong Wang
Design of Oscillator-Based Reconfigurable Modulator With High-Q FBAR Resonators Supporting Fast OOK/BFSK/ BPSK Modulation. 2543-2555 - Pengfei Han
A 16-Channel Neurostimulation IC With Self-Biased Monopolar Stimulus Drivers and a Multiple-Output Charge-Pump Converter Achieving 25.44-mW/mm2 Power Density in Low-Voltage CMOS. 2556-2565 - Gang Dou
Design and Application of Brain-Inspired Circuit With Context-Dependent and State-Dependent Memory. 2566-2577 - Junhong Liu
Super-Regenerative Reception Technique Based on an Improved General Theory in Linear Mode. 2578-2591 - Xufeng Liao
A High-Efficiency RFEH System With Feedback-Free Fast (F3) MPPT Over a Wide Input Range. 2592-2602 - Jiawei Yang, Yizhu Shen
A Compact 321-343-GHz Integrated CMOS Radiator by Co-Designing Ring Oscillator and Multifunctional Antenna. 2603-2613 - Ke Long
A 24-32 GHz Bidirectional Variable-Gain Phase Shifter Using a Novel Quadrature Generator and Dual-Function Bidirectional Amplifier With Phase Compensation. 2614-2625 - Bai Hua Zeng
Input Phase Controlled Doherty Power Amplifier With Out-Phased Current Load Modulation for Arbitrary Output Back-Off. 2626-2638 - Nasrin Iranpour
Design and Analysis of Passive-Integrated Absorptive Flat-Group-Delay RF Bandpass Filters in GaAs Technology for Digital Communications. 2639-2652 - Chanheum Han
A VM-Terminated PAM-3 Transmitter Using Floating Middle Level With Enhanced Signal Integrity and Energy Efficiency for Low-Power Memory Interfaces. 2653-2663 - Kanan Wang
A 0.92-pJ/b 112-Gb/s PAM-4 Transmitter With Bandwidth and Linearity Enhanced Quasi-Voltage-Mode Driver and Reconfigurable Three-Tap T/2-T Variable Fractional-Spaced FFE in 28-nm CMOS. 2664-2675 - Pujun Zhou
A Neuromorphic Transformer Architecture Enabling Hardware-Friendly Edge Computing. 2676-2689 - Jun Sun, Huan Chen, Xiaojun Ji, Guodao Zhang
An Investigation on the Three-Dimensional Memristive Morris-Lecar Model With Magnetic Induction Effects: Simulation of Biological Behaviors and Cost-Effective Digital Circuit Implementation. 2690-2700 - Zhongrui Zhou, Juan Zhang
Adaptive Neural Control of Superheated Steam System in Ultra-Supercritical Units With Output Constraints Based on Disturbance Observer. 2701-2711 - Xiangqu Fu
SHMT: An SRAM and HBM Hybrid Computing-in-Memory Architecture With Optimized KV Cache for Multimodal Transformer. 2712-2725 - Zhijian Hao
A Novel Transform Accelerator With Fast Kernel Selection and Efficient Transform Circuit. 2726-2739 - Hoai Luan Pham
MINA: A Hardware-Efficient and Flexible Mini-InceptionNet Accelerator for ECG Classification in Wearable Devices. 2740-2753 - Yingchun Lu
Ultra-High Efficiency TRNG IP Based on Mesh Topology of Coupled-XOR. 2754-2767 - Wenjie Zuo, Yi Zhang
Bursting Oscillations Induced by the Variable Discontinuous Boundary in Chua's Circuit. 2768-2777 - Ronglong Wang, Fan Xie
Modeling and Nonlinear Dynamic Behavior Analysis of Photovoltaic-Energy Storage DC Microgrid. 2778-2791 - Soniya Raju
Dynamic Nonlinear Resistance Model for a Power MOSFET in an Oscillatory RLC Circuit. 2792-2803 - Zhan Jin
Circuit Transfer Matrix: A Novel Approach to Enhancing Circuit Analysis Efficiency by Extending the Transfer Matrix Method for Multibody System. 2804-2817 - M. B. Rakesh
Inductive GNN-Based Methodology for Accurate and Fast Average Power Estimation of Synthesized ASIC Designs From RTL Simulation Bypassing Gate-Level Simulation. 2818-2831 - Xianglei Jia
Adaptive Switching Control for Nonlinear Uncertain Systems With Sensor Faults and Quantization. 2832-2841 - Gewei Zuo
A Novel Approach to Prescribed-Time Cooperative Output Regulation in Linear Heterogeneous Multi-Agent Systems Using Cascade System Criteria. 2842-2855 - Mehdi Golestani
A Novel Feasibility Condition-Free Approach for Achieving Desired Precision and Unified Performance Within Prescribed Time. 2856-2867 - Shaomeng Gu
Generalized Discrete-Time Variable Gain ADRC for Nonlinear Systems and Its Application to Parallel Teleoperated Manipulators. 2868-2877 - Xin Liu
Stabilization of Markov Jump Systems With Delay by Discrete-Time Aperiodically Intermittent Stochastic Control Based on Lévy Noise. 2878-2889 - Jun-Lan Wang, Xiao-Jian Li
Data-Driven Attack Detection and Identification for Cyber-Physical Systems Under Sparse Sensor Attacks: Iterative Reweighted l2/l1 Recovery Approach. 2890-2902 - Shicheng Huo
Data-Based Output Containment of Completely Heterogeneous Multi-Agent Systems With Unknown Dynamics and Its Application. 2903-2914 - Jiaping Qiang, Li Li
Fixed-Time Generalized VGESO-Based Trajectory Tracking Control for WMRs on Uneven Road: A Fully Actuated System Approach. 2915-2927 - Zhenyu Li
A Consistency Enhancement Technique for MIMO Power Amplifier Modules. 2928-2941 - Francesco Gabriele
A Unified Sampled-Data Small-Signal Model for a Ripple-Based COT Buck Converter With Arbitrary Ripple Injection Network. 2942-2955 - Hyun-Su Lee, Kyeongho Eom, Hyung-Min Lee:
A Single-Input Multi-Output Resonant Regulating Rectifier Generating Three Outputs in a Half Cycle for Wirelessly Powered Biomedical Devices. 2956-2969 - Zhen Wang
Impedance Circuit Model of Voltage Source Converter With DC-Link Voltage Control Dynamics. 2970-2983
Volume 72, Number 7, July 2025
- Xu Wang
Linearized Analysis and Quantization Error Minimization for Mid-Rise TDCs: A Tutorial. 2986-2997 - Xu Wang
Spurs in Fractional-N Frequency Synthesizers Resulting From Resolution Mismatch Between the Divider Controller and the DTC: Manifestations, Analysis, and Mitigation. 2998-3011 - Li Gao
A Ka-Band Reconfigurable Dual-Band Variable Gain Amplifier With Low Phase Variation for 5G Communications. 3012-3023 - Yue Yin
A 48-dB Range, 0.86-dB Step, and 0.06-dB Error dB-Linear PGA Based on Resistive Ladder Attenuator: Design Theory and Realization. 3024-3037 - Yun Li
An Ultra-Low Noise and Wide Output Range LDO With BJT Input Stage and Base Current Cancellation Technique. 3038-3047 - Ik-Hyeon Jeon
A Capacitor-Coupled Offset-Canceled Sense Amplifier for DRAMs With Hidden Offset-Cancellation Time and Cross-Coupled Pre-Sensing. 3048-3058 - Ran Zhang
A 362-TOPS/W Mixed-Signal MAC Macro With Sampling-Weight-Nonlinearity Cancellation and Dynamic-Amplified Accumulation. 3059-3071 - Victor Medina
Second-Order VCO-ADC Architecture With Low-Area and High Dynamic Range Using Internal Binary Encoding. 3072-3083 - Yigi Kwon
An 11-bit 360-MS/s Pipelined SAR ADC With Feedback Factor Compensation Using a Dynamic Negative-C-Assisted Residue Amplifier. 3084-3093 - Javier De Mena Pacheco
A Highly Power- and Area-Efficient PMU for Cell-Size Autonomous Microsystems. 3094-3103 - Zhe Chen
380-GHz Third Harmonic Signal Generation Using Differentially Pumped Varactors in a CMOS Voltage Controlled Oscillator. 3104-3114 - Binghui Ding
Memristor-Based Selective Convolutional Circuit for High-Density Salt-and-Pepper Noise Removal. 3115-3125 - Arianna Morciano
Mixed-Signal Silicon Photomultiplier With Reconfigurable Pulse Shaper for Background Light Rejection. 3126-3137 - Shize Duan
A Study on Noise Folding Due to Nonlinearity in Fractional-N CP PLL. 3138-3148 - Jingrun Song, Xinyu Yang, Jiaxu Liu, Yueduo Liu, Zihao Zhu, Zhengxuan Han, Zehao Zhang, Jiaxin Liu, Hongshuai Zhang, Jun Yin, Pui-In Mak, Shiheng Yang:
Analyses Concerning the Phase Noise and Nonlinear Behavior of the Charge-Sharing Integrator-Based Hybrid PLL. 3149-3162 - Junyoung Park
A 13.2-kSPS Data Rate, 5.1-G Ω Input Impedance Read-Out IC for DC Measurements. 3163-3175 - Tsung-Ching Tsai
Nonlinear Capacitance Effect on Stability and Stabilization of SiGe Power Amplifiers for 17.3-21.2 GHz SATCOM. 3176-3189 - Zhili Xiao
A Framework for Designing and Analyzing Margin Propagation-Based Analog Correlators. 3190-3203 - Ke Liu
Symmetrical Doherty Power Amplifier With Extended Bandwidth and Back-Off Range Based on Nonlinear Current Profile. 3204-3214 - Haoyu Jiang, Zihan Wu
A -31 dBm Sensitivity High-Efficiency RF Energy Harvesting System With Burst Charging Mode for IoT Applications. 3215-3225 - Pengxu Wang
MS-SCIM: A Mixed-Signal Stochastic Computing-in-Memory Paradigm for Information Security. 3226-3235 - Wei Mao
A 28-nm 135.19 TOPS/W Bootstrapped-SRAM Compute-in-Memory Accelerator With Layer-Wise Precision and Sparsity. 3236-3246 - Yang Feng
An Efficient Flash-Based Computing-in-Memory (CIM) Demonstration of High-Precision (32-bit) Nonlinear Partial Differential Equation (PDE) Solver With Ultra-High Endurance and Reliability. 3247-3257 - Wanting Wen
High Efficiency Multiply-Accumulator Using Ternary Logic and Ternary Approximate Algorithm. 3258-3271 - Dongxu Lyu
An Efficient Multi-View Cross-Attention Accelerator for Vision-Centric 3D Perception in Autonomous Driving. 3272-3285 - Jeongmin Shin
C2IM-NN: A Low-Power 3D Point Clouds Matching Processor With 1D-CNN Prediction and CAM-Based In-Memory k-NN Searching. 3286-3297 - Xi Cheng
An FPGA-Based Event-Driven SNN Accelerator for DVS Applications With Structured Sparsity and Early-Stop. 3298-3310 - Haozhe Jin
Memristor-Based Large-Scale High-Radix FFT Circuit Design in NR System. 3311-3324 - Liyuan Peng, Yujie Huang
Defective Pixel Corrector for Line Scan and Area Scan Image Sensors. 3325-3337 - Zhiyuan Zhao
A High-Throughput FPGA Accelerator for Lightweight CNNs With Balanced Dataflow. 3338-3351 - Mingqiang Huang
EdgeLLM: A Highly Efficient CPU-FPGA Heterogeneous Edge Accelerator for Large Language Models. 3352-3365 - Yuanchen Wu
MBS: A High-Precision Approximation Method for Softmax and Efficient Hardware Implementation. 3366-3375 - Seokhun Kim
Simultaneous Optimization of Various-Sized SRAM Instances Through Machine Learning-Driven Transistor Sizing and Leafcell Circuit Pool Construction. 3376-3389 - Iván Ramírez
Logic Neural Networks for Efficient FPGA Implementation. 3390-3398 - Likhitha Mankali
SecureX: Strategically Securing Designs Against Oracle-Less Attacks Using GNN-Based Explainers. 3399-3410 - Jinkai Wang
A Heterogeneous System With Computing in Memory Processing Elements to Accelerate CNN Inference. 3411-3424 - T. C. Jayasree
Design and Implementation of a Low-Complexity Continuously Variable Digital Filter Using a Novel Farrow-Equivalent-Newton Structure-Based Fractional Delay Filter. 3425-3435 - Vanitha Devi R
Robust Fractional-Order-Based Von Mises Subband Adaptive Filtering for Feedback Cancellation in Hearing Aids. 3436-3449 - Xuandi Sun
Anomaly Detection in Graph Signals With Complex Wavelet Packet Correlation Mining. 3450-3463 - Gabriel Carlini
A Neural-Network-Assisted Chaos-NOMA Scheme. 3464-3473 - Harsha Rudramuniyappa
Optimized Algorithms for FPGA Implementation of PDCCH Chain for 5G-NR Base Station. 3474-3487 - Francesco Gabriele
Multi-Harmonic EMI Reduction Optimization of Spread Spectrum in Multiple-RBW Environment. 3488-3497 - Giuseppe Pettanice
Fast Convolution Schemes for Piecewise Approximation of Large-Scale Electromagnetic Systems in Emerging Applications. 3498-3511 - Zhonghua Sun
Output-Feedback Stabilization of Uncertain Nonlinear Systems With Multiple Unknown Control Directions via an Integrated Switching Controller. 3512-3520 - Xin Liu
Fixed-Time Dynamic Surface Disturbance Rejection Control for Pneumatic Soft Bending Actuators. 3521-3530 - Yunbo Song
Distributed Secure Fusion Estimation With Lossless Data Compression Against Stochastic Event-Based Attacks in Power Systems. 3531-3542 - Guanyu Lai
Fixed-Time Adaptive Control With Predefined Tracking Accuracy for Piezoactuators Subject to Stochastic Disturbances. 3543-3555 - Xinlin Zhang
LSTM-NN-Enhanced Tracking Control for PAM-Driven Parallel Robot Systems With Guaranteed Performance. 3556-3569 - Hanfang Zhang
Reinforcement Learning Solutions to Stochastic Multi-Agent Graphical Games With Multiplicative Noise. 3570-3583 - Shan Xue, Biao Luo
Dynamic Event-Triggered Control for Hierarchical Differential Games. 3584-3594 - Jiao-Jiao Li
A Framework of Event-Triggered Prescribed-Time Stabilization of Time-Varying Nonlinear Systems and Its Application in Tunnel Diode Circuit. 3595-3605 - Lin Chen
Decoupling Control of Fuel Cell Air Supply System Based on Data-Driven Feedforward and Adaptive Generalized Supertwisting Algorithm. 3606-3619 - Gangxiong Wu
Compact Balanced-to-Balanced Filtering Power Divider With Wide Range and High Level of Reflectionless, Isolation, Common-Mode Rejection, and Enhanced Frequency Selectivity. 3620-3630 - Xing Peng
An Advanced Fault-Tolerant HANPC Converter With Neutral-Point Voltage Balancing for Full Power Factor Range Under Multi-Switch Open-Circuit Fault. 3631-3643 - Yan Shi
Analysis and Optimization for Voltage Overload Resilience of Hybrid Transformers Under Grid Voltage Fluctuations. 3644-3654 - Youchao Qin, Shengda Tang
Distributed Sparse LQR Control for Power Systems With Markov Jump Interconnection Topologies. 3655-3668 - Xinyi Zhang
Proportional-Integral and Nonlinear Cubic Control to Enhance Small-Signal and Transient Stability of EV Charging Station and DC Microgrid. 3669-3682 - Ziheng Liu
Dual-Band Multi-Resonant Class-E Inverter With Load-Independent CC/CV Output. 3683-3694 - Jinnan Luo
Intelligent Event-Triggered H∞ Load Frequency Control for Power Systems With Multiple-Resource Delays. 3695-3705 - Upasana Buragohain
Adequacy of Reduced-Order DFIG Models for Dynamic Stability Assessment. 3706-3717 - Tao Guan
Unified Performance Control of Spacecraft Attitude Tracking With Relaxed Quaternion Conditions. 3718-3728
Volume 72, Number 8, August 2025
- Marvin Onabajo
MWSCAS Guest Editorial Special Issue Based on the 67th International Midwest Symposium on Circuits and Systems. 3731-3732 - Pierre Leduc
A 430-mA Capacitor Less Analog Assisted Hybrid LDO With Fast Transient Algorithm. 3733-3743 - Hanyu Wang
An 89.5 dB SNDR 500 kHz BW Largely Passive Fourth-Order Noise-Coupled Delta-Sigma Modulator. 3744-3752 - Weizhong Chen
Secure Controller Area Network (CAN) Transceiver With Embedded Authentication Support. 3753-3765 - Linyuan Cui
Designing Low-Loss Single-Inductor Multiple-I/O (SL-MI/O) CMOS Power Supplies. 3766-3776 - Arjuna Madanayake
Real-Time 5.7-5.8 GHz 32-Beam Approximate Discrete Fourier Transform Spectrum Sensor for RF Perception on Xilinx Sx475T. 3777-3790 - Tanwei Yan
A Fractional Spur Cancellation Technique for Fractional-N Frequency Synthesizers Enabled by Dual Loop Phase Clamping. 3791-3801 - Ahmed Abdelaziz
Design of a Contingent Decision Equalizer Using Analog-in-Time Processing for PAMN Wireline Receivers. 3802-3812 - Jinge Ma
An Analysis and Design Guideline of High-Speed and Low-Distortion Bootstrapped Switches. 3813-3824 - Roel Plompen
Selectivity Versus Noise Trade-Offs in Resistively Driven Passive Switched-Capacitor Infinite Impulse Response Low-Pass Filters. 3825-3838 - Katia Samperi
60-dB 70-V/μs Three-Stage Op-Amp With Dual Single-Miller Frequency Compensation in GaN-IC Technology. 3839-3846 - Muhammad Bilal Babar
A Multi-Stage RC Compensation Technique for Decoupling the Transimpedance and BW: Creating High Speed and Low Noise TIA Designs. 3847-3860 - Donggu Lee
A 1.5-2.7 GHz 3-dB NF 32-dB Notch-Depth Channel-Selection Balun-LNA Employing Dual Feedback and Feedforward N-Path Filter Loops for Advanced Cellular Application. 3861-3871 - Yuyang Zhu, Masaru Osada
Optimization of DTC-Based and Harmonic-Mixer-Based Fractional-N PLLs: Comparative Analysis of Jitter and Power Trade-Offs. 3872-3885 - Wonseon Lee
A 500-kS/s Continuous-Time Linear-Exponential Incremental ADC Achieving 90.1-dB DR and 103.1-dB SFDR. 3886-3896 - Zheyi Li
An 80 MS/s 70.8 dB-SNDR Radiation-Tolerant Semi-Time-Interleaved Pipelined-SAR ADC for Space Applications. 3897-3910 - Gonçalo Rodrigues
A 0.3-mm2 1.3 μW Wireless Monitoring System IC for Hermeticity Testing of Biomedical Implants. 3911-3923 - Prashantkumar Vithalrao Dhawas
Advancement of High-Impedance Fault Detection in Primary Distribution Systems Using a Sequence Components Energy Detector. 3924-3934 - Kevin Pelzers
An Efficient, Dynamically Adjustable, Multipurpose Ultrasound Digitizer Array in 40 nm CMOS. 3935-3946 - Michele Ronchi
Design, Implementation, and Analysis of an Integrated Switched Capacitor Analog Neuron for Edge Computing AI Accelerators. 3947-3960 - Pinhao Zhou
A Compact Wideband SPDT Switch Using Compensating Inductors and Highpass Matching Network. 3961-3970 - Tergel Molom-Ochir
Advancements in Content-Addressable Memory (CAM) Circuits: State-of-the-Art, Applications, and Future Directions in the AI Domain. 3971-3982 - Yishuo Meng, Jianfei Wang
Rethinking the Designing of Convolution Engine for Reconfigurable CNN Accelerator Using Sparse-Based Design Scheme. 3983-3996 - Kyeongho Lee
A Design Framework of Heterogeneous Approximate DCIM-Based Accelerator for Energy-Efficient NN Processing. 3997-4006 - Tenglong Li
FireFly-S: Exploiting Dual-Side Sparsity for Spiking Neural Networks Acceleration With Reconfigurable Spatial Architecture. 4007-4020 - Islam Elsadek
State-of-the-Art ASCON ASIC Achieving 4.3 Gbps@0.8V and 3.5Tb/J@0.6V Outperforming AES by 25 Times. 4021-4030 - Jixuan Li, Ke Li, Ka-Fai Un
A 97.8 GOPS/W FPGA-Based Residual-Block-Aware CNN Accelerator Featuring Multi-Clock PW2 Pipeline and Adaptive-Resolution Quantization. 4031-4039 - Jun Zhang, Weizhi Bian
A Low-Latency, Highly-Pipelined Hardware Architecture for H.266/VVC Dependent Quantization. 4040-4051 - Yen-Jen Chang
Multilogic Sense Amplifier With a Circuit for Dynamic Reference Voltage Generation. 4052-4063 - Kangjoon Choi
Hardware-Efficient Architecture for Multiple Quantized Gaussian Noise Generation. 4064-4076 - Gang Wang
OFQ-LLM: Outlier-Flexing Quantization for Efficient Low-Bit Large Language Model Acceleration. 4077-4090 - Seungyong Lee
FACET: On-the-Fly Activation Compression for Efficient Transformer Training. 4091-4102 - Chen Wei
Practical Finite-Time Synchronization of Fractional-Order Complex Dynamical Networks With Application to Lorenz's Circuit. 4103-4114 - Jagveer Singh Verma
Memristor-Emulator-Based Crossbar Array for Object Detection and Recognition. 4115-4126 - Le Yang
Memristor-Based Circuit Design of Biological Behavior Chain. 4127-4139 - Wujie Zhou
Knowledge Distillation and Contrastive Learning for Detecting Visible-Infrared Transmission Lines Using Separated Stagger Registration Network. 4140-4152 - Fakir Sharif Hossain
ZDD: A Zero Delay Deviation Variability-Aware Golden Free Hardware Trojan Detection Using Physical Unclonable Function. 4153-4166 - Deepank Grover
NoCiPUF: NoC-Based Intrinsic PUF for MPSoC Authentication. 4167-4180 - Marzieh Hashemipour-Nazari
Hardware Implementation of Projection-Aggregation Decoders for Reed-Muller Codes. 4181-4194 - Yujie Xian
VbPWM-Based ADT: An Iterative Deduction Approach Restricting the Traversal of MPWM at the Cost of In-Band SNR. 4195-4208 - Ayush Ranjan, Shivam Yadav, Sandesh Jain
Quaternion Recursive Maximum Correntropy and Versoria Criterion Algorithm for Channel Estimation Under Impulsive Noise. 4209-4222 - Bala Govind
Passive Post-Resonance Tuned Reflectors to Achieve Both 10-bit Phase-Shifting Resolution and Low Insertion Loss Across 20-30 GHz. 4223-4234 - Houren Ji
UniDec: A Unified Factor-Graph-Based Decoder Fully Compatible With 5G NR LDPC/Polar Codes. 4235-4247 - Xindi Xu
Dynamic Periodic Event-Triggered Adaptive Prescribed Performance Control of Uncertain Semi-Strict Feedback Systems With Application. 4248-4260 - Mao-Hsu Yen
Flexible Quadrature Spatial Modulation: Transmission, Detection, and Implementation. 4261-4272 - Yalu Li
Observability Verification System Analysis for Observability and Reconstructibility of Probabilistic Logical Control Networks. 4273-4283 - Huaiyuan Jiang
Bias-Policy Iteration-Based Adaptive Dynamic Programming for Optimal Control of Discrete-Time Nonlinear Systems. 4284-4296 - Ziwei Dong
Two-Group Distributed Optimization Under Cooperative-Collaborative Networks With Linear Convergence. 4297-4308 - Yukang Cui
Byzantine-Resilient Impulsive Control for Bipartite Consensus of Heterogeneous Multiagent Systems. 4309-4321 - Lin Liu
Adaptive Tracking Control for Nonlinear Fully Actuated Systems With Input Quantization. 4322-4333 - Mingxin Wang
Finite-/Fixed-Time Synchronization of Coupled Memristive Neural Networks With Actuator Nonlinearity and Applications in Secure Communication. 4334-4345 - Zhenxin Mu
Pursuit-Evasion Game for Spacecraft With Incomplete Information Under J₂ Perturbation. 4346-4358 - Wenrui Zhao
A Soft-Switching Boost-Type Resonant Forward Converter With Load-Adaptive Efficiency Optimization. 4359-4369 - Tzu-Ning Liu
A Reconfigurable Wireless Power Receiver With Shared-Inductor Buck-Boost Converter for NFC-Powered Battery-Less Electronic Shelf Label. 4370-4379 - Ankush Koli
An Improved Dual-Output Five-Level Buck PFC Rectifier With Reduced Switch Count. 4380-4388 - V. Sukanya
Analysis of Inductor Current Ripple Minimization in PV-Fed Modular Multilevel DC-DC Converter With Distributed MPPT Control. 4389-4402
Volume 72, Number 9, September 2025
- Georges G. E. Gielen, Jan Craninckx, Hongyang Jia:
Guest Editorial TCAS-I Special Issue on the ESSERC 2024 Conference. 4406-4407 - Chi-Lung Lee
A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter With Reduced Body Diode Loss Technique. 4408-4419 - Berke Gungor
Design and Analysis of a 28 GHz Bandwidth DC Coupled Active Balun With Phase-Amplitude Compensation in 40-nm CMOS. 4420-4430 - Remco Schalk
A 4-Element Passive-Beamforming CT- ΔΣ ADC for Spatial Selectivity in Automotive Radar. 4431-4441 - Bob L. Zhou
Design Techniques for a Multi-Phase Injection- Based Eight-Phase 17-GHz Clock Generator for Multi-Phase Wireline Receivers. 4442-4454 - Everestus Ezike, Ratul Kundu
Achieving < ±25 ppb Frequency Stability With a ±0.125 °C Oven Control on a Si Interposer for an AlScN-on-Si Shear-BAW Resonator. 4455-4468 - Asad A. Abidi
The T-Coil Circuit Demystified. 4469-4480 - Zhijun Zhou
A 97 dB-CMRR Gm-Controlled Inverter-Based Amplifier Employing Multi-CMFB Loops for Multi-Channel Bio-Signal Recording. 4481-4491 - Chaodi Sheng
A Linear High-Efficiency Distributed Power Amplifier Utilizing Class-AB and Inverse-Class-C Complementary Structure. 4492-4502 - Hongzhi Liang
An 8-bit 5-GS/s Single-Channel Hybrid ADC With a λ/4 Transmission Line Based Time Quantizer. 4503-4512 - Matias Jara
A Predictive SAR ADC Architecture. 4513-4526 - Peng Wang
A Single-Channel 8-bit 1.6-GS/s Alternate-Comparator SAR ADC With Dither-Based Background Offset Calibration in 28-nm CMOS. 4527-4538 - Subin Kim
Enhanced ISI Analysis and Fast Circuit Simulation of High-Speed Current-Steering DACs. 4539-4549 - Jianlin Xia
A 870 ppm/V 53 ppm/ ° C 7 MHz Non-Trimmed RC Relaxation Oscillator Using Mixed-Signal Compensation Loop From - 40 ∘C to 165 ∘C. 4550-4559 - Ling Wang
A 132 dBSPL 67.34 dB-A SNR Single-Ended MEMS Microphone Using Self-Adaption Loop With 1.5-V Supply Voltage. 4560-4569 - Yuan Liang, Wen Jin
An 88.5 fsrms Integrated Jitter and -76.2 dBc Reference Spur mmW PLL Utilizing a Ripple Compensation Phase/Frequency Detector. 4570-4583 - Jian Yang
Design and Analysis of a Type-II Sampling PLL With Automatic Frequency and Phase Calibrations Achieving 0.62-μs Locking Time. 4584-4596 - Shaogang Wang
A 26.5-29.5 GHz Doherty PA-LNA Implementation With Synthesized Transformer-Based Matching Network. 4597-4609 - Samir Nooshabadi
Phase Noise and Dynamic Range in Radar Arrays. 4610-4623 - Arash Hoseyninejad
Max-Pooling PD: A Machine Learning-Based Timing Recovery Method. 4624-4637 - Jeffry Victor
WAGONN: Weight Bit Agglomeration in Crossbar Arrays for Reduced Impact of Interconnect Resistance on DNN Inference Accuracy. 4638-4648 - Yuan Chang
A 27-30 GHz T/R Module With Reflection-Type Phase Shifting and Machine-Learned Calibration. 4649-4660 - Joe Gould
A Low-Latency Feed-Forward Architecture for Image Filtering via Row-by-Row Processing. 4661-4672 - Chenyu Wang
Structure-Varying Complex Network Chaotic Model and Its Hardware Implementation. 4673-4685 - Cesar de S. Dias
Efficient Memristive Stateful Logic Exploring Boolean Expressions in the Sum-of-Products Form. 4686-4696 - Zhiwang Guo, Jingwen Jiang
EF-CIM: An Endurance Friendly CIM Accelerator Using Embedded NVM With Bit-Aware Wear Leveling for Efficient Light-Weight On-Chip Training in Edge Devices. 4697-4709 - Siyue Li
FAS-NoC: A Real-Time Fused Approximation Scheme Coordinating Communication and Computation for NoC-Based NN Accelerators. 4710-4722 - Zhelong Piao
LVDE: A Lightweight Threshold Voltage Distribution Estimation Strategy for High-Performance 3-D Nand Flash Memory. 4723-4736 - Xiwei Fang
A Reconfigurable Floating-Point Division and Square Root Architecture for High-Precision Softmax. 4737-4750 - Qiwei Dong
An Efficient Window-Based Vision Transformer Accelerator via Mixed-Granularity Sparsity. 4751-4764 - Hiroomi Hikawa
Hardware Self-Organizing Map With Dithered Step Neighborhood Function. 4765-4777 - Zi-Chen Fan
Real-Valued Discrete Fractional Hadamard Transform: Fast Algorithms and Implementations. 4778-4788 - Hong-Zhang Wang
Exponential Synchronization of Chaotic Lur'e Systems Using Sampled-Data Proportional-Integral Controller and its Application on Chua's Circuits. 4789-4799 - Federico Milano
Equivalence Between Geometric Frequency and Lagrange Derivative. 4800-4809 - Sina Soleimani, Sayed Alireza Sadrossadat
Attention Mechanism Combined With Deep Recurrent Network for Nonlinear Circuit Macromodeling. 4810-4819 - Haodong Li
Attractor Dynamics of 2-Lobe Discrete Corsage Memristor-Coupled Neuron Map. 4820-4829 - Yanfeng Wang
FN-HNN Coupled With Tunable Multistable Memristors and Encryption by Arnold Mapping and Diagonal Diffusion Algorithm. 4830-4842 - Chengjie Chen
Synchronization and Coupling Dynamics in Memristive Homogeneous and Heterogeneous Hopfield Neural Networks. 4854-4867 - Liangzong He
A Neural Network-Based Online Parameter Identification Method for Fractional-Order Power Electronics. 4868-4876 - Yixuan Liu
Enhancing All-to-All RRAM Ising Machines With Randomized Granular Update Strategies for Solving Combinatorial Optimization Problems. 4877-4890 - Donghui Xu
Data-Driven Fuzzy Constant Voltage Regulation of Inductive Power Transfer Systems. 4891-4900 - Tao Chen
A Low-Complexity and High-Throughput Hardware Design for Lempel-Ziv 4 Compression Algorithm. 4901-4911 - Zihang Song
GBSense: A GHz-Bandwidth Compressed Spectrum Sensing System. 4912-4924 - Chaoxu Mu
Resilience-Based Output Formation-Containment Control of Nonlinear MASs Against DOS Attacks. 4925-4934 - Chun Liu
Fault-Tolerant Consensus of Multi-Agent Systems Subject to Multiple Faults and Random Attacks. 4935-4945 - Seok-Kyoon Kim
Pole-Zero Cancellation Speed and Acceleration Filtering Technique With Disturbance Observer for Servo Drive Applications Without Model Parameter Information. 4957-4966 - Jianhong Ye
Optimal Subband Adaptive Filter Over Functional Link Neural Network: Algorithms and Applications. 4967-4980 - Yuqi Wang
Multi-Class Hierarchical Random Networks for Consensus-Based Information Filter. 4981-4993 - Zhiwei Hua
Predefined-Time Precise Tracking of Uncertain MIMO Nonlinear Systems With Time-Varying Input Delay. 4994-5004 - Xin Gong
Resilient Output Formation-Tracking of Heterogeneous Multi-Agent Systems Against Composite Attacks: A Fully-Distributed Event-Triggered Framework. 5005-5018 - Yongwei Zhang
Model-Free Game-Based Dynamic Event-Driven Safety-Critical Control of Unknown Nonaffine Systems. 5019-5032 - Zhaoyu Zhang
Leader-Follower Formation Control via Fixed-Time Distributed Observer Over Directed Topology: Theories and Applications. 5033-5045 - Changchun Hua
Global Full-State Prescribed Performance Control of Nonlinear Systems With Dead-Zone and 1-Bit-Triggered Input. 5046-5056 - Ligang Jin
Robot Strategy Transfer Based on Shared Feature Space for Search and Insertion Assembly. 5057-5065 - Mingming Shi
Computing the Pursuing Control in Proximate Orbital Pursuit-Evasion Game by Polynomial Approximation. 5066-5079 - Rui Guo
Dynamic Self-Triggered Robust Distributed Model Predictive Control for Coupled Nonlinear Systems. 5080-5091 - Chao Zhang
Multi-Estimator Framework for Robust FDI Attack Detection in Smart Grids. 5092-5105 - Haibo Gu
Dynamic Event-Triggered Secure Cooperative Control of Second-Order Nonlinear Multi-Agent Systems Under DoS Attacks. 5106-5118 - Linlong Xu
Practical Prescribed-Time Synchronization for Multiweighted Complex Networks. 5119-5131 - Guanglei Wu
Stabilization of Time Scale-Type Nonlinear Systems With Stochastic Impulses. 5132-5143 - Shi-Long Shen
Predictor Feedback Control of Discrete-Time Systems With Both Input Delays and Multiple State Delays Based on State Observers. 5144-5156 - Tian-Yu Zhang
Co-Event-Triggered Estimation and Control for DC Microgrids With Distributed Switching Encryption: Privacy Guarantees Under Active Eavesdropper. 5157-5167 - Li Lai
Analytical Model and Robust Design of PT-Symmetric CLLC Coreless Transformers With Non-Ideal Parameters. 5168-5179 - Qianshi Liu
Research on an Inference Algorithm for a Series of Three-Port Converter Topologies. 5180-5191 - Dong Liu
Revealing Cascading Failure Vulnerability in Evolving Power Grids With Increasing Penetration of Inverter-Based Resources. 5192-5204 - Jiawen Li
Distributed Meta-Deep Reinforcement Learning for Wide Area Frequency Control of Interconnected Grid Considering Multi-Time Scale Coordination. 5205-5218 - Qiang Wang
An Efficient Resonant Pole Inverter With Reliability Improvement of Soft-Switching in the Case of Open Failure of Any Auxiliary Device on Each Bridge Arm. 5219-5232 - Shan He
Enhancing Voltage Control Stability of Grid-Forming VSCs Under PWM Delays: A Study on Feedforward Damping Methods. 5233-5246 - Zhanqiang Zhang
Multi-Time-Scale Voltage Regulation in ADN: A Designable Event-Triggered Method. 5247-5255 - Shuan Dong
A Twin Circuit Theory-Based Framework for Oscillation Event Analysis in Inverter-Dominated Power Systems With Case Study for Kaua'i System. 5256-5269 - Ju-Won Oh
A 92.7% Peak Efficiency Self-Starting Boost Converter With MPPT and Phase Frequency Detector Based Multi Current Detector for Energy Harvesting Systems With a Minimum Input Source Impedance of 1 Ω. 5270-5283 - Jinpeng Guo
Improved Vector Current Control for the VSC-HVdc Converter Connected to a Very Weak AC Grid. 5284-5294 - Yuxin Su
Comments on "Adaptive Continuous Barrier Function Terminal Sliding Mode Control Technique for Disturbed Robotic Manipulator". 5295-5296 - Pallab Kr Gogoi
Comments on "Analytical Design Equations for Class-E Power Amplifier". 5297-5298 - Yan Liang
Theoretical Analysis and Hardware Reproduction of Smale Paradox Based on CCM Neurons and Edge of Chaos. 4843-4853 - Hong Jiang
Robust Adaptive Control Based on Reduced-Order Unknown Input Observer for Fully Actuated Systems With Uncertainties. 4946-4956
Volume 72, Number 10, October 2025
- Cheng-Jie Hu
A 7.2-29.8 GHz LNA With 1.35-2.67-dB NF Using Coupled-Line-Based Transformers in 0.15- μm GaN-on-SiC Technology. 5302-5313 - Liangbo Lei
A Power-Efficient Active-RC Filter Using Passive Integrator and OTA With Push-Pull Output. 5314-5324 - Hapsah Aulia Azzahra
15.4-17 GHz, -187.4 dBc/Hz FoM VCO With Current Reused Coupled Oscillator and Improved Noise Circulation. 5325-5337 - Shumeng Li
A 77.7 dB-SNDR 625 kHz-BW First-Order Noise-Shaping SAR ADC Using a Novel VCO-Based Charge-Accumulation Integrator. 5338-5350 - Zhishuai Zhang
Programmable Analog-to-Digital Converter Array Supporting Architecture Restructuring and Mode Concurrency. 5351-5364 - Jeroen Ponte
A 0.4-0.9 V Supply Voltage-Flexible Third-Order Passive ΔΣ Modulator With Switched-Capacitor Loop Filter Achieving 71.9 dB Peak SNDR at 4 MHz Bandwidth. 5365-5377 - Cong Wei, Lijie Huang
Analysis and Design of a Discrete-Time 3-0 MASH Delta-Sigma ADC With 100.2 dB Dynamic Range. 5378-5388 - Zhaonan Lu
Analysis and Design of a 16-bit Continuous-Time Incremental Delta-Sigma ADC. 5389-5398 - Xuanhao Zhang
A 5-MS/s 93.4-dB-DR Three-Step Incremental Zoom ADC With Single Sampling. 5399-5408 - Zijie Wang
A Time and Energy-Efficient Asynchronous Hybrid-Searching Auto Frequency Calibration for a 3.2 GHz Phase-Locked Loop. 5409-5421 - Prabodh Katti
Bayes2IMC: In-Memory Computing for Bayesian Binary Neural Networks. 5422-5435 - Rafael de la Rosa-Vidal
Event-Driven Vision Sensor With In-Pixel Spatial Contrast Computation Capabilities and On-Chip AER Sequencer. 5436-5446 - Sergio Massaioli
A Fully-Integrated Many-Electrodes Pulsed-Voltage Control Architecture for Arbitrary-Waveform Neural Stimulation With High Energy Efficiency. 5447-5456 - Gerd Kiene
DC-Readout of Semiconductor Spin Qubits: Opportunities and Limits. 5457-5470 - Jiefeng Zhou
Four-Port Probe Calibration Using 64-Term Error Model for On-Wafer S-Parameter Measurement of Microwave Circuits Up to 110 GHz. 5471-5481 - Junyeong Yeom
A Chronic Diseases Detection Integrated Interface With Anti-Drift Normalization and On-Chip Classification Schemes. 5482-5493 - Lei Dong
Floquet Modulation Optimizing the Tunable Isolators Based on PT-Symmetric LCR Resonators. 5494-5502 - Elham Sadeghabadi
Analytical Modeling of the Dual-Input Digital Doherty Power Amplifier for Efficiency and Linearity Optimization. 5503-5516 - Mingxuan Jiang
Bio-Inspired Neuromorphic Circuit Design of Nonassociative Learning for Multisensory Enhancement and Depression. 5517-5530 - Yu Qian
Ferroelectric Compute-in-Memory Framework for Solving Pure and Mixed Strategy Nash Equilibrium. 5531-5544 - Georgios Papandroulidakis
A 9T4R RRAM-Based ACAM for Analogue Template Matching at the Edge. 5545-5558 - Max Uhlmann
A Compact One-Transistor-Multiple-RRAM Characterization Platform. 5559-5570 - Satoshi Moriya
Analog VLSI Implementation of Subthreshold Spiking Neural Networks and Its Application to Reservoir Computing. 5571-5582 - Yanfeng Wang
Memristor-Based Operant Conditioning Neural Network Circuit With Emotion Transmission and Secondary Conditioned Reflex. 5583-5596 - Luca Parrini
A Lightweight PUF-Based Weights Obfuscation Technique for Secure In-Memory AI Inference. 5597-5609 - Dong Li
A SPAD-Based Hybrid Time-of-Flight Image Sensor With PWM and Non-Linear Spatiotemporal Coincidence. 5610-5619 - Sanaz Sadeghi
Synthetic Diversity for Artifact Suppression and Simultaneous Multi-Band Down-Conversion in Widely-Tunable Receivers. 5620-5633 - Guangqian Zhu
Multi-Cell Battery Sensing and Protection IC With Integrated Low-Temperature-Drift Reference for Series Battery Pack Management. 5634-5645 - Alexander Zolotarev, Altana Tsyrinova
Multi-Receiver Wireless Power Transfer Systems Using Metasurface-Based Resonator. 5646-5656 - Ali Ansarmohammadi
MLB-MAC: Multi-Level Binary MAC Array for Energy Efficient ML Accelerators. 5657-5670 - Yunpeng Song
Temperature-Aware Differential Programming for Performance and Energy Optimization on 3D NAND High-Density Flash Memory. 5671-5682 - Yuanzhe Zhao, Pengyu He, Yan Zhu
A 28-nm 3.32-nJ/Frame Compute-in-Memory CNN Processor With Layer Fusion for Always-on Applications. 5683-5695 - Vishal Sharma
FlexDCIM: A 400 MHz 249.1 TOPS/W 64 Kb Flexible Digital Compute-in-Memory SRAM Macro for CNN Acceleration. 5696-5707 - Victor Jeffry Louis, Chunguang Wang
Memory Technologies for Crossbar Array Design: A Comparative Evaluation of Their Impact on DNN Accuracy. 5708-5721 - Titu Mary Ignatius
Non-Linear Cyclic Variable Clock Feistel Bridge-Inspired Countermeasure for Securing RISC-V Crypto-Core Against Power Attacks. 5722-5735 - P. V. Sruthi
Modeling of Izhikevich Spiking Neurons With High Matching Accuracy Using Comb-Exp Functions and Its Multiplier-Free Realization. 5736-5747 - Shihang Tan
Toward Efficient Eye Tracking in AR/VR Devices: A Near-Eye DVS-Based Processor for Real-Time Gaze Estimation. 5748-5760 - Roshwin Sengupta
WASENN: Wavelet Assisted Stochastic Enabled Neural Network for Human Activity Recognition. 5761-5773 - Yunxiang Zhang
AdderNet 2.0: Optimal AdderNet Accelerator Designs With Activation-Oriented Quantization and Fused Bias Removal-Based Memory Optimization. 5774-5784 - Seongmin Ahn, Taehui Na
Single-Reference-Based Multi-Level Cell Sensing Scheme for Spin-Orbit Torque MRAM. 5785-5796 - Xuejing Dai
HWSA: A High-Ratio Weight Sparse Accelerator for Efficient CNN Inference. 5797-5810 - Dong Jiang
A Spin Scale-Aware Self-Adaptive Ising Annealing Processing Architecture for Combinatorial Optimization Problems. 5811-5824 - Sandy A. Wasif
Domain-Specific Hyperdimensional RISC-V Processor for Edge-AI Training. 5825-5838 - Borja Gutiérrez De Cabiedes
An Ultra-Low-Power Flip-Flop With Near-Threshold Robust Operation and Redundant-Free Internal Clock Transitions. 5839-5846 - Qishi Hu
FPGA-Based Hardware Implementation of Blue-Noise Stacked Error Diffusion Multitoning. 5847-5860 - Anu Verma
Light-Weight Low-Latency Reconfigurable CORDIC Architecture With a New Non-Power-of-2 Angle Set of Microrotations. 5861-5871 - Yuxiang Hu
OD-TGCN: An Observer-Driven Temporal Graph Convolutional Network for Early Fault Detection of Control Systems. 5872-5884 - Jingjing Guo
A Path Statistical Delay Prediction Framework Based on Global Graph Neural Network. 5885-5897 - Ningye Jiang
A Parallel Read-Write Circuit With Fast Amplitude-Adaptive Matching Scheme to Memristor Crossbar Array. 5898-5911 - Xiang-Ru Li, Peng Zhang
Equalizer Optimization Method Based on Local Multi-Constraint Modeling-Bayesian Optimization With Region Partitioning. 5912-5925 - Ahmet Yusuf Salim
SKI-SAT: A CMOS-Compatible Hardware for Solving SAT Problems. 5926-5937 - Sen Zhang
A Novel Memristor Regulation Method for Chaos Enhancement in Unidirectional Ring Neural Networks. 5938-5946 - Qiang Lai
Generating Grid Multiscroll Memristive Chua's Circuit and Its Predefined-Time Synchronization for Secure Communication. 5947-5956 - Xianglai Yuan, Yichao Yao
Impacts of Physical-Layer Information on Epidemic Spreading in Cyber-Physical Networked Systems. 5957-5969 - Lukasz D. Dynovski
The Impact of Distorted Signals on the Resistance of the Current Path in a Mechanical Connector. 5970-5983 - Mauro Di Marco
Memristor Circuits as Linear-Gradient Systems and Discrete Analogues Preserving a First Integral. 5984-5997 - Mei Guo
A High-Performance Memristive Circuit Design for DCGAN in Edge Computing. 5998-6010 - Yanjun Zhao
Event-Triggered Fully Distributed Bipartite Containment Control for Multi-Agent Systems Under DoS Attacks and External Disturbances. 6011-6024 - Guangliang Liu
Adaptive Cooperative Fault-Tolerant Control for Output-Constrained Nonlinear Multi-Agent Systems Under Stochastic FDI Attacks. 6025-6036 - Zeyi Liu
Secure Control for Photovoltaic Energy DC Circuit Conversion Systems With Modulated Chaotic Masking and Adaptive Weighting Techniques. 6037-6045 - Rui Zhu
Accelerated Nash Equilibrium Seeking for Constrained Multi-Cluster Games With Time-Varying Communication. 6046-6057 - Chao Liu
Practically Finite-Time ADRC for a 3-DOF Parallel Mechanism of PMAs With Couplings. 6058-6069 - Yukang Cui
Optimal Resource Allocation Between Two Nonfully Cooperative Wireless Networks Under Malicious Attacks: A Gestalt Game Perspective. 6070-6082 - Bingqian Liu
Distributed Online Generalized Nash Equilibrium Learning in Multi-Cluster Games: A Delay-Tolerant Algorithm. 6083-6096 - Shuhang Yu
Reinforcement Learning-Based Fault-Tolerant Control for Output-Constrained Nonlinear Systems With Preassigned-Time Performance. 6097-6107 - Leyan Fang
Adaptive Iterative Learning Prescribed Performance Control of Uncertain Strict-Feedback Systems With Improved Parameter Estimation. 6108-6121 - Xiaoming Chen
Bipartite Event-Triggered Output Tracking Consensus of Heterogeneous Linear Multi-Agent Systems Under Switching Directed Topologies. 6122-6133 - Yishu Wang
Fixed-Time Stability of Nonlinear Systems With Destabilizing Delayed Impulses: Necessary and Sufficient Conditions. 6134-6147 - Guangtai Tian
Prescribed-Time Control of Nonlinear Systems With Global Prescribed Performance for State Errors. 6148-6158 - Qiang Zhang
Average Controllability of Cartesian Product Networks. 6159-6171 - Aibing Qiu, Yu Hu, Siyu Huang, Juping Gu:
An Integrated Tradeoff Design of Reduced-Order Diagnostic Observer for Event-Triggered Fault Detection. 6172-6184 - Yongqiang Xiao
Practical Prescribed-Time Control for High-Order Strict-Feedback Systems Based on Fully Actuated System Approach. 6185-6194 - Qinglin Zhao
A Hybrid Bridge Push-Pull Forward Resonant Converter With Fixed Frequency PWM Control for High-Reliability Application. 6195-6204 - Yang Chen
Design and Implementation of a Dual-Mode Supercapacitor Fast Charger Employing Continuous and Fine-Tuned Pulse Currents. 6205-6216 - Anil Jakhar
Switched-Capacitor-Based DC-AC Boosting Circuit: Synthesis and Operation. 6217-6226 - Katia Samperi
Monolithically Integrated Bootstrapped Gate Driver With a 200-V GaN Power Switch. 6227-6236 - Meilin Wan
Negative Input Protection Design of Power Switch. 6237-6250 - Zhitong Chen
An Inductor-First Tri-Path Hybrid Buck Converter With Reduced Inductor Current Suitable for USB Power Delivery Adapter. 6251-6261 - Mohamed Zaery, Syed Muhammad Amrr, Mohammad Ali, S. M. Suhail Hussain, Mohammad A. Abido:
Prescribed Performance-Based Distributed Predefined Time Control for DC Microgrid Clusters. 6262-6275
Volume 72, Number 11, November 2025
- Xinmiao Zhang:
Guest Editorial Special Issue on the International Symposium on Integrated Circuits and Systems - ISICAS 2025. 6279 - Kaiquan Chen
A 98.7/97.5 dB-DR 10/20 kHz-BWs Dual-Mode Continuous-Time Delta-Sigma ADC. 6289-6300 - Yu-Jia Wei
An Improved Common-Mode Transient Immunity Isolated Gate Driver With On-the-Fly Deadtime Control. 6301-6312 - Jen-Wei Chang
A 92.6% Efficiency Rotated Hybrid Step-Down Converter With Rotated Parallel Operation for Flying Capacitor Charge Balance and Fast Transient Response. 6313-6323 - Ye Liu
VSLAM-BA: Algorithm and Hardware Co-Design for High Performance and Energy-Efficient Visual SLAM Backend Hardware Accelerator. 6324-6337 - Xueke Cai, Tong Zhang, Yanling Zheng, Li Gao
A Reference Oversampling PLL With a FoMREF of -240.1 dB Enabled By a Capacitive Parasitic-Proof Ring Oscillator and a Time-Multiplexed Gm Stage. 6338-6349 - Teng Zhang
PRADO: A Low-Latency and Energy-Efficient 6DoF Pose Refinement Accelerator With Domain-Specific Explorations. 6350-6363 - Haoyu Gong
A 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by a DC-DC Converter. 6364-6377 - Wenzhao Lv, Yilun Cai
A 1.31-ppm/ ° C CMOS Voltage Reference With Second-Order and Sub-Ranging Compensation. 6378-6388 - Deming Zhang
A 32 kb 55 nm Radiation-Hardened SRAM Chip With SEU ≤1.1 E-11 Upsets/Bit-Day, SEL >107.1 MeV ⋅ cm²/mg, and TID >100 Krad(Si) for Space Applications. 6389-6398 - Siqi Wang
An Ultrasound Transducer Analog Front-End With dB-Linear Time-Gain Compensation Using Translinear Loop Principle. 6399-6410 - Yue Shi
A Charge-Sharing-Based Half-Bridge Driver Suitable for Any Duty Cycle With No External Component. 6411-6422 - Mengjie Li
RT-FLOW: FPGA Implementation of Real-Time Optical-Flow-Based SLAM for High-Speed Tracking and High-Quality Mapping. 6423-6435 - Wenbo Zhang
A Low Noise Readout Circuit With Input-Common-Mode-Feedback Charge Sensitive Amplifier Using Differential Pseudo Resistors for MEMS Gyroscopes. 6436-6448 - Feng Yang, Yihan Liu
High Precision Radiation Resistant Bandgap Voltage Regulator for Aerospace Applications. 6449-6457 - Chen Hu
A Single-Stage Four-Phase Hybrid Boost Converter With 11-to-20 VCRs for LiDAR Driver Applications. 6458-6468 - Sinho Lee
A Wide-Range Inter-Wire De-Skewing for IL Warping Mitigation in Spatially Correlated Coded Signaling-Based Transceiver. 6469-6481 - Hua Fan, Wei Zhang
A 17-mK Resolution ΣΔ-Based Temperature Sensor With an On-Chip Single-Point Calibrated Inaccuracy of ±1.5 °C (3σ). 6482-6492 - Shuyu Zhang
Constant Off-Time-Based Current-Balancing Technique With Accuracy and Transient Optimization in Wide I/O Range for Multi-Phase Regulator. 6493-6504 - Yu-Tse Shih
A Two-Step Down Converter Based on Pseudo 4-Phase Mutual Operation for 48-to-1 Conversion. 6505-6516 - Yoojin Jung
A 16-to-30-Gb/s 1.03-pJ/b Baud-Rate Receiver With Referenceless CDR Employing Integrated Pattern Decoding Technique in 28-nm CMOS. 6517-6527 - Jaehee Kim
Hybrid Ordered Statistics Decoding of Short-Length BCH Codes for URLLC Systems: Theoretical Analysis and Decoder Implementation. 6528-6540 - Shiqi Zhao
BoostViT: Booth-Serial Skipping and Tunable Scaling for Vision Transformers. 6541-6552 - Sunwoo Lee
CLAT: A Clustering-Based Attention Transformer Accelerator for Low-Latency Text Generation in LLMs. 6553-6566 - Xianghui Pan
A Multi-Step ADC With Lightweight Input Buffer Distortion, Sub-Stage Coarse-Fine Gain, and Sampling Skew Background Calibrations. 6567-6577 - Yishuo Meng, Chen Yang
An Efficient CNN Accelerator Exploiting Novel Tile-Based Near-Structured Sparsity to Achieve Multi-Level Irregularity Elimination. 6578-6591 - Yen-Yun Huang
Serial-Stacked Single-Inductor Dual-Source Triple-Output Energy Harvesting Interface With 2D-MPPT for Battery-Free IoT Devices. 6592-6603 - Dongwoo Kang, Jun-Soo Park
An 18-Tb/s/mm PAM-3 On-Chip Link With Jitter-Suppressing 3T4T Coding and FFE-Based Crosstalk Cancellation for Memory Interfaces. 6604-6614 - Young Chan Kim
FAB: FPGA-Accelerated Fully-Pipelined Bottleneck Architecture With Batching for High-Performance MobileNetv2 Inference. 6615-6628 - Hua Fan
Analog Foreground Calibration of High-Resolution SAR ADC. 6629-6639 - Hyunjun Park
A 0.65-pJ/bit 3.6-TB/s/mm I/O Interface With XTalk Minimizing Affine Signaling for Next-Generation HBM With High Interconnect Density. 6640-6651 - Xuanzhe Xu
A 75.6 Gb/s 22-bit Floating-Point Coarse-Grained Versatile DSP Embedding 26K-Point Baseband Signal Processing and 2048 × 256-Point Complex FFT. 6652-6664 - Mattia Sinigaglia, Amirhossein Kiamarzi, Marco Bertuletti, Luigi Ghionda, Mattia Orlandi, Riccardo Tedeschi, Aurora Di Giampietro, Yvan Tortorella, Luca Bertaccini, Simone Benatti, Giuseppe Tagliavini, Luca Benini, Francesco Conti, Davide Rossi:
Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing. 6665-6678 - Yuan Gao, Depeng Sun
A Low-Noise Class-F23 VCO With Harmonic Resonance Expansion and 2nd/3rd-Harmonic Outputs for Multiband mm-Wave Applications. 6679-6690 - Ziming Liu
A 310 nA DCM Hysteretic Buck Converter With 95.8% Peak Efficiency and Greater Than 90% Efficiency in 10 μA-100 mA Load Range for Battery Powered IoT Sensors. 6691-6700 - Tao Zhong
A 25 MHz-BW 81 dB-DR TDC-Based CTDSM With Background Analog-Integration-Based ISI Error Calibration Achieving >8 dB Even-Order Harmonic Suppression. 6701-6712 - Ke Wu, Yuekang Guo
A Fully Symmetric Oscillator-Based CMOS Ising Machine Architecture With Successive Approximation Sampling and Power Efficient Solution Refinement. 6713-6723 - Bingqiang Liu
An Energy-Efficient, High-Frame-Rate, and Reconfigurable EKF-SLAM Processor With Full Acceleration for Autonomous Mobile Robots. 6724-6737 - Haopei Deng, Wentao Jiang, Yi Tan, Jiayi Ye, Fei He, Zexue Liu
A Compact Cost-Effective NB-IoT System-in-Package With Integrated RF Front-End IPD and TX/RX Gain Self-Calibration. 6738-6749 - Dajun Zhou
A GaN Driver IC With Asymmetrical dV/dt Current Clamping Level Shifter and Logic-Based Adaptive Deadtime Control. 6750-6761 - Shiping Chen
A Sub-Nanosecond Delay Floating Voltage Level Shifter With 300 V/ns Power Supply Slew Tolerance. 6762-6771 - Jiaji Ma
Dual-Mode Analog Counter With Precise Step Regulation and Successive Approximate Calibration Circuit for SPAD Image Sensors. 6772-6782 - Majid Radman
Fully-Integrated, Digitally-Programmable Rising/Decaying Exponential Current Waveform Generator. 6783-6794 - Jiayang Li
Design and Optimization of a High Linearity On-Chip Sinusoidal Current Generator for Bioimpedance Measurements Using Direct Digital Synthesis. 6795-6806 - Jing Jin
A 470 μW 20 kHz-BW 107.3 dB-SNDR Nested CT DSM Using Negative-R-Based Cross-RC Integrator and Weighted Multi-Threshold MSB-Pass Quantizer. 6807-6819 - Alessandro Ravera
INIS: A Family of ΔΣ Modulators With Inherent Spur Immunity When Interacting With a Static Nonlinearity. 6820-6832 - Xiao Wang
A 2.84-mW 8-MHz Bandwidth 76.7-dB SNDR N-Path-Filter-Based Pure Bandpass DSM. 6833-6846 - Yifu Guo
A 94.6 dB-SNDR 20 μW Extended-Counting Incremental ADC Based on Dynamic Amplifier With Gain Calibration. 6847-6857 - Xu Yan
Design and Miniaturization of a 3.1-5.5-GHz Fully Distributed Efficient Power Amplifier MMIC in GaN-on-SiC HEMT Technology. 6858-6871 - Chenxi Zhao
A 23-41 GHz Broadband Power Amplifier With Common-Mode Stability Enhancement Technique in 65-nm CMOS Process. 6872-6885 - Yun-Hung Gao
A 9.84-μW 148.9-dB Total DR Light-to-Digital Converter With Current-Integration SAR Quantizer for Multi-Wavelength PPG Applications. 6886-6899 - Jianxin Wu, Wenjie Li, Wang Kang
A 0.88 e‾rms 8-Mpixel 3D-Stacked Low Temporal-Noise CMOS Image Sensor With Auto-Zero Single-Slope ADC, Fast Correlated Multi-Sampling, Row-Wise Noise Reduction, and Dark Current Non-Uniformity Calibration Techniques. 6900-6913 - Mo Chen
Firing Patterns and Synchronicity of Locally Active Memristor-Based Neuromorphic Circuits. 6914-6923 - Xiaochuan Fang
Circular Wireless RF Systems With Recyclable and Degradable Components Based on Additively-Manufactured Liquid Metal Interconnects. 6924-6935 - Reza Mahmoodi Salehabad
Generalized Active N-Port Network Analysis for Load Modulation: Doherty Power Amplifier Incorporating Tri-Coupled-Line Combiner. 6936-6947 - Mario Garrido
Uniformly Distributed CORDIC. 6948-6961 - Gang Mao
Dynamic Tsetlin Machine Accelerators for On-Chip Training Using FPGAs. 6962-6975 - Jia Zhao, Junbo Xie, Bo Xu, Yifan Wang, Hao Zeng, Kai Chen:
Heterogeneous and Homogeneous Attractors in 2D Sine-Based Hyperchaotic Map and Its High-Precision FPGA Implementation. 6976-6987 - Zhongzhen Tong
A Self-Decryption Pass Transistor Logic-Based In-MRAM Computing Macro Using Hybrid VGSOT-MTJ/GAA-CNTFET. 6988-7001 - Shijie Meng
An FPGA-Based Real-Time Loop Closure Detection Framework With Ultra-Fast Descriptor Generator. 7002-7015 - Kang Yang
DrlGoFPGA: FPGA Global Placement Considering Input-Output Buffer Based on Deep Reinforcement Learning and Gradient Optimization. 7016-7029 - Yifan Zhao, Honglin Kuang, Xinglong Yu
ARV-Q: An Adaptive RISC-V Vector Processor for Unified Support of Post-Quantum Standards and Side-Channel Protection on the Edge. 7030-7043 - Andrés Santana-Andreo
Workload Compression Techniques to Scale Defect-Centric BTI Models to the Circuit Level. 7044-7057 - Akul Malhotra
TWINN: Training-Free Weight-Input Flipping for Mitigating Crossbar Non-Idealities in Binary Neural Network Accelerators. 7058-7069 - Iago Storch
Improving Coding Efficiency of Massive Parallel Intra Prediction Using Alternative References. 7070-7083 - Wenxu Zhang
Design and Implementation of FRM-Based Wideband Channelizer for Passive Detection and Jamming Integrated Processor. 7084-7094 - Chen Chen
A Multi-Form Optimization Framework for Analog Integrated Circuit Sizing. 7095-7108 - Yang Liu, Zhen Wang
Finite-Time Multisynchronization of Coupled Discontinuous Cohen-Grossberg Neural Networks and Its Application in Associative Memory. 7109-7119 - Mei Guo
A Knowledge Distillation Online Training Circuit for Fault Tolerance in Memristor Crossbar Array-Based Neural Networks. 7120-7131 - Tingsen Zhang
Fixed-Point Kernel Adaptive Filtering for Fractional-Order Nonlinear Dynamical Systems With Applications to Chaotic Circuits. 7132-7145 - Xiaoyang Ma
Small-Signal Stability Region Analysis of Multi-Time Delay Wind Power System Considering Degenerate Hopf Bifurcation. 7146-7159 - Jean-Marc Ginoux, Roberto Concas
From Relaxation to Chaotic Oscillations: A New Paradigm for Memristor Circuits. 7160-7169 - Young-Min Lee, Won-Young Lee
A 25-Gb/s Energy-Efficient PAM-4 Receiver Utilizing a Pulse Amplitude Comparator and Modified Summation Method. 7170-7182 - Vikash Kumar Bhardwaj, Omm Prakash Sahoo
Fault-Resilient RIS Systems: Toward SINR- and Sum-Rate Maximization of IoT Networks Using ML Frameworks. 7183-7196 - Lisha Luo
Efficient Schemes and Architectures for Check Node Update in Shuffled Min-Sum Decoding of LDPC Codes. 7197-7210 - In-Cheol Park
Multiple-Resolution Decoding Architecture for QC-LDPC Codes. 7211-7224 - Shou-Yi Li, Hua Yang
Generalized Multilevel Code-Shifted Differential Chaos Shift Keying Modulation System. 7225-7237 - Shaobao Li, Yuguang Zhang
Fault-Tolerant H∞ Output Regulation of Uncertainty Multi-Agent Systems via Anti-Saturation Policy Learning. 7238-7251 - Yuting Cao, Shanshan Zhao
Input-Retention Strategies for Secure Synchronization of Piecewise Markov Neural Networks Under Hybrid Cyber-Attacks. 7252-7262 - Shichao Lv
H∞Filter and Extended State Observer-Based Disturbance Rejection Control for Systems With Uncertainty and Noise. 7263-7271 - Jiamin Liu
Fully Distributed Output Regulation of Linear Discrete-Time Multi-Agent Systems With Markov Switching Topology. 7272-7280 - Wenxin Lai
Prescribed Performance Control for a Nonlinear System With Actuator Saturation via Anti-Windup Design. 7281-7294 - Ting Shi
Finite-Time Dissipative Tracking Control of Semi-Markov Jump Systems Under Multi-Channel Hybrid Attacks. 7295-7306 - Wen-Jing He
Adaptive Prescribed-Time Control of Switched Nonlinear Systems With False Data Injection Attacks. 7307-7318 - Haoyu Zhou, Jian Liu
Event-Triggered Predefined-Time Synchronization for Complex Networks With Markov Switching Topologies Under Stochastic DoS Attacks. 7319-7331 - Kui Ding
Intermittent Dynamic Output Feedback Control for State-Based Stochastic Switched Systems and Its Application to Electronic Circuits. 7332-7345 - Weixin Wang, Yang Yi
Intermittent Information-Based Disturbance Observer Design and Recursive Depth Control for AUVs With Packet Losses. 7346-7357 - Zhuoning Zhang
Practical Prescribed-Time Consensus of Uncertain Multi-Agent Systems via Intermittent Dynamic Event-Triggered Control. 7358-7370 - Kuo Li
Distributed Consensus Control of Nonlinear Multiagent Systems With Actuator Deception Attacks. 7371-7379 - Xiaoyi Guan
Predefined-Time and Predefined-Accuracy Sliding Mode Control With Unknown Bound Uncertainties. 7380-7388 - Yige Guo
Robust Fuzzy Control of Network-Type Re-Entrant Manufacturing Systems With Communication Delays. 7389-7400 - Kai Yu
Design of Enhanced Three-Level Buck Converter With Configurable Power and Control Stages for Fast Load Transient Response. 7401-7410 - Yue Long
Resilient Decentralized Frequency Regulation for Multi-Area Power Systems With Electric Vehicles Under Hybrid Cyber-Attacks. 7411-7422 - Shuiqing Xu
Diagnosis of Open-Switch Faults in Grid-Tied Three-Level NPC Inverters With Parameter Uncertainty Using Variable Forgetting Factor Bias-Compensation Recursive Least Squares. 7423-7435 - Yuze Dong
Fast Algorithms for Resistance Distances on Signed Graphs. 7436-7448 - Yuhao Yang
A High Current NMOS LDO Handles a Wide Range of Load Capacitors With Output Impedance Shaping Technique. 7449-7462
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