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62nd DAC 2025: San Francisco, CA, USA
- 62nd ACM/IEEE Design Automation Conference, DAC 2025, San Francisco, CA, USA, June 22-25, 2025. IEEE 2025, ISBN 979-8-3315-0304-8
- Lingling Zhang, Yijian Wu, Hong Jiang, Ziyu Zhou, Tiancheng Lu:
LearnGraph: A Learning-Based Architecture for Dynamic Graph Processing. 1-7 - Tianji Liu, Evangeline F. Y. Young:
Simulation-based Parallel Sweeping: A New Perspective on Combinational Equivalence Checking. 1-7 - João Paulo C. de Lima, Mehran Shoushtari Moghadam, Sercan Aygun, Jerónimo Castrillón, M. Hassan Najafi, Asif Ali Khan:
All-in-Memory Stochastic Computing using ReRAM. 1-7 - Renshuang Jiang, Pan Dong, Zhenling Duan, Yu Shi, Xiaoxiang Fang, Yan Ding, Jun Ma, Shuai Zhao, Zhe Jiang:
Unlocking a New Rust Programming Experience: Fast and Slow Thinking with LLMs to Conquer Undefined Behaviors. 1-7 - Jinglei Cheng, Ruilin Zhou, Yuhang Gan, Chen Qian, Junyu Liu:
Scalable Community Detection Using Quantum Hamiltonian Descent and QUBO Formulation. 1-7 - Jiahang Lou, Qilong Zhu, Yuan Dai, Zewei Zhong, Wenbo Yin, Lingli Wang:
Adora Compiler: End-to-End Optimization for High-Efficiency Dataflow Acceleration and Task Pipelining on CGRAs. 1-7 - Donger Luo, Qi Sun, Xingheng Li, Cheng Zhuo, Bei Yu, Hao Geng:
From Flatland to Forest: Exploring Pareto-optimal Design through RTL Hierarchy Trees. 1-7 - Xinyi Guo, Hiromitsu Awano, Takashi Sato:
Weighted Range-Constrained Ising-Model Decoder for Quantum Error Correction. 1-7 - Jihe Wang, Yuxi Han, Danghui Wang:
Can Short Hypervectors Drive Feature-Rich GNNs? Strengthening the Graph Representation of Hyperdimensional Computing for Memory-efficient GNNs. 1-7 - Brian Crafton, Xiaochen Peng, Xiaoyu Sun, Ashwin Sanjay Lele, Bo Zhang, Win-San Khwa, Kerem Akarvardar:
Finding the Pareto Frontier of Low-Precision Data Formats and MAC Architecture for LLM Inference. 1-7 - Azaz-Ur-Rehman Nasir
, Samroz Ahmad Shoaib, Muhammad Abdullah Hanif, Muhammad Shafique:
ESM: A Framework for Building Effective Surrogate Models for Hardware-Aware Neural Architecture Search. 1-7 - You Li, Guannan Zhao, Yunqi He, Hai Zhou:
RE3: Finding Refinement Relations with Relational Mapping Abstraction. 1-7 - Qian Wang, Jayden John, Ben Dong, Yuntao Liu:
TetrisLock: Quantum Circuit Split Compilation with Interlocking Patterns. 1-7 - Yuyang Ye, Mingwei He, Lizheng Ren, Jianwang Zhai, Tinghuan Chen, Jun Yang, Longxing Shi:
Truly Pre-Routing Timing Prediction via Considering Power Delivery Network. 1-7 - Jing Huang, Kuan Jiang, Weijie Wang, Wei Liang, Wanli Chang:
Construction of DAG Models for Autonomous Systems. 1-6 - Xiangyu Ren, Yuexun Huang, Zhiding Liang, Antonio Barbalace:
A Scalable and Robust Compilation Framework for Emitter-Photonic Graph State. 1-7 - Shuai Zhou, Weikang Zhang, Xindi Zhang, Zite Jiang, Haihang You, Shaowei Cai:
Parallel Dynamic Partitioning for Datapath Combinational Equivalence Checking. 1-7 - Chaojian Li, Zhifan Ye, Massimiliano Lupo Pasini, Jong Youl Choi, Cheng Wan, Prasanna Balaprakash:
Scaling Laws of Graph Neural Networks for Atomistic Materials Modeling. 1-7 - Souradip Poddar, Youngmin Oh, Yao Lai, Hanqing Zhu, Bosun Hwang, David Z. Pan:
INSIGHT: A Universal Neural Simulator Framework for Analog Circuits with Autoregressive Transformers. 1-7 - Fan Sun, Fang Dong, Dian Shen:
HiSpTRSV: Exploring Tile-Level Parallelism for SpTRSV Acceleration on FPGAs. 1-7 - Feng Guo, Yueyue Xi, Jianwang Zhai, Jingyu Jia, Jiawei Liu, Kang Zhao, Chuan Shi:
IRGNN: A Graph-based Framework Integrating Numerical Solution and Point Cloud for Static IR Drop Prediction. 1-7 - Jiaqi Wang, Georges G. E. Gielen:
Graph-Guided Transfer Learning to Boost the Efficiency of System-Level Optimization of Analog/Mixed-Signal Circuits. 1-7 - Zhengyuan Shi, Tiebing Tang, Jiaying Zhu, Sadaf Khan, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu:
Logic Optimization Meets SAT: A Novel Framework for Circuit-SAT Solving. 1-7 - Yuhang Qian, Zhihan Chen, Xindi Zhang, Shaowei Cai:
X-SAT: An Efficient Circuit-Based SAT Solver. 1-7 - Faxian Sun, Runzhou Zhang, Zhenyu Liu, Heng Liao, Zhinan Qin, Jianli Chen, Jun Yu, Kun Wang:
Libra: A Hybrid-Sparse Attention Accelerator Featuring Multi-Level Workload Balance. 1-7 - Genggeng Liu, Pengcheng Huang, Zepeng Li, Wen-Hao Liu, Xing Huang, Wenzhong Guo:
Late Breaking Results: An Efficient and Scalable Track Assignment with GPU Parallelism. 1-2 - Wenchao Li, Hongxi Wu
Differentiable Net-Moving and Local Congestion Mitigation for Routability-Driven Global Placement. 1-7 - Xuliang Yu, Yu Qian, Xunzhao Yin, Cheng Zhuo, Liang Zhao:
FeKAN: Efficient Kolmogorov-Arnold Networks Accelerator Using FeFET-based CAM and LUT. 1-7 - Penghao Song, Chongxi Wang, Chenji Han, Haoyu Zhao, Tingting Zhang, Tianyi Liu, Jian Wang:
ACRS: Adjacent Computation Resource Sharing among Partitioned GPU Sub-Cores. 1-7 - Yingjia Wang, Ming-Chang Yang:
The Unwritten Contract of Cloud-based Elastic Solid-State Drives. 1-7 - Yujie Zhao, Hejia Zhang, Hanxian Huang, Zhongming Yu, Jishen Zhao:
MAGE: A Multi-Agent Engine for Automated RTL Code Generation. 1-7 - Kangbo Bai, Le Ye, Ru Huang, Tianyu Jia:
EdgeMM: Multi-Core CPU with Heterogeneous AI-Extension and Activation-aware Weight Pruning for Multimodal LLMs at Edge. 1-7 - Yuhan Tang, Jianmin Zhang, Sheng Ma, Tiejun Li, Hanqing Li, Shengbai Luo, Jixuan Tang, Lizhou Wu:
HIVE: A High-Priority Victim Cache for Accelerating GPU Memory Accesses. 1-7 - Yaolong Hu, Hao Guo, Shikai Wang, Jiaqi Liu, Weidong Cao, Taiyun Chi:
AdreamDCO: AI-Driven Robust and Efficient Design Automation for Digitally Controlled Oscillators. 1-7 - Zhang Hu, Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu:
Mixed Structural Choice Operator: Enhancing Technology Mapping with Heterogeneous Representations. 1-7 - Wenjie Wang, Bo Peng, Jianguo Yao, Haibing Guan:
Leopard: Hardware Pass-Through Remote Storage Access with Queue Concurrency for Edge Intelligent Workstations. 1-7 - Dengke Yan, Yanxin Yang, Ming Hu, Xin Fu, Mingsong Chen:
MMDFL: Multi-Model-based Decentralized Federated Learning for Resource-Constrained AIoT Systems. 1-7 - Wuxinlin Cheng, Yihang Yuan, Chenhui Deng, Ali Aghdaei, Zhiru Zhang, Zhuo Feng:
CirSTAG: Circuit Stability Analysis on Graph-based Manifolds. 1-7 - Yunfei Gu, Yixuan Liu
MemSeer: Leverage Memory Failure Distinctions and Multi-Grained Prediction in Ultra-Scale Heterogeneous X86/ARM Clusters. 1-7 - Tianhao Cai, Liang Wang, Limin Xiao, Meng Han, Zeyu Wang, Lin Sun, Xiaojian Liao:
CaMDN: Enhancing Cache Efficiency for Multi-tenant DNNs on Integrated NPUs. 1-7 - Zihao Deng, Sayeh Sharify, Xin Wang, Michael Orshansky:
Mixed-Precision Quantization for Deep Vision Models with Integer Quadratic Programming. 1-7 - Antonio Joia Neto, Adam Caulfield, Ivan De Oliveira Nunes:
RAP-Track: Efficient Control Flow Attestation via Parallel Tracking in Commodity MCUs. 1-7 - Hanchen Yang, Zishen Wan, Ritik Raj, Joongun Park, Ziwei Li, Ananda Samajdar, Arijit Raychowdhury, Tushar Krishna:
NSFlow: An End-to-End FPGA Framework with Scalable Dataflow Architecture for Neuro-Symbolic AI. 1-7 - Haozhong Qiu, Chuanfu Xu, Jianbin Fang, Shengguo Li, Liang Deng, Jian Zhang, Zhe Dai, Yue Ding, Yue Wang, Zhimeng Han, Yonggang Che, Jie Liu:
Me-MPK: Accelerating Krylov Subspace Solvers via Memory-efficient Matrix-Power Kernel. 1-7 - Behnam Omidi, Ihsen Alouani
Data Oblivious CPU: Microarchitectural Side-channel Leakage-Resilient Processor. 1-7 - Qi Xu, Fuchen Ma, Yuanliang Chen, Wanli Chen, Feifan Wu, Yanyang Zhao, Heyuan Shi, Yu Jiang:
CMFuzz: Parallel Fuzzing of IoT Protocols by Configuration Model Identification and Scheduling. 1-7 - Yunki Han, Taehwan Kim, Jiwan Kim, Seohye Ha, Lee-Sup Kim:
FLAG: An FPGA-Based System for Low-Latency GNN Inference Service Using Vector Quantization. 1-7 - Yan-Jen Chen, Wei-Kai Huang, Chung-Ting Tsai, Chiao-Yu Ou, Yao-Wen Chang:
Clearance-Constrained PCB Global Placement with Heterogeneous Components. 1-7 - Wenji Fang, Wenkai Li, Shang Liu, Yao Lu, Hongce Zhang, Zhiyao Xie:
NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph. 1-7 - Joongho Jo, Jongsun Park:
GS-TG: 3D Gaussian Splatting Accelerator with Tile Grouping for Reducing Redundant Sorting while Preserving Rasterization Efficiency. 1-7 - Marco Bertuletti, Yichao Zhang, Mahdi Abdollahpour, Samuel Riedel, Alessandro Vanelli-Coralli, Luca Benini:
Fast End-to-End Simulation and Exploration of Many-RISCV-Core Baseband Transceivers for Software-Defined Radio-Access Networks. 1-7 - Yunpeng Xu, Yuchen Fan
Ragnar: Exploring Volatile-Channel Vulnerabilities on RDMA NIC. 1-7 - Jingxiang Li, Shengan Zheng, Bowen Zhang, Hankun Dong, Linpeng Huang:
Sphinx: A High-Performance Hybrid Index for Disaggregated Memory With Succinct Filter Cache. 1-7 - Wei Fu, Wenqi Lou, Cheng Tang, Hongbing Wen, Yunji Qin, Lei Gong, Chao Wang, Xuehai Zhou:
UniCoS: A Unified Neural and Accelerator Co-Search Framework for CNNs and ViTs. 1-6 - Fanliang Hu, Jian Shen, Haoyu Ma, Qingming Jonathan Wu:
Cross-Attention for AES Mode Variation in Side-Channel Analysis. 1-7 - Mohamed Alsharkawy, Jan Zwerschke, Hassan Nassar, Jeferson González-Gómez
Late Breaking Results: The Hidden Risks of Activation Duration in PLPUFs. 1-2 - Yifei Zhou, Xuchu Huang, Chenyu Ni, Min Zhou, Zheyu Yan, Xunzhao Yin, Cheng Zhuo:
FactorHD: A Hyperdimensional Computing Model for Multi-Object Multi-Class Representation and Factorization. 1-7 - Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Anthony Agnesina, Rongjian Liang, Yuan-Hsiang Lu, Haoxing Ren, Sung Kyu Lim:
DCO-3D: Differentiable Congestion Optimization in 3D ICs. 1-7 - Su Zheng, Xiaoxiao Liang, Ziyang Yu, Yuzhe Ma, Bei Yu, Martin D. F. Wong:
Curvilinear Optical Proximity Correction via Cardinal Spline. 1-7 - Yu Qian, Xianmin Huang, Ranran Wang, Zeyu Yang, Min Zhou, Thomas Kämpfe, Cheng Zhuo, Xunzhao Yin:
Device-Algorithm Co-Design of Ferroelectric Compute-in-Memory In-Situ Annealer for Combinatorial Optimization Problems. 1-7 - Mohammad Arman Soleimani, Nezam Rohbani, Adrián Cristal Kestelman, Osman S. Unsal, Hamid Sarbazi-Azad:
WISEDRAM: A Reliable Bitwise In-DRAM Accelerator. 1-7 - Rui Liu
CIM-BLAS: Computing-in-Memory Accelerator for BLAS. 1-7 - Yingbo Hao, Huangxu Chen, Yi Zou, Yanfeng Yang:
An Algorithm-Hardware Co-design Based on Revised Microscaling Format Quantization for Accelerating Large Language Models. 1-7 - Mishal Fatima Minhas, Rachmad Vidya Wicaksana Putra, Falah Awwad, Osman Hasan, Muhammad Shafique:
Replay4NCL: An Efficient Memory Replay-based Methodology for Neuromorphic Continual Learning in Embedded AI Systems. 1-7 - Yunqi Shi, Xi Lin, Siyuan Xu, Shixiong Kai, Ke Xue, Mingxuan Yuan, Chao Qian, Zhi-Hua Zhou:
ReMaP: Macro Placement by Recursively Prototyping and Periphery-Guided Relocating. 1-7 - Zhichun Li, Jun Zhou, Xueqi Li, Ninghui Sun:
BlockPIM: Optimizing Memory Management for PIM-enabled Long-Context LLM Inference. 1-7 - Zhou Jin, Jing Li, Jian Xin, Tianjia Zhou, Xiao Wu, Dan Niu, Zuochang Ye:
PiSPICE: Accelerating Post-Layout SPICE Simulation via Essential Parasitic Identification. 1-7 - Yuxuan Zhao, Peiyu Liao, Bei Yu:
3D-Flow: Flow-based Standard Cell Legalization for 3D ICs. 1-7 - Dylan Leothaud, Jean-Michel Gorius, Simon Rokicki, Steven Derrien:
Optimizing Recovery Logic in Speculative High-Level Synthesis. 1-7 - Jiho Shin, Hoeseok Yang, Youngmin Yi:
Grasp: Group-based Prediction of Activation Sparsity for Fast LLM Inference. 1-7 - Runzhou Zhang, Faxian Sun, Yiming Wang, Kunchen Zou, Zhinan Qin, Jianli Chen, Jun Yu, Kun Wang:
Blaze: An Efficient Bit-Sparse Attention Architecture With Workload Orchestration Optimization. 1-7 - Shang Liu, Jing Wang, Wenji Fang, Zhiyao Xie:
SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits. 1-7 - Hao-Hsiang Hsiao, Sudipto Kundu, Wei Zeng, Wei-Ting Chan, Deyuan Guo, Sung Kyu Lim:
InsightAlign: A Transferable Physical Design Recipe Recommender Based on Design Insights. 1-7 - Zhaoying Li, Dan Wu, Dhananjaya Wijerathne, Dan Chen, Huize Li, Cheng Tan, Tulika Mitra:
Rewire: Advancing CGRA Mapping Through a Consolidated Routing Paradigm. 1-7 - Hyunwuk Lee, Sungbin Kim, Sungwoo Kim, Won Woo Ro:
CVMAX: Accelerator Architecture with Polar Form Multiplication for Complex-Valued Neural Networks. 1-7 - Mingyang Kou, Weiqing Ji, Shouyi Yin, Hailong Yao:
GPS: GNN-Based Two-Stage Pre-Scheduling Loop Mapping Method on CGRAs. 1-7 - Zihan Zou, Shikuang Chen, Chen Zhang
OutlierCIM: Outlier-Aware Digital CIM-Based LLM Accelerator with Hybrid-Strategy Quantization and Unified FP-INT Computation. 1-7 - Ziang Yin, Yu Yao, Jeff Zhang, Jiaqi Gu:
CHORD: Composable Hybrid Optical Reconfigurable Diffractive Framework For Optical Neural Network. 1-7 - Jie Zhou, Youshu Ji, Ning Wang, Yuchen Hu, Xinyao Jiao, Bingkun Yao, Xinwei Fang, Shuai Zhao, Nan Guan, Zhe Jiang:
Insights from Rights and Wrongs: A Large Language Model for Solving Assertion Failures in RTL Design. 1-7 - Ning Lin, Yi Li, Yangu He, Songqi Wang, Hegan Chen, Kwunhang Wong, Chuxin Li, Jichang Yang, Yifei Yu, Meng Xu, Yongkang Han, Rui Chen, Xiaoming Chen, Xiaoxin Xu, Jianguo Yang, Dashan Shang, Zhongrui Wang:
Re4PUF: A Reliable, Reconfigurable ReRAM-based PUF Resilient to DNN and Side Channel Attacks. 1-7 - Shuzhang Zhong, Yanfan Sun, Ling Liang, Runsheng Wang, Ru Huang, Meng Li:
HybriMoE: Hybrid CPU-GPU Scheduling and Cache Management for Efficient MoE Inference. 1-7 - Yingjie Qi, Jianlei Yang, Yiou Wang, Yikun Wang, Dayu Wang, Ling Tang, Cenlin Duan, Xiaolin He, Weisheng Zhao:
CIMFlow: An Integrated Framework for Systematic Design and Evaluation of Digital CIM Architectures. 1-7 - Raghu Prabhakar, Pushkar Nandkar, Darshan Gandhi
Invited: SambaNova SN40L: Unleashing Agentic AI with Dataflow. 1-5 - Xianhao He, Haotian Wang, Jiapeng Zhang, Wangdong Yang, Anthony Theodore Chronopoulos, Kenli Li:
An Input-Aware Sparse Tensor Compiler Empowered by Vectorized Acceleration. 1-7 - Yiyang Sun, Qinzhe Zhi, Yiqi Jing, Le Ye, Ru Huang, Tianyu Jia:
Local-GS: An Order-Independent Gaussian Splatting Training Accelerator Exploiting Splat Locality. 1-7 - Tianyao Chu, Siwei Tan, Liqiang Lu, Jingwen Leng, Fangxin Liu, Congliang Lang, Yifan Guo, Jianwei Yin:
ArbiterQ: Improving QNN Convergency and Accuracy by Applying Personalized Model on Heterogeneous Quantum Devices. 1-7 - Ruiyang Chen, Xueyuan Liu, Chunyu Qi, Yuanzheng Yao, Yanan Sun, Xiaoyao Liang, Zhuoran Song:
SAGA: A Memory-Efficient Accelerator for GANN Construction via Harnessing Vertex Similarity. 1-7 - Shuohao Ping, Wan-Hsuan Lin, Daniel Bochen Tan, Jason Cong:
Assessing Quantum Layout Synthesis Tools via Known Optimal-SWAP Cost Benchmarks. 1-7 - Seung Jin Yang, Hyuk-Jae Lee, Chae-Eun Rhee:
Hybrid Embedding Framework for Memory-Efficient Recommendation Systems. 1-7 - Gabriel P. L. M. Fernandes, Matheus S. Fonseca, Amanda G. Valério, Nicolás A. C. Carpio, João Marcus Epifânio Morais de Assunção, Rafael Vidal Aroca, Celso Jorge Villas-Bôas, Dario Sassi Thober:
Invited paper: Enhancing Design Automation with Quantum Algorithms for Chip Design. 1-5 - Chen Chen, Guangyu Hu, Cunxi Yu, Yuzhe Ma, Hongce Zhang:
E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis. 1-7 - Hyeonwoo Park, Seonghyeon Park, Seokhyeong Kang:
Late Breaking Results: Fine-Tuning LLMs for Test Stimuli Generation. 1-2 - Lizhou Wu, Haozhe Zhu, Siqi He, Xuanda Lin, Xiaoyang Zeng, Chixiao Chen:
PIMoE: Towards Efficient MoE Transformer Deployment on NPU-PIM System through Throttle-Aware Task Offloading. 1-7 - Huichuan Zheng, Yuqing Xiong, Jian Zuo, Hao Zhang, Zhenge Jia, Mengying Zhao:
Routability-aware Packing for High-density Nonvolatile FPGAs. 1-7 - Jinglei Cheng, Yuchen Zhu, Yidong Zhou, Hang Ren, Zhixin Song, Zhiding Liang:
EPOC: An Efficient Pulse Generation Framework with Advanced Synthesis for Quantum Circuits. 1-7 - Mingjun Wang, Bin Sun, Jianan Mu, Feng Gu, Boyu Han, Tianmeng Yang, Xinyu Zhang, Silin Liu, Yihan Wen, Hui Wang, Jun Gao, Zhiteng Chao, Husheng Han, Zizhen Liu, Shengwen Liang, Jing Ye, Bei Yu, Xiaowei Li, Huawei Li:
MOSS: Multi-Modal Representation Learning on Sequential Circuits. 1-7 - Ning Lin, Yi Li, Jiankun Li, Jichang Yang, Yangu He, Yukui Luo, Dashan Shang, Xiaoming Chen, Xiaojuan Qi, Zhongrui Wang:
Guarder: A Stable and Lightweight Reconfigurable RRAM-based PIM Accelerator for DNN IP Protection. 1-7 - Youwei Xiao, Fan Cui, Zizhang Luo, Weijie Peng, Yun Liang:
Cayman: Custom Accelerator Generation with Control Flow and Data Access Optimization. 1-7 - Tongjing Wu, Xiaolu Hu, Tong Li, Siting Liu, Hui Wang, Weifeng He, Zhigang Mao, Honglan Jiang:
EPIC: Error PredIction and Correction for Power-Efficient Voltage Underscaling Multiply-Accumulate Unit. 1-7 - Shuqi Wang, Zhengwu Liu, Chenchen Ding, Chen Zhang, Taiqiang Wu, Jiajun Zhou, Ngai Wong:
NoiseZO: RRAM Noise-Driven Zeroth-Order Optimization for Efficient Forward-Only Training. 1-7 - Yimeng Xiao, Archit Gajjar, Aydin Aysu, Paul Franzon:
Exploiting Power Side-Channel Vulnerabilities in XGBoost Accelerator. 1-7 - Yongjeong Lee, Seungsoo Lee, Jeongyeol Kim, Jungyun Choi, Zhaojie Li, Dehuang Wu, Joddy Wang:
Accelerating design-technology co-development using neural compact modeling and data-driven SPICE simulation. 1-6 - Kaining Zhou, Jian Huang, Nam Sung Kim, Naresh Shanbhag:
A Full-system, Programmable, and Extensible In-Memory Computing Simulation Framework for Deep Learning. 1-7 - Chih-Yu Hu, Chi-Tse Huang, Hao-Wei Chiang, Hsiang-Yun Cheng, Po-Hao Tseng, Ming-Hsiu Lee, An-Yeu Andy Wu:
Energy-Efficient Large-Scale Vector Similarity Search in NAND-Flash via Hybrid Matching. 1-7 - Yu-Chan Keng, Yu-Chun Pai, Wen-Hao Liu, Haoxing Ren, Danny Liu, Rongjian Liang, Mark Ho, Anthony Agnesina, Yih-Lang Li:
Reinforcement Learning-Driven Window Selection for Enhanced Window-Based Rip-up and Reroute in Chip Detailed Routing. 1-7 - Zhe Jiang, Sam Ainsworth, Timothy M. Jones:
FireGuard: A Generalized Microarchitecture for Fine-Grained Security Analysis on OoO Superscalar Cores. i-vii - Yifang Zhao, Weimin Fu, Shijie Li, Yi-Xiang Hu
Hardware Generation with High Flexibility using Reinforcement Learning Enhanced LLMs. 1-7 - Hajar Falahati, Negin Mahani, Adrián Cristal, Osman S. Unsal:
VISTA: Optimizing GPU Scheduling through Versatile Locality-Aware Data Sharing. 1-7 - Linye Wei, Shuzhang Zhong, Songqiang Xu, Runsheng Wang, Ru Huang, Meng Li:
SpecASR: Accelerating LLM-based Automatic Speech Recognition via Speculative Decoding. 1-7 - Bohao Li
H3Match: A Hybrid Heterogeneous Hypergraph Matching Method for Subcircuit Identification. 1-7 - Zhengzhe Zheng, Yinuo Wu, Keyu Peng, Chao Wang, Ziran Zhu:
Comprehensive Placement and Routing Framework with Guaranteed In-Cell Routability for Synthesizing Complementary-FET Cells. 1-6 - Yuyang Ye, Xiangfei Hu, Yuchen Liu, Peng Xu, Yu Gong, Tinghuan Chen, Hao Yan, Bei Yu, Longxing Shi:
Rank-based Multi-objective Approximate Logic Synthesis via Monte Carlo Tree Search. 1-7 - Zijian Zhou, Min Tang, Liang Chen:
ASRR-PINN: Adaptive Sub-Regional Random Resampling-Based PINN for Thermal Analysis of 3D-ICs. 1-7 - Yunkun Lin, Mingye Li, Sandeep Gupta:
Asymmetric Predictive Testing for Aging in SRAMs. 1-7 - Rebecca Pelke, Nils Bosbach, Lennart M. Reimann, Rainer Leupers:
Introducing Instruction-Accurate Simulators for Performance Estimation of Autotuning Workloads. 1-7 - Youngjun Park, Sangyeon Kim, Yeonggeon Kim, Gisan Ji, Sungju Ryu:
RADiT: Redundancy-Aware Diffusion Transformer Acceleration Leveraging Timestep Similarity. 1-7 - Jongwoo Park, Hyeonseong Kim, Jiyun Han, Seungkyu Choi:
Precon: A Precision-Convertible Architecture for Accelerating Quantized Deep Learning Models across Various Domains Including LLMs. 1-7 - Said Hamdioui, Mottaqiallah Taouil:
Device-Aware Test: A Means to Attack Unmodelled Defects (Invited). 1-4 - Byungkuk Yoon, Sanghyeok Han, Gyeonghwan Park, Jae-Joon Kim:
SplitSync: Bank Group-Level Split-Synchronization for High-Performance DRAM PIM. 1-7 - Alessandro Luongo, Antonio Michele Miti
Measurement-based uncomputation of quantum circuits for modular arithmetic. 1-7 - Cheng-Yen Li, Chuan-Chi Su, Zheng-Wei Chen, Shao-Hsiang Chen, Yao-Wen Chang:
Late Breaking Results: Multi-Objective Multi-Bit Flip-Flop Placement Considering Pre-Placed Cells. 1-2 - Shuo Chen, Zeshi Liu
Maximizing Energy Efficiency in Spiking Neural Networks: A Dynamic Joint Pruning Framework. 1-7 - Siyuan Liang, Yushen Zhang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho:
AutoRE: Bayesian-Optimization-based Automatic Reliability Enhancement Tool for Flow-based Microfluidic Biochips. 1-7 - Tilmann Bihler, Daniel Blankenburg:
Dynamic Local Usage: An Accurate Model for Usage of Tile-Internal Wiring in Global Routing. 1-6 - Yihe Yu, Bo Li, Kexin Huang, Wei Liu, Jinghai Wang, Yue Liu, Zhiyi Yu, Shanlin Xiao:
Towards In-Situ Neuromorphic Computing Architecture for Event Stream Super-Resolution. 1-7 - Guangda Liu, Chengwei Li, Jieru Zhao, Chenqi Zhang, Minyi Guo:
ClusterKV: Manipulating LLM KV Cache in Semantic Space for Recallable Compression. 1-7 - Chien-Hao Tsou, Zhu-Xun Lee, Yao-Wen Chang:
Late Breaking Results: Advanced PCB Placement with Irregular Components for Efficient Collision Detection and Routability Optimization. 1-2 - Kan Wu, Zejia Lin, Mengyue Xi, Zhongchun Zheng, Wenxuan Pan, Xianwei Zhang, Yutong Lu:
GoPTX: Fine-grained GPU Kernel Fusion by PTX-level Instruction Flow Weaving. 1-7 - Liyan Chen, Dongxu Lyu, Zhenyu Li, Jianfei Jiang, Qin Wang, Zhigang Mao, Naifeng Jing:
AttenPIM: Accelerating LLM Attention with Dual-mode GEMV in Processing-in-Memory. 1-7 - Junghyun Yoon, Heechun Park:
Mitigating Routability Problems in Complementary-FET-based VLSI Designs. 1-7 - Jingyuan Li, Jianrong Zhang
LEMOE: LLM-Enhanced Multi-Objective Bayesian Optimization for Microarchitecture Exploration. 1-7 - Gang Wang, Siqi Cai, Zhenyu Li, Wenjie Li, Dongxu Lyu, Yanan Sun, Jianfei Jiang, Guanghui He:
BitPattern: Enabling Efficient Bit-Serial Acceleration of Deep Neural Networks through Bit-Pattern Pruning. 1-7 - Guowei Sun, Lin Chen, Qiming Huang, Hu Ding:
To Tackle Cost-Skew Tradeoff: An Adaptive Learning Approach for Hub Node Selection. 1-7 - Haiyan Qin, Jing Kou, Liang Zhang, Wang Kang, Wei W. Xing:
Multi-Agent Yield Analysis For Circuit Design. 1-7 - Yonghao Chen, Jiaxiang Zou, Xinyu Chen:
April: Accuracy-Improved Floating-Point Approximation For Neural Network Accelerators. 1-7 - Xiangchen Meng, Yan Tan, Zijun Jiang, Yangdi Lyu:
An Enhanced Data Packing Method for General Matrix Multiplication in Brakerski/Fan-Vercauteren Scheme. 1-7 - Chaoqun Yang, Ran Chen, Muyang Zhang, Weiguang Pang, Yuzhi Chen, Rongtao Xu, Kexue Fu, Changwei Wang, Longxiang Gao:
AASD: Accelerate Inference by Aligning Speculative Decoding in Multimodal Large Language Models. 1-7 - Xinya Luan, Zhe Lin, Kai Shi, Jianwang Zhai, Kang Zhao:
HeteroSVD: Efficient SVD Accelerator on Versal ACAP with Algorithm-Hardware Co-Design. 1-7 - Nimish Mishra, Kislay Arya, Sarani Bhattacharya, Paritosh Saxena, Debdeep Mukhopadhyay:
"OOPS!": Out-Of-Band Remote Power Side-Channel Attacks on Intel SGX and TDX. 1-7 - Xin Zhang, Yi Yang, Jiajun Zou, Qingni Shen, Zhi Zhang
AmpereBleed: Exploiting On-chip Current Sensors for Circuit-Free Attacks on ARM-FPGA SoCs. 1-7 - Jun Li, Zhibing Sha, Fan Yang, Xiaofei Xu
FineRR-ZNS: Enabling Fine-Granularity Read Refreshing for ZNS SSDs. 1-7 - Hao-Yu Wu, Hsin-Tzu Chang, Shiuan-Yun Ding, Iris Hui-Ru Jiang, Benson Tsao, Vinson Wu, Wei-Kai Shih:
Generative Model Based Standard Cell Timing Library Characterization. 1-7 - Rakin Muhammad Shadab
AutoSkewBMT: Autonomously Synthesizing Optimized Integrity Authentication Mechanism for DNN Accelerators. 1-7 - Lucas Deutschmann, Andres Meza, Dominik Stoffel, Wolfgang Kunz, Ryan Kastner:
FastPath: A Hybrid Approach for Efficient Hardware Security Verification. 1-7 - Stephan Held, Edgar Perner:
Cost-Distance Steiner Trees for Timing-Constrained Global Routing. 1-6 - Zhirui Huang, Shiwei Liu, Haozhe Zhu, Qi Liu, Chixiao Chen:
DRAFT: Decoupling Backpropagation from Pre-trained Backbone for Efficient Transformer Fine-Tuning on Edge. 1-7 - Yunxiang Zhang, Gengchen Sun, Lizhi Fang, Biao Sun, Wenfeng Zhao:
NN-AdderNet: Nonnegative and Sparse Weight Optimization Towards Ultra-Low Bitwidth AdderNet Quantization and Compression. 1-7 - Yunlang Cai, Hanxue Shi, Xiaohang Wang, Haoting Shen, Li Lu, Kui Ren:
On Bit-level Reverse Engineering of Vehicular CAN Bus. 1-7 - Min Gyu Park
BS-PDN-Last: Towards Optimal Power Delivery Network Design With Multifunctional Backside Metal Layers. 1-7 - Zihan Li
Resilient Federated Learning on Embedded Devices with Constrained Network Connectivity. 1-7 - C. Rohin Menon, Jayanth Balasubramanian, E. Akshay Kumar, Annapurna Valiveti, Chester Rebeiro, Janakiraman Viraraghavan:
GLiTCH: GLiTCH induced Transitions for Secure Crypto-Hardware. 1-7 - Zhijian Hao, Jiaming Liu, Chenlong He, Qi Zheng, Shushi Chen, Jinchang Xu, Yue Hao, Xiao Yan, Xiaohua Ma:
A High-Precision and Low-Cost Approximate Transform Accelerator for Video Coding. 1-7 - Sixu Li, Ben Keller, Yingyan Celine Lin, Brucek Khailany:
GauRast: Enhancing GPU Triangle Rasterizers to Accelerate 3D Gaussian Splatting. 1-7 - B. Vinodh Kumar, Binsu J. Kailath:
Late Breaking Results: Versatile 4:1 Multiplexer Using 1T1R RRAM Crossbar for High Speed In-Memory Computing. 1-2 - Jason Han, Nicholas S. DiBrita, Younghyun Cho, Hengrui Luo, Tirthak Patel:
EnQode: Fast Amplitude Embedding for Quantum Machine Learning Using Classical Data. 1-7 - Chih-Chun Chang, Tsung-Wei Huang:
Late Breaking Results: Statistical Timing Graph Scheduling Algorithm for GPU Computation. 1-2 - Wei Xuan, Zhongrui Wang, Lang Feng, Ning Lin, Zihao Xuan, Rongliang Fu, Tsung-Yi Ho, Yuzhong Jiao, Luhong Liang:
SeDA: Secure and Efficient DNN Accelerators with Hardware/Software Synergy. 1-7 - Yixuan Liu
CXL-ECC: an Efficient LRC-based on-CXL-Memory-eXpander-Controller ECC to Enhance Reliability and Performance of DRAM Error Correction. 1-7 - Siqi He, Haozhe Zhu, Jiapei Zheng, Lizhou Wu, Bo Jiao, Qi Liu, Xiaoyang Zeng, Chixiao Chen:
Hydra: Harnessing Expert Popularity for Efficient Mixture-of-Expert Inference on Chiplet System. 1-7 - Magi Chen, Ting-Chi Wang:
GPart: A GNN-Enabled Multilevel Graph Partitioner. 1-7 - Jing Kou, Zidong Chen, Liang Zhang, Haiyan Qin, Wang Kang, Wei W. Xing:
Accuracy Is Not Always We Need: Precision-Aware Bayesian Yield Optimization. 1-7 - Shuai Zhou, Huinan Tian, Sisi Meng, Jianli Chen, Jun Yu, Kun Wang:
XShift: FPGA-efficient Binarized LLM with Joint Quantization and Sparsification. 1-7 - Rui Xu, Junqi Yang, Haoxiang Jiang, Ming Fang:
SSDL-ILT: Efficient ILT utilizing a self-supervised deep learning model. 1-6 - Shuai Yuan, Angxin Cai, Qiushi Lin, Guoxing Wang, Yu Wang, Zhenhua Zhu, Yanan Sun:
HPIM-NoC: A Priori-Knowledge-Based Optimization Framework for Heterogeneous PIM-Based NoCs. 1-7 - Sean Fuhrman, Onat Güngör, Tajana Rosing:
CND-IDS: Continual Novelty Detection for Intrusion Detection Systems. 1-7 - Chenyi Tan, Yangfeng Su, Fan Yang, Xuan Zeng:
New Time-Domain Preconditioners for HB Jacobian of RF Circuits. 1-7 - Sangho Lee, Jueun Jung, Wuyoung Jang, Jihyeon Hwang, Kyuho Lee:
BEVSA: A Real-Time Bird's-Eye-View Semantic Segmentation Accelerator for Multi-Camera System. 1-7 - Yuanchun Guo, Bingyan Liu, Yulong Sha, Zhensheng Xian:
PracMHBench: Re-evaluating Model-Heterogeneous Federated Learning Based on Practical Edge Device Constraints. 1-7 - Lillian Tadros:
Automated Generation of Decoders for Irregular Instruction Sets Using Information-Theoretic Decision Tree Construction Algorithms. 1-7 - Lehuan Zhang, Shikai Guo, Zixuan Wang, Xiaoyu Wang, Xiaochen Li, He Jiang:
Live Region Mutation Testing for Commercial Cyber-Physical System Development Tool Chain. 1-7 - Yihao Chen, Pengcheng Feng, Zhigang Li, Gang Chen, Rongxuan Shen, Huaxiang Lu, Xiaoxin Xu:
A PulseWidth-IN-PulseWidth-Out Universal Nonlinear Processing Element for Time-Domain In-Memory Computing Systems. 1-6 - Ruyi Ding, Tianhong Xu, Aidong Adam Ding, Yunsi Fei:
Graph in the Vault: Protecting Edge GNN Inference with Trusted Execution Environment. 1-7 - Jiawei Hu, Pruek Vanna-Iampikul, Zhen Zhuang, Tsung-Yi Ho, Sung Kyu Lim:
GNN-MLS: Signal Routing in Mixed-Node 3D ICs through GNN-Assisted Metal Layer Sharing. 1-7 - Yiwen Wu, Yuyang Chen, Shuo Yin, Nan Wang, Tao Wu, Xuming He, Hao Geng, Jingyi Yu:
LVM-MO: A Large Vision Model Pioneer on Full-Chip Mask Optimization. 1-7 - Jongho Yoon, Jinsung Jeon, Seokhyeong Kang:
Late Breaking Results: A Geometric Diffusion Model for Macro Placement Generation. 1-2 - Lei Xu, Chen Yin, Zelong Yuan, Weiguang Sheng, Jianfei Jiang, Qin Wang, Naifeng Jing:
Principle-based Dataflow Optimization for Communication Lower Bound in Operator-Fused Tensor Accelerator. 1-7 - Chi-Tse Huang, Jen-Chieh Wang, Hsiang-Yun Cheng, An-Yeu Andy Wu:
Segmented Angular Pre-Processing for Accurate and Efficient In-Memory Vector Similarity Search. 1-7 - Chun-Chien Liu, Chun-Feng Wu, Yunho Jin:
UPVSS: Jointly Managing Vector Similarity Search with Near-Memory Processing Systems. 1-7 - Kaiwen Zhou
DyREM: Dynamically Mitigating Quantum Readout Error with Embedded Accelerator. 1-7 - Jinao Li, Teng Wang, Qianyu Cheng, Zhendong Zheng, Lei Gong, Chao Wang, Xi Li, Xuehai Zhou:
Late Breaking Results: A Fast Nearest Neighbor Search Acceleration for 3D Point Cloud. 1-2 - Jiaxian Chen, Yuxuan Qi, Yongbiao Zhu, Jianan Yuan, Kaoyi Sun, Tianyu Wang, Chenlin Ma, Yi Wang:
Anchor First, Accelerate Next: Revolutionizing GNNs with PIM by Harnessing Stationary Data. 1-7 - Kai Shi, Zhe Lin, Xinya Luan, Jianwang Zhai, Kang Zhao:
VSpGEMM: Exploiting Versal ACAP for High-Performance SpGEMM Acceleration. 1-7 - Cheng-Yu Chiang, Zong-Ying Cai, Chao-Chi Lan, Yan-Jen Chen, Yang Hsu, Yao-Wen Chang, Hung-Ming Chen:
Late Breaking Results: Scalable GPU-Friendly Parallelization for Sweep-Based Maze Routing. 1-2 - Dong Huang, Bo Ding, Wei Tong, Dan Feng:
SuperCopyback: Revisiting Copyback on Modern High-Performance NAND Flash-based SSDs. 1-7 - Xun Jiang, Haoran Lu, Yuxuan Zhao, Jiarui Wang, Zizheng Guo, Heng Wu, Bei Yu, Sung Kyu Lim, Runsheng Wang, Ru Huang, Yibo Lin:
A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis. 1-7 - Charlie Campbell, Hao Mark Chen, Wayne Luk, Hongxiang Fan:
Enhancing LLM-based Quantum Code Generation with Multi-Agent Optimization and Quantum Error Correction. 1-7 - Akshara Ravi, Vivek Chaturvedi, Muhammad Shafique:
ADVeRL-ELF: ADVersarial ELF Malware Generation using Reinforcement Learning. 1-7 - Lewei He, Ning Lin, Binbin Cui, Xinran Zhang, Shiming Zhang, Zhongrui Wang:
DANN: Diffractive Acoustic Neural Network for in-sensor computing system target at multi-biomarker diagnosis. 1-7 - Faeze S. Banitaba, Amir Hossein Jalilvand, M. Hassan Najafi, Sercan Aygun:
Comparison-Free Bit-Stream Generation for Cost-Efficient Unary Computing. 1-7 - Min-Hung Chen, Cheng-Yen Li, Chuan-Chi Su, Yao-Wen Chang, Tung-Chieh Chen:
Late Breaking Results: Warpage-Aware Generative Floorplanning for Reliable Advanced Packaging. 1-2 - Jiawei Liang
AutoClock: Automated Clock Management for Power-Efficient HLS Designs on FPGAs. 1-7 - Bingkun Yao, Mun Choon Chan, Hong Gao, Zhe Jiang, Nan Guan:
Age-of-Information Minimization for Data Aggregation in Energy-Harvesting IoTs. 1-7 - Zhenyu Li, Dongxu Lyu, Gang Wang, Yuzhou Chen, Liyan Chen, Wenjie Li, Jianfei Jiang, Yanan Sun, Guanghui He:
KVO-LLM: Boosting Long-Context Generation Throughput for Batched LLM Inference. 1-7 - Lu Chen, Dingyi Zhao, Zihao Yu, Ninghui Sun, Yungang Bao:
GSIM: Accelerating RTL Simulation for Large-Scale Designs. 1-7 - Manaar Alam, Hithem Lamri, Michail Maniatakos:
ReVeil: Unconstrained Concealed Backdoor Attack on Deep Neural Networks using Machine Unlearning. 1-7 - Lijie Zeng, Jiatai Sun, Xiao Wu, Dan Niu, Tianshi Wang, Yibo Lin, Zuochang Ye, Zhou Jin:
G-SpNN: GPU-Accelerated Passivity Enforcement for S-Parameter Modeling with Neural Networks. 1-7 - Hang Liu, Hao Geng, Zhuolun He, Qi Sun, Cheng Zhuo:
Swift or Exact? Boosting Efficient Microarchitecture DSE via Multi-fidelity Partial Order Prediction. 1-7 - Yuncheng Lu, Shuang Liang, Hongxiang Fan, Ce Guo, Wayne Luk, Paul H. J. Kelly:
Versatile Cross-platform Compilation Toolchain for Schrödinger-style Quantum Circuit Simulation. 1-7 - Matheus T. Moreira, Aram H. Markosyan, Chris Cummins, Warren Hunt, Gabriel Synnaeve, Edith Beigné:
LLMs: A Driving Force in Next Generation Digital Design Automation. 1-6 - Sanghyeok Han, Byungkuk Yoon, Gyeonghwan Park, Choungki Song, Dongkyun Kim, Jae-Joon Kim:
Near-Memory LLM Inference Processor based on 3D DRAM-to-logic Hybrid Bonding. 1-7 - Yu-Che Lee, Yu-Hsuan Chen, Yu-Chen Cheng, Yong-Fong Chang, Jia-Wei Lin, Hsun-Wei Pao, Yung-Chih Chen, Yi-Ting Li, Wuqian Tang, Shih-Chieh Chang, Chun-Yao Wang:
Real-Time Dynamic IR-drop Prediction for IR ECO. 1-7 - Yutao Fu, Zhongtian Long
PairGraph: An Efficient Search-space-aware Accelerator for High-performance Concurrent Pairwise Queries. 1-7 - Shambhavi Balamuthu Sampath, Sami Sawani, Moritz Thoma, Lukas Frickenstein, Pierpaolo Morì, Nael Fasfous, Manoj Rohit Vemparala, Alexander Frickenstein, Ulf Schlichtmann, Claudio Passerone, Walter Stechele:
LA-MTL: Latency-Aware Automated Multi-Task Learning. 1-7 - Tanzim Mahfuz, Sudipta Paria, Tasneem Suha, Swarup Bhunia, Prabuddha Chakraborty:
POLARIS: Explainable Artificial Intelligence for Mitigating Power Side-Channel Leakage. 1-7 - Laura S. Herzog
Joint Cutting for Hybrid Schrödinger-Feynman Simulation of Quantum Circuits. 1-7 - Emad Haque, Pragnya Sudershan Nalla, Chetal Choppali Sudarshan, Divya Yogi, Hangyu Zhang, Chaitali Chakrabarti, Vidya A. Chhabria, Ramesh Harjani, Jeff Zhang, Sachin S. Sapatnekar:
Invited: EDA for Heterogeneous Integration. 1-4 - Xinhao Yang, Tianchen Zhao, Hongyi Wang, Wenheng Ma, Shulin Zeng, Zhenhua Zhu, Xuefei Ning, Huazhong Yang, Yu Wang:
PARO: Hardware-Software Co-design with Pattern-aware Reorder-based Attention Quantization in Video Generation Models. 1-7 - Yao Chen, Feng Yu, Di Wu, Weng-Fai Wong, Bingsheng He:
Configurable DSP-Based CAM Architecture for Data-Intensive Applications on FPGAs. 1-7 - Chenqi Zhang, Yu Feng, Jieru Zhao, Guangda Liu, Wenchao Ding, Chentao Wu, Minyi Guo:
STREAMINGGS: Voxel-Based Streaming 3D Gaussian Splatting with Memory Optimization and Architectural Support. 1-7 - Faaiq Waqar, Jiahao Zhang, Anni Lu, Zifan He, Jason Cong, Shimeng Yu:
Monolithic 3D FPGA Design and Synthesis with Back-End-of-Line Configuration Memories. 1-7 - Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst:
DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators. 1-7 - Shunyu Mao, Jiajun Luo, Yixin Li, Jiapeng Zhou, Weidong Zhang, Zheng Liu, Teng Ma, Shuwen Deng:
CXL-INTERPLAY: Unraveling and Characterizing CXL Interference in Modern Computer Systems. 1-7 - Seohyun Kim
Late Breaking Results: A Diffusion-Based Framework for Configurable and Realistic Multi-Storage Trace Generation. 1-2 - Chenxi Li, Yihang Feng, Fuxing Deng, Dingwen Tao, Weifeng Liu, Zhou Jin:
MemSens: Significantly Reducing Memory Overhead in Adjoint Sensitivity Analysis Using Novel Error-Bounded Lossy Compression. 1-7 - Sungheon Jeon, Hamza Errahmouni Barkam, Hyunwoo Oh, Hanning Chen, Tamoghno Das, Zhen Ye, Mohsen Imani:
iTaskSense: Task-Oriented Object Detection in Resource-Constrained Environments. 1-7 - Yi-Chen Lu, Zhizheng Guo, Kishor Kunal, Rongjian Liang, Haoxing Ren:
INSTA: An Ultra-Fast, Differentiable, Statistical Static Timing Analysis Engine for Industrial Physical Design Applications. 1-7 - Yuanzheng Yao, Chen Zhang, Chunyu Qi, Ruiyang Chen, Jun Wang, Zhihui Fu, Naifeng Jing, Xiaoyao Liang, Zhuoran Song:
SynGPU: Synergizing CUDA and Bit-Serial Tensor Cores for Vision Transformer Acceleration on GPU. 1-7 - Shengbo Tong
BlasPart: A Deterministic Parallel Partitioner for Balanced Large-Scale Hypergraph Partitioning. 1-7 - Lihao Liu, Beisi Lu, Yunhui Li, Li Shang, Fan Yang:
GTN-Path: Efficient Path Timing Prediction through Waveform Propagation with Graph Transformer. 1-7 - Jintao Li, Haochang Zhi, Jiang Xiao, Keren Zhu, Yun Li:
Decoupling Analog Circuit Representation from Technology for Behavior-Centric Optimization. 1-7 - Kai Jing, Tao Bai, Zeyuan Deng, Junming Jiao, Peng Cao:
Late Breaking Results: BLAST: Bisection-Free Learning Approach for Statistical Timing Characterization. 1-2 - Haoyan Dong, Hai-Bao Chen, Jingjing Chang, Yixin Yang, Ziyang Gao, Zhigang Ji, Runsheng Wang, Ru Huang:
DuQTTA: Dual Quantized Tensor-Train Adaptation with Decoupling Magnitude-Direction for Efficient Fine-Tuning of LLMs. 1-7 - Jinming Ma
Tropical: Enhancing SLO Attainment in Disaggregated LLM Serving via SLO-Aware Multiplexing. 1-7 - Zhuoquan Yu, Huidong Ji
DuoQ: A DSP Utilization-aware and Outlier-free Quantization for FPGA-based LLMs Acceleration. 1-7 - Jie Zhou, Youshu Ji, Ning Wang, Yuchen Hu, Xinyao Jiao, Bingkun Yao, Xinwei Fang, Shuai Zhao, Nan Guan, Zhe Jiang:
Insights from Rights and Wrongs: A Large Language Model for Solving Assertion Failures in RTL Design. 1-7 - Yifan Chen, Jing Mai, Zuodong Zhang, Yibo Lin:
RUPlace: Optimizing Routability via Unified Placement and Routing Formulation. 1-7 - Shaoqiang Lu, Xuliang Yu, Tiandong Zhao, Siyuan Miao, Xinsong Sheng, Chen Wu, Liang Zhao, Ting-Jung Lin, Lei He:
MambaOPU: An FPGA Overlay Processor for State-space-duality-based Mamba Models. 1-7 - Sangmin Jeon, Kangju Lee, Kyeongwon Lee, Woojoo Lee:
HH-PIM: Dynamic Optimization of Power and Performance with Heterogeneous-Hybrid PIM for Edge AI Devices. 1-7 - Chengkai Wang
Mr.TPL: A Method for Multi-Pin Net Router in Triple Patterning Lithography. 1-6 - Tong Xie, Jiawang Zhao, Zishen Wan, Zuodong Zhang, Yuan Wang, Runsheng Wang, Ru Huang, Meng Li:
ReaLM: Reliable and Efficient Large Language Model Inference with Statistical Algorithm-Based Fault Tolerance. 1-7 - Yoonyoung Kwon, Yunjong Boo, Hyungmin Cho:
GraphAccel: An In-Storage Accelerator for Efficient Graph-Based Vector Similarity Search Using Page Packing and Speculative Search Optimization. 1-7 - Dancheng Liu, Chenhui Xu, Jiajie Li, Amir Nassereldine, Jinjun Xiong:
Ensembler: Protect Collaborative Inference Privacy from Model Inversion Attack via Selective Ensemble. 1-7 - Ruofei Tang, Xuliang Zhu, Xinyi Zhang
EDGE: DBMS-Empowered Boolean Decomposition for GIG Synthesis. 1-7 - Longnv Xu, Meiqi Wang, Han Qiu, Jun Liu, Yuanjie Li, Hewu Li:
REMU: Memory-aware Radiation Emulation via Dual Addressing for In-orbit Deep Learning System. 1-7 - Yaoxiu Lian, Zhihong Gou, Yibo Han, Zhongming Yu, Jiaming Xu, Sheng Yuan, Zhilin Pei, Xingcheng Zhang, Ningyi Xu, Guohao Dai:
A Cross-model Fusion-aware Framework for Optimizing (gather-matmul-scatter)s Workload. 1-7 - Baharealsadat Parchamdar, Benjamin Carrión Schäfer:
ADVISOR: Approximate Computing-frienDly High-LeVel Synthesis DesIgn Space ExplORer. 1-7 - Changxu Liu, Hao Zhou, Lan Yang, Yifei Feng, Zheng Wu, Zhuoyuan Yang, Yinlong Li, Shiyong Wu, Fan Yang:
AcclMT: A Highly Resource-Efficient and Flexible Poseidon Hash-Based Merkle Tree Architecture. 1-7 - Dan Niu, Dekang Zhang, Yichao Cao, Zhou Jin, Chao Wang, Yichao Dong, Changyin Sun:
A Novel Image-Graph Heterogeneous Fusion Framework for Static IR Drop Prediction. 1-7 - Haiyang Zhou, Hongyang Hu, Jinshan Yue, Hanghang Gao, Yuanlu Xie, Xiaoxin Xu, Chunmeng Dou, Ming Liu:
An Energy-Efficient High-Utilization Hardware Architecture for Attention Mechanism in Transformer using Balanced Systolic Array and Multi-Row Interleaved Operation Ordering. 1-7 - Mohamed Alsharkawy, Eren Sönmez, Jeferson González-Gómez
Late Breaking Results: Decentralized Voting-Based Attestation for IoT Devices. 1-2 - Wen-Tse Chang, Chun-Feng Wu, Yun-Chen Lo:
P-DAC: Power-Efficient Photonic Accelerators for LLM Inference. 1-7 - Mengtian Yang, Yipeng Wang, Chieh-Pu Lo, Xiuhao Zhang, Sirish Oruganti, Jaydeep P. Kulkarni:
GSAcc: Accelerate 3D Gaussian Splatting via Depth Speculation and Gaussian-centric Rasterization. 1-7 - Filipe Azevedo, Nuno Lourenço, Ricardo Martins:
Late Breaking Results: Encoder-Decoder Generative Diffusion Transformer Towards Push-Button Analog IC Sizing. 1-2 - Shengle Lin
SSpMV: A Sparsity-aware SpMV Framework Empowered by Multimodal Machine Learning. 1-7 - Jiarui Wang, Yanjing Liu, Yibo Lin:
Synergistic Die-Level Router for Multi-FPGA System with Time-Division Multiplexing Optimization. 1-7 - Runzhen Xue, Hao Wu, Mingyu Yan, Ziheng Xiao, Xiaochun Ye, Dongrui Fan:
MetaDSE: A Few-shot Meta-learning Framework for Cross-workload CPU Design Space Exploration. 1-7 - Ziying Cui, Ke Chen, Bi Wu, Yu Gong, Chenggang Yan, Weiqiang Liu:
PreDAC: An Efficient Framework of Pre-Refining Enhanced Design Space Exploration for Approximate Computing. 1-7 - Shixiong Jiang, Weizhe Xu, Mengyu Liu, Fanxin Kong:
Query-Based Black-Box Stealthy Sensor Attacks on Cyber-Physical Systems. 1-6 - Xuyan Jiang, Wenwen Fu, Xiangrui Yang, Yingwen Chen, Wenfei Wu, Zhigang Sun:
Megabits Down to Kilobits: Memory-Efficient Time-Aware Shaping for TSN. 1-7 - Pouya Haghi, Ali Falahati, Zahra Azad, Chunshu Wu, Ruibing Song, Chuan Liu, Ang Li, Tong Geng:
DM-Tune: Quantizing Diffusion Models with Mixture-of-Gaussian Guided Noise Tuning. 1-7 - Shijian Chen, Yihang Qiu, Biwei Xie, Mingyu Chen, Xingquan Li:
A Fast, Iterative Clock Skew Scheduling Algorithm with Dynamic Sequential Graph Extraction. 1-7 - Seok Young Kim, Byung Ho Choi, Seokwon Kang, Yongjun Park, Seon Wook Kim:
Supporting Register-based Addressing Modes for in-DRAM PIM ISAs. 1-6 - Brian Udugama, Darshana Jayasinghe, Hassaan Saadat, Aleksandar Ignjatovic, Sri Parameswaran:
A Novel Covert Timing Channel for Cloud FPGAs. 1-7 - Haisheng Zheng, Haoyuan Wu, Zhuolun He:
ChatLS: Multimodal Retrieval-Augmented Generation and Chain-of-Thought for Logic Synthesis Script Customization. 1-7 - Jianfeng Gu, Hao Wang, Xiaorang Guo, Martin Schulz, Michael Gerndt:
VersaSlot: Efficient Fine-grained FPGA Sharing with Big.Little Slots and Live Migration in FPGA Cluster. 1-7 - Zeyu Sun, Weijie Tong, Xiaoning Ma, He Cao, Jianyun Liu, Zhiqiang Li, Qinzhi Xu:
ChipletEM: Physics-Based 2.5D and 3D Chiplet Heterogeneous Integration Electromigration Signoff Tool Using Coupled Stress and Thermal Simulation. 1-7 - Samit Shahnawaz Miftah, Hyunmin Kim
InterConFuzz: A Fuzzing-based Comprehensive NoC Verification Framework. 1-7 - Chun-Le Yeh, Liang-Chi Chen, Chien-Chung Ho, Yu-Ming Chang, Da-Wei Chang:
PIMDup: An Optimized Deduplication Design on a Real Processing-in-Memory System. 1-7 - Dongjun Kim, Junwoo Park, Chaehyeon Shin, Jaeheon Jung, Kyungho Shin, Seungheon Baek, Sanghyuk Heo, Woongrae Kim, In-Chul Jeong, Joohwan Cho, Jongsun Park:
GLOVA: Global and Local Variation-Aware Analog Circuit Design with Risk-Sensitive Reinforcement Learning. 1-7 - David Kong, Shvetank Prakash, Jedrzej Kufel, Georgios Kyriazidis, Yasmine Omri, David Verity, Emre Ozer, Vijay Janapa Reddi, Gage Hills:
333-eDRAM - 3T Embedded DRAM Leveraging Monolithic 3D Integration of 3 Transistor Types: IGZO, Carbon Nanotube and Silicon FETs. 1-7 - Yan Zhang, Xiaohang Wang, Yingtao Jiang, Amit Kumar Singh:
On Design Space Exploration of Cache System in Multi-Chiplet Systems. 1-7 - Tianze Zhu, Liqiang Lu, Jiajun Chen, Yuhang Chen, Hengrui Chen, Meng Xi, Jinshan Zhang, Xiaoming Sun, Jianwei Yin:
SAPO: Improving the Scalability and Accuracy of Quantum Linear Solver for Portfolio Optimization. 1-7 - Shikai Wang, Yaolong Hu, Zhiqiang Yi, Taiyun Chi, Weidong Cao:
Late Breaking Results: Opera: An Open and Efficient Platform for Data-driven Synthesis of Analog Circuits. 1-2 - Yu-Wei Chang, Shao-Yun Fang, Kai-Chuan Yang, Min-Ching Lin:
Secondary-Power-Cell-Aware Detailed Placement in Multiple Power Domain Designs. 1-7 - Jun Yan Lee, Chen Nie, Kang You, Yueyang Jia, Rui Yang, Zhezhi He:
BiNeuroRAM: Energy-Efficient ReRAM-Based PIM for Accurate Bipolar Spiking Neural Network Acceleration. 1-7 - Shan Shen, Yibin Zhang, Hector Rodriguez Rodriguez, Wenjian Yu:
Few-shot Learning on AMS Circuits and Its Application to Parasitic Capacitance Prediction. 1-7 - Ngoc Phu Doan
DeepPUFSCA: Deep learning for Physical Unclonable Function attack based on Side Channel Analysis support. 1-7 - Chang Liu, Shuaihu Feng, Yuan Li, Dongsheng Wang, Trevor E. Carlson:
HoBBy: Hardening Unbalanced Branches against Control Flow Attacks on Intel SGX and AMD SEV. 1-7 - Baohui Xie, Xinrui Zhu, Zhiyuan Lu, Yuan Pu, Tongkai Wu, Xiaofeng Zou, Bei Yu, Tinghuan Chen:
DSPlacer: DSP Placement for FPGA-based CNN Accelerator. 1-7 - Wenjie Li, Xiang Chen, Yelin Shan, Jiapin Wang, Yunxin Huang, Yafei Yang, Tao Lu, You Zhou, Fei Wu:
StreamCSD: SSD-Autonomous Stream Management via In-Storage Content Learning. 1-7 - Xuehui Liu, Xueyan Wang, Tianyang Yu, Chen Cheng, Shuo Ran, Bi Wu, Xiaotao Jia, Weiqiang Liu, Gang Qu, Weisheng Zhao:
MIRACLE: Multimodal Information Retrieval via a Combined In-Memory Processing and Content Addressable Memory Approach. 1-7 - Dina Hussein, Chibuike E. Ugwu, Ganapati Bhat, Janardhan Rao Doppa:
Uncertainty-Aware Energy Management for Wearable IoT Devices with Conformal Prediction. 1-7 - Yancheng Zhang, Mengxin Zheng, Xun Chen, Jingtong Hu, Weidong Shi, Lei Ju, Yan Solihin, Qian Lou:
zkVC: Fast Zero-Knowledge Proof for Private and Verifiable Computing. 1-7 - Chenlin Ma, Kaoyi Sun, Yuxuan Qi, Jiaxian Chen, Xiaochuan Zheng, Tianyu Wang, Yi Wang:
MiniWear: Minimizing Flash Wear via Hybrid Persistent Cache for Extended EF-SMR Lifetime. 1-7 - Qianyu Cheng, Jiajun Ji, Teng Wang, Zihan Wang, Lei Gong, Chao Wang, Xuehai Zhou:
Late Breaking Results: Source-Aware Adaptive Cache Management for CXL-enabled Disaggregated Memory Sharing. 1-2 - Vincent Fu
High-Performance Computing Architecture Exploration with Stage-Enhanced Bayesian Optimization. 1-7 - Shiwei Liu, Zhirui Huang, Jiangnan Yu, Qi Liu, Chixiao Chen:
McPAL: Scaling Unstructured Sparse Inference with Multi-Chiplet HBM-PIM Architecture for LLMs. 1-7 - Fangduo Zhu, Jingyi Chen, Jingsong Zhang, Xumeng Zhang, Siyuan Ouyang, Chenyang, Hao Jiang, Xiaonan Yang, Qi Liu:
SDISC: A Spike-Driven Human-Machine Interface with In-Situ Computing for Real-Time Low-Power Interaction. 1-7 - Elisa Bertino, Imtiaz Karim, Ashish Kundu:
Security Opportunities and Challenges for Disaggregated Architectures (Invited). 1-4 - Xuchu Huang, Haonan Du, Min Zhou, Zheyu Yan, Cheng Zhuo, Xunzhao Yin:
VQT-CiM: Accelerating Vector Quantization Enhanced Transformer with Ferroelectric Compute-in-Memory. 1-7 - Tianlang Zhao, Jun Liu, Xingyang Li, Li Ding, Jinhao Li, Shuaiheng Li, Jinbo Hu, Guohao Dai:
Harnessing Conventional Video Processing Insights for Emerging 3D Video Generation Models: A Comprehensive Attention-aware Way. 1-7 - Jinhua Cui, Qiao Peng, Yiwen Yao, Ke Ye, Jiliang Zhang:
IntraFuzz: Coverage-Guided Intra-Enclave Fuzzing for Intel SGX Applications. 1-7 - Ting-Xin Lin, Yih-Lang Li:
Synthesis of CFET Cell Library Leveraging Backside Metal Routing. 1-7 - Ismael Youssef, Cong Callie Hao:
Late Breaking Results: FPGen-3D: Automated Framework for 3D-FPGA Architecture Generation and Exploration. 1-2 - Chenhui Deng, Yunsheng Bai, Haoxing Ren:
ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation. 1-7 - Yili Guo, Zhuoran Ma, Xiangyue Li, Jiajia Huang, Wanli Chang:
LightRIM: Light Runtime Integrity Measurement for Linux Kernels in Embedded Applications. 1-6 - Yu Mao, Jingzong Li, Jun Wang, Hong Xu, Tei-Wei Kuo, Nan Guan, Chun Jason Xue:
Easz: An Agile Transformer-based Image Compression Framework for Resource-constrained IoTs. 1-7 - Yun-Chia Yu, Suraj Pn Reddy, Aryan Devrani, Anirudh Srinivasan, Saianudeep Reddy Nayini, Sohyeon Kim, Sung-Joon Jang, Sang-Seol Lee, Mingu Kang:
High-throughput Point-Cloud Accelerator with Sparsity-aware Hierarchical Neighbor Voxel Search and Skipping. 1-7 - Tara Gheshlaghi, Haibin Zhao, Priyanjana Pal, Michael Hefenbrock, Michael Beigl, Mehdi B. Tahoori:
Power-Constrained Printed Neuromorphic Hardware Training. 1-7 - Qingcai Jiang, Buxin Tu, Xiaoyu Hao, Junshi Chen, Hong An:
NDFT: Accelerating Density Functional Theory Calculations via Hardware/Software Co-Design on Near-Data Computing System. 1-7 - Fangxin Liu, Haomin Li, Zongwu Wang, Bo Zhang, Mingzhe Zhang, Shoumeng Yan, Li Jiang, Haibing Guan:
ALLMod: Exploring Area-Efficiency of LUT-based Large Number Modular Reduction via Hybrid Workloads. 1-7 - Taixin Li, Thomas Kämpfe, Jianfeng Wang, Kai Ni, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li:
PUFiM: A Robust and Efficient FeFET-Based Security Solution Merging Physical Unclonable Function with Compute-in-Memory for Edge AI. 1-7 - Jaehoon Ahn, Taewhan Kim:
Design and Technology Co-optimization Utilizing Flip-FET (FFET) Standard Cells. 1-7 - Hongduo Liu, Chen Bai, Peng Xu, Lihao Yin, Xianzhi Yu, Hui-Ling Zhen, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu:
LLMShare: Optimizing LLM Inference Serving with Hardware Architecture Exploration. 1-7 - Chen-Jui Tu, Shuo-Han Chen:
Enabling Data-Deduplication-Assisted Data Relocation for Interlaced Magnetic Recording. 1-6 - Qunyou Liu, Marina Zapater, David Atienza:
Gem5-AcceSys: Enabling System-Level Exploration of Standard Interconnects for Novel Accelerators. 1-7 - Youngbin Kim, Yoojin Lim:
Intermittent Systems at Small Scale: Execution Model and Design Guidelines. 1-7 - Sanjay Das, Swastik Bhattacharya, Anand Menon, Shamik Kundu, Pooja Madhusoodhanan, Prasanth Viswanathan Pillai, Rubin A. Parekhji, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu:
Machine Learning-Driven STL Generation for Enhancing Functional Safety of E/E Systems. 1-7 - Zihao Xuan, Yuxuan Yang, Wei Xuan, Zijia Su, Song Chen, Yi Kang:
YOCO: A Hybrid In-Memory Computing Architecture with 8-bit Sub-PetaOps/W In-Situ Multiply Arithmetic for Large-Scale AI. 1-7 - Yisu Wang, Ruilong Wu, Xinjiao Li, Dirk Kutscher:
PacTrain: Pruning and Adaptive Sparse Gradient Compression for Efficient Collective Communication in Distributed Deep Learning. 1-7 - Moritz Thoma, Emad Aghajanzadeh, Shambhavi Balamuthu Sampath, Pierpaolo Morì, Nael Fasfous, Alexander Frickenstein, Manoj Rohit Vemparala, Daniel Mueller-Gritschneder, Ulf Schlichtmann:
SuperFast: Fast Supernet Training Using Initial Knowledge. 1-7 - Jiaxian Chen, Yuxuan Qi, Jianan Yuan, Kaoyi Sun, Tianyu Wang, Chenlin Ma, Yi Wang:
Move Less, Retrieve Fast: A Retrieval-in-Memory Architecture for Language Models. 1-7 - Zhaokun Han, Daniel Xing, Kostas Amberiadis, Ankur Srivastava, Jeyavijayan (JV) Rajendran:
SCONE: A Logic Locking Technique Utilizing SMT Solver and Circuit Encoding Scheme for Efficient Hardware IP Protection. 1-7 - Li-C. Wang:
LLMs Meet Post-Silicon Test Engineering: A New Era (Invited). 1-5 - Mohammed Bakr Sikal, Jeferson González-Gómez
Contention-Aware Forecasting of Energy Efficiency through Sequence-Based Models in Modern Heterogeneous Processors. 1-7 - Kun Wu, Jeongmin Brian Park, Xiaofan Zhang, Mert Hidayetoglu, Vikram Sharma Mailthody, Sitao Huang, Steven S. Lumetta, Wen-Mei Hwu:
SSDTrain: An Activation Offloading Framework to SSDs for Faster Large Language Model Training. 1-7 - Alessandro Luongo, Varun Narasimhachar, Adithya Sireesh:
Optimizing windowed arithmetic for quantum attacks against RSA-2048. 1-7 - Bruno D. Miranda
Multicore Environment State Representation for Agent-Directed Test Generation. 1-7 - Imtiaz Ahmed
CREST-CiM: Cross-Coupling-Enhanced Differential STT-MRAM for Robust Computing-in-Memory in Binary Neural Networks. 1-7 - Xia Zeng, Mengxin Ren, Zhiming Liu, Zhengfeng Yang:
Learning-Aided Safe Controller Synthesis with Formal Guarantees via Vector Barrier Certificates. 1-7 - Chenming Zhang, Lei Gong, Chao Wang, Xuehai Zhou:
An Efficient Bit-level Sparse MAC-accelerated Architecture with SW/HW Co-design on FPGA. 1-7 - Yonghao Tan, Pingcheng Dong, Yongkun Wu, Yu Liu, Xuejiao Liu, Peng Luo, Shih-Yang Liu, Xijie Huang, Dong Zhang, Luhong Liang, Kwang-Ting Cheng:
APSQ: Additive Partial Sum Quantization with Algorithm-Hardware Co-Design. 1-7 - Yikang Ouyang, Xiaofei Yu, Jiadong Zhu, Tinghuan Chen, Yuzhe Ma:
Efficient Continuous Logic Optimization with Diffusion Model. 1-7 - Zongwu Wang, Peng Xu, Fangxin Liu, Yiwei Hu, Qingxiao Sun, Gezi Li, Cheng Li, Xuan Wang, Li Jiang, Haibing Guan:
MILLION: MasterIng Long-Context LLM Inference Via Outlier-Immunized KV Product QuaNtization. 1-7 - Xinglin Zheng, Hao Gu, Keyu Peng, Youwen Wang, Wenxing Zhu, Ziran Zhu:
Late Breaking Results: Customized Diffusion Model Empowered by Heterogeneous Graph Network for Effective Floorplanning. 1-2 - Chaithanya Naik Mude, Satvik Maurya, Benjamin Lienhard, Swamit Tannu:
Efficient and Scalable Architectures for Multi-level Superconducting Qubit Readout. 1-7 - Pingdan Xiao, Zhengmiao Wei, Sichun Du, Wanli Chang, Qinghui Hong:
ACIM-QMM: Efficient Analog Computing-in-Memory Accelerator for QC-MDPC McEliece Cryptosystem. 1-6 - Taewon Park, Saeid Gorgin, Dongwhee Kim, Jaeho Shin, Michael B. Sullivan, Jungrae Kim:
PoP-ECC: Robust and Flexible Error Correction against Multi-Bit Upsets in DNN Accelerators. 1-7 - Ziheng Wang, Ruiqi Sun, Xin He, Tianrui Ma
DenSparSA: A Balanced Systolic Array Approach for Dense and Sparse Matrix Multiplication. 1-7 - Chen-Hao Hsu, David Z. Pan, Laurent Perron, Frédéric Didier, Xiaoqing Xu, Hao Chen:
TransRoute: A Novel Hierarchical Transistor-Level Routing Framework Beyond Standard-Cell Methodology. 1-7 - Chaoqiang Liu, Dan Chen, Yu Huang, Wenjing Xiao, Haifeng Liu, Yi Zhang, Huize Li, Xiaofei Liao, Hai Jin:
SeIM: In-Memory Acceleration for Approximate Nearest Neighbor Search. 1-7 - Rongliang Fu, Ran Zhang, Ziyang Zheng, Zhengyuan Shi, Yuan Pu, Junying Huang, Qiang Xu, Tsung-Yi Ho:
Late Breaking Results: Hybrid Logic Optimization with Predictive Self-Supervision. 1-2 - Guy Eichler
An Energy-Efficient Kalman Filter Architecture with Tunable Accuracy for Brain-Computer Interfaces. 1-7 - Lingxiao Jin, Zinuo Cai, Zebin Chen, Hongyu Zhao, Ruhui Ma:
AARC: Automated Affinity-aware Resource Configuration for Serverless Workflows. 1-7 - Xiaorang Guo, Tigran Bunarjyan, Dai Liu, Benjamin Lienhard, Martin Schulz:
KLiNQ: Knowledge Distillation-Assisted Lightweight Neural Network for Qubit Readout on FPGA. 1-7 - Silin Chen
Delving into Topology Representation for Layout Pattern: A Novel Contrastive Learning Framework for Hotspot Detection. 1-6 - Miao Yu, Trevor E. Carlson:
SSFT: Algorithm and Hardware Co-design for Structured Sparse Fine-Tuning of Large Language Models. 1-7 - Xuyang Zhao, Yiyang Zhao, Zheng Wu, Tianning Gao, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng:
Look Before You Leap: A Self-Review Bayesian Optimization Method for Constrained High-Dimensional Design Space Exploration. 1-7 - Da-Wei Huang, Shao-Yun Fang:
MIA-aware FinFlex Cell Legalization with Power-Driven Cell Version Substitution. 1-7 - Ji Liu, Allen Zang, Martin Suchara, Tian Zhong, Paul D. Hovland:
Hardware-Software Co-design for Distributed Quantum Computing. 1-6 - Zhiyang Chen, Hailong Yao, Xia Yin:
PatLabor: Pareto Optimization of Timing-Driven Routing Trees. 1-7 - Chiao-Yu Ou, Yan-Jen Chen, Yao-Wen Chang:
Constraint Graph-based PCB Legalization Considering Dense, Heterogeneous, Irregular-Shaped, and Any-oriented Components. 1-7 - Tinglue Wang, Yiming Li, Wei Tang, Jiapeng Guan, Zhenghui Guo, Renshuang Jiang, Ran Wei, Jing Li, Zhe Jiang:
FlexStep: Enabling Flexible Error Detection in Multi/Many-core Real-time Systems. 1-7 - Jun-Wei Liang, Iris Hui-Ru Jiang, Kai-Hsiang Chiu
Harrow: Synthesis of Optical Logic Circuits via Harmonic Mean and Integer Partition. 1-7 - Haoxuan Wang, Yinghao Yang, Jinkai Zhang, Hang Lu, Xiaowei Li:
Ares: High Performance Near-Storage Accelerator for FHE-based Private Set Intersection. 1-6 - Arijit Shaw, Kuldeep S. Meel:
Approximate SMT Counting Beyond Discrete Domains. 1-7 - Guanglei Zhou, Bhargav Korrapati, Gaurav Rajavendra Reddy, Chen-Chia Chang, Jingyu Pan, Jiang Hu, Yiran Chen, Dipto G. Thakurta:
PatternPaint: Practical Layout Pattern Generation Using Diffusion-Based Inpainting. 1-7 - Abu Kaisar Mohammad Masum
Late Breaking Results: On-the-Fly Hadamard Hypervector Processing for Efficient Hyperdimensional Computing. 1-2 - Guoxiang Li, Runnan Xu, Ruohang Xu, Yikan Qiu, Renati Tuerhong, Muhan Zhang, Le Ye, Yufei Ma:
3D-SubG: A 3D Stacked Hybrid Processing Near/In-Memory Accelerator for Subgraph GNNs. 1-7 - Jianzhong Liu, Yuheng Shen, Yifei Chu, Qiang Zhang, Heyuan Shi, Wanli Chang, Yu Jiang:
DROIDFUZZ: Proprietary Driver Fuzzing for Embedded Android Devices. 1-7 - Jason Zev Ludmir, Sophia Rebello, Jacob Ruiz, Tirthak Patel:
Quorum: Zero-Training Unsupervised Anomaly Detection using Quantum Autoencoders. 1-7 - Fangxin Liu, Ning Yang, Zongwu Wang, Xuanpeng Zhu, Haidong Yao, Xiankui Xiong, Li Jiang, Haibing Guan:
BLOOM: Bit-Slice Framework for DNN Acceleration with Mixed-Precision. 1-7 - Borui Li, Tiange Xia, Shuai Wang, Shuai Wang:
InfScaler: Enabling Efficient ML Inference Serving on Multi-Accelerator Edge Devices via Asymmetric Auto-Scaling. 1-7 - Rihui Sun, Jin Wu, Hanyin Liu, Zikang Tao, Gang Qu, Dong-Sheng Wang, Yongqiang Lyu, Jian Dong:
BPUFuzzer: Effective Fuzz Testing for Branching Transient Execution Vulnerabilities of RISC-V CPU. 1-7 - Ruokai Yin, Yuhang Li, Priyadarshini Panda:
PacQ: A SIMT Microarchitecture for Efficient Dataflow in Hyper-asymmetric GEMMs. 1-7 - Benedikt Dietrich, Heba Khdr, Jörg Henkel:
Centralized Training and Decentralized Control through the Actor-Critic Paradigm for Highly Optimized Multicores. 1-7 - Yoonho Jang, Hyeongjun Cho, Yesin Ryu, Jungrae Kim, Seokin Hong:
PIMPAL: Accelerating LLM Inference on Edge Devices via In-DRAM Arithmetic Lookup. 1-7 - Yuncheng Xu, Fan Yang, Yangfeng Su:
Efficient Recycling Subspace Truncation Method for Periodic Small-Signal Analysis. 1-7 - Iris Ying Chou, Hao Kong, Yi Huang, Jianfeng Zhu, Wenping Zhu, Shaojun Wei, Aoyang Zhang, Leibo Liu:
Chameleon-SAT: An Adaptive Boolean Satisfiability Accelerator Using Mixed-Signal In-Memory Computing for Versatile SAT Problems. 1-7 - Jiaming Liu, Xuan Huang, Zhijian Hao, Ruoxi Zhu, Qi Zheng, Shuocheng Wang, Shushi Chen, Chang Liu, Leilei Huang, Jun Tao, Yibo Fan:
MAS-ISP: A Proxy-Free Online Hyperparameter Optimization Framework for ISP Hardware System. 1-7 - Tzu-Yu Tung, Yu-Ling Hsu, Shao-Lun Huang, Chung-Yang Ric Huang:
Efficient Rectification Signal Validation for Optimal Functional ECO Patch Generation. 1-6 - Jingxiao Ma, Priyadarshini Panda, Sherief Reda:
FF-INT8: Efficient Forward-Forward DNN Training on Edge Devices with INT8 Precision. 1-7 - Zherui Zhang, Changwei Wang, Rongtao Xu, Wenhao Xu, Shibiao Xu, Yu Zhang, Jie Zhou, Li Guo:
CAE-DFKD: Bridging the Transferability Gap in Data-Free Knowledge Distillation. 1-7 - Insu Choi, Jaeyong Chung, Joon-Sung Yang:
DBC: Drift-aware Binary Code for Drift-tolerant Deep Neural Networks. 1-7 - Weikai Lin, Tianrui Ma
SNAPPIX: Efficient-Coding-Inspired In-Sensor Compression for Edge Vision. 1-7 - Yuchen Wei, Jingwei Cai, Mingyu Gao, Sen Peng, Zuotong Wu, Guiming Shi
Buffer Prospector: Discovering and Exploiting Untapped Buffer Resources in Many-Core DNN Accelerators. 1-7 - Lida Kouhalvandi, Sercan Aygun, M. Hassan Najafi, Arman Roohi:
Late Breaking Results: Automated Topology Generation for Power Amplifier Designs through BiLSTM-based DNN and Multi-objective Optimizations. 1-2 - Mengchu Li, Jiahui Peng, Tsun-Ming Tseng, Ulf Schlichtmann:
FT-MUX: A Fault-Tolerant Microfluidic Multiplexer Design. 1-7 - Yuyang Fu, Jiancong Li, Jia Chen, Zhiwei Zhou, Houji Zhou, Wenlong Peng, Yi Li, Xiangshui Miao:
ReSMiPS: A ReRAM-based Sparse Mixed-precision Solver with Fast Matrix Reordering Algorithm. 1-7 - Ashish Kundu, Ramana Kompella:
Quantum-Resistant Security: PQC Readiness and Research Challenges (Invited). 1-4 - Zichen Fan, Steve Dai, Rangharajan Venkatesan, Dennis Sylvester, Brucek Khailany:
SQ-DM: Accelerating Diffusion Models with Aggressive Quantization and Temporal Sparsity. 1-7 - Jian Gao, Weimin Fu, Xiaolong Guo, Weidong Cao, Xuan Zhang:
EVA: An Efficient and Versatile Generative Engine for Targeted Discovery of Novel Analog Circuits. 1-7 - Cong Jiang
Generalizable Lithographic Hotspot Detection Using Asynchronous Meta-Learning with Only One Shot. 1-7 - Yiwen Liang, Weidong Cao:
Late Breaking Results: Less Sense Makes More Sense: In-Sensor Compressive Learning for Efficient Machine Vision. 1-2 - Zikang Zhou, Kaiqi Chen, Xuyang Duan, Jun Han:
A Memory-Efficient LLM Accelerator with Q-K Correlation Prediction using Cluster-Based Associative Array for Selective KV Accessing. 1-7 - Shijin Duan, Gaowen Liu, Charles Fleming, Ramana Kompella, Xiaolin Xu, Shaolei Ren:
Towards Training Robustness Against Dynamic Errors in Quantum Machine Learning. 1-7 - Hanjie Liu, Sifan Sun, Aifei Zhang, Haiyan Qin, Yutong Wu, Minhao Gu, Shihang Fu, Shuaikai Liu, Baosen Liu, Wang Kang:
Efficient Weight Mapping and Resource Scheduling on Crossbar-based Multi-core CIM Systems. 1-6 - Dongdong Tang, Yu Mao, Weilan Wang, Nan Guan, Tei-Wei Kuo, Chun Jason Xue:
DAWN: Accelerating Point Cloud Object Detection via Object-Aware Partitioning and 3D Similarity-Based Filtering. 1-7 - Wentao Zhao, Boya Lv, Meng Wu
3D-TokSIM: Stacking 3D Memory with Token-Stationary Compute-in-Memory for Speculative LLM Inference. 1-7 - Xuanteng Huang, Jiangsu Du, Nong Xiao, XianWei Zhang:
PASK: Cold Start Mitigation for Inference with Proactive and Selective Kernel Loading on GPUs. 1-7 - Ubaid Bakhtiar, Donghyeon Joo, Bahar Asgari:
Pipirima: Predicting Patterns in Sparsity to Accelerate Matrix Algebra. 1-7 - Adit D. Singh, Mukarram Ali Faridi:
Invited: Enhancing Test Quality by Targeting Timing Marginalities Due to Process Variations. 1-4 - Md. Abdullah-Al Kaiser, Sugeet Sunder, Ajey P. Jacob, Akhilesh R. Jaiswal:
A Mixed-Signal Photonic SRAM-based High-Speed Energy-Efficient Photonic Tensor Core with Novel Electro-Optic ADC. 1-7 - Shupeng Wang, Xindong Fan, Xiao Xu, Shuchen Wang, Lei Ju, Zimeng Zhou:
FPGA-TrustZone: Security Extension of TrustZone to FPGA for SoC-FPGA Heterogeneous Architecture. 1-6 - Milad Tanavardi Nasab, Wu Yang, Himanshu Thapliyal:
Late Breaking Results: Novel Design of MTJ-Based Unified LIF Spiking Neuron and PUF. 1-2 - Liaoyuan Cheng, Mengchu Li, Tsun-Ming Tseng, Martin Schottenloher, Ulf Schlichtmann:
Process-Variation-Aware Design Optimization for Wavelength-Routed Optical Networks-on-Chip. 1-7 - Ziang Yin, Meng Zhang, Nicholas Gangi, Z. Rena Huang, Jeff Jun Zhang, Jiaqi Gu:
SimPhony: A Device-Circuit-Architecture Cross-Layer Modeling and Simulation Framework for Heterogeneous Electronic-Photonic AI System. 1-7 - Jingyu Zhu, Yan Ding, Lu Xiao, Kenli Li, Chubo Liu, Zheng Xiao:
A Post-Implementation Performance Prediction Method with HLS Optimization Directives. 1-6 - Ning Yang, Zongwu Wang, Qingxiao Sun, Liqiang Lu, Fangxin Liu:
PISA: Efficient Precision-Slice Framework for LLMs with Adaptive Numerical Type. 1-7 - Jie Wang, Juan Wang, Yinqian Zhang:
ZION: A Practical Confidential Virtual Machine Architecture on Commodity RISC-V Processors. 1-7 - Siang-Yun Lee, Heinz Riener, Sascha Richter, Ankush Sood:
Logic Restructuring with Preserved Logic Blocks. 1-6 - Zhiteng Chao, Xindi Zhang, Xinyu Zhang, Jianan Mu, Zizhen Liu, Shengwen Liang, Shaowei Cai, Jing Ye, Xiaowei Li, Huawei Li:
PastATPG: A Hybrid ATPG Framework for Better Test Compaction with Partial Assignment SAT. 1-7 - Weikai Xu, Wenxuan Zeng, Qianqian Huang, Meng Li, Ru Huang:
UniCAIM: A Unified CAM/CIM Architecture with Static-Dynamic KV Cache Pruning for Efficient Long-Context LLM Inference. 1-7 - Wei-Kai Liu, Benjamin Tan, Krishnendu Chakrabarty:
Identifying System-on-Chip Security Assets with Structure-Based Analysis. 1-7 - Navnil Choudhury, Ameya S. Bhave, Kanad Basu:
ZXNet: ZX Calculus-Driven Graph Neural Network Framework for Quantum Circuit Equivalence Checking. 1-7 - Supriyo Maji, Linran Zhao, Souradip Poddar, David Z. Pan:
Late Breaking Results: Breaking Symmetry - Unconventional Placement of Analog Circuits using Multi-Level Multi-Agent Reinforcement Learning. 1-2 - Bingkun Yao, Ning Wang, Jie Zhou, Xi Wang, Hong Gao, Zhe Jiang, Nan Guan:
Location is Key: Leveraging LLM for Functional Bug Localization in Verilog Design. 1-7 - Zhe Jiang, Minli Liao, Sam Ainsworth, Dean You, Timothy M. Jones:
MEEK: Re-thinking Heterogeneous Parallel Error Detection Architecture for Real-World OoO Superscalar Processors. 1-7 - Jianfei Song, Xiaoyu Yang
A Cutting-Edge Parallel Solver for Scalable Power Grid Analysis Using Nested Domain Decomposition. 1-7 - Hiroto Tagata, Takashi Sato, Hiromitsu Awano:
Lookup Table-based Multiplication-free All-digital DNN Accelerator Featuring Self-Synchronous Pipeline Accumulation. 1-7 - Yuheng Su, Yingcheng Li, Qiusong Yang, Yiwei Ci, Ziyu Huang:
Property-driven Parallel Symbolic Model Checking of LTL. 1-7 - Chen Nie, Chao Jiang, Liming Xiao, Weifeng Zhang, Zhezhi He:
PICK: An SRAM-based Processing-in-Memory Accelerator for K-Nearest-Neighbor Search in Point Clouds. 1-7 - Lingfeng Zhu, Xindi Zhang, Yongjian Li, Shaowei Cai:
Leveraging Critical Proof Obligations for Efficient IC3 Verification. 1-7 - Xin Zhang, Jiajun Zou, Yi Yang, Qingni Shen, Zhi Zhang
LeakyDSP: Exploiting Digital Signal Processing Blocks to Sense Voltage Fluctuations in FPGAs. 1-7 - Wan-Luan Lee, Shui Jiang, Dian-Lun Lin, Che Chang, Boyang Zhang, Yi-Hua Chung, Ulf Schlichtmann, Tsung-Yi Ho, Tsung-Wei Huang:
iG-kway: Incremental k-way Graph Partitioning on GPU. 1-7 - Muhammad Kashif, Alberto Marchisio, Muhammad Shafique:
Computational Advantage in Hybrid Quantum Neural Networks: Myth or Reality? 1-7 - Shuting Du, Luqi Zheng, Aradhana Mohan Parvathy, Feifan Xie, Tiwei Wei, Anand Raghunathan, Haitong Li:
3D-CIMlet: A Chiplet Co-Design Framework for Heterogeneous In-Memory Acceleration of Edge LLM Inference and Continual Learning. 1-7 - Zhichao Chen, Puneet Gupta:
YAP: Yield Modeling and Simulation for Advanced Packaging. 1-7 - Amir Fakhim Babaei, Thidapat Chantem:
DARIS: An Oversubscribed Spatio-Temporal Scheduler for Real-Time DNN Inference on GPUs. 1-7 - Junkai Liang, Xing Zhang, Daqi Hu, Qingni Shen, Yuejian Fang, Zhonghai Wu:
ZK-Hammer: Leaking Secrets from Zero-Knowledge Proofs via Rowhammer. 1-7 - Joonseok Kim, Donggyu Kim, Seonghyeon Park, Seokhyeong Kang:
FedEDA: Federated Learning Framework for Privacy-Preserving Machine Learning in EDA. 1-7 - Farzad Razi, Mehran Shoushtari Moghadam, M. Hassan Najafi, Sercan Aygun, Marc D. Riedel:
In-Memory Arithmetic: Enabling Division with Stochastic Logic. 1-2 - Wenkai Li, Yao Lu, Wenji Fang, Jing Wang, Qijun Zhang, Zhiyao Xie:
ATLAS: A Self-Supervised and Cross-Stage Netlist Power Model for Fine-Grained Time-Based Layout Power Analysis. 1-7 - Nan Jiang, Hengshan Yue, Jingweijia Tan, Mengting Zhou, Xiaonan Wang, Yuchun Wang, Wenda Wei, Meikang Qiu, Xiaohui Wei:
GraphFI: An Efficient Fault Injection Framework for Graph Processing on GPGPUs. 1-7 - Zizheng Guo, Yanqing Zhang, Runsheng Wang, Yibo Lin, Haoxing Ren:
GEM: GPU-Accelerated Emulator-Inspired RTL Simulation. 1-7 - Changran Xu, Yi Liu, Yunhao Zhou, Shan Huang, Ningyi Xu, Qiang Xu:
Speculative Decoding for Verilog: Speed and Quality, All in One. 1-7 - Fenfang Li, Huizhang Luo, Weichen Liu, Anthony Theodore Chronopoulos, Kenli Li, Chubo Liu:
STREAM: Spatiotemporal Similarity-based Efficient Approximate Median with Tunable Granularity. 1-6 - Ziyuan Zhang, Han Qiu, Tianwei Zhang, Bin Chen, Chao Zhang:
DCDiff: Enhancing JPEG Compression via Diffusion-based DC Coefficients Estimation. 1-7 - Zhen Huang, Hong Wang, Wenkai Yang, Muxi Tang, Depeng Xie, Ting-Jung Lin, Yu Zhang, Wei W. Xing, Lei He:
Self-Attention to Operator Learning-based 3D-IC Thermal Simulation. 1-7 - Sehyeon Chung, Hyun-chul Hwang, Byung Su Kim, Jaeha Lee, Kunhyuk Kang, Taewhan Kim:
Late Breaking Results: Utilization of Hybrid Threshold-Voltage Flip-flops for Power Recovery. 1-2 - Sangmin Yoo, Amod Holla, Sourav Sanyal, Dong Eun Kim, Francesca Iacopi, Dwaipayan Biswas, James Myers, Kaushik Roy:
TAXI: Traveling Salesman Problem Accelerator with X-bar-based Ising Macros Powered by SOT-MRAMs and Hierarchical Clustering. 1-7 - Haoxuan Wang, Yinghao Yang, Hang Lu, Xiaowei Li:
Hypnos: Memory Efficient Homomorphic Processing Unit. 1-7 - Xipeng Lin, Cong Wang, Shanshi Huang, Hongwu Jiang:
An Efficient Compute-in-Memory based Accelerator for Point-based Point Cloud Neural Networks. 1-7 - Sungwoong Yune, Hyojeong Lee, Adiwena Putra, Hyunjun Cho, Cuong Duong Manh, Jaeho Jeon, Joo-Young Kim:
ABC-FHE: A Resource-Efficient Accelerator Enabling Bootstrappable Parameters for Client-Side Fully Homomorphic Encryption. 1-7 - Xiaomeng Han, Yuan Cheng, Jing Wang, Junyang Lu, Hui Wang, X. x. Zhang, Ning Xu, Dawei Yang, Zhe Jiang:
BBAL: A Bidirectional Block Floating Point-Based Quantisation Accelerator for Large Language Models. 1-7 - Donglei Wu, Weihao Yang, Xiangyu Zou, Jinda Jia, Dingwen Tao, Wen Xia, Zhihong Tian:
BirdMoE: Reducing Communication Costs for Mixture-of-Experts Training Using Load-Aware Bi-random Quantization. 1-7 - Han Wang, Ming Tang, Quancheng Wang
ZenLeak: Practical Last-Level Cache Side-Channel Attacks on AMD Zen Processors. 1-7 - Wangzhen Li, Yuan Meng, Ruiyu Lyu, Changhao Yan, Keren Zhu, Zhaori Bi, Dian Zhou, Xuan Zeng:
MARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing. 1-7 - Zixuan Huang, Tianyu Wang, Kecheng Huang, Zelin Du, Zili Shao:
Expanding Logical Space Freely: A Memory-efficient Mapping Table Design for Compressional SSDs. 1-7 - Shufan Zhang, Xi He, Ashish Kundu, Sujaya Maiyya, Sharad Mehrotra, Shantanu Sharma:
Towards Secure Data Management using Multi-Cryptographic Solutions (Invited). 1-4 - Leshan Li, Hongyi Li, Qingyuan Yang, Mingtao Ou, Rong Zhao, Xinglong Ji:
Espresso: Exploiting the Sparsity Property in Event Sensors with Spatiotemporal Ordering. 1-7 - Rui Li, Lincoln Berkley, Rajit Manohar:
PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis. 1-7 - Shijin Duan, Nuntipat Narkthong, Yukui Luo, Shaolei Ren, Xiaolin Xu:
Holistic Design towards Resource-Stringent Binary Vector Symbolic Architecture. 1-7 - Vincenzo Petrolo, Flavia Guella, Michele Caon, Pasquale Davide Schiavone, Guido Masera, Maurizio Martina:
ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions. 1-6 - Zhenge Jia, Yiyang Shi, Zeyu Bao, Zirui Wang, Xin Pang, Huiguo Liu, Yu Duan, Zhaoyan Shen, Mengying Zhao:
Enabling On-Tiny-Device Model Personalization via Gradient Condensing and Alternant Partial Update. 1-7 - Zhaohui Yang, Dawei Ding, Chenghong Zhu, Jianxin Chen, Yuan Xie:
PHOENIX: Pauli-Based High-Level Optimization Engine for Instruction Execution on NISQ Devices. 1-7 - Hui Wang, Zhengpeng Zhao
NVR: Vector Runahead on NPUs for Sparse Memory Access. 1-7 - Aditya Japa
Security of Approximate Neural Networks against Power Side-channel Attacks. 1-7 - Ziyang Yu, Peng Xu, Zixiao Wang, Binwu Zhu, Qipan Wang, Yibo Lin, Runsheng Wang, Bei Yu, Martin D. F. Wong:
SDM-PEB: Spatial-Depthwise Mamba for Enhanced Post-Exposure Bake Simulation. 1-7 - Mingjun Wang, Hui Wang, Jianan Mu, Xinyu Zhang, Bin Sun, Yihan Wen, Zizhen Liu, Feng Gu, Jun Gao, Shengwen Liang, Jing Ye, Xiaowei Li, Huawei Li:
EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components. 1-7 - Jin Zhao, Yu Zhang, Jun Huang, Weihang Yin, Hui Yu, Hao Qi
A Data-Centric Hardware Accelerator for Efficient Adaptive Radix Tree. 1-7 - Likai Pei, Yu Zhou, Xingtian Wang, Xueji Zhao, Wanxin Huang
Towards Uncertainty-aware Robotic Perception via Mixed-signal BNN Engine Leveraging Probabilistic Quantum Tunneling. 1-7 - Qijun Zhang, Yao Lu, Mengming Li, Zhiyao Xie:
AutoPower: Automated Few-Shot Architecture-Level Power Modeling by Power Group Decoupling. 1-7 - Abdul Basit, Maha Nawaz, Saim Rehman, Muhammad Shafique:
CognitiveArm: Enabling Real-Time EEG-Controlled Prosthetic Arm Using Embodied Machine Learning. 1-7 - Juxin Niu, Xiangfeng Liu, Dan Niu, Xi Wang, Zhe Jiang, Nan Guan:
ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflection. 1-7 - Kai Ma, Zhen Wang, Hongquan He, Qi Xu, Tinghuan Chen, Hao Geng:
LMM-IR: Large-Scale Netlist-Aware Multimodal Framework for Static IR-Drop Prediction. 1-7 - Luca Colagrande
Dual-Issue Execution of Mixed Integer and Floating-Point Workloads on Energy-Efficient In-Order RISC-V Cores. 1-7 - Yi-Lin Chuang, Hao-Wei Chan, Chih-Yun Yen, Shih-An Hsieh, Ching-Feng Chen, Sheng-Te Lai:
Power-Grid Structure Exploration with Unified Sequence-based Learning Framework. 1-7 - Junyi Yang, Shuai Dong
High Energy-efficiency and Low latency In-Memory Computing using Analog Accumulator and In-Memory ADC with shared References. 1-7 - Bardia Nadimi, Ghali Omar Boutaib
PyraNet: A Multi-Layered Hierarchical Dataset for Verilog. 1-7 - Zhican Wang, Hongxiang Fan, Haroon Waris, Gang Wang, Zhenyu Li, Jianfei Jiang, Yanan Sun, Guanghui He:
VEDA: Efficient LLM Generation Through Voting-based KV Cache Eviction and Dataflow-flexible Accelerator. 1-7 - Alessandro Annechini, Marco Venere, Donatella Sciuto, Marco D. Santambrogio:
DDRoute: a Novel Depth-Driven Approach to the Qubit Routing Problem. 1-7 - Jiaqi Yin, Zhan Song, Chen Chen, Qihao Hu, Cunxi Yu:
BoolE: Exact Symbolic Reasoning via Boolean Equality Saturation. 1-7 - Pengju Chen, Dan Niu, Dekang Zhang, Wenhao Wang, Depeng Xie, Zhou Jin, Wei W. Xing, Lei He:
NeuralMesh: Neural Network For FEM Mesh Generation in 2.5D/3D Chiplet Thermal Simulation. 1-7 - Chunyu Qi, Xuhang Wang, Ruiyang Chen, Yuanzheng Yao, Naifeng Jing, Chen Zhang, Jun Wang, Zhihui Fu, Xiaoyao Liang, Zhuoran Song:
MHDiff: Memory- and Hardware-Efficient Diffusion Acceleration via Focal Pixel Aware Quantization. 1-7 - Junyu Gu, Shunde Li, Rongqiang Cao, Jue Wang, Zijian Wang, Zhiqiang Liang, Fang Liu, Shigang Li, Chunbao Zhou, Yangang Wang, Xuebin Chi:
ParGNN: A Scalable Graph Neural Network Training Framework on multi-GPUs. 1-7 - Zekai Chen, Yiming Chen, Teng Wan, Tianyi Yu, Yu Wang, Huazhong Yang, Xueqing Li:
DIAS: Distance-based Attention Sparsity for Ultra-Long-Sequence Transformer with Tree-like Processing-in-Memory Architecture. 1-7 - Sepehr Tabrizchi, Samin Sohrabi, Mohamadreza Mohammadi, Ramtin Zand, Shaahin Angizi, Arman Roohi:
ResISC: Residue Number System-Based Integrated Sensing and Computing for Efficient Edge AI. 1-7 - Dimitris Tsaras, Xing Li, Lei Chen, Zhiyao Xie, Mingxuan Yuan:
ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring. 1-7 - Sam Bush, Matthew DeLorenzo, Phat Tieu, Jeyavijayan Rajendran:
Free and Fair Hardware: A Pathway to Copyright Infringement-Free Verilog Generation using LLMs. 1-7 - Chengxi Li, Yang Sun, Lei Chen, Yiwen Wang, Mingxuan Yuan, Evangeline F. Y. Young:
SmaRTLy: RTL Optimization with Logic Inferencing and Structural Rebuilding. 1-7 - Yi Li, Zijian Ye, Xiangqu Fu, Songqi Wang, Shucheng Du, Ning Lin, Dashan Shang, Jinshan Yue, Zhongrui Wang, Xiaojuan Qi, Feng Zhang, Han Wang:
Efficient Edge Vision Transformer Accelerator with Decoupled Chunk Attention and Hybrid Computing-In-Memory. 1-7
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